JP3708810B2 - Nitride III-V compound semiconductor device - Google Patents
Nitride III-V compound semiconductor device Download PDFInfo
- Publication number
- JP3708810B2 JP3708810B2 JP2000266117A JP2000266117A JP3708810B2 JP 3708810 B2 JP3708810 B2 JP 3708810B2 JP 2000266117 A JP2000266117 A JP 2000266117A JP 2000266117 A JP2000266117 A JP 2000266117A JP 3708810 B2 JP3708810 B2 JP 3708810B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- compound semiconductor
- aln
- semiconductor device
- nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Junction Field-Effect Transistors (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、窒化物系III−V族化合物半導体装置に関し、特に、チャネル層(電子走行層)とバリア層(障壁層)のヘテロ接合の界面における組成や障壁高さのゆらぎのない窒化物系III−V族化合物半導体装置の構造に関する。
【0002】
【従来の技術】
HFET(Hetero Field Effect Transistor)構造における材料の組合せとしては、GaNをチャネル層とし、AlGaNをバリア層として、これらをヘテロ接合したものが最も一般的に用いられている(U.S.Patent No.5192987および特開平10−189944号公報など)。
【0003】
【発明が解決しようとする課題】
一般に、2つの元素から成る二元化合物半導体(たとえば、AlN、GaN、InNなど)と、この二元化合物半導体とは異なる二元化合物半導体との接合界面は、成長条件にも依存するが、急峻な界面が得られやすい。一方、二元化合物半導体と3つの元素から成る三元混晶半導体(たとえば、AlGaN,GaInN,AlInNなど)を組合せて接合する場合において、三元混晶半導体の成分が二元化合物半導体の成分と重なっている場合(たとえば、GaNとAlGaN、あるいはGaNとGaInNなど)は、急峻な界面は得られない。これは、たとえば図3に示すようなGaNとAlGaNとのヘテロ接合では、2つの半導体の境界にまたがって同一の元素(Ga)が存在するためである。このため、チャネル層であるはずのGaNとバリア層であるAlGaNの中のGaNが急峻な界面の形成を阻害し、ヘテロ接合の特性に悪影響を与え、移動度の低下などの問題が生じる。
【0004】
本発明の目的は、急峻な界面を有し、移動度などの特性に優れた窒化物系III−V族化合物半導体装置を提供することである。
【0005】
【課題を解決するための手段】
本発明は、ヘテロ構造を有する窒化物系III−V族化合物半導体装置において、
SiC基板の(0001)結晶面上に、
AlNエピタキシャルバッファ層と、
GaNチャネル層と、
AlNヘテロ特性改善層と、
AlおよびGaの組成比が一定であるAlGaNバリア層とが、順次積層され、
前記AlNヘテロ特性改善層の層厚が1分子層以上4分子層以下であることを特徴とする窒化物系III−V族化合物半導体装置である。
【0006】
本発明に従えば、二元化合物半導体同士の接合では、原子拡散がない限り界面は急峻となるため、ヘテロ構造を有する窒化物系III−V族化合物半導体装置において、チャネル層を構成するGaNチャネル層とバリア層を構成するAlおよびGaの組成比が一定であるAlGaNバリア層の間に、層厚が1分子層以上4分子層以下であり、AlNから成るAlNヘテロ特性改善層を介在させることにより、ヘテロ接合の界面における急峻性が改善される。
【0007】
また、窒化物系の半導体にこのような構造を適用した場合、界面におけるピエゾ効果がさらに大きくなり、2次元電子ガスのキャリアの濃度をより大きくすることができるといったAlGaAs/GaAsヘテロ構造には現れない効果があり、より電気的特性を向上させることができる。
またAlNヘテロ特性改善層を用いると、AlNは6.2eVという極めて大きなバンドギャップを有しており、その層厚が厚くなりすぎるとバリア層からチャネル層への電流注入が阻害され、ヘテロ構造として機能しなくなる。本発明に従えば、層厚が1分子層以上4分子層以下のAlNヘテロ特性改善層を用いることによって、接合界面の急峻性を維持しつつ、トンネル効果によって十分なキャリア輸送を行うことができる。よって、電気的特性に優れた窒化物III−V族化合物半導体装置が得られる。
【0009】
また、AlNヘテロ特性改善層のバンドギャップが、GaNチャネル層のバンドギャップよりも大きいので、これらの接合界面の急峻性が保たれる。
【0016】
【発明の実施の形態】
次に、本発明の具体的形態を実施例により説明するが、これら実施例により何ら制限を受けるものではない。
以下に、実施例を示す。
【0017】
(実施例1)
図1は、本発明の実施例である窒化物系III−V族化合物半導体装置10の概要を示す断面図である。窒化物系III−V族化合物半導体装置10は、半絶縁性SiC基板1の(0001)結晶面に、AlNエピタキシャルバッファ層2、第1の二元化合物半導体層でありキャリア濃度が1×1016cm-3のGaNチャネル層3、第2の二元化合物半導体層であるAlNバリア特性改善層4、三元混晶半導体層でありキャリア濃度が2×1017cm-3 で、AlおよびGaの組成比が一定であるAl0.2Ga0.8Nバリア層5、がこの順に積層され、この上にソース電極6a、ドレイン電極6b、およびゲート電極7が形成され構成される。
【0018】
このような層構造を形成するための結晶成長方法としては、有機金属気相成長法(
Metalorganic Chemical Vapor Deposition−MOCVD法)あるいはプラズマ励起した窒素を用いた分子線エピタキシー法(Radio Frequency−Molecular Beam Epitaxy;略称RF−MBEあるいはElectron Cyclotron Resonance−MBE;略称ECR−MBE)などを用いることができる。
【0019】
本実施例では、MOCVD法により、以下のような工程で作製した。
はじめに、水素雰囲気中において基板温度1000℃で半絶縁性SiC基板1の表面のクリーニングを10分間行った。次に、基板温度1100℃で厚さ20nmのAlNエピタキシャルバッファ層2を成長させ、引き続いて基板温度1000℃で厚さ1μmのGaNチャネル層3を成長させた。その後、基板温度1000℃でAlNヘテロ特性改善層4を成長させた。前記AlNヘテロ特性改善層4を形成するAlNは6.2eVという極めて大きなバンドギャップを有しているので、この層厚が厚くなり過ぎるとバリア層からチャネル層への電流の注入が阻害され、ヘテロ接合として機能しなくなる。つまり、界面急峻性を維持しつつ、トンネル効果によって十分なキャリア輸送を行える厚さにする必要がある。このため、AlNヘテロ特性改善層4の層厚は1分子層〜4分子層にすることが好ましい。本実施例では、この層厚を2分子層≒5Åとしている。さらに、基板温度を1100℃に上げてAl0.2Ga0.8Nバリア層5を成長させた。
【0020】
この後、フォトリソグラフィー法を用いてソース電極6a、ドレイン電極6bおよびゲート電極7を形成して窒化物系III−V族化合物半導体装置10を作製した。また、第2の二元化合物半導体層を介在させた本実施形態の窒化物系III−V族化合物半導体装置10の特性を従来型の化合物半導体装置の特性と比較するためAlNヘテロ特性改善層4を介在させない構造の化合物半導体装置も同様な工程で作製した。
【0021】
デバイス特性の測定に先立ち、半導体層の電気的特性をホール測定によって調べた。AlNヘテロ特性改善層4をGaNチャネル層3とAlGaNバリア層5との間に介在させた場合と介在させない場合の移動度を表1に示す。
【0022】
【表1】
【0023】
表1から、測定温度が室温である300Kでは、AlNヘテロ特性改善層4を介在させた場合は、AlNヘテロ特性改善層4を介在させない場合に比べて、移動度の改善が見られた。また、測定温度が液体窒素(LN2)温度である77Kにおいては、移動度の差が顕著に現れており、AlNヘテロ特性改善層4によって界面特性が改善されていることが判る。
【0024】
次に、ゲート電極7の長さが1μm、ソース電極6aおよびドレイン6b電極間の距離が5μmのHFETを作製し、その特性を評価した結果、AlNヘテロ特性改善層4を介在させた場合、最大発振周波数fmax=25GHz、トランスコンダクタンスgm=200mS/mm、介在させない場合はfmax=20GHz、gm=150mS/mmであり、AlNヘテロ特性改善層4の効果が見られた。
【0025】
以上のように、GaNチャネル層およびAlGaNバリア層のヘテロ接合面にAlNヘテロ特性改善層を介在させることによって界面急峻性が改善でき、また、界面におけるピエゾ効果がさらに大きくなることによって、2次元電子ガスのキャリア濃度をより大きくすることができるため電気的特性に優れた窒化物系III−V族化合物半導体装置が実現できる。
【0034】
以上のように、GaNチャネル層およびAlおよびGaの組成比が一定であるAlGaNバリア層のヘテロ接合面に層厚が1分子層以上4分子層以下のAlNヘテロ特性改善層を介在させることによって界面急峻性が改善でき、また、界面におけるピエゾ効果がさらに大きくなることによって、2次元電子ガスのキャリア濃度をより大きくすることができるため電気的特性に優れた窒化物系III−V族化合物半導体装置が実現できる。
【0036】
【発明の効果】
以上のように本発明によれば、ヘテロ構造を有する窒化物系III−V族化合物半導体装置において、チャネル層を構成するGaNチャネル層とバリア層を構成するAlおよびGaの組成比が一定であるAlGaNバリア層の間に、層厚が1分子層以上4分子層以下であり、AlNから成るAlNヘテロ特性改善層を介在させることにより、ヘテロ接合の界面における急峻性が改善される。
【0037】
また、接合の界面におけるピエゾ効果がさらに大きくなり、2次元電子ガスのキャリア濃度をより大きくすることができるので、より電気的特性を向上させることができる。
また本発明によれば、膜厚が1分子層以上4分子層以下のAlNヘテロ特性改善層を用いることによって、接合界面の急峻性を維持しつつ、トンネル効果によって充分なキャリア輸送が行える。よって、電気的特性に優れた窒化物III−V族化合物半導体装置が得られる。
【図面の簡単な説明】
【図1】 本発明の実施例1における窒化物系III−V族半導体装置10の構造を示す断面図である。
【図2】 二元化合物半導体とこの二元化合物半導体の成分を含む三元混晶半導体の接合界面を示す図である。
【符号の説明】
1 半絶縁性SiC基板
2 AlNエピタキシャルバッファ層
3 GaNチャネル層
4 AlNヘテロ特性改善層
5 AlGaNバリア層
6a ソース電極
6b ドレイン電極
7 ゲート電極
10 窒化物系III−V族化合物半導体装置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a nitride III-V group compound semiconductor device, and in particular, a nitride system free from fluctuations in composition and barrier height at the heterojunction interface between a channel layer (electron transit layer) and a barrier layer (barrier layer). The present invention relates to a structure of a III-V compound semiconductor device.
[0002]
[Prior art]
As a combination of materials in an HFET (Hetero Field Effect Transistor) structure, a material obtained by heterojunction of GaN as a channel layer and AlGaN as a barrier layer is most commonly used (US Pat. 10-189944, etc.).
[0003]
[Problems to be solved by the invention]
In general, a junction interface between a binary compound semiconductor composed of two elements (for example, AlN, GaN, InN, etc.) and a binary compound semiconductor different from the binary compound semiconductor depends on the growth conditions, but is steep. A simple interface can be easily obtained. On the other hand, when a binary compound semiconductor and a ternary mixed crystal semiconductor composed of three elements (for example, AlGaN, GaInN, AlInN, etc.) are combined and joined, the components of the ternary mixed crystal semiconductor are the components of the binary compound semiconductor. When they overlap (for example, GaN and AlGaN or GaN and GaInN), a steep interface cannot be obtained. This is because, for example, in the heterojunction of GaN and AlGaN as shown in FIG. 3, the same element (Ga) exists across the boundary between the two semiconductors. For this reason, GaN that should be the channel layer and GaN in the AlGaN that is the barrier layer inhibit formation of a steep interface, adversely affect the characteristics of the heterojunction, and problems such as a decrease in mobility arise.
[0004]
An object of the present invention is to provide a nitride-based III-V group compound semiconductor device having a steep interface and excellent characteristics such as mobility.
[0005]
[Means for Solving the Problems]
The present invention relates to a nitride III-V compound semiconductor device having a heterostructure,
On the (0001) crystal plane of the SiC substrate,
And the AlN epitaxial buffer layer,
And the GaN channel layer,
And AlN hetero characteristic improvement layer,
And an AlGaN barrier layer composition ratio of Al and Ga is constant, are sequentially laminated,
The nitride-based III-V group compound semiconductor device is characterized in that the AlN hetero property improving layer has a layer thickness of 1 to 4 molecular layers.
[0006]
According to the present invention, at the junction between the binary compound semiconductors, the interface becomes steep unless there is atomic diffusion. Therefore, in the nitride-based III-V compound semiconductor device having a heterostructure, the GaN channel constituting the channel layer Between the AlGaN barrier layer having a constant composition ratio of Al and Ga constituting the layer and the barrier layer , the layer thickness is not less than 1 molecular layer and not more than 4 molecular layers, and an AlN hetero property improving layer made of AlN is interposed This improves the steepness at the interface of the heterojunction.
[0007]
In addition, when such a structure is applied to a nitride-based semiconductor, the piezo effect at the interface is further increased, and it appears in an AlGaAs / GaAs heterostructure in which the carrier concentration of the two-dimensional electron gas can be increased. There is no effect, and the electrical characteristics can be further improved.
When an AlN hetero property improving layer is used, AlN has a very large band gap of 6.2 eV. If the layer thickness becomes too thick, current injection from the barrier layer to the channel layer is hindered. Stops functioning. According to the present invention, by using an AlN hetero-characteristic improving layer having a layer thickness of 1 molecular layer or more and 4 molecular layers or less, sufficient carrier transport can be performed by the tunnel effect while maintaining the sharpness of the junction interface. . Therefore, a nitride III-V compound semiconductor device having excellent electrical characteristics can be obtained.
[0009]
In addition, since the band gap of the AlN hetero property improving layer is larger than the band gap of the GaN channel layer, the steepness of these junction interfaces is maintained.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Next, specific embodiments of the present invention will be described with reference to examples, but the present invention is not limited to these examples.
Examples are shown below.
[0017]
(Example 1)
FIG. 1 is a cross-sectional view showing an outline of a nitride III-V
[0018]
As a crystal growth method for forming such a layer structure, a metal organic chemical vapor deposition method (
Metalorganic Chemical Vapor Deposition-MOCVD) or molecular beam epitaxy using plasma-excited nitrogen (Radio Frequency-Molecular Beam Epitaxy; abbreviated RF-MBE or Electron Cyclotron Resonance-MBE; abbreviated ECR-MBE) or the like can be used. .
[0019]
In this example, it was manufactured by the following process by MOCVD.
First, the surface of the
[0020]
Thereafter, the
[0021]
Prior to the measurement of device characteristics, the electrical characteristics of the semiconductor layer were examined by hole measurement. Table 1 shows the mobility when the AlN hetero-characteristic improving layer 4 is interposed between the GaN channel layer 3 and the
[0022]
[Table 1]
[0023]
From Table 1, at 300 K where the measurement temperature is room temperature, when the AlN hetero property improving layer 4 is interposed, the mobility is improved as compared with the case where the AlN hetero property improving layer 4 is not interposed. Further, at 77K where the measurement temperature is the liquid nitrogen (LN 2 ) temperature, the difference in mobility appears remarkably, and it can be seen that the interface characteristics are improved by the AlN hetero characteristic improvement layer 4.
[0024]
Next, as a result of fabricating an HFET having a length of the
[0025]
As described above, the interfacial steepness can be improved by interposing the AlN hetero-characteristic improving layer at the heterojunction surface of the GaN channel layer and the AlGaN barrier layer, and the piezo effect at the interface is further increased, so that two-dimensional electrons Since the gas carrier concentration can be increased, a nitride III-V compound semiconductor device having excellent electrical characteristics can be realized.
[0034]
As described above, an interface is obtained by interposing an AlN hetero property improving layer having a layer thickness of not less than 1 molecular layer and not more than 4 molecular layers in the heterojunction surface of the GaN channel layer and the AlGaN barrier layer having a constant composition ratio of Al and Ga. steepness can be improved by also piezoelectric effect at the interface is further increased, two-dimensional nitride has excellent electrical properties because that can be a carrier concentration greater electron gas group III-V compound semiconductor A device can be realized.
[0036]
【The invention's effect】
As described above, according to the present invention, in the nitride-based III-V group compound semiconductor device having a heterostructure , the composition ratio of Al and Ga constituting the channel layer and the barrier layer is constant. between the AlGaN barrier layer, the layer thickness is at 4 molecular layer or less than one molecular layer, by interposing the AlN hetero characteristic improvement layer made of AlN, steepness at the interface of the heterojunction is improved.
[0037]
In addition, the piezoelectric effect at the bonding interface is further increased, and the carrier concentration of the two-dimensional electron gas can be further increased, so that the electrical characteristics can be further improved.
In addition, according to the present invention, by using an AlN hetero property improving layer having a film thickness of 1 molecular layer or more and 4 molecular layers or less, sufficient carrier transport can be performed by the tunnel effect while maintaining the sharpness of the junction interface. Therefore, a nitride III-V compound semiconductor device having excellent electrical characteristics can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing the structure of a nitride-based III-
FIG. 2 is a diagram showing a junction interface between a binary compound semiconductor and a ternary mixed crystal semiconductor containing components of the binary compound semiconductor.
[Explanation of symbols]
DESCRIPTION OF
Claims (1)
SiC基板の(0001)結晶面上に、
AlNエピタキシャルバッファ層と、
GaNチャネル層と、
AlNヘテロ特性改善層と、
AlおよびGaの組成比が一定であるAlGaNバリア層とが、順次積層され、
前記AlNヘテロ特性改善層の層厚が1分子層以上4分子層以下であることを特徴とする窒化物系III−V族化合物半導体装置。In a nitride III-V compound semiconductor device having a heterostructure,
On the (0001) crystal plane of the SiC substrate,
And the AlN epitaxial buffer layer,
And the GaN channel layer,
And AlN hetero characteristic improvement layer,
And an AlGaN barrier layer composition ratio of Al and Ga is constant, are sequentially laminated,
A nitride-based III-V group compound semiconductor device, wherein the AlN hetero property improving layer has a layer thickness of 1 to 4 molecular layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000266117A JP3708810B2 (en) | 2000-09-01 | 2000-09-01 | Nitride III-V compound semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000266117A JP3708810B2 (en) | 2000-09-01 | 2000-09-01 | Nitride III-V compound semiconductor device |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004044960A Division JP4072858B2 (en) | 2004-02-20 | 2004-02-20 | Nitride III-V compound semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002076024A JP2002076024A (en) | 2002-03-15 |
JP3708810B2 true JP3708810B2 (en) | 2005-10-19 |
Family
ID=18753264
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000266117A Expired - Fee Related JP3708810B2 (en) | 2000-09-01 | 2000-09-01 | Nitride III-V compound semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3708810B2 (en) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7125786B2 (en) * | 2000-04-11 | 2006-10-24 | Cree, Inc. | Method of forming vias in silicon carbide and resulting devices and circuits |
US6849882B2 (en) * | 2001-05-11 | 2005-02-01 | Cree Inc. | Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer |
JP2003045900A (en) * | 2001-05-25 | 2003-02-14 | Sharp Corp | Nitride based iii-v compound semiconductor device |
JP4663156B2 (en) * | 2001-05-31 | 2011-03-30 | 富士通株式会社 | Compound semiconductor device |
CN1557024B (en) | 2001-07-24 | 2010-04-07 | 美商克立股份有限公司 | Insulting gate Al Ga nitride/GaN HEMT |
US7030428B2 (en) * | 2001-12-03 | 2006-04-18 | Cree, Inc. | Strain balanced nitride heterojunction transistors |
KR20040049744A (en) * | 2002-12-07 | 2004-06-12 | 한국전자통신연구원 | Heterostructure field-effect transistor |
JP4728582B2 (en) * | 2004-02-18 | 2011-07-20 | 古河電気工業株式会社 | High electron mobility transistor |
JP4832722B2 (en) * | 2004-03-24 | 2011-12-07 | 日本碍子株式会社 | Semiconductor laminated structure and transistor element |
JP4642366B2 (en) * | 2004-03-26 | 2011-03-02 | 日本碍子株式会社 | Semiconductor stacked structure, transistor element, and method of manufacturing transistor element |
JP2006032911A (en) * | 2004-06-15 | 2006-02-02 | Ngk Insulators Ltd | Semiconductor laminated structure, semiconductor device, and hemt element |
JP2006080338A (en) * | 2004-09-10 | 2006-03-23 | Tokyo Institute Of Technology | Magnetic sensor for high temperature |
JP4916671B2 (en) * | 2005-03-31 | 2012-04-18 | 住友電工デバイス・イノベーション株式会社 | Semiconductor device |
JP2006286698A (en) * | 2005-03-31 | 2006-10-19 | Furukawa Electric Co Ltd:The | Electronic device and power converter |
EP2312634B1 (en) | 2005-09-07 | 2019-12-25 | Cree, Inc. | Transistors with fluorine treatment |
JP4908856B2 (en) * | 2006-01-24 | 2012-04-04 | 日本電信電話株式会社 | Semiconductor device and manufacturing method thereof |
JP4205119B2 (en) | 2006-06-27 | 2009-01-07 | シャープ株式会社 | Heterojunction field effect transistor and method of manufacturing heterojunction field effect transistor |
US7692263B2 (en) | 2006-11-21 | 2010-04-06 | Cree, Inc. | High voltage GaN transistors |
US8212290B2 (en) | 2007-03-23 | 2012-07-03 | Cree, Inc. | High temperature performance capable gallium nitride transistor |
JP5044489B2 (en) * | 2007-08-28 | 2012-10-10 | 日本碍子株式会社 | Hall element, Hall IC, and method of manufacturing Hall element |
US8026718B2 (en) * | 2007-08-28 | 2011-09-27 | Ngk Insulators, Ltd. | Magnetic sensor, hall element, hall IC, magnetoresistive effect element, method of fabricating hall element, and method of fabricating magnetoresistive effect element |
JP5339718B2 (en) * | 2007-12-20 | 2013-11-13 | 三菱電機株式会社 | Heterojunction field effect transistor and method of manufacturing the same |
JP2009206163A (en) * | 2008-02-26 | 2009-09-10 | Oki Electric Ind Co Ltd | Heterojunction-type field effect transistor |
EP2259287A4 (en) | 2008-03-24 | 2012-08-15 | Ngk Insulators Ltd | Epitaxial substrate for semiconductor element, semiconductor element, and process for producing epitaxial substrate for semiconductor element |
CN101981677B (en) | 2008-03-24 | 2013-10-30 | 日本碍子株式会社 | Epitaxial substrate for smeiconductor element, semiconductor element, and process for producing epitaxial substrate for semiconductor element |
JP2011138807A (en) * | 2009-12-25 | 2011-07-14 | Sharp Corp | Field effect transistor |
JP2011210751A (en) * | 2010-03-26 | 2011-10-20 | Nec Corp | Group iii nitride semiconductor element, method of manufacturing group iii nitride semiconductor element, and electronic device |
US8759879B1 (en) * | 2013-05-03 | 2014-06-24 | Texas Instruments Incorporated | RESURF III-nitride HEMTs |
JP6736577B2 (en) * | 2015-03-31 | 2020-08-05 | スウェガン、アクチボラグSwegan Ab | Heterostructure and method for producing the same |
US11430882B2 (en) | 2016-06-24 | 2022-08-30 | Wolfspeed, Inc. | Gallium nitride high-electron mobility transistors with p-type layers and process for making the same |
US10192980B2 (en) * | 2016-06-24 | 2019-01-29 | Cree, Inc. | Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same |
US10892356B2 (en) | 2016-06-24 | 2021-01-12 | Cree, Inc. | Group III-nitride high-electron mobility transistors with buried p-type layers and process for making the same |
JP6652042B2 (en) * | 2016-12-13 | 2020-02-19 | 三菱電機株式会社 | Method for manufacturing group III-V nitride semiconductor epitaxial wafer |
CN107195773B (en) * | 2017-06-26 | 2023-07-18 | 中国科学技术大学 | Hole type semiconductor heterojunction Hall rod, preparation method and use method thereof and application thereof |
US11929428B2 (en) | 2021-05-17 | 2024-03-12 | Wolfspeed, Inc. | Circuits and group III-nitride high-electron mobility transistors with buried p-type layers improving overload recovery and process for implementing the same |
-
2000
- 2000-09-01 JP JP2000266117A patent/JP3708810B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2002076024A (en) | 2002-03-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3708810B2 (en) | Nitride III-V compound semiconductor device | |
JP4022708B2 (en) | Semiconductor device | |
US11038047B2 (en) | Normally-off HEMT transistor with selective generation of 2DEG channel, and manufacturing method thereof | |
US6177685B1 (en) | Nitride-type III-V HEMT having an InN 2DEG channel layer | |
US6429467B1 (en) | Heterojunction field effect transistor | |
JP3393602B2 (en) | Semiconductor device | |
JP4224737B2 (en) | Semiconductor element | |
JP3960957B2 (en) | Semiconductor electronic device | |
US20120299060A1 (en) | Nitride semiconductor device and manufacturing method thereof | |
US20070278507A1 (en) | Field effect transistor and method for fabricating the same | |
US20120238063A1 (en) | Termination and Contact Structures for a High Voltage Gan-Based Heterojunction Transistor | |
JP4577460B2 (en) | Semiconductor device and manufacturing method thereof | |
JP2001230407A (en) | Semiconductor device | |
JPH10223901A (en) | Field effect transistor and manufacture of the same | |
US20100038680A1 (en) | Iii-nitride semiconductor field effect transistor | |
JP6731584B2 (en) | Nitride semiconductor device and nitride semiconductor substrate | |
JP2007088185A (en) | Semiconductor device and its fabrication process | |
KR20080011647A (en) | Group iii-v nitride compound semiconductor device electrode-forming method | |
US10505013B2 (en) | Process of forming epitaxial substrate having N-polar gallium nitride | |
US20060054929A1 (en) | Semiconductor device | |
JPH11261052A (en) | High electron mobility transistor | |
JP2005285869A (en) | Epitaxial substrate and semiconductor device using the same | |
JP4072858B2 (en) | Nitride III-V compound semiconductor device | |
JP3848548B2 (en) | Field effect transistor | |
EP1583154B1 (en) | P-type nitride semiconductor structure and bipolar transistor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20031224 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040220 |
|
A911 | Transfer of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20040315 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20040220 |
|
A912 | Removal of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20040409 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050701 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20050804 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 3708810 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080812 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090812 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090812 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100812 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110812 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110812 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120812 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120812 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130812 Year of fee payment: 8 |
|
LAPS | Cancellation because of no payment of annual fees |