JP4663156B2 - Compound semiconductor device - Google Patents

Description

[0001]
The present invention relates to reduction compound semiconductor device, in particular, for the characterization stabilization in HEMT (high electron mobility transistor) type compound semiconductor device using a nitride III-V compound semiconductor as the carrier transit layer relates Ah Ru of compound semiconductor device of the features of the protective film structure.
[0002]
[Prior art]
In recent years, there has been active development of electronic devices using sapphire, SiC, GaN, Si, or the like as a substrate, crystal growth of AlGaN / GaN, and GaN as an electron transit layer.
[0003]
Although GaN used as an electron transit layer of such an electronic device has a smaller electron mobility than GaAs, its band gap is larger than 3.4 eV and 1.4 eV of GaAs. It is expected to operate at a high withstand voltage.
[0004]
For example, a mobile phone base station amplifier is currently required to operate at a high voltage of 50 V, and a high withstand voltage performance is essential. However, current GaAs electronic devices are limited to drive at 12 V. The current situation is that the voltage of 50 V is used in a lowered state, and there is a problem that the efficiency is reduced or distortion occurs.
[0005]
Here, a conventional GaN-based HEMT will be described with reference to FIG.
First, referring to FIG. 7A, an i-type GaN electron transit layer 42 having a thickness of 3 μm is formed on a sapphire substrate 41 having a C-plane as a main surface by using a normal MOCVD method (metal organic chemical vapor deposition method). An i-type Al _0.25 Ga _0.75 N layer 43 having a thickness of 3 nm, an n-type Al _0.25 Ga _0.75 N electron supply layer 44 having a thickness of 25 nm and an Si doping concentration of 2 × 10 ¹⁸ cm ⁻³ , and a thickness of A 5 nm i-type Al _0.25 Ga _0.75 N protective layer 45 is sequentially deposited.
[0006]
Next, after depositing a SiN film 46 having a thickness of 20 nm on the entire surface by CVD, an opening is provided in the gate formation region to form a gate electrode 47 made of Ni / Au, and a source / drain contact region The basic structure of the GaN-based HEMT is completed by forming the source electrode 48 and the drain electrode 49 made of Ti / Au by providing openings.
[0007]
See FIG. 7 (b) Figure 7 (b) is a band diagram of the GaN-based described above, the GaN-based semiconductor such as GaN or AlGaN is polarized in the c-axis direction, i-type GaN electron transit layer 42 / by piezoelectric effect due to lattice mismatch in i-type _Al 0.25 _{Ga 0.75} N layer 43 side of the interface of the i-type _Al 0.25 _{Ga 0.75} N layer 43, for example, 1 × ¹⁰ 13 ^{cm -2} Positive polarization charge appears, so that the i-type GaN electron transit layer 42 is about 1 × 10 ¹³ cm ^{− in} the vicinity of the interface of the i-type GaN electron transit layer 42 / i-type Al _0.25 Ga _0.75 N layer 43. ^Two electrons are induced to form the two-dimensional electron gas layer 50.
[0008]
The electron mobility of the two-dimensional electron gas layer 50 in such an i-type GaN electron transit layer 42 is about 1000 to 1500, but the concentration of the two-dimensional electron gas is about 1 × 10 ¹³ cm ^{−2, which} is GaAs-based two-dimensional. Since it is one digit or more larger than the concentration of the three-dimensional electron gas, it is possible to obtain current drive characteristics comparable to those of a GaAs HEMT and to obtain high breakdown voltage characteristics because of the wide forbidden band width.
Incidentally, a value exceeding 200 V has been reported as a withstand voltage when the current is turned off.
[0009]
Further, by providing the i-type Al _0.25 Ga _0.75 N protective layer 45, the tunnel current to the gate electrode can be reduced and the breakdown voltage can be improved even a little.
[0010]
[Problems to be solved by the invention]
However, in the conventional GaN-based HEMT, the withstand voltage when the current is turned on is about 20 V, and there is a problem that high voltage operation cannot be performed. Unlike GaAs-based FETs, it is thought that this is caused by surface problems rather than ionization collisions.
[0011]
In other words, since the GaN-based semiconductor has a wide forbidden band, breakdown at the time of on-state due to ionization collision is essentially difficult to occur, and even in view of the behavior of the actually measured IV characteristic, It is not considered.
[0012]
In addition, in such a GaN-based HEMT, there is a problem that a large hysteresis is observed in the IV characteristics under a high gate voltage operation, and the mutual conductance g _m in the high frequency region is reduced, so that current driving cannot be performed. The situation will be described with reference to FIG.
[0013]
Reference to FIG. 8A FIG. 8A is an IV characteristic diagram when the gate width W _{g is set} to W _g = 40 μm and the SiN film is removed in the GaN-based HEMT having the above-described structure. A large hysteresis is seen in the IV characteristic under the gate voltage operation.
[0014]
Reference to FIG. 8B FIG. 8B is an IV characteristic diagram when the gate width W _{g is set} to W _g = 40 μm in the GaN-based HEMT shown in FIG. It is understood that a large hysteresis is observed in the IV characteristics under operation, and no special improvement can be obtained with respect to the hysteresis even if the SiN film is provided.
[0015]
This is thought to be because negative piezoelectric charges appearing on the surface side of the i-type Al _0.25 Ga _0.75 N protective layer 45 affect the IV characteristics. By providing the SiN film, the negative piezoelectric charges are reduced to the surface side. Although the characteristics are somewhat improved by being driven from the inside to the inside, it still becomes a problem.
The situation is the same even if a SiO ₂ film is provided as a surface protective film instead of the SiN film.
[0016]
Accordingly, an object of the present invention is to increase the on-breakdown voltage of a GaN-based compound semiconductor device and improve the IV characteristics.
[0017]
[Means for Solving the Problems]
FIG. 1 is an explanatory diagram of the principle configuration of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
Referring to FIG. 1, in order to achieve the above-described object, in the present invention, a GaN carrier traveling layer 2 and Al _x Ga _1-x N (0 <x ≦ 1) formed on the carrier traveling layer 2 are formed. A carrier supply layer 3; a GaN-based protective layer 4 of GaN having the same conductivity type as that of the traveling carrier formed on the carrier supply layer 3; and a gate electrode 6 formed on the GaN-based protective layer 4. And a source / drain electrode 7 .
[0018]
Thus, by disposing the GaN-based protective layer 4 on the carrier supply layer 3, the band can be lifted by piezoelectric charges to reduce the tunnel current and improve the Schottky characteristics, and the GaN-based protective layer 4. By making the same conductivity as the traveling carrier, it is possible to reduce the interface potential lifted by the piezo charge and improve the conduction performance, cancel the holes induced in the vicinity of the interface, and screen. The influence of the surface trap caused by Al can be eliminated, whereby stable IV characteristics can be obtained.
The definition of screening in this case is that even if the GaN-based protective layer 4 is used, the maximum current density in the case of the AlGaN / GaN-FET structure when the GaN-based protective layer 4 is not used is 100. This means that the maximum current density can be obtained.
[0019]
In particular, by providing the SiN film 5, holes induced in the vicinity of the interface can be further driven to the inside, thereby preventing the occurrence of hysteresis characteristics and the interface lifted by the piezoelectric charge. Since the potential can be lowered, and the Fermi level is relatively raised, the current density can be increased.
Further, by making the GaN-based protective layer 4 the same conductivity type as the traveling carrier, the ohmic property of the source / drain electrode 7 can be enhanced.
[0020]
In this case, the substrate 1 may be a sapphire substrate, a GaN substrate, or a SiC substrate.
[0021]
In this case, career transit layer 2, or to at least one of GaN based protective layer 4 is intended may be added In, forbidden band width smaller by the addition of In is the carrier mobility Rise.
[0022]
The layer thickness of the GaN-based protective layer 4 is desirably 10 nm or less, which can increase the generation of leakage current flowing through the GaN-based protective layer 4 and the breakdown voltage of the Schottky electrode.
[0023]
Further, it is desirable that the doping concentration of the GaN-based protective layer 4 is 1 × 10 ¹⁷ cm ⁻² or more, so that screening induced by canceling holes induced in the vicinity of the interface can be performed.
[0024]
In this case, in order to screen as the sheet density, it is sufficient that the sheet density is 20 to 80% of the piezoelectric charge generated at the interface with the carrier supply layer 3. If the sheet density is too low, the screening effect cannot be obtained. On the other hand, if the sheet concentration is too high, the reverse breakdown voltage BV _gd decreases, and the desired high breakdown voltage characteristics cannot be obtained.
[0025]
In order to obtain such a sheet concentration, it is only necessary to dope an atomic layer doping with a conductivity determining impurity on the interface side with the carrier supply layer 3, and in the case of n-type, any one of Si, S, and Se is used. Use it.
[0026]
Further, the GaN-based protective layer 4 may have a two-layer structure of a layer having the same conductivity type as that of the traveling carrier and an undoped layer, whereby the outermost surface can be an undoped layer, and thus the IV characteristics. Can be further stabilized.
[0028]
DETAILED DESCRIPTION OF THE INVENTION
Here, the GaN-based HEMT according to the first embodiment of the present invention will be described with reference to FIGS.
2A. First, an i-type GaN electron transit layer 12 having a thickness of, for example, 3 μm is formed on a sapphire substrate 11 having a C-plane as a main surface by using an ordinary MOCVD method. A 2 nm i-type Al _0.25 Ga _0.75 N layer 13, an n-type Al _0.25 Ga _0.75 N electron supply layer 14 having a thickness of, for example, 25 nm and a Si doping concentration of, for example, 2 × 10 ¹⁸ cm ⁻³ , and The n-type GaN protective layer 15 having a thickness of 10 nm or less, for example, 5 nm, and a Si doping concentration of, for example, 2 × 10 ¹⁸ cm ⁻³ is sequentially deposited.
[0029]
Next, after depositing a SiN film 16 having a thickness of 20 nm on the entire surface by CVD, an opening is provided in the gate formation region to form a gate electrode 17 made of Ni / Au, and a source / drain contact region The basic structure of the GaN-based HEMT is completed by forming the source electrode 18 and the drain electrode 19 made of Ti / Au by providing openings.
In this case, when the thickness of the n-type GaN protective layer 15 exceeds 10 nm, a leak current is generated, and the gate electrode 17 that is a Schottky electrode has no breakdown voltage.
In the figure, the single HEMT is described. However, in the case of integration, element isolation may be performed by ion implantation or mesa etching.
[0030]
FIG. 2B is a band diagram of the above-described GaN-based HEMT. In a GaN-based semiconductor such as GaN or AlGaN, the i-type GaN electron transit layer 12 is polarized in the c-axis direction. For example, a positive polarization charge of 1 × 10 ¹³ cm ⁻² appears on the i-type Al _0.25 Ga _0.75 N layer 13 side of the interface of the / i-type Al _0.25 Ga _0.75 N layer 13 due to the piezoelectric effect caused by lattice mismatch. Therefore, electrons of about 1 × 10 ¹³ cm ⁻² are induced in the vicinity of the interface between the i-type GaN electron transit layer 12 and the i-type Al _0.25 Ga _0.75 N layer 13, thereby forming the two-dimensional electron gas layer 20.
[0031]
FIG. 3A is an IV characteristic diagram when the gate width W _{g is set} to W _g = 40 μm. The i-type Al _0.25 Ga _0.75 N protective layer in the conventional GaN-based HEMT is shown in FIG. As a result of replacement with the n-type GaN protective layer, it was confirmed that good characteristics were obtained.
[0032]
As a result of using an n-type GaN layer as a protective layer, as shown in FIG.
(1) A hole 21 induced at the interface between the n-type GaN protective layer 15 and the n-type Al _0.25 Ga _0.75 N electron supply layer 14 is screened by electrons in the n-type layer, and this hole 21 affects the device characteristics. To avoid giving
(2) Since the ohmic properties of the source electrode 18 and the drain electrode 19 are improved,
(3) Since the surface is a GaN layer, the influence of surface traps caused by Al is eliminated.
(4) Since the surface is a GaN layer, etching resistance is higher than that of AlGaN, so that processing damage is less likely to be introduced into the surface.
it is conceivable that.
[0033]
In addition, when the band edge of the conduction band of the n-type Al _0.25 Ga _0.75 N electron supply layer 14 is lifted, the Fermi level is relatively lowered, thereby reducing the concentration of the two-dimensional electron gas and energizing. However, instead, the effect of preventing the mutual conductance g _{m from being} lowered in the high frequency region is also obtained.
[0034]
Reference to FIG. 3B FIG. 3B shows an IV characteristic diagram in the case where the SiN film 16 is not provided in the first embodiment of the present invention, and V _gd is 4 The characteristic curves when applied in stages are shown together.
As is apparent from the figure, it can be understood that the characteristic curves at the same gate voltage, which should be overlapped with each other, shift as the gate voltage increases, and a stable IV characteristic cannot be obtained.
[0035]
Reference to FIG. 4A FIG. 4A shows the characteristics of the reverse breakdown voltage BV _gd when the doping concentration of the n-type GaN protective layer 15 in the first embodiment of the present invention is increased to 10 ¹⁹ cm ^−3. In the figure, it was confirmed that the reverse breakdown voltage BV _gd decreased to 1 V or less.
In this case, the Schottky barrier diode characteristics between the gate and the drain are considered.
[0036]
Reference to FIG. 4B FIG. 4B is a band diagram when the doping concentration of the n-type GaN protective layer is 10 ¹⁹ cm ⁻³ , compared with the case of 5 × 10 ¹⁸ cm ^−3. This is probably because the interface potential between the n-type GaN protective layer 15 and the n-type Al _0.25 Ga _0.75 N electron supply layer 14 was lowered, and the Schottky characteristics were lowered.
[0037]
Therefore, in order to obtain a high breakdown voltage, it is only necessary to completely screen holes generated at the interface due to the piezoelectric field, and the n-type GaN protective layer 15 is compensated so as to compensate 20 to 80% of the piezoelectric charge. It is necessary to set a doping amount of 50 V, and thereby, a forward breakdown voltage of 50 V and a reverse breakdown voltage of 200 V can be realized.
[0038]
Next, a GaN-based HEMT according to the second embodiment of the present invention will be described with reference to FIG.
FIG. 5 is a schematic sectional view of a GaN-based HEMT according to the second embodiment of the present invention. An i-type GaN protective layer having a thickness of, for example, 5 nm is formed on the n-type GaN protective layer 15. Except that 31 is provided, it is exactly the same as the first embodiment.
[0039]
In this way, in the second embodiment of the present invention, the conductive region that affects the operation characteristics of the device is kept away from the outermost surface, so that the adverse effect caused by the surface state can be further reduced. As a result, the breakdown voltage can be further increased.
[0040]
Next, a GaN-based HEMT according to a third embodiment of the present invention will be described with reference to FIG.
6 is a schematic cross-sectional view of a GaN-based HEMT according to a third embodiment of the present invention. First, a normal MOCVD method is used on a sapphire substrate 11 having a C-plane as a main surface. The i-type GaN electron transit layer 12 having a thickness of, for example, 3 μm, the i-type Al _0.25 Ga _0.75 N layer 13 having a thickness of, for example, 2 nm, the thickness of, for example, 25 nm, and the Si doping concentration, for example, 2 × 10 ¹⁸ cm ⁻³ n-type Al _0.25 Ga _0.75 N electron supply layer 14, n-type AlN layer 32 having a thickness of, for example, 2 nm and a Si doping concentration of, for example, 1 × 10 ¹⁹ cm ⁻³ Then, the n-type GaN protective layer 15 having a thickness of 10 nm or less, for example, 5 nm, and a Si doping concentration of, for example, 2 × 10 ¹⁸ cm ⁻³ is sequentially deposited.
[0041]
Next, after the n-type GaN protective layer 15 in the gate forming region is isotropically etched, the n-type AlN layer 32 is selectively etched to form a gate recess portion, and then the entire surface is thickened by CVD. After the SiN film 16 having a thickness of 20 nm is deposited, an opening is provided in the gate formation region to form the gate electrode 17 made of Ni / Au, and an opening is provided in the source / drain contact region to make the Ti / Au. By forming the source electrode 18 and the drain electrode 19, the basic structure of the GaN-based HEMT is completed.
In this case, the n-type AlN layer 32 functions as a selective etching removal layer when forming the gate recess portion.
[0042]
In the third embodiment of the present invention, since the gate recess structure is adopted, no leakage current is generated through the n-type GaN protective layer 15, thereby further increasing the breakdown voltage. become.
[0043]
While the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made.
For example, in the above embodiment, a uniformly doped n-type GaN layer is used as the protective layer, but n-type impurities such as Si, Se, and S may be planarly doped (atomic layer doping). For example, the sheet doping concentration of 5 nm before and after the interface may be about 3.5 × 10 ¹² cm ⁻² .
[0045]
In the third embodiment, the AlN layer is used as the etching stopper layer. However, the AlN layer is not limited to the AlN layer, and the Al composition is higher than the Al _x Ga _1-x N layer serving as the electron supply layer. An Al _z Ga _{1 -z} N layer having a large ratio z and z> x may be used.
[0046]
In each of the above embodiments, the electron supply layer is composed of an Al _0.25 Ga _0.75 N layer, but the Al composition ratio x in this case is not limited to x = 0.25, and x = It is desirable to use a range of 0.10 to 0.40.
[0047]
In each of the above embodiments, the electron supply layer is formed of an n-type AlGaN layer. However, the electron supply layer does not necessarily have to be a doping layer. In a GaN-based HEMT, piezoelectric generated by polarization due to the crystal structure Since the two-dimensional electron gas is induced by the electric charge, an undoped layer may be used.
[0048]
Further, in each of the above embodiments, the electron transit layer is composed of a GaN layer, the electron supply layer is composed of an AlGaN layer, and the protective layer is composed of a GaN layer, but is not limited to such a configuration, In may be added to at least one of the electron transit layer, the electron supply layer, and the protective layer.
[0049]
For example, when In is added to the electron transit layer to make InGaN, the electron mobility becomes high, and when In is added to the protective layer to make InGaN, the forbidden band width becomes small. The interface potential of the protective layer / electron supply layer can be lowered as compared with the case of the GaN layer.
[0050]
In each of the above embodiments, sapphire is used as the substrate. However, the substrate is not limited to sapphire, and a SiC substrate or a GaN substrate may be used. Since it is excellent in thermal conductivity, it is suitable for an amplifier for a base station of a mobile phone with high voltage operation.
[0051]
In each of the above-described embodiments, the n-channel HEMT is described. However, it is needless to say that the present invention can be applied to a p-channel HEMT. Just reverse it.
[0053]
【The invention's effect】
According to the present _invention, it is possible to stabilize Runode, the the I-V characteristic with doped GaN as a protective layer provided on the Al x _{Ga 1-x} N carrier supply layer.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is an explanatory diagram of a GaN-based HEMT according to the first embodiment of this invention.
FIG. 3 is an IV characteristic diagram of the GaN-based HEMT according to the first embodiment of the present invention.
FIG. 4 is an explanatory diagram of a reverse breakdown voltage BV _gd of the GaN-based HEMT according to the first embodiment of the present invention.
FIG. 5 is a schematic cross-sectional view of a GaN-based HEMT according to a second embodiment of the present invention.
FIG. 6 is a schematic cross-sectional view of a GaN-based HEMT according to a third embodiment of the present invention.
FIG. 7 is an explanatory diagram of a conventional GaN-based HEMT.
FIG. 8 is an IV characteristic diagram of a conventional GaN-based HEMT.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Carrier travel layer 3 Carrier supply layer 4 GaN-based protective layer 5 SiN film 6 Gate electrode 7 Source / drain electrode 11 Sapphire substrate 12 i-type GaN electron travel layer 13 i-type Al _0.25 Ga _0.75 N layer 14 n-type Al _0.25 Ga _0.75 N electron supply layer 15 n-type GaN protective layer 16 SiN film 17 gate electrode 18 source electrode 19 drain electrode 20 two-dimensional electron layer 21 hole 31 i-type GaN protective layer 32 n-type AlN layer 41 sapphire substrate 42 i-type GaN electrons Traveling layer 43 i-type Al _0.25 Ga _0.75 N layer 44 n-type Al _0.25 Ga _0.75 N electron supply layer 45 i-type Al _0.25 Ga _0.75 N protective layer 46 SiN film 47 gate electrode 48 source electrode 49 drain electrode 50 two-dimensional electron layer

Claims (7)

A GaN carrier traveling layer;
A carrier supply layer of Al _x Ga _1-x N (0 <x ≦ 1) formed on the carrier travel layer;
A GaN-based protective layer of GaN having the same conductivity type as that of the traveling carrier formed on the carrier supply layer;
A compound semiconductor device comprising: a gate electrode and a source / drain electrode formed on the GaN-based protective layer . The compound semiconductor device according to claim 1 , wherein the gate electrode and the source / drain electrode are covered with a SiN film. It said first conductivity type, the compound semiconductor device according to claim 1 or claim 2, characterized in that an n-type. 2. The GaN-based protective layer includes a layer having the same conductivity type as a traveling carrier in contact with the carrier supply layer, and an undoped layer provided on the layer having the same conductivity type as the traveling carrier. to a compound semiconductor device according to any one of claims 3. The compound semiconductor device according to claim 4 , wherein the undoped layer is an i-GaN layer. At least one, the compound semiconductor device according to any one of claims 1 to 5, characterized in that the addition of In of the carrier transit layer or a GaN based protective layer. Doping concentration of the GaN-based protective layer, in any one of claims 1 to 6, characterized in that 20 to 80% of the sheet concentration of piezoelectric charges generated at the interface between the carrier supply layer The compound semiconductor device described.

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