JP2001326232A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve high-temperature and high-withstand voltage operating characteristics as compared with a conventional GaN-family device. SOLUTION: This semiconductor device is equipped with a semiconductor substrate, the buffer layer of a nitride semiconductor that is formed on the semiconductor substrate, and the channel layer of the nitride semiconductor that is formed in an upper layer as compared with the buffer layer. The channel layer is formed by an AlXGa1-XN layer (0<X<1).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly, to a semiconductor device using a nitride semiconductor.

[0002]

2. Description of the Related Art Conventionally, a field effect transistor (FET) or a heterostructure field effect transistor using a nitride semiconductor has been used.
d Effect Transistor (HFET), GaN or In _x Ga ₁ -xN (0 <X <
1) is used (see Japanese Patent Application Nos. 10-56529 and 10-69176). The specification of the above patent application discloses that devices using these materials (GaN-based devices) can operate at higher temperatures and higher withstand voltages than conventional GaAs-based FETs or HFETs.

[0003]

However, in order to further improve the high temperature and high withstand voltage operation, it is necessary to improve the channel material so that the crystal bonding force of the semiconductor material is increased. Further, in a heterostructure field effect transistor (HFET) using a nitride semiconductor, a positive or negative polarization charge unique to a hetero interface is generated. HFET
Has a heterointerface other than the heterointerface where the channel electrons are formed, and when this heterointerface induces a positive polarization charge, the electrons are attracted to the heterointerface and the electron layer is formed in addition to the channel electron layer. Is formed. The presence of such non-channel electrons does not affect the low frequency operation of the HFET, but degrades the high frequency characteristics of the HFET.
Al _x Ga as a barrier just below the channel layer where electrons travel
_The above situation can occur when the _1-X N layer (0 <X <1) is provided. When the HFET is used as a high-frequency device, the non-channel electrons are eliminated to improve the high-frequency characteristics. Need to improve. The present invention
In order to solve such a problem, the conventional G
It is an object of the present invention to provide a semiconductor device (FET and HFET) having improved high-temperature operation characteristics and high breakdown voltage operation characteristics as compared with an aN-based device. Another object of the present invention is to provide a semiconductor device (HFET) having better high-frequency characteristics than conventional ones.

[0004]

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate,
A buffer layer of a nitride semiconductor formed on the semiconductor substrate; and a channel layer of a nitride semiconductor formed above the buffer layer, wherein the channel layer is formed of Al _x
It is formed by a Ga _1-X N layer (0 <X <1).
With such a configuration, the present invention increases the crystal bonding force in the channel layer by using Al _x Ga ₁ -xN having a wider band gap than conventional GaN, and particularly enhances the high-temperature operation characteristics and high breakdown voltage operation characteristics. Can be improved. This is FET or HFET using nitride semiconductor
The high-temperature and high-withstand-voltage operation in is caused by the large bonding force of the semiconductor material. Generally, there is a positive correlation between the crystal bonding force and the band gap. This has the effect of improving the high-temperature operation characteristics and the high breakdown voltage operation characteristics.

Further, the present invention includes the following configuration as another embodiment. That is, the semiconductor device includes a source electrode, a gate electrode, and a drain electrode formed on the channel layer, and constitutes a field effect transistor. With such a configuration, the present invention can realize a field-effect transistor with particularly improved high-temperature operation characteristics and high withstand voltage operation characteristics as compared with the related art. The semiconductor device further includes a nitride semiconductor barrier layer formed on the channel layer, and a source electrode, a gate electrode, and a drain electrode formed on the barrier layer, thereby forming a heterostructure field effect transistor. With such a configuration, the present invention can realize a heterostructure field effect transistor with particularly improved high-temperature operation characteristics and high breakdown voltage operation characteristics as compared with the related art. In addition, a GaN layer formed on the buffer layer is provided. With this configuration, the present invention can improve the crystallinity of a layer (such as a channel layer) formed on the GaN layer.

Further, a semiconductor substrate, a buffer layer of a nitride semiconductor formed on the semiconductor substrate, a channel layer of the nitride semiconductor formed above the buffer layer, and a layer formed immediately below the channel layer Al _X1 Ga _1-X1 N
A first barrier layer of (0 <X1 <1), a second barrier layer of Al _X2 Ga _1-X2 N (0 <X2 <1) formed immediately above the channel layer, and a second barrier layer A source electrode, a gate electrode, and a drain electrode formed on the first barrier layer. The Al composition X1 of the first barrier layer does not have an Al composition discontinuity with the layer structure immediately below the first barrier layer. Is provided with a slope that decreases in the depth direction. With this configuration, the present invention provides an A
l _X Ga _1-X N layer (0 <X <1) to be able to prevent the secondary electron layer occurs, especially improved frequency characteristics of the HFET. The channel layer is made of GaN, I
_{n Y Ga 1-Y N (} 0 <Y ≦ 1), or Al _Z Ga _1-Z N
(0 <Z ≦ 1, Z <X1, Z <X2). Further, the semiconductor substrate may be a SiC substrate, a sapphire substrate, or a GaN substrate.

[0007]

Next, one embodiment (layer structure) of the present invention will be described. In the present invention, high-temperature operation characteristics and high withstand voltage operation characteristics are improved by forming a channel layer using a material having a larger band gap than a conventional GaN-based material. For example, Al _x Ga ₁ -xN (0 <X <1) may be used as a material satisfying such conditions.

Here, the band gap of Al _x Ga ₁ -xN (0 <X <1) will be described. Since the size of the band gap Eg (GaN) of GaN is 3.4 and the size of the band gap Eg (AlN) of AlGaN is 6.2 (Reference: Eg (InN) = 2.2 eV <Eg (G
aN)) and the band gap Eg (Al _X Ga _1-X N) of Al _X Ga _1-X N (0 <X <1)
And Eg (AlN) given by

Eg (Al _x Ga ₁ -xN) = XEg (AlN) + (1-X) Eg (GaN) = 3.4 + 2.8X [eV] (0 <X <1)

## EQU1 ## Therefore, AlGaN is GaN
Has a larger band gap and a larger crystal bonding force than GaN, and can operate at a higher temperature and higher withstand voltage than GaN.

[0011] The above discussion also applies to the GaAs system.
Similar, but AlGaAs has a higher electron transfer than GaAs.
As the mobility drops significantly, the channel of high frequency devices
Not suitable as material. In contrast, GaN-based smell
Therefore, the electron mobility of AlGaN is lower than that of GaN.
Although the total decrease is within the allowable range (more than 50-60%
(Mobility) is a high value. By the way, by the present inventors,
GaN and Al _0.1Ga_0.9Room temperature electron mobility of N
And 350 and 170 cm respectively^Two/ Vs observed
Have been. Therefore, AlGaN is used as the channel material.
, It is higher than when a GaAs system is used.
A device that can operate at high temperature and high withstand voltage can be realized.
You. In addition, the GaN system has stronger bonding than the GaAs system.
Crystal bonding force, a large band gap,
Dynamic characteristics and radiation resistance are also improved.

Next, a specific application example of the present invention will be described.
I will tell. FIG. 1 is a sectional view showing an FET to which the present invention is applied.
It is. As shown in FIG._X0G
a_1-X0An N buffer layer 2 is formed, and Al_X1Ga
_1-X1An N channel layer 3 is formed, on which a source electrode 1 is formed.
0, the gate electrode 11 and the drain electrode 12 are formed.
These constitute an FET. Note that 0 <
X0 ≦ 1, 0 <X1 <1.

FIG. 2 shows an HFET to which the present invention is applied.
It is sectional drawing. As shown in FIG.
l_X0Ga_1-X0An N buffer layer 2 is formed, and Al
_X1Ga_1-X1An N-channel layer 3 is formed, on which Al_X2
Ga_1-X2An N barrier layer 4 is formed, on which a source electrode 1 is formed.
0, the gate electrode 11 and the drain electrode 12 are formed.
These constitute an HFET. Note that 0
<X0 ≦ 1, 0 <X1 <X2 <1. This structure smells
Therefore, electrons that contribute to device operation are Al_X2Ga _1-X2N
Barrier layer 4 and Al_X1Ga_1-X1Near the interface with the N channel layer 3
Intensively in the channel region.

By adding an intermediate layer to the structure shown in FIGS. 1 and 2, the crystallinity of the channel layer and the like can be improved. FIG. 3 shows the structure of FIG.
An example in which an N layer is provided will be described. As shown in FIG. 1, an Al _X0 Ga _1-X0 N buffer layer 2 is formed on a SiC substrate 1, a GaN layer 5 is formed thereon as an intermediate layer, and an Al layer is formed thereon.
_{An X1} Ga1 _-X1 N channel layer 3 is formed, on which a source electrode 10, a gate electrode 11, and a drain electrode 12 are formed, and these constitute an FET. In addition,
0 <X0 ≦ 1, 0 <X1 <1.

FIG. 4 shows the structure of FIG.
An example in which a layer is provided is shown. As shown in FIG.
An Al _X0 Ga _1-X0 N buffer layer 2 is formed thereon, a GaN layer 5 is formed thereon as an intermediate layer, and an Al _X1
A Ga _{1 -X 1} N channel layer 3 is formed, and an Al _X2 G
a _1-X2 N barrier layer 4 is formed, and a source electrode 1 is formed thereon.
0, a gate electrode 11 and a drain electrode 12 are formed, and these constitute an FET. Note that 0 <
X0 ≦ 1, 0 <X1 <X2 <1.

By the way, as described above, FIGS.
In the heterostructure field effect transistor (HFET) using a nitride semiconductor shown in (1), a positive or negative polarization charge unique to the hetero interface is generated. The HFET has a heterointerface other than the heterointerface where the channel electrons are formed,
When the hetero interface induces a positive polarization charge, electrons are attracted to the hetero interface, and an electron layer is formed in addition to the channel electron layer. The presence of such non-channel electrons does not affect the low frequency operation of the HFET, but degrades the high frequency characteristics of the HFET. An Al _x Ga _{1 -x} N layer (0 <
If X <1) is provided, the situation described above may occur. Therefore, when an HFET is used as a high-frequency device, high-frequency characteristics can be improved by eliminating non-channel electrons.

FIG. 5 shows an HFE in which an Al _x Ga ₁ -xN layer (0 <X <1) is provided immediately below a channel layer through which electrons travel.
T is shown. As shown in FIG.
1 _X0 Ga _1-X0 N buffer layer 102 is formed, GaN layer 105 is formed thereon as an intermediate layer, and Al
_X1 Ga _{1 -X1} N barrier layer 106 is formed, and GaN
A channel layer 103 is formed, on which Al _X2 Ga _1-X2
An N barrier layer 104 is formed, on which a source electrode 11 is formed.
0, a gate electrode 111 and a drain electrode 112 are formed. Note that 0 <X0 ≦ 1, 0 <X1 <X2 <
1, X1: constant.

[0018] This structure is one that is disclosed in Japanese Patent Application No. 10-56529, provided Al _X Ga _1-X N layer immediately below the GaN channel layer in which electrons travel (0 <X <1) By using a double heterostructure, two
The distribution width of the two-dimensional electron gas is reduced, the aspect ratio is improved, and the transconductance (gm) can be increased.

FIG. 6 shows the channel structure in the layer structure of FIG.
FIG. 3 shows a potential structure together with a distribution of two-dimensional electrons, and a secondary two-dimensional electron layer is formed in addition to channel electrons. The presence of this secondary electron layer is due to HFE
It does not affect the low frequency operation of T, but causes deterioration of high frequency characteristics. Therefore, the following measures are taken to prevent the above-described secondary electronic layer from being generated.

FIG. 7 shows a layer structure obtained by applying the present invention to the structure of FIG. As shown in FIG.
_X0 Ga _1-X0 N buffer layer 2 is formed, GaN layer 5 is formed as an intermediate layer thereon, Al _X1 Ga _1-X1 thereon
An N barrier layer 6 is formed, a GaN channel layer 3 is formed thereon, an Al _X2 Ga _{1 -X 2} N barrier layer 4 is formed thereon, and a source electrode 10, a gate electrode 11 and a drain electrode 12 are formed thereon. Are formed. Note that 0 <X0 ≦
1,0 <X1 <X2 <1, X1: slope, 0 <XA <1,
XB is almost 0 (XB <0.05).

In this structure, GaN on which electrons travel
The Al _x Ga ₁ -xN layer immediately below the channel layer is Al _x Ga ₁ -xN
The Al composition _X of the Al _x Ga ₁ -xN layer is inclined so as to decrease in the depth direction so as not to cause the Al composition discontinuity with the GaN layer immediately below the layer, and is connected to the GaN layer at X = 0. . For example, a method shown in FIG. 8 can be considered.

FIGS. 8 (a) to 8 (f) show the inclination decreasing in the depth direction applied to the Al composition X of the Al _x Ga ₁ -xN layer. As shown in these figures, there are various variations in the distribution of the Al composition X1. At least the Al _x Ga ₁ -xN layer immediately below the GaN channel layer where electrons travel is Al
As it not cause GaN layer and the Al composition discontinuous immediately below _X Ga _1-X N layer, may do it by applying a gradient of decreasing in the depth direction of the Al composition X of Al _X Ga _1-X N layer. However, in a place where the distribution of the Al composition X1 is discontinuous, the gap Δ
It is necessary to make X satisfy ΔX ≦ 0.05. Note that such inclination can be easily performed by adjusting the supply of a source gas containing Al when the Al _x Ga ₁ -xN layer is grown in a vapor phase.

FIG. 9 shows the channel potential structure in the case of using the Al composition change of FIG. 8 in FIG. 7 together with the two-dimensional electron distribution. As a result of the discontinuity of the potential profile, the generation of polarization charges and the generation of electrons disappear, except for the hetero interface where the channel electrons are present, only the channel electrons are present and the secondary two-dimensional as shown in the figure The state in which the formation of the electronic layer has been eliminated is shown. As described above, the high frequency characteristics of the HFET can be improved by the present invention. Note that the GaN channel layer is replaced with an In _Y Ga _1-Y N channel layer (0 <Y ≦ 1),
The Al _Z Ga _{1 -Z} N channel layer (0 <Z ≦ 1, Z <X
1, Z <X2), the same effect as above can be obtained.

In the above, SiC was used as the substrate material, but the present invention is not limited to this. For example, a sapphire substrate or a GaN substrate may be used. In this case, the Al composition X0 in the Al _X0 Ga _1-X0 N buffer layer 2 needs to be 0 ≦ X0 ≦ 1.

[0025]

As described above, according to the present invention, it is possible to improve the reliability, the heat resistance, and the breakdown voltage of a FET or HFET using a nitride semiconductor in a high-temperature operation. In addition, it is possible to improve the vibration resistance and radiation resistance. Further, it is possible to prevent a secondary electron layer from being generated in the Al _x Ga ₁ -xN layer (0 <X <1) provided immediately below the channel layer, thereby improving the high-frequency characteristics of the HFET.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment (FET) of the present invention.

FIG. 2 is a cross-sectional view showing another embodiment (HFET) of the present invention.

FIG. 3 is a cross-sectional view showing a state in which a GaN layer is added to the configuration of FIG.

FIG. 4 is a sectional view showing a state in which a GaN layer is added to the configuration of FIG. 2;

FIG. 5 is a sectional view disclosed in Japanese Patent Application No. Hei.

6 is an explanatory diagram showing a channel potential structure in FIG.

FIG. 7 is a sectional view showing another embodiment (HFET) of the present invention.

FIG. 8 is an explanatory diagram showing an example of a gradient of the Al composition in FIG. 7;

FIG. 9 is an explanatory diagram showing a channel potential structure in FIG. 7;

[Explanation of symbols]

_{DESCRIPTION OF} SYMBOLS 1 ... SiC substrate, 2 ... Al _X0 Ga _1-X0 N buffer layer, 3
... Al _X1 Ga _1-X1 N channel layer, 4 ... Al _X2 Ga _1-X2 N
Barrier layers, 5 GaN layers, 10 source electrodes 10, 11
Gate electrode, 12 ... Drain electrode.

Claims (7)

[Claims] 1. A semiconductor substrate, comprising: a buffer layer of a nitride semiconductor formed on the semiconductor substrate; and a channel layer of a nitride semiconductor formed above the buffer layer. A semiconductor device comprising Al _x Ga ₁ -xN (0 <X <1). 2. The semiconductor device according to claim 1, further comprising a source electrode, a gate electrode, and a drain electrode formed on the channel layer to form a field effect transistor. 3. The semiconductor device according to claim 1, further comprising: a nitride semiconductor barrier layer formed on the channel layer; and a source electrode, a gate electrode, and a drain electrode formed on the barrier layer. And a heterostructure field effect transistor. 4. The semiconductor device according to claim 2, wherein G is formed between said buffer layer and said channel layer.
A semiconductor device comprising an aN layer. 5. A semiconductor substrate, a buffer layer of a nitride semiconductor formed on the semiconductor substrate, a channel layer of the nitride semiconductor formed above the buffer layer, and a layer formed immediately below the channel layer. Al _X1 Ga _1-X1 N (0 <
A first barrier layer of X1 <1), a second barrier layer of Al _X2 Ga _1-X2 N (0 <X2 <1) formed directly on the channel layer, and Formed source electrode,
A gate electrode and a drain electrode, wherein the Al composition X1 of the first barrier layer does not have an Al composition discontinuity with the layer structure immediately below the first barrier layer.
A semiconductor device characterized by having a slope that decreases in a depth direction. 6. The semiconductor device according to claim 5, wherein the channel layer is made of GaN, In _Y Ga ₁ -YN (0 <Y ≦
1), or _{Al Z Ga 1-Z N (} 0 <Z ≦ 1, Z <X1,
Z <X2). 7. The semiconductor device according to claim 1, wherein the semiconductor substrate is a SiC substrate, a sapphire substrate, or a GaN substrate.