JP3708478B2 - Electronic component mounting method - Google Patents

Electronic component mounting method Download PDF

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Publication number
JP3708478B2
JP3708478B2 JP2001354519A JP2001354519A JP3708478B2 JP 3708478 B2 JP3708478 B2 JP 3708478B2 JP 2001354519 A JP2001354519 A JP 2001354519A JP 2001354519 A JP2001354519 A JP 2001354519A JP 3708478 B2 JP3708478 B2 JP 3708478B2
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JP
Japan
Prior art keywords
resin
electronic component
substrate
bump
electrode
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Expired - Fee Related
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JP2001354519A
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Japanese (ja)
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JP2003158223A (en
Inventor
忠彦 境
俊和 松尾
憲 前田
省二 酒見
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Priority to JP2001354519A priority Critical patent/JP3708478B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/1182—Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822—Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/1356—Disposition
    • H01L2224/13563—Only on parts of the surface of the core, i.e. partial coating
    • H01L2224/13564—Only on the bonding interface of the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/1369—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、電子部品の半田バンプを基板の電極に半田接合して実装する電子部品の実装方法に関するものである。
【０００２】
【従来の技術】
フリップチップなど半導体素子に接続用電極であるバンプが設けられた電子部品の実装方法として、バンプを基板の電極に半田接合する方法が広く用いられている。この実装方法において、バンプと基板との半田接合部を補強する目的で電子部品と基板との間に補強樹脂部を設けることが行われる。この補強樹脂部は、バンプと電極との半田接合部を補強する接合部補強機能と、電子部品と基板との間に介在して基板と電子部品の各材質の熱膨張係数の差に起因する熱応力を緩和する応力緩和機能とを有している。
【０００３】
【発明が解決しようとする課題】
ところで上述の接合部補強機能においては、実装後に応力集中が生じやすいバンプと電極との半田接合部の止端部を有効に補強することが必要であるため、樹脂材質には良好な密着性とともにクラックを発生・伝播しにくい延性に富む材質が求められる。これに対し、応力緩和機能においては、基板材質の熱膨張係数と電子部品の材質の熱膨張係数の中間の値の熱膨張係数を有するような樹脂が最も好ましい。
【０００４】
しかしながら、一般に用いられる樹脂材料でこのような特性条件を満たすものを見いだすのは困難であり、従来は接合部補強機能と応力緩和機能とを両立させた補強樹脂部を備えた電子部品実装構造の実現は困難であった。
【０００５】
そこで本発明は、接合部補強機能と応力緩和機能とを両立させることができる信頼性に優れた電子部品の実装方法を提供することを目的とする。
【０００６】
【課題を解決するための手段】
請求項１記載の電子部品の実装方法は、電子部品の下面に形成された半田から成るバンプの下面に第１の樹脂を転写する工程と、前記バンプを基板の電極に位置合わせして前記電子部品を基板に搭載する工程と、加熱によって前記バンプを前記電極に半田接合させるとともに前記第１の樹脂を硬化させる工程と、前記電子部品と前記基板の間の隙間に第２の樹脂を注入する工程とを含み、前記第１の樹脂のフィラー含有率は前記第２の樹脂のフィラー含有率よりも低い。
請求項２記載の電子部品の実装方法は、請求項１記載の電子部品の実装方法において、前記第１の樹脂が酸化膜除去能力を有する活性成分を含み、前記加熱による前記半田接合において、前記バンプの表面に生じた酸化膜を前記第１の樹脂により除去する。
【０００７】
請求項１の発明によれば、電子部品のバンプと基板の電極との半田接合部を補強する第１の樹脂のフィラー含有率を、電子部品と基板との間の空間を充填する第２の樹脂のフィラー含有率よりも低くすることにより、第１の樹脂の密着性、延性を保ちながら、第２の樹脂の熱膨張係数を所望値に近づけることができ、接合部補強機能と応力緩和機能とを両立させることができる。
また請求項２の本発明によれば、加熱によりバンプ表面に生じる酸化膜を第１の樹脂により除去できるので、接合性のよい半田接合を行うことができる。
【０００８】
【発明の実施の形態】
次に本発明の実施の形態を図面を参照して説明する。図１、図２は本発明の一実施の形態の電子部品実装方法の工程説明図、図３は本発明の一実施の形態の電子部品実装構造の拡大断面図である。
【０００９】
図１（ａ）において、電子部品１の下面には接続用電極としてのバンプ２が、半田を形成材料として設けられている。図１（ａ）は、バンプ２に樹脂を塗布するための樹脂供給工程を示しており、電子部品１は樹脂塗布部５上に位置している。樹脂塗布部５は樹脂６（第１の樹脂）の塗膜が形成された樹脂転写容器５ａを備えており、樹脂転写容器５ａに対して電子部品１を上下動させることにより、バンプ２の下面側に所定量の樹脂６が転写により供給される。
【００１０】
樹脂６は、エポキシ樹脂などの熱硬化性樹脂を主成分とする基剤に、酸化膜除去能力を有する活性成分および微細な固体粒子であるフィラー成分を含有させたものである。ここで樹脂６の各成分は、フィラー含有率が４０ｗｔ％以下となるように成分調整される。無論、フィラー成分を全く含まないものでもよい。
【００１１】
図１（ｂ）、（ｃ）は、樹脂供給工程後の電子部品１を基板３に搭載する部品搭載工程を示している。ここでは、バンプ２を基板３の上面に形成された電極４に位置合わせして電子部品１を基板３に対して下降させて、バンプ２を樹脂６を介して電極４に着地させる。これにより、バンプ２の下面に転写された樹脂６は電極４に付着し、さらに電極４を覆った形で基板３の上面に拡がる。
【００１２】
次いで基板３はリフロー装置に送られ、ここで図１（ｄ）に示すように部品搭載工程後の基板３を加熱する加熱工程が行われる。この加熱により、バンプ２が溶融して電極４に半田接合される。この半田接合において、バンプ２の表面に生成した酸化膜は酸化膜除去能力を有する樹脂６によって除去されることから、接合性のよい良好な半田接合が行われる。またこのとき樹脂６の熱硬化反応が並行して進行し、バンプ２と電極４との半田接合部を周囲から包み込んで補強する。なおこのリフロー時においては、樹脂６の硬化は完全硬化まで至る必要はなく、半硬化の状態でよい。
【００１３】
次にこの加熱工程後の基板３は樹脂封止工程に送られる。すなわち図２（ａ）に示すように、電子部品１の下面と基板３の上面の間の隙間には、ディスペンサ７によって補強用樹脂８（第２の樹脂）が注入される。補強用樹脂８は、熱硬化性の樹脂であり、樹脂６と同様にフィラー成分を含有している。ここで補強用樹脂８のフィラー含有率は、５〜９０ｗｔ％の範囲で樹脂６のフィラー含有率との相対関係に基づいて設定され、樹脂６のフィラー含有率が補強用樹脂８のフィラー含有率よりも低くなるように設定される。
【００１４】
また、補強用樹脂８に混入されるフィラーを構成する固体粒子として選定される代表的な物質としてはシリカやアルミナ等がある。フィラーを混入する目的は、硬化後の補強用樹脂の熱膨張係数を電子部品１の材質であるシリコンの熱膨張係数に近づけるためであり、これにより、封止樹脂材料としての補強用樹脂８の熱膨張係数を、応力緩和層としての機能上望ましい所望値に近づけることが可能となっている。ちなみに、シリコンの熱膨張係数は４×１０-6、フィラー無しのエポキシ樹脂が、５０×１０-6程度であるが、フィラーを混入することにより９×１０-6〜３０×１０-6程度まで低くすることができる。
【００１５】
図２（ｂ）に示すように、基板３と電子部品１との間を完全に補強用樹脂８によって充填した後、図２（ｃ）に示すように基板３は再度加熱される。この加熱によって補強用樹脂８が熱硬化することにより、電子部品１と基板３との間が樹脂封止される。そしてこの加熱で樹脂６の熱硬化反応がさらに進行し完全硬化する。これにより、バンプ２と電極４との半田接合部を周囲から包み込んで補強する補強樹脂部６ａ（第１の補強樹脂部）および電子部品１の下面と基板３の上面との間の空間を充填して補強する補強樹脂部８ａ（第２の補強樹脂部）とが形成される。
【００１６】
上記構成の電子部品実装構造の特徴について、図３を参照して説明する。樹脂６が電極４を覆って完全硬化した状態において、樹脂６は基板３の上面と密着状態にあるとともに、バンプ２と電極４との半田接合部の止端部２ａを取り巻く形で補強樹脂部６ａを形成する。ここで、補強樹脂部６ａのフィラー含有率は補強用樹脂８と比較して低く、しかも４０ｗｔ％以下の低い範囲に設定されていることから、熱硬化後の機械的特性において密着性に優れ、しかも引張方向の外力が作用した際の延性が大きくなっている。
【００１７】
このため、補強樹脂部６ａは電極４の周囲で基板３と良好に密着し、しかも実装後に応力集中が生じやすい半田接合部の止端部２ａ近傍では、止端部２ａの応力状態に良好に追従して延び変形し、割れ発生の確率が大きく低減する。すなわち、補強樹脂部６ａは、バンプ２と電極４との半田接合部を包み込んで補強するという接合部補強機能に適した特性を備えている。
【００１８】
これに対し補強樹脂部８ａは、補強樹脂部６ａよりもフィラーを多く混入して電子部品１の材質であるシリコンの熱膨張係数に近づけているため、実装後の使用状態におけるヒートサイクル時に、電子部品１と基板３との熱膨張差に起因する熱応力（特に電子部品１とバンプ２との接合部に作用する応力）を有効に緩和することができ、応力緩和機構に優れた特性を備えている。
【００１９】
従って、上記実施の形態に示す電子部品実装構造は、従来は困難であった接合部補強機能と応力緩和機能とを両立させた補強樹脂部を有するものとなっており、実装後の信頼性に優れた電子部品実装構造が実現されている。
【００２２】
【発明の効果】
本発明によれば、第１の樹脂の密着性、延性を保ちながら、第２の樹脂の熱膨張係数を所望値に近づけることができ、接合部補強機能と応力緩和機能とを両立させることができる。また請求項２の発明によれば、加熱による半田接合時にバンプ表面に生じる酸化膜を第１の樹脂により除去できるので、接合性のよい半田接合を行うことができる。
【図面の簡単な説明】
【図１】本発明の一実施の形態の電子部品実装方法の工程説明図
【図２】本発明の一実施の形態の電子部品実装方法の工程説明図
【図３】本発明の一実施の形態の電子部品実装構造の拡大断面図
【符号の説明】
１ 電子部品
２ バンプ
３ 基板
４ 電極
６ 樹脂
６ａ 補強樹脂部
８ 補強用樹脂
８ａ 補強樹脂部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to electronic part mounting method that implements the solder bumps of the electronic parts soldered to the electrodes of the substrate.
[0002]
[Prior art]
As a mounting method of an electronic component in which a bump as a connection electrode is provided on a semiconductor element such as a flip chip, a method of soldering a bump to an electrode on a substrate is widely used. In this mounting method, a reinforcing resin portion is provided between the electronic component and the substrate for the purpose of reinforcing the solder joint portion between the bump and the substrate. This reinforcing resin portion is caused by a bonding portion reinforcing function that reinforces the solder bonding portion between the bump and the electrode, and a difference in thermal expansion coefficient between each material of the substrate and the electronic component interposed between the electronic component and the substrate. It has a stress relaxation function for relaxing thermal stress.
[0003]
[Problems to be solved by the invention]
By the way, in the above-mentioned joint reinforcement function, since it is necessary to effectively reinforce the toe of the solder joint between the bump and the electrode, which is likely to cause stress concentration after mounting, the resin material has good adhesion. A material with high ductility that does not easily generate or propagate cracks is required. On the other hand, in the stress relaxation function, a resin having a thermal expansion coefficient that is an intermediate value between the thermal expansion coefficient of the substrate material and the thermal expansion coefficient of the material of the electronic component is most preferable.
[0004]
However, it is difficult to find a resin material that satisfies such a characteristic among commonly used resin materials. Conventionally, an electronic component mounting structure having a reinforced resin portion that has both a joint reinforcement function and a stress relaxation function has been used. Realization was difficult.
[0005]
Accordingly, the present invention aims at providing a method of mounting an electronic component having excellent reliability can Rukoto is both a joint reinforcing function and stress relieving function.
[0006]
[Means for Solving the Problems]
Electronic part mounting method according to claim 1 includes the steps of transferring the first resin to the lower surface of the bump made of a solder formed on the lower surface of the electronic component, the electronic and aligning the bump on the electrode of the substrate A step of mounting a component on the substrate, a step of soldering the bump to the electrode by heating and curing the first resin, and a second resin being injected into the gap between the electronic component and the substrate and a step, the filler content of the first resin is lower than the filler content of the second resin.
The electronic component mounting method according to claim 2 is the electronic component mounting method according to claim 1, wherein the first resin includes an active component having an oxide film removing ability, and in the solder bonding by the heating, The oxide film generated on the surface of the bump is removed by the first resin.
[0007]
According to the first aspect of the present invention, the filler content of the first resin that reinforces the solder joint between the bump of the electronic component and the electrode of the substrate is used to fill the space between the electronic component and the substrate. By making it lower than the filler content of the resin, the thermal expansion coefficient of the second resin can be brought close to the desired value while maintaining the adhesion and ductility of the first resin, and the joint reinforcement function and the stress relaxation function Can be made compatible.
According to the second aspect of the present invention, since the oxide film formed on the bump surface by heating can be removed by the first resin, it is possible to perform solder bonding with good bondability.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 and FIG. 2 are process explanatory views of an electronic component mounting method according to an embodiment of the present invention, and FIG. 3 is an enlarged sectional view of an electronic component mounting structure according to an embodiment of the present invention.
[0009]
In FIG. 1A, bumps 2 as connection electrodes are provided on the lower surface of an electronic component 1 using solder as a forming material. FIG. 1A shows a resin supply process for applying a resin to the bump 2, and the electronic component 1 is located on the resin application part 5. The resin application part 5 includes a resin transfer container 5a on which a coating film of resin 6 (first resin) is formed. By moving the electronic component 1 up and down with respect to the resin transfer container 5a, the lower surface of the bump 2 is provided. A predetermined amount of resin 6 is supplied to the side by transfer.
[0010]
Resin 6 is obtained by adding an active component having an oxide film removing ability and a filler component which is fine solid particles to a base mainly composed of a thermosetting resin such as an epoxy resin. Here, each component of the resin 6 is adjusted so that the filler content is 40 wt% or less. Of course, it may not contain any filler component.
[0011]
FIGS. 1B and 1C show a component mounting process for mounting the electronic component 1 on the substrate 3 after the resin supply process. Here, the bump 2 is aligned with the electrode 4 formed on the upper surface of the substrate 3, the electronic component 1 is lowered with respect to the substrate 3, and the bump 2 is landed on the electrode 4 through the resin 6. Thereby, the resin 6 transferred to the lower surface of the bump 2 adheres to the electrode 4 and further spreads on the upper surface of the substrate 3 so as to cover the electrode 4.
[0012]
Next, the substrate 3 is sent to a reflow apparatus, where a heating step for heating the substrate 3 after the component mounting step is performed as shown in FIG. By this heating, the bump 2 is melted and soldered to the electrode 4. In this solder bonding, the oxide film formed on the surface of the bump 2 is removed by the resin 6 having an oxide film removing capability, so that good solder bonding with good bondability is performed. At this time, the thermosetting reaction of the resin 6 proceeds in parallel, and the solder joint between the bump 2 and the electrode 4 is wrapped around and reinforced from the periphery. At the time of this reflow, the resin 6 need not be completely cured, and may be in a semi-cured state.
[0013]
Next, the substrate 3 after this heating step is sent to a resin sealing step. That is, as shown in FIG. 2A, the reinforcing resin 8 (second resin) is injected into the gap between the lower surface of the electronic component 1 and the upper surface of the substrate 3 by the dispenser 7. The reinforcing resin 8 is a thermosetting resin and contains a filler component like the resin 6. Here, the filler content of the reinforcing resin 8 is set based on a relative relationship with the filler content of the resin 6 in the range of 5 to 90 wt%, and the filler content of the resin 6 is the filler content of the reinforcing resin 8. Is set to be lower.
[0014]
Typical materials selected as solid particles constituting the filler mixed in the reinforcing resin 8 include silica and alumina. The purpose of mixing the filler is to make the coefficient of thermal expansion of the cured reinforcing resin close to the coefficient of thermal expansion of silicon, which is the material of the electronic component 1, and thereby the reinforcing resin 8 as the sealing resin material. The thermal expansion coefficient can be brought close to a desired value that is desirable in terms of function as the stress relaxation layer. Incidentally, the thermal expansion coefficient of silicon is 4 × 10 −6 , and the epoxy resin without filler is about 50 × 10 −6 , but by mixing the filler, it is about 9 × 10 −6 to 30 × 10 −6. Can be lowered.
[0015]
As shown in FIG. 2B, after the space between the substrate 3 and the electronic component 1 is completely filled with the reinforcing resin 8, the substrate 3 is heated again as shown in FIG. The reinforcing resin 8 is thermally cured by this heating, so that the resin component is sealed between the electronic component 1 and the substrate 3. And by this heating, the thermosetting reaction of the resin 6 further proceeds and is completely cured. This fills the space between the lower surface of the electronic component 1 and the upper surface of the substrate 3 and the reinforcing resin portion 6a (first reinforcing resin portion) that wraps and reinforces the solder joint between the bump 2 and the electrode 4 from the surroundings. Thus, a reinforcing resin portion 8a (second reinforcing resin portion) to be reinforced is formed.
[0016]
The characteristics of the electronic component mounting structure having the above configuration will be described with reference to FIG. In a state in which the resin 6 covers the electrode 4 and is completely cured, the resin 6 is in close contact with the upper surface of the substrate 3 and the reinforcing resin portion surrounds the toe portion 2 a of the solder joint portion between the bump 2 and the electrode 4. 6a is formed. Here, since the filler content of the reinforcing resin portion 6a is lower than that of the reinforcing resin 8, and is set in a low range of 40 wt% or less, the mechanical properties after thermosetting are excellent in adhesion, Moreover, the ductility when an external force in the tensile direction is applied is increased.
[0017]
For this reason, the reinforcing resin portion 6a is in good contact with the substrate 3 around the electrode 4, and in the vicinity of the toe portion 2a of the solder joint portion where stress concentration is likely to occur after mounting, the toe portion 2a has a good stress state. Following and extending the deformation, the probability of cracking is greatly reduced. That is, the reinforcing resin portion 6a has a characteristic suitable for a joint reinforcement function of enclosing and reinforcing the solder joint between the bump 2 and the electrode 4.
[0018]
On the other hand, the reinforcing resin portion 8a is mixed with more filler than the reinforcing resin portion 6a so as to be close to the thermal expansion coefficient of silicon that is the material of the electronic component 1, so that during the heat cycle in the use state after mounting, Thermal stress (particularly stress acting on the joint between the electronic component 1 and the bump 2) due to the difference in thermal expansion between the component 1 and the substrate 3 can be effectively relaxed, and the stress relaxation mechanism has excellent characteristics. ing.
[0019]
Therefore, the electronic component mounting structure shown in the above embodiment has a reinforced resin portion that achieves both a joint reinforcement function and a stress relaxation function, both of which have been difficult in the past. An excellent electronic component mounting structure is realized.
[0022]
【The invention's effect】
According to the present invention, the thermal expansion coefficient of the second resin can be brought close to a desired value while maintaining the adhesion and ductility of the first resin, and both the joint reinforcement function and the stress relaxation function can be achieved. it can. According to the second aspect of the invention, since the oxide film formed on the bump surface at the time of solder bonding by heating can be removed by the first resin, solder bonding with good bondability can be performed.
[Brief description of the drawings]
FIG. 1 is a process explanatory diagram of an electronic component mounting method according to an embodiment of the present invention. FIG. 2 is a process explanatory diagram of an electronic component mounting method according to an embodiment of the present invention. Cross-sectional view of electronic component mounting structure
DESCRIPTION OF SYMBOLS 1 Electronic component 2 Bump 3 Substrate 4 Electrode 6 Resin 6a Reinforcement resin part 8 Reinforcement resin 8a Reinforcement resin part

Claims (2)

電子部品の下面に形成された半田から成るバンプの下面に第１の樹脂を転写する工程と、前記バンプを基板の電極に位置合わせして前記電子部品を基板に搭載する工程と、加熱によって前記バンプを前記電極に半田接合させるとともに前記第１の樹脂を硬化させる工程と、前記電子部品と前記基板の間の隙間に第２の樹脂を注入する工程とを含み、前記第１の樹脂のフィラー含有率は前記第２の樹脂のフィラー含有率よりも低いことを特徴とする電子部品の実装方法。A step of transferring a first resin to a lower surface of a bump made of solder formed on a lower surface of the electronic component; a step of aligning the bump with an electrode of the substrate; and mounting the electronic component on the substrate; A first resin filler comprising: soldering bumps to the electrodes and curing the first resin; and injecting a second resin into a gap between the electronic component and the substrate. The electronic component mounting method, wherein the content is lower than the filler content of the second resin. 前記第１の樹脂が酸化膜除去能力を有する活性成分を含み、前記加熱による前記半田接合において、前記バンプの表面に生じた酸化膜を前記第１の樹脂により除去することを特徴とする請求項１記載の電子部品の実装方法。The first resin includes an active component having an oxide film removing ability, and an oxide film generated on a surface of the bump is removed by the first resin in the solder bonding by the heating. 1. A method for mounting an electronic component according to 1.
JP2001354519A 2001-11-20 2001-11-20 Electronic component mounting method Expired - Fee Related JP3708478B2 (en)

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US7332821B2 (en) * 2004-08-20 2008-02-19 International Business Machines Corporation Compressible films surrounding solder connectors
JP4948840B2 (en) * 2006-01-30 2012-06-06 株式会社デンソー Electronic component connection structure and method of manufacturing electronic component connection structure
JP4631742B2 (en) * 2006-02-27 2011-02-16 エプソンイメージングデバイス株式会社 ELECTRO-OPTICAL DEVICE, MOUNTING STRUCTURE, ELECTRO-OPTICAL DEVICE MANUFACTURING METHOD, AND ELECTRONIC DEVICE
US8450859B2 (en) 2008-10-27 2013-05-28 Panasonic Corporation Semiconductor device mounted structure and its manufacturing method
US20120085575A1 (en) * 2010-10-08 2012-04-12 Nobuhiro Yamamoto Electronic Apparatus Manufacturing Method, Electronic Component, and Electronic Apparatus
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