JP2721790B2 - Semiconductor device sealing method - Google Patents

Semiconductor device sealing method

Info

Publication number
JP2721790B2
JP2721790B2 JP5242646A JP24264693A JP2721790B2 JP 2721790 B2 JP2721790 B2 JP 2721790B2 JP 5242646 A JP5242646 A JP 5242646A JP 24264693 A JP24264693 A JP 24264693A JP 2721790 B2 JP2721790 B2 JP 2721790B2
Authority
JP
Japan
Prior art keywords
semiconductor device
circuit board
resin
sealing
conductive adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5242646A
Other languages
Japanese (ja)
Other versions
JPH07106357A (en
Inventor
芳宏 別所
善広 戸村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5242646A priority Critical patent/JP2721790B2/en
Priority to DE69426347T priority patent/DE69426347T2/en
Priority to EP94115187A priority patent/EP0645805B1/en
Priority to KR1019940024239A priority patent/KR0171438B1/en
Publication of JPH07106357A publication Critical patent/JPH07106357A/en
Priority to US08/709,606 priority patent/US5670826A/en
Priority to US08/731,521 priority patent/US5651179A/en
Application granted granted Critical
Publication of JP2721790B2 publication Critical patent/JP2721790B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置を回路基板
に実装する際の封止に関するものであり、特にフェース
ダウンで実装してなる半導体装置の封止方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to sealing for mounting a semiconductor device on a circuit board, and more particularly to a method for sealing a semiconductor device mounted face down.

【0002】[0002]

【従来の技術】従来、半導体装置の回路基板上への実装
には半田付けがよく利用されていたが、近年、半導体装
置のパッケージの小型化と接続端子数の増加により、接
続端子間隔が狭くなり、従来の半田付け技術で対処する
ことが次第に困難になってきた。
2. Description of the Related Art Conventionally, soldering has often been used for mounting a semiconductor device on a circuit board. However, in recent years, the spacing between connection terminals has been reduced due to the miniaturization of the package of the semiconductor device and the increase in the number of connection terminals. It has become increasingly difficult to deal with the conventional soldering technology.

【0003】そこで、最近では裸の半導体装置を回路基
板上に直付けして実装面積の小型化と効率的使用を図ろ
うとする方法が考えだされてきた。一例として、半導体
装置を回路基板に接続するに際し、あらかじめ半導体装
置の端子電極上に密着金属や拡散防止金属の蒸着膜とこ
の上にメッキにより形成した半田層とからなる電極構造
を有する半導体装置をフェースダウンにし、高温に加熱
して半田を回路基板の接続電極に融着するものがあっ
た。この実装構造は、接続後の機械的強度が強く、接続
が一括にできることなどから有効な方法であるとされて
いる(例えば、工業調査会、1980年1月15日発
行、日本マイクロエレクトロニクス協会編、『IC化実
装技術』)。
Therefore, recently, a method has been devised in which a bare semiconductor device is directly mounted on a circuit board in order to reduce the mounting area and use the device efficiently. As an example, when connecting a semiconductor device to a circuit board, a semiconductor device having an electrode structure composed of a deposited film of an adhesion metal or a diffusion preventing metal on a terminal electrode of the semiconductor device in advance and a solder layer formed by plating on the deposited film. In some cases, the solder is face-down and heated to a high temperature to fuse the solder to the connection electrodes of the circuit board. This mounting structure is considered to be an effective method because the mechanical strength after connection is strong and the connection can be made at once (for example, Industrial Research Council, published on January 15, 1980, edited by Japan Microelectronics Association) , “IC mounting technology”).

【0004】以下、図面を参照しながら上述した従来の
半導体装置の封止方法とその実装体の一例について説明
する。
[0004] Hereinafter, an example of the above-described conventional semiconductor device sealing method and an example of a mounting body thereof will be described with reference to the drawings.

【0005】図4は従来のフェースダウンで実装された
半導体装置の実装体の要部断面図である。
FIG. 4 is a sectional view of a main part of a conventional semiconductor device mounted face-down.

【0006】図4において、1は半導体装置、2は半導
体装置の端子電極、4は回路基板、5は回路基板4の表
面に形成された接続電極、8は前記接続電極5と前記端
子電極2を接合した半田接合部、9は半導体装置1を封
止した封止樹脂である。
In FIG. 4, 1 is a semiconductor device, 2 is a terminal electrode of the semiconductor device, 4 is a circuit board, 5 is a connection electrode formed on the surface of the circuit board 4, 8 is the connection electrode 5 and the terminal electrode 2 And 9 is a sealing resin for sealing the semiconductor device 1.

【0007】以上のように構成された従来のフェースダ
ウンで実装された半導体装置の封止方法とその実装体に
ついて、以下その概略を説明する。
The outline of the conventional method for sealing a semiconductor device mounted face-down and configured as described above, which is configured as described above, will be described below.

【0008】まず、半田バンプを有する半導体装置1
を、回路基板4の接続端子5の所定の位置に位置合わせ
を行ってフェースダウンで搭載した後、200〜300
℃の高温に加熱して半田を溶融して接続端子5に接合し
て、半導体装置1の実装を行う。その後、半導体装置1
と回路基板4との間隙に液状の封止樹脂を充填し、12
0℃程度で加熱硬化させることで、半導体装置1を封止
樹脂9で封止した実装体を得るものである。
First, a semiconductor device 1 having solder bumps
Is mounted face-down after being aligned at a predetermined position of the connection terminal 5 of the circuit board 4, and
The semiconductor device 1 is mounted by heating to a high temperature of ° C. to melt the solder and join it to the connection terminal 5. Then, the semiconductor device 1
A liquid sealing resin is filled in the gap between
By heating and curing at about 0 ° C., a mounted body in which the semiconductor device 1 is sealed with the sealing resin 9 is obtained.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、上記の
ような半導体装置の実装体においては、次のような問題
がある。
However, the above-described semiconductor device package has the following problems.

【0010】 半田接合部8は剛性が大でフレキシビ
リティに欠けるため、半導体装置1と回路基板4との間
隙に充填した液状の封止樹脂を熱硬化する際に、半導体
装置1と回路基板4の熱膨張係数の差により生じる熱応
力が半田接合部8に加わり、大きな内部歪が生じる。
Since the solder joint 8 has high rigidity and lacks flexibility, when the liquid sealing resin filled in the gap between the semiconductor device 1 and the circuit board 4 is thermoset, the semiconductor device 1 and the circuit board 4 are hardened. The thermal stress generated by the difference in the thermal expansion coefficient of the solder joints 8 is applied to the solder joints 8 to cause a large internal strain.

【0011】 この熱応力の影響を極力避けるために
比較的低温で硬化が可能な封止樹脂が用いられるが、こ
のような封止樹脂は必然的にガラス転移温度の比較的低
いものが用いられ、半導体装置1を封止樹脂9のガラス
転移点以上で使用する場合には封止樹脂9のガラス転移
点以上の大きな熱膨張により生じる新たな熱応力が半田
接合部8に加わる。
In order to avoid the influence of the thermal stress as much as possible, a sealing resin which can be cured at a relatively low temperature is used. However, such a sealing resin necessarily has a relatively low glass transition temperature. When the semiconductor device 1 is used at a temperature equal to or higher than the glass transition point of the sealing resin 9, a new thermal stress generated by a large thermal expansion equal to or higher than the glass transition point of the sealing resin 9 is applied to the solder joint 8.

【0012】その結果、半導体装置1と回路基板4との
接続が信頼性の乏しいものになるといった課題を有して
いた。
As a result, there is a problem that the connection between the semiconductor device 1 and the circuit board 4 becomes poor in reliability.

【0013】本発明は上記の課題に鑑みてなされたもの
であり、その目的とするところは、半導体装置と回路基
板とを信頼性高く接続することのできる半導体装置の封
止方法を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of sealing a semiconductor device which can connect a semiconductor device and a circuit board with high reliability. It is in.

【0014】[0014]

【課題を解決するための手段】本発明の半導体装置の封
止方法は、半導体装置をフェースダウンで導電性接着剤
を用いて回路基板に実装する半導体装置の封止方法にお
いて、フェースダウンで実装した半導体装置と回路基板
との間隙に半導体装置の使用温度範囲以上のガラス転移
点を有する熱硬化型の樹脂を充填した後、該熱硬化型の
樹脂を180℃以上の温度で加熱硬化することを特徴と
する。
SUMMARY OF THE INVENTION A method for sealing a semiconductor device according to the present invention is a method for sealing a semiconductor device face-down, wherein the semiconductor device is mounted face-down on a circuit board using a conductive adhesive. Filling a gap between the semiconductor device and the circuit board with a thermosetting resin having a glass transition point higher than the operating temperature range of the semiconductor device, and then heat-curing the thermosetting resin at a temperature of 180 ° C. or higher. It is characterized by.

【0015】本発明は半導体装置の突起電極を導電性接
着剤を用いて回路基板に実装する場合に適用すると好適
である。又熱硬化型の樹脂に無機フィーラを混合して熱
膨張係数を小さくすると好適である。
The present invention is suitably applied to a case where a bump electrode of a semiconductor device is mounted on a circuit board using a conductive adhesive. It is also preferable to mix a thermosetting resin with an inorganic feeler to reduce the coefficient of thermal expansion.

【0016】[0016]

【作用】本発明によれば、フェースダウンで実装する半
導体装置を導電性接着剤を用いて回路基板に実装するこ
とにより、接合部の剛性が低下しフレキシビリティが与
えられるため、半導体装置と回路基板との間隙に充填し
た封止樹脂を熱硬化する際の半導体装置と回路基板の熱
膨張係数の差により生じる熱応力の影響を小さくするこ
とができ、180℃以上の温度で加熱することが可能と
なった。この結果半導体装置の使用温度範囲以上のガラ
ス転移点を有する樹脂を封止樹脂として用いることがで
きる。
According to the present invention, by mounting a semiconductor device to be mounted face down on a circuit board using a conductive adhesive, the rigidity of a joint is reduced and flexibility is given. It is possible to reduce the influence of thermal stress caused by the difference in the coefficient of thermal expansion between the semiconductor device and the circuit board when the sealing resin filled in the gap between the board and the substrate is thermally cured. It has become possible. As a result, a resin having a glass transition point higher than the operating temperature range of the semiconductor device can be used as the sealing resin.

【0017】この樹脂をフェースダウンで実装する半導
体装置の封止樹脂として用いることにより、半導体装置
の使用温度範囲では半導体装置と回路基板との間隙に充
填した樹脂が常にガラス転移点以下の小さな熱膨張係数
を有することができ、信頼性の高い半導体装置の実装体
を得ることができる。
By using this resin as a sealing resin for a semiconductor device to be mounted face-down, the resin filled in the gap between the semiconductor device and the circuit board always has a small heat below the glass transition point within the operating temperature range of the semiconductor device. The semiconductor device can have an expansion coefficient, and a highly reliable semiconductor device package can be obtained.

【0018】[0018]

【実施例】以下、本発明の一実施例について、図面を参
照しながら説明する。
An embodiment of the present invention will be described below with reference to the drawings.

【0019】図1ないし図3は本発明の一実施例におけ
る半導体装置の封止方法を説明するものである。
FIGS. 1 to 3 illustrate a method of sealing a semiconductor device according to an embodiment of the present invention.

【0020】図1ないし図3において、1は半導体装
置、2は端子電極、3は半導体装置1を実装するのに用
いる導電性接着剤、4は回路基板、5は回路基板4の表
面に形成された接続電極、6は熱硬化型の樹脂である。
1 to 3, reference numeral 1 denotes a semiconductor device, 2 denotes a terminal electrode, 3 denotes a conductive adhesive used for mounting the semiconductor device 1, 4 denotes a circuit board, and 5 denotes a surface of the circuit board 4. The connection electrode 6 is a thermosetting resin.

【0021】以上のように構成された半導体装置の封止
方法およびその実装体について、以下、図面を用いて説
明する。
A method for sealing a semiconductor device having the above-described structure and a package thereof will be described below with reference to the drawings.

【0022】まず、半導体装置1の端子電極2にあらか
じめ導電性接着剤3を形成しておく。このとき導電性接
着剤3は端子電極2に直接形成してもよいし、端子電極
2にあらかじめ形成した突起電極(バンプ)上に形成し
てもよい。
First, the conductive adhesive 3 is formed on the terminal electrode 2 of the semiconductor device 1 in advance. At this time, the conductive adhesive 3 may be formed directly on the terminal electrode 2 or may be formed on a bump electrode (bump) formed on the terminal electrode 2 in advance.

【0023】そして、図1に示すように、この半導体装
置1をフェースダウン(下向き)にして回路基板4の接
続電極5に位置合わせを行い、回路基板4上に半導体装
置1を搭載後、加熱して導電性接着剤3を硬化させるこ
とで、図2に示すように、半導体装置1の端子電極2と
回路基板4の接続電極5が電気的に接続される。
Then, as shown in FIG. 1, the semiconductor device 1 is face-down (downward), positioned with respect to the connection electrodes 5 of the circuit board 4, and after mounting the semiconductor device 1 on the circuit board 4, heating is performed. Then, the conductive adhesive 3 is cured to electrically connect the terminal electrodes 2 of the semiconductor device 1 and the connection electrodes 5 of the circuit board 4 as shown in FIG.

【0024】つぎに、図3に示すように、半導体装置1
と回路基板4との間隙に熱硬化型の樹脂6(例えばエポ
キシ樹脂)を充填した後、180℃以上の温度で加熱し
て熱硬化型の樹脂6の硬化を行う。
Next, as shown in FIG.
After filling the gap between the resin and the circuit board 4 with a thermosetting resin 6 (for example, epoxy resin), the thermosetting resin 6 is cured by heating at a temperature of 180 ° C. or higher.

【0025】熱硬化型の樹脂6の加熱硬化において、熱
硬化型の樹脂6の硬化反応が進むにつれて熱硬化型の樹
脂6は硬化収縮して、その収縮力により半導体装置1と
回路基板4の接合部の導電性接着剤3における密着力が
増して接合の安定性が向上する。
In the heat curing of the thermosetting resin 6, the thermosetting resin 6 cures and contracts as the curing reaction of the thermosetting resin 6 progresses, and the contraction force causes the semiconductor device 1 and the circuit board 4 to shrink. The bonding strength of the bonding portion in the conductive adhesive 3 is increased, and the bonding stability is improved.

【0026】このとき用いる熱硬化型の樹脂6は、その
ガラス転移温度が半導体装置の使用温度範囲以上の熱硬
化型の樹脂を用いる。
As the thermosetting resin 6 used at this time, a thermosetting resin whose glass transition temperature is higher than the operating temperature range of the semiconductor device is used.

【0027】上記の方法により、封止工程完了の半導体
装置1においては、図3に示すように、半導体装置1と
回路基板4との間隙に熱硬化後の樹脂6が充填された半
導体装置1の実装体を得る。
According to the above-described method, in the semiconductor device 1 having completed the sealing process, as shown in FIG. 3, the semiconductor device 1 in which the gap between the semiconductor device 1 and the circuit board 4 is filled with the resin 6 after thermosetting. To get the implementation.

【0028】この実装体においては、半導体装置1と回
路基板4との間隙の熱硬化後の樹脂6は半導体装置1の
使用温度範囲以上のガラス転移点を有しているために、
半導体装置1を使用する際に常に小さな熱膨張係数を有
しており、半導体装置1と回路基板4との接合を常に安
定な状態に保持することができ、信頼性の高い半導体装
置の実装体が実現できる。
In this package, since the resin 6 after the thermosetting in the gap between the semiconductor device 1 and the circuit board 4 has a glass transition point higher than the operating temperature range of the semiconductor device 1,
The semiconductor device 1 always has a small coefficient of thermal expansion when it is used, so that the bonding between the semiconductor device 1 and the circuit board 4 can always be maintained in a stable state, and a highly reliable package of the semiconductor device. Can be realized.

【0029】本発明の半導体装置の封止方法は、半導体
装置の使用温度範囲以上のガラス転移点を有する熱硬化
型の樹脂を用いることができるため、半導体装置と回路
基板との間隙の熱硬化後の樹脂による熱膨張をガラス転
移点以下の小さな熱膨張係数に維持することができ、接
合の安定性を保持することができる。
In the method of sealing a semiconductor device according to the present invention, a thermosetting resin having a glass transition point higher than the operating temperature range of the semiconductor device can be used. The subsequent thermal expansion of the resin can be maintained at a small thermal expansion coefficient equal to or lower than the glass transition point, and the bonding stability can be maintained.

【0030】さらに、本発明によれば、半導体装置の使
用温度範囲以上のガラス転移点を有する熱硬化型の樹脂
を用いることができるため、従来のフェースダウンで実
装する半導体装置で問題であった半導体装置と回路基板
との間隙の封止樹脂の熱膨張による接合部への熱応力が
極めて小さくなり、極めて安定で信頼性の高い半導体装
置の実装体を得ることができる。
Further, according to the present invention, a thermosetting resin having a glass transition point higher than the operating temperature range of the semiconductor device can be used, which is a problem in the conventional semiconductor device mounted face down. The thermal stress on the joint due to the thermal expansion of the sealing resin in the gap between the semiconductor device and the circuit board becomes extremely small, and a highly stable and highly reliable semiconductor device package can be obtained.

【0031】なお、実施例では導電性接着剤3を半導体
装置1の端子電極2に形成するとしたが、回路基板4の
接続電極5に形成してもよい。
Although the conductive adhesive 3 is formed on the terminal electrode 2 of the semiconductor device 1 in the embodiment, it may be formed on the connection electrode 5 of the circuit board 4.

【0032】また、導電性接着剤3の材質は、エポキシ
樹脂、シリコーン樹脂、ポリイミド樹脂、フェノール樹
脂などにAg、Au、Ni、Cuなどの導電粉を含んだ
もので、良好な導電性を有する導電性接着剤であればい
かなるものでもよい。
The material of the conductive adhesive 3 is epoxy resin, silicone resin, polyimide resin, phenol resin or the like containing conductive powder such as Ag, Au, Ni, Cu, etc., and has good conductivity. Any conductive adhesive may be used.

【0033】同様に、熱硬化型の樹脂6の材質も、エポ
キシ樹脂、シリコーン樹脂、ポリイミド樹脂、フェノー
ル樹脂など、半導体装置1の使用温度範囲以上のガラス
転移点を有する絶縁性樹脂であればいかなるものでもよ
い。
Similarly, the material of the thermosetting resin 6 may be any resin such as an epoxy resin, a silicone resin, a polyimide resin, and a phenol resin as long as the resin has a glass transition point higher than the operating temperature range of the semiconductor device 1. It may be something.

【0034】さらに、熱硬化型の樹脂6には、シリカな
どの無機フィラーを混合して熱膨張係数を小さくしたも
のを用いるとさらにその効果が発揮できる。
Further, when the thermosetting resin 6 is mixed with an inorganic filler such as silica to reduce the thermal expansion coefficient, the effect can be further exhibited.

【0035】[0035]

【発明の効果】以上に説明したように、本発明の半導体
装置の封止方法によれば、フレキシビリティのある導電
性接着剤を用いて半導体装置を回路基板に接合している
ため、両者の熱膨張係数の差により生ずる熱応力の影響
を小さくでき、180℃以上の温度で封止樹脂を加熱硬
化させることができる。このため半導体装置の使用温度
範囲以上のガラス転移点を有する熱硬化型の樹脂を封止
樹脂として用いることができるため、導電性接着剤を用
いてフェースダウンで半導体装置と回路基板を接合する
半導体装置において、半導体装置と回路基板との間隙の
熱硬化後の樹脂の熱膨張をガラス転移温度以下の小さい
熱膨張係数に維持することができ、半導体装置と回路基
板の接合部の導電性接着剤における接合の安定性を保持
することができる。
As described above, according to the method of sealing a semiconductor device of the present invention, the semiconductor device is bonded to the circuit board using a flexible conductive adhesive. The effect of thermal stress caused by the difference in thermal expansion coefficient can be reduced, and the sealing resin can be cured by heating at a temperature of 180 ° C. or higher. For this reason, a thermosetting resin having a glass transition point equal to or higher than the operating temperature range of the semiconductor device can be used as the sealing resin, and the semiconductor device and the circuit board are bonded face down using a conductive adhesive. In the device, the thermal expansion of the resin after thermal curing of the gap between the semiconductor device and the circuit board can be maintained at a small thermal expansion coefficient equal to or lower than the glass transition temperature, and the conductive adhesive at the junction between the semiconductor device and the circuit board Can maintain the stability of bonding.

【0036】さらに、本発明方法を用いて封止された半
導体装置の実装体は、半導体装置の使用温度範囲以上の
ガラス転移点を有する熱硬化型の樹脂を用いるため、半
導体装置の使用温度範囲では半導体装置と回路基板との
間隙の封止樹脂の熱膨張による接合部への熱応力が極め
て小さくなり、極めて安定で信頼性の高い半導体装置の
実装体を得ることができる。
Further, the semiconductor device package encapsulated by the method of the present invention uses a thermosetting resin having a glass transition point higher than the operating temperature range of the semiconductor device. In this case, the thermal stress on the joint due to the thermal expansion of the sealing resin in the gap between the semiconductor device and the circuit board becomes extremely small, and a highly stable and highly reliable semiconductor device package can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における半導体装置の封止方
法を説明する工程図である。
FIG. 1 is a process diagram illustrating a method for sealing a semiconductor device according to an embodiment of the present invention.

【図2】本発明の一実施例における半導体装置の封止方
法を説明する工程図である。
FIG. 2 is a process diagram illustrating a method for sealing a semiconductor device according to an embodiment of the present invention.

【図3】本発明の一実施例における半導体装置の実装体
の要部断面図である。
FIG. 3 is a sectional view of a main part of a semiconductor device package according to one embodiment of the present invention;

【図4】従来のフェースダウンで実装された半導体装置
の実装体の要部断面図である。
FIG. 4 is a cross-sectional view of a main part of a conventional semiconductor device mounted face-down.

【符号の説明】[Explanation of symbols]

1 半導体装置 2 端子電極 3 導電性接着剤 4 回路基板 5 接続電極 6 熱硬化型の樹脂 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Terminal electrode 3 Conductive adhesive 4 Circuit board 5 Connection electrode 6 Thermosetting resin

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体装置をフェースダウンで導電性接
着剤を用いて回路基板に実装する半導体装置の封止方法
において、フェースダウンで実装した半導体装置と回路
基板との間隙に半導体装置の使用温度範囲以上のガラス
転移点を有する熱硬化型の樹脂を充填した後、該熱硬化
型の樹脂を180℃以上の温度で加熱硬化させることを
特徴とする半導体装置の封止方法。
1. A method of sealing a semiconductor device, wherein the semiconductor device is mounted face down on a circuit board by using a conductive adhesive, the temperature of the semiconductor device being set in a gap between the semiconductor device mounted face down and the circuit board. after filling the thermosetting resin having a glass transition temperature of more than the range, the sealing method of a semiconductor device characterized by causing heat curing the heat-curable resin at 180 ° C. or higher.
【請求項2】 半導体装置の突起電極を導電性接着剤を
用いて回路基板に実装したことを特徴とする請求項1記
載の半導体装置の封止方法。
2. The method according to claim 1, wherein the protruding electrodes of the semiconductor device are mounted on a circuit board using a conductive adhesive.
【請求項3】 熱硬化型の樹脂に無機フィラーを混合し
て熱膨張係数を小さくしたことを特徴とする請求項1記
載の半導体装置の封止方法。
3. The method according to claim 1, wherein an inorganic filler is mixed with the thermosetting resin to reduce the coefficient of thermal expansion.
JP5242646A 1993-09-29 1993-09-29 Semiconductor device sealing method Expired - Fee Related JP2721790B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP5242646A JP2721790B2 (en) 1993-09-29 1993-09-29 Semiconductor device sealing method
DE69426347T DE69426347T2 (en) 1993-09-29 1994-09-27 Method of mounting a semiconductor device on a circuit board and a circuit board with a semiconductor device thereon
EP94115187A EP0645805B1 (en) 1993-09-29 1994-09-27 Method for mounting a semiconductor device on a circuit board, and a circuit board with a semiconductor device mounted thereon
KR1019940024239A KR0171438B1 (en) 1993-09-29 1994-09-27 Method for mounting a semiconductor device on a circuit board, and a circuit board with a semiconductor device mounted thereon
US08/709,606 US5670826A (en) 1993-09-29 1996-09-09 Method for mounting a semiconductor device on a circuit board using a conductive adhesive and a thermosetting resin, and a circuit board with a semiconductor device mounted thereon using the method
US08/731,521 US5651179A (en) 1993-09-29 1996-10-15 Method for mounting a semiconductor device on a circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5242646A JP2721790B2 (en) 1993-09-29 1993-09-29 Semiconductor device sealing method

Publications (2)

Publication Number Publication Date
JPH07106357A JPH07106357A (en) 1995-04-21
JP2721790B2 true JP2721790B2 (en) 1998-03-04

Family

ID=17092147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5242646A Expired - Fee Related JP2721790B2 (en) 1993-09-29 1993-09-29 Semiconductor device sealing method

Country Status (1)

Country Link
JP (1) JP2721790B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3604248B2 (en) * 1997-02-25 2004-12-22 沖電気工業株式会社 Method for manufacturing semiconductor device
JP4635383B2 (en) * 2001-06-13 2011-02-23 ソニー株式会社 Mounting method of semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0547841A (en) * 1991-08-20 1993-02-26 Citizen Watch Co Ltd Mounting method and structure of semiconductor apparatus

Also Published As

Publication number Publication date
JPH07106357A (en) 1995-04-21

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