JP3547270B2 - Mounting structure and method of manufacturing the same - Google Patents

Mounting structure and method of manufacturing the same Download PDF

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Publication number
JP3547270B2
JP3547270B2 JP27657696A JP27657696A JP3547270B2 JP 3547270 B2 JP3547270 B2 JP 3547270B2 JP 27657696 A JP27657696 A JP 27657696A JP 27657696 A JP27657696 A JP 27657696A JP 3547270 B2 JP3547270 B2 JP 3547270B2
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Japan
Prior art keywords
resin layer
mounting structure
semiconductor device
circuit board
structure according
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JP27657696A
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Japanese (ja)
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JPH10125730A (en
Inventor
和由 天見
祐伯　　聖
芳宏 別所
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus

Description

【０００１】
【発明の属する技術分野】
本発明は、集積回路チップ等の半導体装置が回路基板上にフリップチップ実装されている実装構造体、およびその製造方法に関するものである。
【０００２】
【従来の技術】
従来、回路基板の入出力端子電極に半導体装置を実装する際には、半田付けを用いたワイヤボンディング方法がよく利用されてきた。しかし、近年、半導体装置のパッケージの小型化と接続端子数の増加により接続端子の間隔が狭くなり、従来の半田付け技術で対処することが次第に困難になってきた。
【０００３】
そこで、最近では集積回路チップ等の半導体装置を回路基板の入出力端子電極上に直接実装することにより、実装面積を小型化して効率的使用を図る技術が提案されている。
【０００４】
なかでも、半導体装置を回路基板にフェイスダウン状態でフリップチップ実装する技術は、半導体装置と回路基板との電気的接続が一括してできること、および接続後の機械的強度が強いこと等の利点があるため、有用な技術であるといえる。
【０００５】
例えば、工業調査会、１９８０年１月１５日発行、日本マイクロエレクトロニクス協会編、「ＩＣ化実装技術」には、半田メッキ法を用いた実装技術が記載されている。以下、この実装技術を図面に基づいて説明する。
【０００６】
図５は、半導体装置を構成するＩＣ基板１の電極パッド３上に、半田から成る電気的接続接点（以下「半田バンプ」という）１１を形成させた状態の一部拡大断面図を示している。この半導体装置は、まずＩＣ基板１の電極パッド３上に蒸着法によって密着金属膜１３および拡散防止金属膜１２が形成され、さらにその上にメッキ法によって半田バンプ１１が形成されている。
【０００７】
次に、図５のように構成された半導体装置を、フェイスダウン状態で回路基板に実装する。この実装した状態の一部拡大断面図を示しているのが図６である。実装の際には、回路基板５に形成されている入出力端子電極８上に半田バンプ１１が当接するように位置合わせが行われ、回路基板５上に半導体装置が載置される（以下、回路基板５上に半導体装置が実装されたものを「実装構造体」という）。その後、この実装構造体を高温に加熱することにより、半田バンプ１１が回路基板５の入出力端子電極８に融着する。
【０００８】
また、最近では、導電性接着剤を用いて実装構造体を構成する技術も提案されている。図７は、導電性接着剤を用いて構成されている実装構造体の概略断面図を示したものである。この実装構造体は、図７に示すように、ＩＣ基板１の電極パッド３上に、ワイヤボンディング法またはメッキ法等により電気的接続接点（以下「Ａｕバンプ」という）１４が形成され、導電性接着剤（接合層）７を介して、Ａｕバンプ１４と回路基板５の入出力端子電極８とが接続されている。このような実装構造体においては、ＩＣ基板１のＡｕバンプ１４に導電性接着剤７を転写してから、回路基板５の入出力端子電極８にＡｕバンプ１４が当接するように位置合わせを行い、その後導電性接着剤７を硬化させて電気的接続を得ている。
【０００９】
以上の各技術を用いて構成されている実装構造体においては、図６および図７に示すように、半導体装置と回路基板５との接続部の補強を行うために、半導体装置と回路基板５との間に封止樹脂を封入して封止樹脂層６を形成させる技術も提案されている。そして、この封止樹脂層６が硬化することにより、半導体装置と回路基板５との接続部が補強される。
【００１０】
【発明が解決しようとする課題】
しかしながら、上記従来の技術に係る実装構造体においては、封止樹脂層の硬化の際に起こる樹脂の硬化収縮とＩＣ基板の熱膨張との差により、歪みが発生するおそれがある。歪みが発生すると、例えばＩＣ基板側に凸状に膨らみが発生し、実装構造体の各部に歪みが生じてしまう。このような実装構造体の各部の歪みは、ＩＣ基板、バンプ電極および回路基板のそれぞれの接続部において、断線または接触不良等を引き起こす原因となる。
【００１１】
本発明は、このような課題を解決するためになされたもので、半導体装置と回路基板との接続部の安定性および信頼性の高い実装構造体を提供するとともに、この実装構造体の製造方法を提供することを目的とする。
【００１２】
【課題を解決するための手段】
上記目的を達成するための本発明の実装構造体は、半導体装置と回路基板とがフリップチップ方式を用いて電気的に接続されている実装構造体において、前記半導体装置と前記回路基板との間に封止樹脂層が形成され、前記半導体装置の前記回路基板との接続面の裏面に熱伝導性を有するフィラを含有している樹脂層が形成されていることを特徴とする。
【００１３】
本発明の構成によれば、前記封止樹脂の硬化時に発生する硬化収縮と前記半導体装置を構成するＩＣ基板の熱膨張との差による歪みを、前記樹脂層を設けることにより緩和することができるため、前記半導体装置と前記回路基板との接続部の安定性および信頼性の高い実装構造体を得ることができる。
【００１４】
また、前記樹脂層が、熱硬化性樹脂を用いて構成されていることが好ましい。さらに、前記樹脂層に貫通孔が形成されていることも好ましい。
【００１５】
このような構成にすれば、前記実装構造体を構成する半導体装置等に発生する熱を効率よく発散させることができ、前記封止樹脂の硬化収縮と前記半導体装置を構成するＩＣ基板の熱膨張との差を緩和することが可能となる。したがって、実装構造体の各部の歪みを効果的に防止し、安定性および信頼性の高い接続部を有する実装構造体を得ることができる。
【００１６】
さらに、本発明は、半導体装置と回路基板とをフリップチップ方式を用いて電気的に接続する実装構造体の製造方法において、前記半導体装置と前記回路基板との間に樹脂を封入して未硬化の封止樹脂層を形成し、前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成した後、前記封止樹脂層と前記樹脂層とをほぼ同時に硬化させることを特徴とする。
【００１７】
また、前記製造方法においては、熱伝導性を有するフィラを含有している樹脂層を用いて、前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成することが好ましく、前記未硬化の樹脂層に貫通孔を形成する工程を含むことも好ましい。さらに、シート状に形成された未硬化の樹脂層を用いて、前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成することも好ましい。
【００１８】
【発明の実施形態】
以下、本発明の実施形態に係る実装構造体を図面に基づいて説明する。
（第一の実施形態）
図１は、本発明の第一の実施形態に係る実装構造体の断面図を示している。この図１に示すように、本実施形態に係る実装構造体を構成する半導体装置は、ＩＣ基板１の電極パッド３上に電気的接続点（以下「バンプ電極」という）２が形成され、ＩＣ基板１の電極パッド３を有する面の裏面に、スクリーン印刷法を用いて熱硬化性の樹脂層４が約３０μｍの厚さで形成されている。
【００１９】
半導体装置を回路基板５に実装する際には、バンプ電極２に半田または導電性接着剤等から成る接合層７を転写法または印刷法等によって形成し、バンプ電極２と回路基板５の入出力端子電極８とが当接するように位置合わせを行い、回路基板５上に半導体装置をフェイスダウン状態で積載する。そして、半導体装置と回路基板５との間に封止樹脂を封入して封止樹脂層６を形成させ、この封止樹脂層６とＩＣ基板１に形成された樹脂層４とをほぼ同時に硬化させる。このようにして、実装構造体が造られる。
【００２０】
本実施形態においては、以上のように、樹脂層４と封止樹脂層６とがＩＣ基板１を挟み込む構成とし、さらにこれらの各樹脂層４，６とをほぼ同時に硬化させるようにしたので、従来封止樹脂層６の硬化時に起こる樹脂の硬化収縮とＩＣ基板１の熱膨張との差に起因して発生していた歪みを効果的に防止することができる。したがって、実装構造体の各部の歪みも緩和されるため、半導体装置と回路基板１との接続部は補強され、安定性および信頼性の高い接続部を有する実装構造体を得ることができる。
【００２１】
また、本実施形態においては、樹脂層４の形成方法としてスクリーン印刷法を用いた場合について説明したが、本発明はこれに限定されるものではなく、例えば転写法等の他の方法を用いてもよい。さらに、樹脂層４の厚みについても、特に限定する必要はなく、樹脂の硬化速度および実装構造体の歪み具合等を考慮して適宜決定すればよい。また、樹脂層４を形成させる時期は、封止樹脂層６の硬化前であればよく、特に限定する必要はない。
【００２２】
（第二の実施形態）
図２は、本発明の第二の実施形態に係る実装構造体の断面図を示している。この第二の実施形態においては、ＩＣ基板１の電極パッド３を有する面の裏面に、熱伝導性を有するフィラ９を含む樹脂層２４が形成されている。その他の構成については、基本的に第一の実施形態と同様である。
【００２３】
本実施形態においては、以上のような構成としたので、半導体装置に発生する熱が樹脂層２４中のフィラ９を介して効率よく発散する。また、封止樹脂層６の硬化時に起こる樹脂の硬化収縮とＩＣ基板１の熱膨張との差を効果的に緩和することが可能となり、実装構造体の各部の歪みを防止することができるため、安定性および信頼性の高い接続部を有する実装構造体を得ることができる。
【００２４】
（第三の実施形態）
図３は、本発明の第三の実施形態に係る実装構造体の断面図を示している。この第三の実施形態においては、ＩＣ基板１の電極パッド３を有する面の裏面に、貫通孔１０を有する樹脂層３４が形成されている。その他の構成については、基本的に第一の実施形態と同様である。
【００２５】
ＩＣ基板１の電極パッド３を有する面の裏面に、貫通孔１０を有する樹脂層３４を形成する方法としては、未硬化の樹脂をシート状にして、そのシートに貫通孔１０を設けた後に半導体装置のサイズに切断して（または、半導体装置のサイズに切断した後に貫通孔１０を設けて）、シートを半導体装置に積載する方法がある。または、ＩＣ基板１の電極パッド３を有する面の裏面に、貫通孔１０の部分を空けた状態にして樹脂を塗布する方法もある。
【００２６】
本実施形態においては、以上のような構成としたので、半導体装置に発生する熱がこもらずに、貫通孔１０を介して効率よく発散する。また、封止樹脂層６の硬化時に起こる樹脂の硬化収縮とＩＣ基板１の熱膨張との差を効果的に緩和することが可能となり、実装構造体の各部の歪みを防止することができるため、安定性および信頼性の高い接続部を有する実装構造体を得ることができる。
【００２７】
さらに、前記未硬化樹脂層形成方法を用いることにより、半導体装置の実装構造体を安定的に製造することができる。
（第四の実施形態）
図４は、本発明の第四の実施形態に係る実装構造体の断面図を示している。この第四の実施形態においては、ＩＣ基板１の電極パッド３を有する面の裏面に、樹脂層４４が形成されている。この樹脂層４４は、熱伝導性を有するフィラ９を含有しており、さらに図４に示すように貫通孔１０を備えている。貫通孔１０を有する樹脂層４４の形成方法は、第三の実施形態と同様である。また、その他の構成については、基本的に第一の実施形態と同様である。
【００２８】
本実施形態においては、以上のように、熱伝導性を有するフィラ９を含む樹脂層４４に貫通孔１０を設けた構成としたので、半導体装置に発生する熱がフィラ９および貫通孔１０を介して効率よく発散する。また、封止樹脂層６の硬化時に起こる樹脂の硬化収縮とＩＣ基板１の熱膨張との差を効果的に緩和することが可能となり、実装構造体の各部の歪みを防止することができるため、安定性および信頼性の高い接続部を有する実装構造体を得ることができる。
【００２９】
【発明の効果】
以上説明したように、本発明によれば、半導体装置と回路基板との接続部の安定性および信頼性の高い実装構造体を得ることができる。
【図面の簡単な説明】
【図１】本発明の第一の実施形態に係る実装構造体の概略断面図
【図２】本発明の第二の実施形態に係る実装構造体の概略断面図
【図３】本発明の第三の実施形態に係る実装構造体の概略断面図
【図４】本発明の第四の実施形態に係る実装構造体の概略断面図
【図５】従来技術に係る実装構造体を構成する半導体装置の一部拡大断面図
【図６】従来技術に係る実装構造体の一部拡大断面図
【図７】従来技術に係る他の実装構造体の概略断面図
【符号の説明】
１ ＩＣ基板
２ 電気的接続点（バンプ電極）
３ 電極パッド
４，２４，３４，４４ 樹脂層
５ 回路基板
６ 封止樹脂層
７ 導電性接着剤（接合層）
８ 入出力端子電極
９ フィラ
１０ 貫通孔
１１ 半田バンプ
１２ 拡散防止金属膜
１３ 密着金属膜
１４ 電気的接続点（Ａｕバンプ）[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a mounting structure in which a semiconductor device such as an integrated circuit chip is flip-chip mounted on a circuit board, and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, when a semiconductor device is mounted on input / output terminal electrodes of a circuit board, a wire bonding method using soldering has been often used. However, in recent years, the size of the semiconductor device package and the increase in the number of connection terminals have reduced the distance between the connection terminals, and it has become increasingly difficult to deal with the conventional soldering technology.
[0003]
Therefore, recently, a technique has been proposed in which a semiconductor device such as an integrated circuit chip is directly mounted on input / output terminal electrodes of a circuit board to reduce the mounting area and achieve efficient use.
[0004]
Among them, the technology of flip-chip mounting a semiconductor device on a circuit board in a face-down state has the advantages that the electrical connection between the semiconductor device and the circuit board can be made collectively and that the mechanical strength after connection is strong. This is a useful technique.
[0005]
For example, a mounting technology using a solder plating method is described in "Industrial Research Council", published on January 15, 1980, edited by the Japan Microelectronics Association, "IC mounting technology". Hereinafter, this mounting technique will be described with reference to the drawings.
[0006]
FIG. 5 is a partially enlarged cross-sectional view showing a state in which an electrical connection contact (hereinafter, referred to as “solder bump”) 11 made of solder is formed on an electrode pad 3 of an IC substrate 1 constituting a semiconductor device. . In this semiconductor device, first, an adhesion metal film 13 and a diffusion prevention metal film 12 are formed on an electrode pad 3 of an IC substrate 1 by an evaporation method, and a solder bump 11 is formed thereon by a plating method.
[0007]
Next, the semiconductor device configured as shown in FIG. 5 is mounted on a circuit board in a face-down state. FIG. 6 shows a partially enlarged sectional view of the mounted state. At the time of mounting, positioning is performed so that the solder bumps 11 are in contact with the input / output terminal electrodes 8 formed on the circuit board 5, and the semiconductor device is mounted on the circuit board 5 (hereinafter, referred to as “the semiconductor device”). A semiconductor device mounted on the circuit board 5 is referred to as a “mounting structure”. Thereafter, the mounting structure is heated to a high temperature, so that the solder bumps 11 are fused to the input / output terminal electrodes 8 of the circuit board 5.
[0008]
Recently, a technique for forming a mounting structure using a conductive adhesive has also been proposed. FIG. 7 is a schematic cross-sectional view of a mounting structure constituted by using a conductive adhesive. In this mounting structure, as shown in FIG. 7, electrical connection contacts (hereinafter referred to as “Au bumps”) 14 are formed on the electrode pads 3 of the IC substrate 1 by a wire bonding method, a plating method, or the like. The Au bumps 14 and the input / output terminal electrodes 8 of the circuit board 5 are connected via an adhesive (bonding layer) 7. In such a mounting structure, the conductive adhesive 7 is transferred to the Au bumps 14 of the IC substrate 1, and then the alignment is performed so that the Au bumps 14 come into contact with the input / output terminal electrodes 8 of the circuit board 5. Thereafter, the conductive adhesive 7 is cured to obtain an electrical connection.
[0009]
As shown in FIGS. 6 and 7, in the mounting structure configured using each of the above techniques, the semiconductor device and the circuit board 5 are reinforced in order to reinforce the connection between the semiconductor device and the circuit board 5. A technique of forming a sealing resin layer 6 by encapsulating a sealing resin between them is also proposed. When the sealing resin layer 6 is cured, the connection between the semiconductor device and the circuit board 5 is reinforced.
[0010]
[Problems to be solved by the invention]
However, in the mounting structure according to the above-described conventional technique, distortion may occur due to a difference between the curing shrinkage of the resin and the thermal expansion of the IC substrate that occur when the sealing resin layer is cured. When distortion occurs, for example, a convex bulge occurs on the IC substrate side, and distortion occurs in each part of the mounting structure. Such distortion of each part of the mounting structure causes disconnection or poor contact at each connection part of the IC substrate, the bump electrode, and the circuit board.
[0011]
The present invention has been made in order to solve such a problem, and provides a mounting structure having high stability and reliability of a connection portion between a semiconductor device and a circuit board, and a method of manufacturing the mounting structure. The purpose is to provide.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, a mounting structure of the present invention is a mounting structure in which a semiconductor device and a circuit board are electrically connected using a flip-chip method. A sealing resin layer, and a resin layer containing a filler having thermal conductivity is formed on the back surface of the connection surface of the semiconductor device with the circuit board.
[0013]
According to the configuration of the present invention, the distortion caused by the difference between the curing shrinkage that occurs when the sealing resin is cured and the thermal expansion of the IC substrate that constitutes the semiconductor device can be reduced by providing the resin layer. Therefore, it is possible to obtain a mounting structure with high stability and reliability of the connection between the semiconductor device and the circuit board.
[0014]
Further, the resin layer, it is good preferable configured with a thermosetting resin. Further, it is preferable that a through hole is formed in the resin layer.
[0015]
With such a configuration, heat generated in the semiconductor device and the like forming the mounting structure can be efficiently dissipated, and the curing shrinkage of the sealing resin and the thermal expansion of the IC substrate forming the semiconductor device can be achieved. Can be reduced. Therefore, distortion of each part of the mounting structure can be effectively prevented, and a mounting structure having a stable and highly reliable connection portion can be obtained.
[0016]
Further, the present invention provides a method of manufacturing a mounting structure for electrically connecting a semiconductor device and a circuit board by using a flip-chip method, wherein a resin is sealed between the semiconductor device and the circuit board and uncured. Forming an uncured resin layer on the back surface of the connection surface of the semiconductor device with the circuit board, and then curing the sealing resin layer and the resin layer almost simultaneously. Features.
[0017]
Further, in the manufacturing method, it is preferable that an uncured resin layer is formed on a back surface of a connection surface of the semiconductor device with the circuit board using a resin layer containing a filler having thermal conductivity. Preferably, the method further includes a step of forming a through hole in the uncured resin layer. Further, it is preferable that an uncured resin layer is formed on the back surface of the connection surface of the semiconductor device with the circuit board using the uncured resin layer formed in a sheet shape.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a mounting structure according to an embodiment of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a sectional view of a mounting structure according to the first embodiment of the present invention. As shown in FIG. 1, in a semiconductor device constituting a mounting structure according to the present embodiment, an electrical connection point (hereinafter, referred to as “bump electrode”) 2 is formed on an electrode pad 3 of an IC substrate 1, A thermosetting resin layer 4 having a thickness of about 30 μm is formed on the back surface of the substrate 1 having the electrode pads 3 by using a screen printing method.
[0019]
When the semiconductor device is mounted on the circuit board 5, a bonding layer 7 made of solder, a conductive adhesive, or the like is formed on the bump electrode 2 by a transfer method or a printing method. Positioning is performed so that the terminal electrodes 8 are in contact with each other, and the semiconductor device is mounted on the circuit board 5 in a face-down state. Then, a sealing resin is sealed between the semiconductor device and the circuit board 5 to form a sealing resin layer 6, and the sealing resin layer 6 and the resin layer 4 formed on the IC substrate 1 are cured almost simultaneously. Let it. In this way, a mounting structure is manufactured.
[0020]
In the present embodiment, as described above, the resin layer 4 and the sealing resin layer 6 sandwich the IC substrate 1, and the resin layers 4 and 6 are cured almost simultaneously. It is possible to effectively prevent distortion that has conventionally occurred due to the difference between the curing shrinkage of the resin that occurs when the sealing resin layer 6 is cured and the thermal expansion of the IC substrate 1. Therefore, since the distortion of each part of the mounting structure is also reduced, the connection between the semiconductor device and the circuit board 1 is reinforced, and a mounting structure having a stable and reliable connection can be obtained.
[0021]
Further, in the present embodiment, the case where the screen printing method is used as the method of forming the resin layer 4 has been described. However, the present invention is not limited to this, and for example, using another method such as a transfer method. Is also good. Furthermore, the thickness of the resin layer 4 does not need to be particularly limited, and may be appropriately determined in consideration of the curing speed of the resin, the degree of distortion of the mounting structure, and the like. The timing of forming the resin layer 4 may be any time before the sealing resin layer 6 is cured, and is not particularly limited.
[0022]
(Second embodiment)
FIG. 2 is a sectional view of a mounting structure according to a second embodiment of the present invention. In the second embodiment, a resin layer 24 including a filler 9 having thermal conductivity is formed on the back surface of the surface of the IC substrate 1 having the electrode pads 3. Other configurations are basically the same as those of the first embodiment.
[0023]
In the present embodiment, with the above configuration, heat generated in the semiconductor device is efficiently radiated through the filler 9 in the resin layer 24. In addition, the difference between the curing shrinkage of the resin and the thermal expansion of the IC substrate 1 that occurs when the sealing resin layer 6 is cured can be effectively reduced, and distortion of each part of the mounting structure can be prevented. Thus, it is possible to obtain a mounting structure having a connection portion with high stability and reliability.
[0024]
(Third embodiment)
FIG. 3 is a sectional view of a mounting structure according to a third embodiment of the present invention. In the third embodiment, a resin layer 34 having a through hole 10 is formed on the back surface of the surface of the IC substrate 1 having the electrode pads 3. Other configurations are basically the same as those of the first embodiment.
[0025]
As a method of forming the resin layer 34 having the through-holes 10 on the back surface of the IC substrate 1 having the electrode pads 3, an uncured resin is formed into a sheet, and after the through-holes 10 are provided in the sheet, the semiconductor is formed. There is a method in which the sheet is cut into the size of the device (or the through hole 10 is provided after cutting into the size of the semiconductor device) and the sheet is stacked on the semiconductor device. Alternatively, there is a method in which a resin is applied to the back surface of the surface having the electrode pads 3 of the IC substrate 1 in a state where the through hole 10 is opened.
[0026]
In the present embodiment, since the configuration is as described above, heat generated in the semiconductor device does not remain and is efficiently radiated through the through hole 10. In addition, the difference between the curing shrinkage of the resin and the thermal expansion of the IC substrate 1 that occurs when the sealing resin layer 6 is cured can be effectively reduced, and distortion of each part of the mounting structure can be prevented. Thus, it is possible to obtain a mounting structure having a connection portion with high stability and reliability.
[0027]
Further, by using the method for forming an uncured resin layer, a mounting structure of a semiconductor device can be stably manufactured.
(Fourth embodiment)
FIG. 4 is a sectional view of a mounting structure according to a fourth embodiment of the present invention. In the fourth embodiment, a resin layer 44 is formed on the back surface of the surface of the IC substrate 1 having the electrode pads 3. This resin layer 44 contains a filler 9 having thermal conductivity, and further has a through hole 10 as shown in FIG. The method for forming the resin layer 44 having the through holes 10 is the same as in the third embodiment. Other configurations are basically the same as those of the first embodiment.
[0028]
In the present embodiment, as described above, the through hole 10 is provided in the resin layer 44 including the filler 9 having thermal conductivity, so that the heat generated in the semiconductor device passes through the filler 9 and the through hole 10. And diverge efficiently. Further, the difference between the curing shrinkage of the resin and the thermal expansion of the IC substrate 1 that occurs when the sealing resin layer 6 is cured can be effectively reduced, and the distortion of each part of the mounting structure can be prevented. Thus, it is possible to obtain a mounting structure having a connection portion with high stability and reliability.
[0029]
【The invention's effect】
As described above, according to the present invention, it is possible to obtain a mounting structure with high stability and reliability of the connection between the semiconductor device and the circuit board.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a mounting structure according to a first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a mounting structure according to a second embodiment of the present invention. FIG. 4 is a schematic cross-sectional view of a mounting structure according to a third embodiment; FIG. 4 is a schematic cross-sectional view of a mounting structure according to a fourth embodiment of the present invention; FIG. FIG. 6 is a partially enlarged cross-sectional view of a mounting structure according to the prior art. FIG. 7 is a schematic cross-sectional view of another mounting structure according to the prior art.
1 IC board 2 Electrical connection point (bump electrode)
3 electrode pads 4, 24, 34, 44 resin layer 5 circuit board 6 sealing resin layer 7 conductive adhesive (bonding layer)
8 I / O terminal electrode 9 Filler 10 Through hole 11 Solder bump 12 Diffusion preventing metal film 13 Adhesive metal film 14 Electrical connection point (Au bump)

Claims (7)

半導体装置と回路基板とがフリップチップ方式を用いて電気的に接続されている実装構造体において、
前記半導体装置と前記回路基板との間に封止樹脂層が形成され、
前記半導体装置の前記回路基板との接続面の裏面に熱伝導性を有するフィラを含有している樹脂層が形成されていることを特徴とする実装構造体。In a mounting structure in which the semiconductor device and the circuit board are electrically connected using a flip-chip method,
A sealing resin layer is formed between the semiconductor device and the circuit board,
A mounting structure, wherein a resin layer containing a filler having thermal conductivity is formed on a back surface of a connection surface of the semiconductor device with the circuit board. 前記樹脂層が、熱硬化性樹脂を用いて構成されている請求項１に記載の実装構造体。The mounting structure according to claim 1 , wherein the resin layer is formed using a thermosetting resin. 前記樹脂層に貫通孔が形成されている請求項１または２に記載の実装構造体。Mounting structure according to claim 1 or 2 through-holes are formed on the resin layer. 半導体装置と回路基板とをフリップチップ方式を用いて電気的に接続する実装構造体の製造方法において、前記半導体装置と前記回路基板との間に樹脂を封入して未硬化の封止樹脂層を形成し、前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成した後、前記封止樹脂層と前記樹脂層とをほぼ同時に硬化させることを特徴とする実装構造体の製造方法。In a method of manufacturing a mounting structure for electrically connecting a semiconductor device and a circuit board using a flip-chip method, a resin is sealed between the semiconductor device and the circuit board to form an uncured sealing resin layer. Forming an uncured resin layer on the back surface of the connection surface of the semiconductor device with the circuit board, and then curing the sealing resin layer and the resin layer almost simultaneously. Manufacturing method. 熱伝導性を有するフィラを含有している樹脂層を用いて、前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成する請求項４に記載の実装構造体の製造方法。The manufacturing of the mounting structure according to claim 4, wherein an uncured resin layer is formed on a back surface of a connection surface of the semiconductor device with the circuit board, using a resin layer containing a filler having thermal conductivity. Method. 前記未硬化の樹脂層に貫通孔を形成する工程を含む請求項４または５に記載の実装構造体の製造方法。The method for manufacturing a mounting structure according to claim 4 , further comprising a step of forming a through hole in the uncured resin layer. シート状に形成された未硬化の樹脂層を用いて前記半導体装置の前記回路基板との接続面の裏面に未硬化の樹脂層を形成する請求項４，５または６に記載の実装構造体の製造方法。The mounting structure according to claim 4 , wherein an uncured resin layer is formed on a back surface of a connection surface of the semiconductor device with the circuit board using the uncured resin layer formed in a sheet shape. Production method.
JP27657696A 1996-10-18 1996-10-18 Mounting structure and method of manufacturing the same Expired - Fee Related JP3547270B2 (en)

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