JP3477486B2 - Manufacturing method of electronic component package - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component, a method for manufacturing the same, a mounting body for the electronic component and a mounting method therefor,
More specifically, the present invention relates to an electronic component such as a chip carrier on which a semiconductor element is mounted, a method for manufacturing the electronic component, a mounted body of the electronic component and a mother board, and the mounting method.

[0002]

2. Description of the Related Art Among semiconductor devices as electronic parts,
For example, BGA (ball grid array) package and LGA (land grid array) package are known. These are semiconductor devices in which external connection electrodes of a chip carrier on which a semiconductor element is mounted are arranged in a grid pattern on the back surface of the chip carrier.

In a semiconductor device having this semiconductor element mounted, the size of electronic parts is greatly reduced as compared with the conventional QFP (quarter flat package) because the external connection electrodes are provided on the back surface of the package. There is an advantage.

The electrode pitch of the package such as CSP (chip size package) having the BGA or LGA structure is conventionally 1.27 mm, which is mainly used for reducing the size and weight of electronic equipment. Along with 0.8 mm
Those having a pitch of .about.0.5 mm have come to be used.

In a package having terminal electrodes of these pitches, solder balls such as BGA and LGA are usually mounted on the package in advance, and the solder balls are heated in a reflow furnace or the like to be soldered to the mother board. Connect or reversely print solder paste on the electrode on the motherboard side, position and mount the package on it,
Electrical connection is made by heating and soldering using a reflow furnace or the like.

[0006]

However, it has been found that there is a limit to further narrowing the pitch in the technique using only solder such as BGA and LGA for connection. For example, solder has a very low viscosity at high temperatures and tends to flow, so when soldering a large amount of solder, the solder will flow to adjacent electrodes, causing a short circuit between electrodes, and vice versa. If the amount is small, some electrodes cannot be connected.

Further, when the heating and cooling are repeated by turning the power on and off, for example, when the device is used in a device equipped with a CPU of a computer, the device is repeatedly used even if an electrical connection is initially made. It is known that as the connection progresses, the connection is broken and the device does not operate, which adversely affects the reliability of the device.

The reason for this is that shear stress is applied to the solder connection part mainly due to the difference in the coefficient of thermal expansion between the chip or its carrier substrate and the mother board. It was to destroy it.

Generally, it is possible to pour a sealing resin material called an underfill resin, which adheres between a chip carrier and a mother board, between the carrier substrate and the mother board after soldering and mounting with a solder ball or the like. Although known, this method requires time and effort to pour the sealing resin material, and it is difficult to completely pour the sealing resin material, and it takes a lot of time to cure the sealing resin material, resulting in an increase in cost. In many cases, adoption of consumer electronic devices has been postponed. Therefore, this technique is often used for expensive commercial devices, not for low-cost consumer electronic devices that require reliability for a long period of time.

The present invention has been made in view of the above-mentioned points, and the reliability of connection between an electronic component such as a chip carrier on which a semiconductor chip is mounted and a substrate such as a mother board is as high as that of a commercial device. The main purpose is to provide packaging technology that can improve the cost at low cost and maintain the initial performance of small-sized and lightweight consumer electronic devices for a long time.

[0011]

In order to achieve the above-mentioned object, the present invention is constructed as follows.

That is, the electronic component of the present invention is an electronic component provided with a conductive bump which is melted or softened by heating on an electrode, and the periphery of the conductive bump is made of a thermosetting resin. An uncured resin layer is formed.

According to the present invention, since the resin layer is formed around the conductive bumps, when the electronic component is mounted on a circuit board such as a mother board, thermal expansion of the electronic component and the circuit board is performed. The strain stress of the connection part caused by the difference in the coefficient can be relaxed by the surrounding resin layer,
It is possible to effectively prevent the connection portion from being destroyed, and there is also no need for a difficult step of pouring a sealing resin between the electronic components mounted on the circuit board.

[0014] Implementation of the electronic component according to claim 1, wherein the present invention
The manufacturing method of is on the board terminal electrode provided on the circuit board.
Apply the conductive paste and attach the surface mount component to the conductive paste.
The process of mounting on the substrate terminal electrode provided with the
Conductive bumps are provided on the top and the circumference of the conductive bumps is
Uncured resin layer made of thermosetting resin or thermoplastic
The electronic component on which a resin layer made of a conductive resin is formed is
Step of mounting on another board terminal electrode provided on the road board
And the surface mount component and the electronic component were mounted.
Heat the circuit board to a temperature at which the resin layer melts.
The electronic component and the circuit board via the resin layer
Bonding, and then the conductive bumps and the conductive paste.
The conductive bumps and
And by curing the conductive paste, the electronic component and
And the step of collectively mounting the surface mount components on the circuit board.
, And includes other surface realities in traditional infrastructure.
It is possible to mount electronic components at once in the same process as mounting components.
Cheap and easy to manufacture.

The term "uncured" as used herein means a state in which it is not completely cured, and a state in which it is not cured at all is, of course,
It includes a semi-cured state.

The mounting of the electronic component according to claim 2 of the present invention
The manufacturing method of the method is as follows.
The oil is made of thermosetting resin,
The resin layer melts the circuit board on which electronic components are mounted.
Heat to the melting temperature and the resin layer is cured at that temperature
Until the conductive bumps and the
Characterized by heating to a temperature at which the conductive paste melts
The conductive bumps are adjacent even if they are melted.
It does not extend to the terminal electrodes.

The invention according to claim 3 is the power supply according to claim 1.
A method for manufacturing a mounted body of a child part, comprising the conductive bumps
And the melting point of the conductive paste are almost the same.
It is characterized by that.

The invention according to claim 4 is the power supply according to claim 1.
A method of manufacturing a mounted body of a child component , wherein a melting point of the resin layer is lower than a melting point of the conductive bump, and when mounting an electronic component on a circuit board, a resin surrounding the conductive bump is used. The layers are melted, and the conductive bumps of the electronic component and the electrodes of the circuit board are firmly adhered and connected.

The invention according to claim 5 is the power supply according to claim 1.
A method for manufacturing a mounted body of a child component, wherein the shrinkage rate after melt-curing of the resin layer is equal to or higher than the shrinkage rate after melt-curing of the conductive bump, and when mounting an electronic component on a circuit board,
Since the resin layer around the conductive bumps shrinks more than the conductive bumps, the conductive bumps of the electronic component and the electrodes of the circuit board are more surely adhered and connected.

The invention according to claim 6 is the power supply according to claim 1.
A method of manufacturing a child part of the mounting member, and wherein the tip of the conductive bump is flush with the surface of the resin layer
Is intended to, when mounting an electronic component on a circuit board,
The conductive bumps of the electronic component and the electrodes of the circuit board are surely brought into close contact with each other and connected.

The invention according to claim 7 is the power supply according to claim 1.
A method for manufacturing a mounted body of a child part, comprising the conductive bumps
Is characterized in that the tip of the is protruding from the surface of the resin layer.
When mounting electronic components on a circuit board
The conductive bumps of electronic parts and electrodes of the circuit board
Is closely attached to and connected to.

The invention according to claim 8 is the power supply according to claim 7.
A method for manufacturing a mounted body of a child part, comprising the conductive bumps
The protrusion amount of the tip of the is 5 μm to 20 μm.
is doing.

The invention according to claim 9 is the power supply according to claim 1.
A method of manufacturing a mounted body of a child component, wherein the electronic component is:
It is a semiconductor chip, and the present invention is applied to flip chip mounting.
It can be suitably implemented.

The invention as defined in claim 10 is as set forth in claim 9.
A method for manufacturing an electronic component package, comprising:
On the electrode surface side of the
It has a wiring layer, and it is a BGA package or LGA.
Applying to electronic parts such as packages to further reduce the pitch
Can be implemented.

The invention described in claim 11 is the same as in claim 1.
A method for manufacturing an electronic component package, comprising the conductive van
The solder is good for the circuit board electrodes.
A good electrical connection can be obtained.

The invention of claim 12 is the same as that of claim 1.
A method of manufacturing an electronic component package, comprising:
The semiconductor bump is Sn, Cu, Ag, Au, Ni
It consists of one or more conductors,
The connection stability with the electrodes of the substrate can be improved.

The invention according to claim 13 is the same as that according to claim 1.
A method of manufacturing a mounted body of an electronic component, comprising the surface mounting part
The product contains either a resistor, a capacitor, or a coil.
It is characterized by that.

[0028]

[0029]

[0030]

[0031]

[0032]

[0033]

[0034]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view showing a state before mounting of a mounting body of an electronic component according to one embodiment of the present invention.

In the electronic component 20 of this embodiment, the distance between the electrodes of the semiconductor bare chip 1 made of silicon is widened by the rewiring layer 2 having a conductive pattern formed by using an insulating resin such as a polyimide resin. It is an electronic component generally called a wafer level CSP (chip size package), and is mounted on the mother board 3 as a circuit board.

A rewiring layer 2 made of polyimide as an insulating resin is electrically connected, physically fixed and attached to the semiconductor bare chip 1, and the in-out terminal electrodes 4 from the rewiring layer 2 are A conductive bump 6 that is melted by heating is provided. Further, a substrate terminal electrode 5 is provided on the mother board 3 made of a glass epoxy substrate,
A solder resist 8 is provided on a portion other than the substrate terminal electrode 5 to prevent electrical short circuit.

In this embodiment, the semiconductor bare chip 1 is used.
The wafer level CSP 20 as an electronic component in which the electrode interval is widened through the rewiring layer 2 rather than the electrode interval of the following, in order to enable very reliable narrow pitch mounting in a simple process, Is configured as follows.

That is, around the conductive bumps 6 of the wafer level CSP 20, the melt adhesion layer, which is an uncured resin layer made of a thermosetting resin, covers the entire surface on which the conductive bumps 6 are provided. 7 are formed, and in this embodiment, the tips of the conductive bumps 6 are formed so as to slightly project from the surface of the fusion bonding layer 7.

The wafer level CSP 20 is positioned with the substrate terminal electrode 5 of the mother board 3 and is temporarily fixed by the load 9 via the fusion bonding layer 7. At this time, it is desirable that the melt adhesive layer 7 has a slight tack property.

The material of the melt adhesion layer 7 is, for example, 1
An adhesive or the like of a hot-melt type thermosetting resin that is once melted and then cured when heat of about 00 ° C. is used is used.
Moreover, it is desirable that the melt adhesion layer 7 have appropriate flexibility. Therefore, in this embodiment, a material having appropriate flexibility is used.

The conductive bumps 6 are, for example, 180
A metal that melts when heated to about .degree. C., for example, solder that is an alloy of lead and tin, a conductive adhesive, or the like is used. In this embodiment, a conductive adhesive that melts and solidifies at 130.degree. C. is used.

The tip of the conductive bump 6 may be sharp, but in order to reduce the connection resistance value and increase the adhesive strength, it may be desirable that the tip be flat so that the contact area becomes large. However, depending on the type of electrodes on the substrate, it may be possible to stabilize the conductive bump 6 having a sharp tip because the connection resistance value is low. In particular, when the electrode of the substrate is covered with a rust preventive treatment agent or is covered with a metal oxide film layer such as a chromate treatment for rust prevention, the conductive bump 6 having a sharp tip has a connection resistance value. May be low and stable.

In this embodiment, the wafer level CS
The pre-mounting structure in which P20 is positioned and temporarily fixed to the substrate terminal electrode 5 of the mother board 3 is inserted into a reflow furnace, a heating furnace, or the like, and first, the melting temperature of the melting adhesive layer 7, in this embodiment, Heated to 100 ° C and melted adhesive layer 7
Is melted by heating and becomes almost liquid. At that time, the rewiring layer 2 having the conductive bumps 6 is bonded to the mother board 3, and at the same time, the conductive bumps 6 are brought into contact with the substrate terminal electrodes 5 of the mother board 3. After that, when the temperature of 100 ° C. is maintained, the melted adhesive layer 7 begins to harden in about 30 seconds and almost hardens in about 1 minute, and the rewiring layer 2 and the mother board 3 are bonded.

Since the melted adhesive layer 7 undergoes curing shrinkage during curing, the adhesion between the conductive bump 6 and the substrate terminal electrode 5 is further enhanced, which has a favorable effect on reliability. It is desirable to use a resin for the melt adhesion layer 7 that causes some shrinkage during curing.

FIG. 2 is a cross-sectional view after mounting corresponding to FIG. After bonding the rewiring layer 2 and the mother board 3 to each other, 1
When the heating temperature is raised to 50 ° C., the conductive bump 6 melts, and the substrate terminal electrode 5 and the terminal electrode 4 of the rewiring layer 2 are connected as shown in FIG. At this time, the melt adhesion layer 7 is
Since the conductive bumps 6 are almost completely cured, the conductive bumps 6 do not spread to the adjacent terminal electrodes even if they melt.

After that, by lowering the temperature, the rewiring layer 2 and the mother board 3 are completely hardened and adhered by the conductive bumps 6 through the melted adhesive layer 7 to be physically firmly fixed and electrically connected. Is also fully connected.

In this embodiment, the rewiring layer 2 and the mother board 3 are bonded by applying a load 9 to the wafer level CSP 20 on which the semiconductor bare chip 1 is mounted. For example, the rewiring layer 2 and the mother board 3 are compressed. Load 9
Even without adding, the conductive bumps 6 are reliably connected to the substrate terminal electrodes 5 and the terminal electrodes 4 of the rewiring layer 2 of the electronic component.

In this embodiment, the conductive bumps 6 have a diameter of 50 μm, a height of 50 μm, and a pitch of 25.
It was set to 0 μm.

Further, in this embodiment, the melt adhesive layer 7
The conductive bumps 6 slightly project from the above, and the amount of projection is about 10 μm. This protrusion amount is 5 μm to 20 μm
It is preferable that the amount is approximately, but there is no problem as long as this amount is slightly protruding from the substantially same level. When the thickness of the fusion bonding layer 7 is t, the height of the conductive bump 6 is larger than t.
The range is preferably smaller than 0t.

Since the conductive bumps 6 melt even if the surface of the fusion bonding layer 7 and the tips of the conductive bumps 6 are flush with each other, they can be connected without any problem.

Next, a method of manufacturing the electronic component of this embodiment will be described with reference to FIG.

Conductive bumps 6 are formed on the electrodes 4 protruding from the rewiring layer 2 of the wafer level CSP on which the semiconductor chip 1 shown in FIG. 7A is mounted, as shown in FIG. To do. As this forming method, various methods such as printing and plating are used, but in the case of a narrow pitch of 300 μm or less, it is desirable to form by plating. The material of the conductive bumps 6 can be used without any problem as long as it is a conductive paste having a melting point higher than that of the melted adhesive layer 7. Solder or thermosetting conductive adhesive can be used.

Next, as shown in FIG. 7C, the molten resin layer 7 is formed so that the tips of the conductive bumps 6 are slightly projected. This is obtained by applying the uncured molten adhesive. It is desirable to lightly dry after application if necessary. Furthermore, it is desirable to leave some tackiness. In this embodiment, a thermosetting resin is applied and dried at 80 ° C. for about 3 minutes to be a semi-cured state.

The coating method at this time is a screen printing method,
Various methods such as a dipping method, a spin coating method and a curtain coating method can be used, and the coating is performed by controlling the thickness so that the tips of the conductive bumps 6 are exposed.

Further, it is desirable to perform a defoaming treatment immediately after coating and during the uncured state. The defoaming treatment is performed by a vacuum defoaming method, an ultrasonic defoaming method, a combination thereof, or the like.

Also in this embodiment, the insulating hot-melt adhesive layer 7 applied to the electronic component has a slight tack property, and at the same time is applied to the position where the surface mount component of the mother boat 3 is mounted. The conductive paste is also adhesive and prevents the parts from shifting or moving during the subsequent transfer to the thermosetting process.

In this embodiment, the melting point of the conductive paste applied to bond the surface mount components on the motherboard 3 and the melting point of the bump 6 of the conductive adhesive formed on the CSP are approximately the same. Is set to. The curing time is about 3 minutes, but there is no particular focus on this.

On the other hand, the hot-melt adhesive layer 7 is set to have a slightly low melting temperature of about 100 ° C., and the curing timing is as fast as about 1 minute.

FIG. 4 is a diagram showing a process of mounting the wafer level CSP 20, which is an electronic component manufactured in the process shown in FIG. 3, on the mother boat 3 together with other surface mount components 11.

The conductive paste 10 is applied to the other surface mounting parts 11 of the mother board 3. Next, mount the necessary parts on the device such as the mounter at the required positions. At this time, the wafer level CSP 20 which is an electronic component manufactured in the process shown in FIG. 3 is also mounted at the same time. The surface mount component 11 used at this time includes a resistor, a capacitor, a coil, and the like.

Thereafter, a heat treatment process is performed, so that the surface mount component 11 and the wafer level CSP 20 are simultaneously packaged.

It is preferable that the melted adhesive layer 7 has a higher shrinkage rate when cured by heat than the conductive bumps 6 and the conductive paste 10. Also in this embodiment, a material having a larger shrinkage rate at the time of curing is used for the fusion bonding layer 7 as compared with the conductive bumps 6 and the conductive paste 10.

With such a combination of physical properties, a stable electrical initial connection resistance can be obtained, and a long life stable connection can be obtained even in the reliability test.

On the contrary, when the melt adhesive layer 7 has a smaller shrinkage rate when cured by heat than the conductive bumps 6 and the conductive paste 10, the good results as in this embodiment cannot be obtained. It was When the shrinkage ratio of the melted adhesive layer 7 is smaller than that of the conductive bumps 6 and the conductive paste, initial electrical connection may not be confirmed especially when the difference in shrinkage ratio is large.

Further, it is known that curing progresses with time even at room temperature, but the resin material shrinks at this time as well. As for the contraction rate, it is preferable that the insulating melt adhesive layer 7 is larger than the conductive bump 6 as described above.

In another embodiment of the present invention, the CSP is a CS having an interposer substrate made of ceramic or the like.
It goes without saying that the electronic component of the present invention can be manufactured by the same manufacturing method even with P or the like. However, when a ceramic interposer is used, the effect of improving the reliability is low.

A reliability test was conducted using the sample prepared in this embodiment as Example 1. As a reliability test, (a) -40 ° C (30 minutes) to + 125 ° C (30 minutes) gas phase heat cycle test (b) -55 ° C (5 minutes) to + 150 ° C (5 minutes) liquid phase heat cycle A test was conducted, and as an evaluation method, the resistance value of the connection portion was monitored, and the end point was a point where the resistance value increased by 10% or more as compared with the initial resistance, and the life when a thermal cycle load was applied was obtained. . The result will be described later together with a comparative example.

(Second Embodiment) FIG. 5 is a sectional view corresponding to FIG. 3 showing a method of manufacturing an electronic component according to another embodiment of the present invention.

In this embodiment, the conductive bumps 6 are finally formed so as to be flush with the surface of the fusion bonding layer 7, and the other points are the same as in the above-described first embodiment.

First, the conductive bumps 6 are formed on the electrodes 4 extending from the redistribution layer 2 of the wafer level CSP shown in FIG. 9A as shown in FIG. At this time, the CSP is a CS having an interposer substrate.
It goes without saying that the electronic component of the present invention can be manufactured by the same manufacturing method even with P or the like.

The conductive bumps 6 can be formed by various methods such as plating or coating by screen printing. In this embodiment, the conductive bumps 6 are formed by printing.

Thereafter, as shown in FIG. 7C, a melt adhesive layer 7 which is an uncured resin layer is formed by coating,
Heat at 80 ° C. for 3 minutes to make a semi-cured state. The coating method at this time can be performed by various methods such as a screen printing method, a dipping method, a spin coating method and a curtain coating method.

Further, it is desirable to carry out defoaming treatment immediately after coating and during the uncured state. The defoaming treatment is performed by a vacuum defoaming method, defoaming by ultrasonic waves, a combination thereof, or the like.

At this time, the melt adhesion layer 7 is thickly applied so that the tips of the conductive bumps 6 are covered. Thickness is conductive bump 6
It is enough that the tip of is hidden. Then the conductive bump 6
To be exposed. As a polishing method, generally well known, grinder or belt sander,
Brush polishing or the like is used. The same purpose can be achieved by using other polishing methods.

By using this method, the flatness of the connecting portion can be more easily obtained, and a highly accurate electronic component can be produced.

The electronic components thus created were packaged at the same time as the other surface-mounted components as in the first embodiment.

The reliability test was conducted using the sample prepared in this embodiment as Example 2. As the reliability test, the same (a) -40 ° C. (30 minutes) to + 125 ° C. (30 minutes) gas phase heat cycle test as described above (b) −55 ° C. (5 minutes) to + 150 ° C. (5 minutes) Liquid phase heat cycle test was performed, and the resistance value of the connection part was monitored as the evaluation method, and the point where the resistance value increased by 10% or more compared to the initial resistance was taken as the end point and the load of the heat cycle was applied. Sought the life of. The result will be described later together with a comparative example.

Also in this embodiment, the material for the melt adhesion layer 7 has a larger shrinkage rate when cured than the conductive bumps 6 and the conductive paste 10.

(Comparative Example) For comparison, an example of the conventional mounting structure shown in FIG. 6 which is structurally disadvantageous in maintaining reliability will be described. The interposer 2 on which the semiconductor bare chip 1 is mounted is electrically connected between the substrate terminal electrode 5 and the interposer terminal electrode 4 via the mother board 3 and the solder balls 13, and is physically fixed.

In the manufacturing method, the solder balls 13 are preliminarily adhered to the interposer terminal electrodes 4 of the interposer 2 on which the semiconductor bare chip 1 is mounted, the positioning is temporarily fixed on the mother board 3, and the solder is melted in a reflow furnace or the like. The temperature is set to about 230 ° C., the solder is melted, and connection is performed.

Similar to the first and second embodiments, the reliability test of the sample prepared in the comparative example was conducted. As the reliability test, in the same manner as above, (a) -40 ° C (30 minutes) to + 125 ° C (30 minutes) gas phase heat cycle test (b) -55 ° C (5 minutes) to + 150 ° C (5 minutes) ) Liquid phase heat cycle test was performed, the resistance value of the connection part was monitored as an evaluation method, and a point of a resistance value increase of 10% or more compared with the initial resistance was set as the end point, and a load of the heat cycle was applied. I calculated the life expectancy.

The results of the reliability test are shown in Table 1.

[0085]

[Table 1] Embodiment 1 and Embodiment 2 which are configurations of the present invention
In each of the tests, the end point is around 2700 cycles, whereas in the comparative example, the end point reaches 1000 cycles or less in all the tests. Therefore, it can be said that the samples produced in the embodiments of the present invention have a long life.

As described above, according to the present invention, since the fusion bonding layer 7 which is the resin layer is formed so as to cover the conductive bumps 6, the periphery of the interface between the conductive bumps 6 and the mother board 3 which are most susceptible to stress is surrounded. It can be strengthened by covering with the melt-bonding layer 7, and the concentrated strain stress can be strengthened.
The strain stress can be relieved by spreading it. as a result,
It is possible to suppress the physical destruction of the connection electrode portion due to the difference in thermal expansion coefficient between the electronic component and the mother boat, and to obtain a narrow-pitch mounting body with excellent connection reliability. Moreover, unlike the underfill resin, it is not necessary to perform a difficult process of pouring the sealing resin between the electronic components mounted on the circuit board, and the cost is not increased. Furthermore, during heating during mounting, the conductive bumps 6 are melt-cured after the melt-bonding layer 7 is melt-cured.
Even if the conductive bumps 6 melt, they do not spread to the adjacent terminal electrodes.

As described above, according to the present invention, extremely reliable and narrow pitch mounting can be performed in a very simple process, and particularly, in the same process as other SMD (Surface Mounted Component) parts, CSP etc. can be performed at the same time. Since active components can be mounted, electronic devices can be easily manufactured at low cost with conventional infrastructure, and the effect is extremely large.

In each of the above-mentioned embodiments, the bare chip having the rewiring layer of the polyimide resin is used, but when the semiconductor chip is directly connected and fixed in the same manner, the reliability is remarkably lowered. The one using the interposer made of ceramic with bare chip was also made and the reliability was evaluated, but it was confirmed that the reliability was remarkably inferior when compared with the one using the rewiring layer of polyimide resin. It was

It is also possible to apply the method of the present invention directly to a bare chip, but it was also found that this was significantly inferior in reliability to the one provided with a rewiring layer of a polyimide resin.

Although the thermosetting resin is used as the molten resin layer 7 in each of the above-described embodiments, a thermoplastic resin may be used as another embodiment of the present invention.

Further, as another embodiment of the present invention, in order to dissipate heat from the semiconductor bare chip to the mother board through the interposer, by adding a heat conductive filler to the molten adhesive material, an MP operating at high speed can be obtained.
Further expansion of applications such as mounting of U etc.

Even when a resin material containing such a heat conductive filler is used, the end point of the reliability test is 20.
It has been confirmed that more than 100 cycles can be secured and that the reliability is as high as the interposer using ceramics or resin.

In the above-mentioned embodiment, only the case where an electronic component having a bare chip mounted on an interposer is mounted on a glass epoxy substrate as a mounting body is shown, but other surface mounting components, package components, etc. Obviously, it can be applied to mounting on a printed circuit board. Also C4
It is also applicable to bare chip mounting such as. Further, it goes without saying that it can also be used to connect a plurality of flexible boards, rigid boards and the like.

[0094]

As described above, according to the present invention, since the resin layer is formed around the conductive bumps, when the electronic component is mounted on a circuit board such as a mother board,
The strain stress of the connection part caused by the difference in the coefficient of thermal expansion between the electronic component and the circuit board can be relieved by the surrounding resin layer, and it is an extremely simple process and has a very reliable narrow pitch. Can be implemented, especially with conventional infrastructure,
Since active components such as CSP can be simultaneously mounted in the same process as other surface mount components, it is possible to inexpensively and easily manufacture ultra-small portable electronic devices and the like, and the effect is extremely large.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a mounting body according to a first embodiment of the present invention before mounting.

FIG. 2 is a cross-sectional view after mounting of FIG.

FIG. 3 is a cross-sectional view showing a method for manufacturing the electronic component shown in FIG.

FIG. 4 is a diagram showing a mounting process of the mounting body of FIG. 1;

FIG. 5 is a cross-sectional view showing the method of manufacturing the electronic component of the second embodiment of the present invention.

FIG. 6 is a cross-sectional view of a mounting body for explaining a comparative example.

[Explanation of symbols] 1 Semiconductor bare chip 2 Rewiring layer 3 motherboard 4 Rewiring layer terminal electrode 5 Board terminal electrode 6 Conductive bump 7 Melt adhesive layer 8 Solder resist 9 load 10 Conductive paste 11 Surface mount components 12 solder balls 20 electronic components (wafer level CSP)

─────────────────────────────────────────────────── ─── Continued Front Page (72) Takashi Kitae Takashi Kitae 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Yukihiro Ishimaru 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. (72) Inventor Riki Mitani 1006 Kadoma, Kadoma-shi, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Shinji Kobayashi 1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd. (56) References JP-A-10-242211 (JP, A) JP-A-9-237806 (JP, A) JP-A-2001-15641 (JP, A) JP-A-2001-35996 (JP, A) JP-A-2000-68639 (JP, A) JP 4-159767 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/60 H01L 21/56 H01L 23/12 H05K 3/34

Claims (13)

(57) [Claims] 1. A substrate terminal electrode provided on a circuit board.
Apply the conductive paste and attach the surface mount component to the conductive paste.
The step of mounting on the substrate terminal electrode on which the conductive bump is provided, and the conductive bump is provided on the electrode.
An uncured resin layer composed of thermosetting resin or heat
The electronic component on which the resin layer made of plastic resin is formed,
Step of mounting on another board terminal electrode provided on the circuit board
And the surface-mounted component and the electronic component mounted on the
Before heating the circuit board to the temperature at which the resin layer melts,
Bonding the electronic component and the circuit board through the resin layer
The conductive bump and the conductive pace.
The conductive bumps and
The conductive paste is hardened to cure the electronic component and the front.
A step of collectively mounting the surface mount components on the circuit board, and a method of manufacturing a mount assembly of electronic components. 2. A tree provided around the conductive bumps.
The fat is made of a thermosetting resin, and the surface mount component and the electronic component are mounted on the
Heating the circuit board to a temperature at which the resin layer melts,
Maintain the temperature until the resin layer is cured and then
The temperature at which the conductive bumps and the conductive paste melt
The electronic part according to claim 1, wherein the electronic part is heated up to
Method for manufacturing package of product. 3. The melting point of the conductive bump and the conductivity
A contract characterized in that the melting points of the pastes are almost the same.
A method of manufacturing an electronic component package according to claim 1. 4. The electron according to claim 1 , wherein a melting point of the resin layer is lower than a melting point of the conductive bump.
Manufacturing method of component mounting body. 5. The method for manufacturing an electronic component package according to claim 1 , wherein the shrinkage rate of the resin layer after melt curing is equal to or higher than the shrinkage rate of the conductive bumps after melt curing.
Law. Wherein the tip of said conductive bump, conductive according to claim 1, wherein it is flush with the surface of the resin layer
Manufacturing method of mounting body of child parts. 7. The resin layer has a tip end of the conductive bump.
2. It protrudes from the surface of the said.
Of manufacturing electronic component mounted body. 8. The protrusion amount of the tip of the conductive bump is 5 μm.
The electric power according to claim 7, which is m to 20 μm.
Manufacturing method of mounting body of child parts. 9. The manufacture of an electronic component package according to claim 1 , wherein the electronic component is a semiconductor chip.
Method. 10. The method of manufacturing an electronic component package according to claim 9 , further comprising a rewiring layer made of an insulating resin and a conductive pattern on the electrode surface side of the semiconductor chip.
Law. 11. The method of manufacturing an electronic component package according to claim 1, wherein the conductive bump is solder.
Law. 12. The semiconductor bump of the electronic component is S
The electron according to claim 1, which is composed of a conductor containing at least one of n, Cu, Ag, Au, and Ni as a main component.
Manufacturing method of component mounting body. 13. The surface mount component comprises a resistor and a capacitor.
Contractor characterized by including either a coil or a coil
A method of manufacturing an electronic component package according to claim 1.