JP3951903B2 - Semiconductor device and method for manufacturing semiconductor device package - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element or a semiconductor device and a support substrate are electrically connected via a conductive resin, a semiconductor device mounting body, and a manufacturing method thereof.
[0002]
[Prior art]
In recent years, with the miniaturization of electronic devices and the increase in processing speed, the movement of resin-encapsulated semiconductor packages with multiple pins, narrow pitches, and thinning has been rapidly progressing. The mounted flip mounting method has been widely adopted. The flip mounting method not only enables the package to be reduced in size and thickness, but also has a feature of excellent high-frequency characteristics because the distance between the electrode of the semiconductor element and the electrode of the support substrate can be minimized.
[0003]
FIG. 6 is a diagram showing an example of a flip chip mounting method. In the prior art, Sn-Pb solder is used as a bump material, and a barrier metal layer such as Cr or Au is formed on the Al electrode 3 formed on the circuit surface of the semiconductor element 1 to prevent the diffusion of solder. Is formed. The solder bump is formed by mounting a spherical solder ball on the electrode 3 and then melting it in a reflow process. At this time, a flux is used to improve solder wettability. Further, the mounting on the support substrate is performed by mounting the semiconductor element with solder bumps on the support substrate and performing the reflow process again. Further, in order to improve the connection reliability, the gap between the semiconductor element 1 and the support substrate 8 is achieved. A semiconductor device can be obtained by injecting an underfill which is a reinforcing resin into the resin and curing it.
[0004]
However, in the method of mounting a semiconductor element or semiconductor device using solder as described above, (1) an increase in the manufacturing process and cost of the semiconductor device due to the formation of a barrier metal layer, and (2) environmental load and legal regulations of Pb-based solder (3) Contamination of the semiconductor device due to flux, and (4) semiconductor device manufacturing process and cost increase due to underfill injection.
[0005]
In order to solve such a problem, a flip chip technique using a conductive resin has been proposed (see, for example, Patent Document 1). According to this method, the formation of a conductive polymerizable precursor in the flip chip bond pad provides an electrical connection between the flip chip bond pad and the substrate bond pad, which is lower than solder reflow. The bumps can be polymerized under certain conditions, reliability problems caused by large mismatches in the thermal expansion coefficients of the chip and substrate can be significantly reduced, and bump polymerization can be performed at low temperatures, allowing a wide range of substrates to be used. In addition, there is a feature that the complicated and long-time vapor deposition and electroplating for forming the solder bump are unnecessary, and further, the flux is unnecessary.
[0006]
[Patent Document 1]
Japanese Patent No. 2717993 [Patent Document 2]
Japanese Patent Laid-Open No. 2000-236002 (FIG. 1)
[0007]
[Problems to be solved by the invention]
However, since the above-described technique does not reinforce the gap between the chip and the substrate with an insulating resin, there is a problem that the electrical connection reliability is low because it is vulnerable to a drop impact or a thermal cycle that is repeatedly exposed to high and low temperatures. On the other hand, there has been proposed a method (for example, see Patent Document 2) in which reinforcing resin is injected into the gap between the chip and the substrate to reduce the influence on the connection site due to changes in the surrounding environment. There are two types of resins, namely, an adhesive sealing resin for adhering and a protective sealing resin for protecting the connection site, and there is a problem that the process becomes complicated.
[0008]
In view of the above, an object of the present invention is to provide a semiconductor device, a semiconductor device mounting body, and a manufacturing method thereof that can reduce the number of manufacturing steps and cost and are excellent in electrical connection reliability. .
[0009]
[Means for Solving the Problems]
The present invention relates to a semiconductor device in which bumps that electrically connect electrode pads of a semiconductor element and electrode pads of a support substrate are made of a conductive resin, and a gap between the semiconductor element and the support substrate is supported by an insulating resin. The semiconductor device is characterized in that the thermal expansion coefficient of the insulating resin is larger than the thermal expansion coefficient of the conductive resin.
[0010]
The present invention also provides a semiconductor in which bumps that electrically connect electrode pads of a semiconductor device and electrode pads of a support substrate are made of a conductive resin, and a gap between the semiconductor device and the support substrate is supported by an insulating resin. Provided is a device mounting body, wherein a thermal expansion coefficient of an insulating resin is larger than a thermal expansion coefficient of a conductive resin.
[0011]
The present invention also includes a step of forming a bump made of a conductive resin on an electrode pad of a semiconductor element, a step of curing the conductive resin, and a step of forming a bump made of a conductive resin on an electrode pad of a support substrate. Applying an insulating resin having a thermal expansion coefficient larger than that of the conductive resin so as to be higher than the bump formed on the electrode pad of the semiconductor element in the semiconductor element mounting region on the support substrate; And a step of bonding the semiconductor element and the support substrate so that both bumps of the support substrate overlap with each other, and a step of curing the conductive resin and the insulating resin. .
[0012]
The present invention also includes a step of forming a bump made of a conductive resin on an electrode pad of a semiconductor element, a step of curing the conductive resin to the B stage, and a thermal expansion coefficient larger than the thermal expansion coefficient of the conductive resin. Applying an insulating resin to the semiconductor element mounting region on the support substrate so as to be higher than the bumps formed on the electrode pads of the semiconductor element, and the semiconductor element so that the bumps of the semiconductor element and the electrode pads of the support substrate overlap each other And a step of bonding the support substrate and a step of curing the conductive resin and the insulating resin.
[0013]
The present invention also includes a step of forming a bump made of a conductive resin on an electrode pad of a semiconductor device, a step of curing the conductive resin, and a step of forming a bump made of a conductive resin on the electrode pad of a support substrate. Applying an insulating resin having a thermal expansion coefficient larger than the thermal expansion coefficient of the conductive resin to the semiconductor device mounting region on the support substrate so as to be higher than the bumps formed on the electrode pads of the semiconductor device; And a step of bonding the semiconductor device and the support substrate so that both the bumps of the support substrate overlap each other, and a step of curing the conductive resin and the insulating resin. provide.
[0014]
The present invention also includes a step of forming a bump made of a conductive resin on an electrode pad of a semiconductor device, a step of curing the conductive resin up to the B stage, and a thermal expansion coefficient larger than that of the conductive resin. Applying insulating resin on the semiconductor device mounting region on the support substrate so as to be higher than the bumps formed on the electrode pads of the semiconductor device, and the semiconductor device so that the bumps of the semiconductor device and the electrode pads of the support substrate overlap each other And a step of bonding the support substrate, and a step of curing the conductive resin and the insulating resin.
[0015]
According to the present invention, since the thermal expansion coefficient of the insulating resin is larger than the thermal expansion coefficient of the conductive resin, after curing both resins, the insulating resin shrinks more than the conductive resin when the temperature is lower than the curing temperature, The compressive stress acts on the bump made of conductive resin. As a result, the adhesion between the electrode pad and the bump is improved, and a highly reliable electrical connection state can be obtained.
[0016]
Moreover, it is preferable that the gel time of the insulating resin used in the present invention is longer than that of the conductive resin. According to this, since the insulating resin is cured after the conductive resin is cured, the burden due to the difference in expansion / shrinkage between the conductive resin and the insulating resin with respect to the bump is reduced, and an appropriate compressive stress is applied to the bump. Acts, and the electrical connection reliability is further ensured.
[0017]
Embodiments of the present invention will be described below with reference to the drawings.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
A feature of the present invention is that in a method of mounting a semiconductor element or a semiconductor device on a substrate using bumps made of a conductive resin, an insulating resin having a thermal expansion coefficient larger than that of the conductive resin is mounted and cured simultaneously with the conductive resin. In the point.
[0019]
FIG. 1 is a sectional view showing an example of a manufacturing process of a semiconductor device of the present invention.
[0020]
FIG. 1A is a diagram showing a general structure of a semiconductor element. The semiconductor element 1 of the present invention is not particularly limited as long as an electronic circuit is formed, and any kind or size of semiconductor element can be used. For example, a semiconductor element in which a memory circuit is formed, a semiconductor element in which a logic circuit is formed, and the like can be given. There is an electrode 3 on the upper surface of the semiconductor element 1, which may be made of aluminum or an electrode plated with gold, and is not particularly limited. Further, a semiconductor element protective film 2 is formed on the upper surface of the semiconductor element 1. The semiconductor element protective film 2 may be a conventionally known film such as a nitride film or a polyimide film, and is not particularly limited.
[0021]
FIG. 1B is a diagram in which bumps 4 made of conductive resin are formed on the electrodes 3 of the semiconductor element. The conductive resin for forming the bump is not particularly limited, but is a resin comprising at least conductive fine powder and a resin, and has a thermal expansion coefficient of 35 × 10 ⁻⁶ to 50 × 10 ⁻⁶ / ° C. Are preferred. When the thermal expansion coefficient is less than 35 × 10 ⁻⁶ / ° C., the adhesive ratio tends to deteriorate because the ratio of the resin to the conductive fine powder becomes low, and when it exceeds 50 × 10 ⁻⁶ / ° C. There is a tendency for the amount of fine powder to decrease and the conductivity to deteriorate. The conductive fine powder is not particularly limited as long as it has conductivity after curing of the conductive resin. Metal fine powder such as Ag, Cu, Ni, Pd, Al, Au, etc., or metal fine powder And powders obtained by plating the surface of the resin with a metal such as Au, powders obtained by coating the surface of the resin powder with a metal such as Au, carbon powder, or a mixture of the above-mentioned conductive fine powders. The resin is not particularly limited as long as it is cured by heat, and examples thereof include thermosetting resins such as epoxy resins and phenol resins, and solvent-drying resins such as polyamideimide. The bump formation method is not particularly limited, and can be formed by a conventionally known method such as screen printing, transfer, potting, or photo process.
[0022]
FIG. 1C is a diagram in which bumps 6 made of conductive resin are formed on the electrodes 9 of the support substrate 8. The bumps here are formed using the same conductive resin as described above and by the same formation method as described above. In addition, when the bump 4 formed on the electrode 3 of the semiconductor element 1 is in a B stage state and directly adhered and cured on the electrode 9 of the support substrate 8, the bump 6 of the support substrate 8 is not particularly required. Also good.
[0023]
FIG. 1D is a diagram in which a layer of insulating resin 5 is formed on the support substrate. The insulating resin used here may be cured by heat and have a thermal expansion coefficient larger than that of the bump, but preferably has a thermal expansion coefficient of 40 × 10 ^{−6 to} 60 × 10 ⁻⁶ / ° C. Is. The material is not limited, and examples thereof include thermosetting resins such as epoxy resins and phenol resins, and solvent-drying resins such as polyamideimide. Further, it is preferably an insulating resin having a slower curing speed than the conductive resin forming the bumps, that is, a long gelation time. Further, (gelation time of insulating resin / conductive resin gelation time) Is more preferably greater than 1.5, and particularly preferably greater than 2.0. For example, the gel time of the conductive resin at 150 ° C. is preferably in the range of 10 to 60 seconds, and the gel time of the insulating resin is preferably in the range of 60 to 180 seconds. In common with these two resins, when the gelation time at 150 ° C. is less than 10 seconds, the storage stability tends to be lowered, and when it exceeds 180 seconds, the curing time becomes longer and the productivity is lowered. According to this, since the insulating resin is cured after the conductive resin is cured, the burden due to the difference in expansion / contraction amount between the conductive resin and the insulating resin with respect to the bump is reduced. That is, when the amount of cure shrinkage of the conductive resin is larger than that of the insulating resin, if the conductive resin and the insulating resin are cured at the same time, the curing shrinkage of the conductive resin is inhibited by the insulating resin. The tensile stress on the support substrate is generated on the bump, but the bump is affected by the difference in curing shrinkage between the conductive resin and the insulating resin by curing the insulating resin after the conductive resin is cured. Therefore, the compressive stress acts more reliably, and an excellent and reliable electrical connection state can be obtained. In the present invention, the gelation time is a value measured according to JIS C2105 (Test method for solvent-free liquid resin for electrical insulation). In addition, the method of forming the insulating resin is not particularly limited as long as the height is higher than the gap between the semiconductor element and the support substrate and is in an uncured state, such as screen printing, transfer, potting, etc. It can be formed by a conventionally known method.
[0024]
FIG. 1E is a diagram illustrating a process of mounting the semiconductor element 1 manufactured in FIG. 1B on the support substrate 8. The curing of the bumps made of the conductive resin and the insulating resin may be performed at a constant temperature or a temperature profile in which the curing temperature is increased after the gelation time of the conductive resin has elapsed to shorten the curing time. Moreover, although hardening time in particular is not restrict | limited, It is preferable that it is 10 times or more of the gelatinization time of insulating resin.
[0025]
FIG. 1F and FIG. 2 are diagrams illustrating an example of a semiconductor device obtained by mounting the semiconductor element 1 on the support substrate 8. At this time, even if the insulating resin 5 does not contact the bump 4 and only a part of the semiconductor element and the support substrate are connected (FIG. 1 (f)), the structure including all the bumps 4 (FIG. 1). 2). In the case of FIG. 1 (f), the second insulating resin 10 may be filled in the gap between the semiconductor element 1 and the support substrate 8 as shown in FIG. At this time, the thermal expansion coefficient of the second insulating resin 10 is preferably equal to the thermal expansion coefficient of the first insulating resin 5.
[0026]
4 and 5 are cross-sectional views showing an example of a semiconductor device mounting body in which the semiconductor device is mounted on the support substrate 8. The semiconductor device package of the present invention can be obtained by bonding the electrodes of the semiconductor device and the electrodes of the support substrate with bumps made of a conductive resin in the same manner as when mounting the semiconductor element. An insulating resin layer having a thermal expansion coefficient after curing larger than that after curing of the bump is formed in the gap. Other structures are not particularly limited. (1) Bare chip (FIG. 1), (2) BGA (Ball Grid Array) (FIG. 4), (3) CSP (Chip Size Package), (4) QFP (Quad) (Flat Package) (FIG. 5), (5) TSOP (Thin Solid Outline Package), and the like.
[0027]
【Example】
10 parts by weight of a bisphenol F type epoxy resin (Toto Kasei Co., Ltd., YDF-170) and a bisphenol A type epoxy resin (Oilized shell epoxy) ) YL-980) 10 parts by weight, curing agent (Shikoku Kasei Co., Ltd., Cureduct P-0505) 4 parts by weight, curing agent (Shikoku Kasei Co., Ltd., Cureduct L-01B), 2 parts by weight, conductive filler Conductive resin (thermal expansion coefficient 40 × 10 ⁻⁶ / ° C.) consisting of 120 parts by weight (Tokuri Chemical Laboratory Co., Ltd., TCG-1) and 4 parts by weight of diluent (Toto Kasei Co., Ltd., P-101) , Gelation time 50 seconds / 150 ° C.) was printed by screen printing, and then cured at 150 ° C. for 1 hour to form bumps. Next, a conductive resin similar to the above is printed on the electrode of a support substrate (manufactured by Hitachi Chemical Co., Ltd., trade name: E-67) having a size of 30 mm × 30 mm and a thickness of 1.6 mm by a screen printing method. Furthermore, 79 parts by weight of a bisphenol F type epoxy resin (Toto Kasei Co., Ltd., YDF-170), 21 parts by weight of an alicyclic epoxy resin, and 120 parts by weight of methyltetrahydrophthalic anhydride are provided in a region that does not contact the electrode near the center of the support substrate. Part, a first insulating resin (thermal expansion coefficient 50 × 10 ⁻⁶ / ° C.) comprising 450 parts by weight of spherical fused silica (average particle size 15.2 μm) and 150 parts by weight of square fused silica (average particle size 15.5 μm). The gelation time was 150 seconds / 150 ° C.). Next, the semiconductor element was mounted on the support substrate so that the electrode of the semiconductor element and the electrode of the support substrate coincided with each other, and cured at 150 ° C. for 1 hour to obtain a semiconductor device. This was put into a thermal shock tester (Enomoto Kasei Co., Ltd., Wintech NT500), and a temperature cycle test was performed with -55 ° C for 15 minutes and 125 ° C for 15 minutes as one cycle. As a result, up to 1000 cycles, no defect in the conductive resin connecting portion, no peeling inside the semiconductor device, and no cracks were observed.
[0028]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the number of manufacturing processes and cost can be reduced, and the semiconductor device excellent in electrical connection reliability, a semiconductor device mounting body, and these manufacturing methods can be provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing one embodiment of a manufacturing process of a semiconductor device of the present invention.
FIG. 2 is a cross-sectional view illustrating an example of a semiconductor device of the present invention.
FIG. 3 is a cross-sectional view illustrating an example of a semiconductor device of the present invention.
FIG. 4 is a cross-sectional view showing an example of a semiconductor device mounting body according to the present invention.
FIG. 5 is a cross-sectional view showing an example of a semiconductor device mounting body according to the present invention.
FIG. 6 is a cross-sectional view showing an example of a conventional flip chip mounting method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Semiconductor element protective film 3 Electrode 4 Conductive bump 5 Insulating resin 6 Conductive bump 7 Wiring protective film 8 Support substrate 9 Electrode 10 Insulating resin 11 Au wire 12 Sealing resin 13 Semiconductor element adhesive 14 2nd Circuit board 15 Wiring protective film 16 Lead 17 Solder bump

Claims (6)

  A step of forming a bump made of a conductive resin on an electrode pad of a semiconductor element; a step of curing the conductive resin; a step of forming a bump made of a conductive resin on an electrode pad of a support substrate; and a coefficient of thermal expansion. Applying an insulating resin larger than the thermal expansion coefficient of the conductive resin to a semiconductor element mounting region on the support substrate so as to be higher than bumps formed on electrode pads of the semiconductor element; A semiconductor device comprising: a step of bonding the semiconductor element and the support substrate such that both bumps of the element and the support substrate overlap each other; and a step of curing the conductive resin and the insulating resin. Manufacturing method. The gel time of the insulating resin, a method of manufacturing a semiconductor device according to claim 1, wherein a longer than the conductive resin. Forming a bump made of a conductive resin to the electrode pads of the semiconductor element, and curing the conductive resin to the B stage, the thermal expansion coefficient is much larger than the thermal expansion coefficient of the conductive resin, gelling the time is long insulating resin than the conductive resin to the semiconductor element mounting region supporting region on the substrate, said to be higher than the bump formed on the electrode pads of the semiconductor element, a step of applying, of the semiconductor element A semiconductor device comprising: a step of bonding the semiconductor element and the support substrate such that a bump and an electrode pad of the support substrate overlap each other; and a step of curing the conductive resin and the insulating resin. Manufacturing method.   A step of forming a bump made of a conductive resin on an electrode pad of a semiconductor device, a step of curing the conductive resin, a step of forming a bump made of a conductive resin on an electrode pad of a support substrate, and a coefficient of thermal expansion. Applying an insulating resin larger than the thermal expansion coefficient of the conductive resin to a semiconductor device mounting region on the support substrate so as to be higher than bumps formed on electrode pads of the semiconductor device; and the semiconductor A semiconductor device comprising: a step of bonding the semiconductor device and the support substrate such that both bumps of the device and the support substrate overlap each other; and a step of curing the conductive resin and the insulating resin. Manufacturing method of mounting body. The method for manufacturing a semiconductor device package according to claim 4 , wherein the gel time of the insulating resin is longer than that of the conductive resin. Forming a bump made of a conductive resin to the electrode pad of the semiconductor device, and curing the conductive resin to the B stage, the thermal expansion coefficient is much larger than the thermal expansion coefficient of the conductive resin, gelling the time is long insulating resin than the conductive resin to the semiconductor device mounting region supporting region on the substrate, said to be higher than the bump formed on the electrode pads of the semiconductor device, the steps of applying, in the semiconductor device A semiconductor device comprising: a step of bonding the semiconductor device and the support substrate such that a bump and an electrode pad of the support substrate overlap each other; and a step of curing the conductive resin and the insulating resin. Manufacturing method of mounting body.

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