JP3636290B2 - Printed wiring board and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a printed wiring board, and more specifically, a multilayer printed wiring board called a so-called multilayer board in which insulating layers and wiring patterns are alternately stacked to achieve electrical conduction in the thickness direction of the board. And a manufacturing method thereof.
[0002]
[Prior art]
Conventionally, as a method of forming a multilayer board, a method of forming a through-hole plating layer in the thickness direction of a laminated body in which an insulating layer and a wiring layer are laminated to achieve electrical conduction in a substrate thickness direction, or a conductive resin Bi pressed into the thickness direction of the prepreg of the insulating substrate with the conical conductor bump group formed by ² The t (registered trademark) method and the like are known. Among them, Bi is advantageous in terms of high manufacturing efficiency ² The t method is being widely used.
[0003]
FIG. 22 shows Bi ² It is the vertical sectional view which showed the manufacture process of t method typically.
[0004]
In this method, as shown in FIG. 22A, conductor bump groups 111, 111,... Are formed on a copper foil 101 by a printing technique, and an insulating synthetic resin prepreg 106 is laminated thereon and heated. The conductor bump groups 111, 111,... Are penetrated in the thickness direction of the prepreg 106 to form a laminate 112, and another copper foil 102 is stacked on the conductor bump groups 111, 111,. Pressing is performed to manufacture the double-sided substrate 113.
[0005]
By the way, with recent miniaturization of electronic devices, improvement in the degree of integration has been demanded. In order to meet this demand, miniaturization of the diameters of the conductor bump groups 111, 111,.
[0006]
[Problems to be solved by the invention]
However, in the conventional method of forming the conductor bump groups 11, 111,... Using a conductive resin by a printing technique, the conductor bump groups 111, 111,. It becomes difficult to make. For example, as shown in FIG. 22C, variations in height and shape tend to occur between the conductor bump groups 111, 111,..., And electrical connection failure occurs in the conductor bump 111c.
[0007]
Such a defect becomes prominent when the diameter of the conductor bump is 100 μm or less.
[0008]
In order to achieve a sufficient electrical connection, the diameter of the conductor bump is required to be 120 μm or more when passing through a prepreg having a thickness of 60 μm, so that there is a limit in the conventional method to further improve the degree of integration. There's a problem.
[0009]
The present invention has been made to solve the above conventional problems.
[0010]
That is, an object of the present invention is to provide a highly reliable multilayer printed wiring board and a method for manufacturing such a printed wiring board.
[0011]
Furthermore, the present invention provides a multilayer printed wiring board that can form a sufficient electrical connection even if the conductor bumps are reduced in diameter and can cope with further improvement in the degree of integration, and a method for manufacturing such a printed wiring board. The purpose is to provide.
[0012]
[Means for Solving the Problems]
The printed wiring board of the present invention includes an insulating layer, a first conductor layer stacked on one surface of the insulating layer, a second conductor layer stacked on the other surface of the insulating layer, and the first conductor layer. A metal bump group having a substantially trapezoidal cross-sectional shape, interposed between one conductor layer and the second conductor layer, and formed between a tip surface of the metal bump group and the second conductor layer And a solder layer.
[0013]
In the printed wiring board, examples of the metal bump group include those made of metal plated on the second conductor layer.
[0014]
In addition, a protective metal layer may be further provided between the second conductor layer and the metal bump group.
[0015]
Furthermore, the solder layer is preferably composed of high melting point solder.
[0016]
Further, a second solder layer may be further provided between the first conductor layer and the bottom surface of the metal bump group.
[0017]
Furthermore, the solder layer is preferably composed of high melting point solder having a melting point of 310 to 340 ° C.
[0018]
In the printed wiring board, the first conductor layer and the metal bump may be formed from one thick plate by, for example, an etching method or the like.
[0019]
Another printed wiring board of the present invention includes an insulating layer, a first conductor layer laminated on one surface of the insulating layer, a second conductor layer laminated on the other surface of the insulating layer,
A group of metal bumps interposed between the first conductor layer and the second conductor layer and having a substantially trapezoidal cross-sectional shape;
A conductive paste layer that electrically connects the tip surface of the metal bump group and the second conductor layer;
It comprises.
[0020]
Still another printed wiring board of the present invention includes a core insulating layer, a first core conductor layer laminated on one surface of the core insulating layer, and a second laminated on the other surface of the core insulating layer. Core metal layers, a core metal bump group having a substantially trapezoidal cross-sectional shape, interposed between the first core conductor layer and the second core conductor layer, and a front end surface of the core metal bump group And a core solder layer formed between the first core conductor layer, a first outer insulating layer laminated on the outer side of the first core conductor layer, and an outer side of the first outer insulating layer. A laminated first outer conductor layer, a first outer metal bump group having a substantially trapezoidal cross-sectional shape, interposed between the first core conductor layer and the first outer conductor layer; Formed between the front end surface of the first outer metal bump group and the first core conductor layer or the first outer conductor layer. A first outer solder layer formed, a second outer insulating layer laminated outside the second core conductor layer, and a second outer conductor layer laminated outside the second outer insulating layer. A second outer metal bump group having a substantially trapezoidal cross-sectional shape, interposed between the second core conductor layer and the second outer conductor layer, and the second outer metal bump group. A second outer solder layer formed between the front end surface and the second core conductor layer or the second outer conductor layer.
[0021]
The printed wiring board manufacturing method of the present invention is
Forming an etching protective layer on the rough surface of the first conductor plate;
Plating a copper layer to be a metal bump on the etching protection layer;
Forming a solder layer on a portion corresponding to the upper surface of the metal bump on the copper layer;
Etching the copper layer from above the solder layer to form a substantially conical metal bump group;
Laminating an insulating substrate and a second conductor plate on the tip side of the bump group;
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
It comprises.
[0022]
Other printed wiring board manufacturing method of the present invention,
Forming a masking layer in which a through hole is formed in a portion for forming the bottom surface of the metal bump on the rough surface of the first conductor plate;
Forming a metal bump group having a mushroom-shaped cross-sectional shape by performing copper plating on the rough surface of the first conductor plate through the masking layer;
Removing the masking layer;
Laminating an insulating substrate and a second conductor plate on the tip side of the metal bump group;
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
It comprises.
[0023]
Another printed wiring board manufacturing method of the present invention is:
Forming a masking layer in which a through hole is formed in a portion for forming the bottom surface of the metal bump on the rough surface of the first conductor plate;
Forming a substantially cylindrical metal bump group by performing a copper plating process on the first conductive plate through the masking layer;
Removing the masking layer;
Laminating an insulating substrate and a second conductor plate on the tip side of the metal bump group;
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
It comprises.
[0024]
Still another printed wiring board manufacturing method of the present invention is:
Forming a group of small protrusions having a mountain-shaped cross section on the first conductor plate;
Forming a masking layer having a through-hole in a portion where a metal bump is formed on the surface on which the microprojection group is formed;
Forming a metal bump group having a chevron-shaped cross-section by performing copper plating on the first conductor plate through the masking layer;
Removing the masking layer;
Laminating an insulating substrate and a second conductor plate on the tip side of the metal bump group;
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
It comprises.
[0025]
In the present invention, the bump group used for interlayer connection is formed by plating and etching to form a metal bump group, so that a bump group having a smaller diameter can be formed with higher accuracy than the conventional method using the printing technique. Therefore, it is possible to obtain a highly reliable multilayer printed wiring board that can reliably achieve electrical connection even with a small diameter.
[0026]
Further, since the connection between the metal bump group and the conductor plate is performed by soldering, it is possible to form a more reliable electrical connection than a simple mechanical contact.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
Hereinafter, a first embodiment of the present invention will be described. FIG. 1 is a flowchart illustrating a flow of a manufacturing method of a build-up type printed wiring board according to the present embodiment, and FIGS. 2 to 4 are vertical sectional views illustrating states of the respective steps of the method.
[0028]
As shown in FIG. 1, first, a conductor plate 1 such as a copper foil is prepared. In the present embodiment, for example, a copper foil having a thickness of 18 μm is used. At this time, as shown in FIG. 2A, a surface called “matt surface” having unevenness on the surface is processed on the rough surface side (lower surface side in the figure). This is because the surface of the mat surface has fine irregularities and a so-called anchor effect can be expected, so that the adhesive strength with the mating partner is increased when the prepreg is laminated or plated.
[0029]
First, as shown in FIG. 2B, an etching protective layer 2 is formed on the mat surface side of the conductor plate 1 (step 1). This etching protection layer 2 is a layer that functions as a breakwater to prevent the conductor plate 1 from being etched by an etching process at the time of bump formation, which will be described later. Typically, Ni or Au is used, and sputtering is performed. It is applied by methods such as vapor deposition and electroless plating. However, the etching protective layer 2 can be omitted if the etching depth can be controlled successfully.
[0030]
Next, as shown in FIG. 2C, a metal layer 3 that forms a bump is formed on the etching protection layer 2 (step 2). The metal layer 3 is typically made of copper, and as a method for forming the metal layer 3, various liquid phase methods such as plating and sputtering and gas phase methods can be used, but the plating method is preferred. Since the metal layer 3 is a portion that becomes a base of a bump described later, a thickness corresponding to the height of the bump is required. For example, the thickness is preferably 50 to 100 μm, and more preferably 50 to 60 μm.
[0031]
When the metal layer 3 is formed, the solder layer 4 is formed to have a uniform thickness over the entire surface of the metal layer 3 as shown in FIG. The thickness of the solder layer 4 is preferably 5 to 50 μm. The solder used here is for soldering a bump head, which will be described later, to an opposing conductor plate surface. Since the interlayer connection is broken if it is melted by heat when mounting the semiconductor element on the completed multilayer board, the melting point higher than the reflow temperature at the time of mounting is preferable to prevent this. For example, when assembling using a eutectic solder of Sn / Pb = 63/27 having a melting point of 183 ° C. during mounting, the solder layer 4 is made of a high melting point solder having a melting point of about 310 to 340 ° C. It is preferable to use it. Examples of the high melting point type solder include solder made of an alloy of Sn and Ag, and alloyed Sn and Pb at a ratio of Sn / Pb = 10/90.
[0032]
When the solder layer 4 is formed, a masking layer 5 is formed over the entire surface of the solder layer 4 as shown in FIG. This masking layer 5 functions as masking for selectively etching the solder layer 4 and is specifically made of, for example, a photosensitive resin.
[0033]
When the masking layer 5 is formed, a mask pattern (not shown) is overlaid thereon and exposed (step 5). As the mask pattern at this time, a mask pattern in which the masking layer 5 remains only in the portion corresponding to the head of the bump described later is used. For example, a mask pattern in which a thin plate is perforated with a circular hole having the same diameter, for example, a circular pattern having a diameter of 50 μm.
[0034]
Next, for example, using a masking layer 5 made of a photosensitive resin of a type in which only an exposed portion is cured, the masking pattern in which the round holes are perforated is superimposed and exposed, and then developed (step 6). When the hardened masking layer 5 is removed, as shown in FIG. 2F, the hardened masking layer 5a is left only in the portion corresponding to the head of the bump.
[0035]
Etching or the like is performed from above the masking layer 5a (step 7) to remove the exposed solder layer 4, leaving the solder layer 4a below the masking layer 5a as shown in FIG. The layer is removed and the surface of the metal layer 3 is exposed.
[0036]
When the remaining masking layer 5a is removed (step 8), the remaining solder layer 4a is exposed as shown in FIG. In this state, the metal layer 3 is selectively etched by being immersed in an etching solution for etching only the metal layer 3 from the solder layer 4a side, thereby forming bumps (step 9). In the etching solution, only the metal layer 3 is etched and the solder layer 4a functions as a mask. Therefore, only the metal layer 3 on which the solder layer 4a is not formed is etched, as shown in FIG. As described above, the metal layer 3 portion without the solder layer 4a is engraved in a bowl shape, the cross section as shown in FIG. 2 (i) is substantially trapezoidal, and the head is covered with the solder layer 4a. , ... are formed.
[0037]
Next, on the conductor plate 1 on which the metal bump groups 6, 6,... Are formed on one side in this manner, as shown in FIG. Are stacked (step 10). This prepreg is obtained by impregnating a reinforcing fiber such as glass fiber with a thermosetting resin having a high insulating property such as an epoxy resin, and is uncured. Thickness is 10 ⁷ If a dielectric breakdown voltage of Ω or higher can be obtained, a thin one of about 30 μm can be used. For example, a prepreg having a thickness of 60 μm is used.
[0038]
When pressed in the state of FIG. 3A (step 11), the metal bump group 6, 6,... Penetrates the prepreg 7 and the head of the metal bump 6 is the prepreg 7 as shown in FIG. Exposed on the opposite side. As shown in FIG. 3 (c), a conductive plate 12 such as copper foil is placed on the surface of the prepreg 7 through which the head of the metal bump 6 penetrates, with the mat surface facing the same manner as described above, and laminated. (Step 12). When pressed under heating in this state (step 13), as shown in FIG. 3D, the metal bump groups 6, 6,... The solder layers 4a, 4a,. Heated at the same time. The solder layers 4a, 4a,... Are melted by heating at this time, and the heads of the metal bump groups 6, 6,. Further, since the prepreg 7 is also pressed against the mat surface of the conductor plate 12 and heated at the same time, the prepreg 7 itself is cured and bonded to the conductor plate 12. In this way, a double-sided board 9 having two layers connected on each side is obtained.
[0039]
When the conductor plates 1 and 12 of the double-sided plate 9 are patterned by performing etching or the like (step 14), a core substrate 10 as shown in FIG. 3E is obtained.
Next, the substrate 8 ′ and the substrate 8 ″ formed in the steps 1 to 10 are arranged and laminated on both surfaces of the core substrate 10 in the direction as shown in FIG. 4A (step 15). When pressed under heating (step 16), a laminate 13 as shown in FIG. 4B is obtained. When the conductor plates 1 ′ and 1 ″ on both sides of the multilayer body 13 are patterned by, for example, etching (step 17), a multilayer plate 13 a as shown in FIG. 4C is obtained.
[0040]
As described above, in the printed wiring board according to the present embodiment, the metal bumps 6 are formed by using the plating technique. Therefore, the adhesiveness between the bottom surface of the metal bumps 6 and the conductor plate 1 and the reliability of electrical conduction are improved. The diameter of the bottom surface of the metal bump 6 can be made very small. Specifically, the diameter can be reduced to less than half of a conductor bump using a conventional conductive resin having a diameter of about 50 μm. Therefore, the area on the wiring pattern for connecting the bottom surfaces of the metal bumps 6 can be reduced, or the wiring pattern itself can be further miniaturized, so that the degree of integration can be further improved.
[0041]
Further, if the diameter of the bottom surface of the metal bump 6 is reduced, the height of the metal bump 6 can be reduced due to the aspect ratio. Therefore, a thinner prepreg can be used, and the thickness of the multilayer board can be reduced, and the degree of integration in the thickness direction can be improved. Furthermore, the effect that the weight of a multilayer board can be reduced by reducing the thickness of a multilayer board is also acquired.
[0042]
In the printed wiring board according to the present embodiment, the solder of the solder layer 4a is used to connect the heads of the metal bump groups 6, 6,... And the conductor plate 12 facing the metal bump groups 6, 6,. As a result, the bump connection is stronger and more reliable than simple mechanical contact. Therefore, the effect that the electrical characteristics of the multilayer board are improved can be obtained.
[0043]
Further, in the present embodiment, the metal bumps 6 are formed using a metal such as copper, so that the metal can be easily recovered during recycling.
[0044]
In addition, since an expensive useful metal such as silver paste is not used, it is advantageous in terms of cost and resource saving.
[0045]
The scope of the present invention is not limited to the range described in the above embodiment. For example, in the above embodiment, the metal layer 3 is formed by plating, but may be formed by other methods such as sputtering or vapor deposition.
[0046]
(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described. In addition, description may be abbreviate | omitted about the content which overlaps with previous embodiment among embodiment after this embodiment.
[0047]
FIG. 5 is a flowchart illustrating a flow of a manufacturing method of a build-up type printed wiring board according to the present embodiment, and FIGS. 6 to 8 are vertical sectional views illustrating states of the respective steps of the method.
[0048]
In the present embodiment, the thin conductor plate 3 is formed on the thick conductor plate 1 by plating. In addition, the electrical connection between the metal bump 6 and the conductor plate 1 ′ opposite to the metal bump 6 is performed by a conductive paste.
[0049]
In this embodiment, a thick conductor plate 1 is prepared as shown in FIG. A conductor layer 3 such as a thin copper layer is formed on the mat surface of the conductor plate 1 (a surface having a rough upper surface in the figure) (step 1a). As a method for forming the conductor layer 3, various methods such as a plating method, a vapor deposition method, and a sputtering method can be used. Although omitted in the present embodiment, the conductor layer 3 may be formed after the etching protection layer is formed on the mat surface of the conductor plate 1.
[0050]
Next, as shown in FIG. 6C, the masking layer 5 is formed over the entire surface of the conductor plate 1 opposite to the surface on which the conductor layer 3 is formed (the lower surface in the figure) (step 2a).
[0051]
When the masking layer 5 is formed, a mask pattern (not shown) is overlaid on the masking layer 5 for exposure (step 3a), the masking layer 5a corresponding to the head of the metal bump 6 is cured, and the other portions are developed ( Step 4a), the state shown in FIG.
[0052]
In this state, the substrate is immersed in an etching solution for etching the conductor plate 1 from the lower surface side in the figure, and etching is performed to form bumps (step 5a).
[0053]
In the etching solution, the conductor plate 1 exposed between the masking layer 5a and the masking layer 5a is etched, and the lower portion of the masking layer 5a is not etched. Therefore, as shown in FIG. 1 is formed in a bowl shape, and metal bump groups 6, 6,... Having a substantially trapezoidal cross section and a head covered with a masking layer 5a are formed.
[0054]
Next, the masking layer 5a is removed (step 6a), and the heads of the metal bump groups 6, 6,... Are exposed as shown in FIG. In this state, the conductive paste 14 is applied to the heads of the metal bump groups 6, 6,... (Step 7a), and the heads of the metal bump groups 6, 6,. To do.
[0055]
Next, as shown in FIG. 7A, a prepreg 7 is laminated on the conductor plate 1 on which the metal bump groups 6, 6,... Are formed on one side in this way (step 8a).
[0056]
When pressed in the state of FIG. 7A (step 9a), the metal bump groups 6, 6,... Penetrate through the prepreg 7 and the heads of the metal bumps 6 are formed of the prepreg 7 as shown in FIG. Exposed on the opposite side. As shown in FIG. 7 (c), a conductor plate 1 'such as a copper foil is placed on the surface of the prepreg 7 through which the head of the metal bump 6 penetrates, with the mat surface facing the same manner as described above, and laminated. (Step 10a). When pressed under heating in this state (step 11a), as shown in FIG. 7 (d), the metal bump groups 6, 6,... It is heated at the same time as it is pressed. The conductive paste layers 14, 14,... Are cured by heating at this time, and the heads of the metal bump groups 6, 6,. Further, since the prepreg 7 is also pressed against the mat surface of the conductor plate 1 ′ and heated at the same time, the prepreg 7 itself is cured and bonded to the conductor plate 1 ′. In this way, a double-sided plate 16 having two layers connected on each side is obtained.
[0057]
When the conductive plates 1 and 1 'of the double-sided plate 16 are patterned by performing etching, for example (step 12a), a core substrate 16a as shown in FIG. 7E is obtained.
Next, the substrate 15 ′ and the substrate 15 ″ formed in the steps 1 a to 9 a on both surfaces of the core substrate 16 a are placed on the metal bump groups 6 ′, 6 ′,... And the metal bump groups 6 ″, 6 ′. ′,... Are arranged so as to face each other (step 13a), and pressed under heating (step 14a), a laminated body 17 as shown in FIG. 8 is obtained. When the conductor plates 3 ′ and 3 ″ on both surfaces of the multilayer body 17 are patterned by, for example, etching (step 15 a), a four-layer multilayer plate (not shown) having a wiring pattern formed on both surfaces is obtained.
[0058]
In the present embodiment, the thick conductor plate 1 is prepared first, and the thin conductor layer 3 is formed on the mat surface side. Therefore, the formation of the conductor layer 3 does not take time and labor, and is manufactured at low cost. A unique effect is possible.
[0059]
In addition, the conductive paste 14 is used in place of the solder to form bump connections between the metal bump groups 6, 6,... And the conductor plate 1 ′ facing the metal bump groups 6, 6,. There is also an effect that the trouble of etching the solder layer 4 can be saved.
[0060]
In this embodiment, by using a solder paste instead of the conductive paste, it is possible to obtain a reliable interlayer connection by soldering without taking time and effort.
[0061]
(Third embodiment)
Hereinafter, a third embodiment of the present invention will be described.
[0062]
FIG. 9 is a flowchart illustrating the flow of the manufacturing method of the build-up type printed wiring board according to the present embodiment, and FIGS. 10 to 11 are vertical sectional views illustrating the states of the steps of the method.
[0063]
In this embodiment, not only soldering is performed between the heads of the metal bump groups 6, 6,... And the conductor plate 1 'facing the metal bump groups 6, 6,. Soldering is also performed between the conductive plate 3 and the conductive plate 3.
[0064]
In the present embodiment, first, as in the second embodiment, a thick conductor plate 1 as shown in FIG. 10A is prepared, and the conductor plate 1 is shown on one side as shown in FIG. An etching protection layer 2 made of, for example, Ni is formed by, for example, a sputtering method (step 1b). The etching protective layer 2 can be omitted.
[0065]
Next, as shown in FIG. 10C, the upper solder layer 18 is formed over the entire surface of the etching protection layer 2 (step 2b). The upper solder layer 18 is also preferably made of the high melting point solder.
[0066]
Next, as shown in FIG. 10D, a conductor plate 3 such as a copper foil is laminated on the upper solder layer 18 (step 3b), and then pressed under heating (step 4b).
[0067]
The upper solder layer 18 is melted by the heat at the time of pressing, and the conductor plate 3 is soldered on the etching protection layer 18 to form a laminate as shown in FIG.
[0068]
Next, the lower solder layer 4 as shown in FIG. 10F is formed on the surface of the conductor plate 1 opposite to the side where the conductor plate 3 is soldered (the lower surface in the figure) (step). 5b).
[0069]
Next, a masking layer (not shown) made of a photosensitive resin is formed on the lower solder layer 4 by the same method as in Steps 4 to 8 of the first embodiment, and then the mask pattern is overlaid and exposed. (Step 7b), developed (Step 8b), etched to leave the solder layer 4 in a mask pattern, the masking layer is removed (Step 9b), and the metal as shown in FIG. The solder layers 4 a, 4 a,... Are formed in a pattern only in the portion corresponding to the head of the bump 6.
[0070]
Next, when immersed in an etching solution in this state (step 10b), the conductor plate 1 is partially etched and the head as shown in FIG. 10 (h) is covered with solder layers 4a, 4a,. 6, 6, ... are formed.
[0071]
The prepreg 7 is laminated on the head side of the metal bump groups 6, 6,... Thus obtained (step 11b) and pressed under heating (step 12b). Group 6, 6, ... penetrates.
[0072]
Next, as shown in FIG. 11 (b), the mat surface of the conductor plate 1 'such as copper foil is laminated on the surface of the prepreg 7 through which the metal bump groups 6, 6,. When pressed under heating (step 14b), the prepreg 7 is adhered to the mat surface of the conductor plate 1 ', and the heads of the metal bump groups 6, 6, ... are pressed against the mat surface of the conductor plate 1'. Heated. By this heating, the solder 4a at the head is melted and the metal bump groups 6, 6,... Are soldered to the mat surface of the conductor plate 1 ′.
[0073]
When the conductor plates 3 and 1 'on both sides of the core substrate (not shown) thus formed are patterned (step 15b), wiring layers 3a and 1'a are formed on both sides as shown in FIG. 11C, respectively. A two-layer core material 19 is obtained.
[0074]
Furthermore, in order to form a multilayer board having four or more layers using this core material 19, further multilayering is performed by laminating and pressing a substrate as shown in FIG. 11 (b) on both sides of the core material. can do.
[0075]
According to the present embodiment, since not only the heads of the metal bump groups 6, 6,... But also the bottom surfaces are soldered to the opposing conductor plates, not only the reliability of the electrical connection but also the machine In particular, it is possible to obtain a unique effect that a highly reliable multilayer board that is firmly connected can be obtained.
[0076]
(Fourth embodiment)
The fourth embodiment of the present invention will be described below.
[0077]
FIG. 12 is a flowchart illustrating the flow of the manufacturing method of the build-up type printed wiring board according to the present embodiment, and FIG. 13 is a vertical sectional view illustrating the state of each stage of the method.
[0078]
In this embodiment, the thick conductor plate 1 is etched to form the metal bump and the wiring layer on the bottom side of the metal bump from the same single conductor plate.
[0079]
In this embodiment, first, a thick conductor plate 1 as shown in FIG. 13A is prepared, and the entire surface of one side (lower surface in the figure) of this conductor plate 1 is shown in FIG. 13B. A solder layer 4 having a uniform thickness as shown is formed (step 1c). The solder layer 4 is also preferably made of the high melting point solder.
[0080]
Next, a masking layer (not shown) made of a photosensitive resin is formed on the solder layer 4 by the same method as in Steps 4 to 8 of the first embodiment (Step 2c), and then a mask is formed. The pattern is overlaid and exposed (step 3c), developed (step 4c), etched to leave the solder layer 4 in a mask pattern, the masking layer is removed (step 5c), and FIG. The solder layers 4a, 4a,... Are formed in a pattern only on the portion corresponding to the head of the metal bump 6 as shown.
[0081]
Next, when subjected to the etching process in this state (step 6c), the conductor plate 1 is partially etched and the head as shown in FIG. 13D is covered with the solder layers 4a, 4a,. 6, 6, ... are formed.
[0082]
The prepreg 7 is laminated on the head side of the metal bump groups 6, 6,... Thus obtained (step 7c) and pressed under heating (step 8c). Group 6, 6, ... penetrates.
[0083]
Next, as shown in FIG. 13 (f), the prepreg 7 on the side through which the metal bump groups 6, 6,... Penetrate is laminated with the mat surface of the conductor plate 1 'such as copper foil facing (step 9c). When pressed under heating (step 10c), the prepreg 7 is adhered to the mat surface of the conductor plate 1 ', and the heads of the metal bump groups 6, 6, ... are pressed against the mat surface of the conductor plate 1'. Heated. By this heating, the solder 4a at the head is melted and the metal bump groups 6, 6,... Are soldered to the mat surface of the conductor plate 1 ′.
[0084]
When the conductor plates 1A and 1 'on both sides of the core substrate (not shown) thus formed are patterned (step 11c), wiring layers 1c and 1'a are formed on both sides as shown in FIG. A two-layer core material 20 is obtained.
[0085]
Furthermore, in order to form a multi-layer board having four or more layers using the core material 20, further multilayering is performed by laminating and pressing a substrate as shown in FIG. 13 (f) on both sides of the core material. can do.
[0086]
According to the present embodiment, the metal bump groups 6, 6,... And the wiring layer 1c on the bottom side are originally connected to one conductor plate 1, so that the metal bump groups 6, 6,. And a wiring layer 1c on the bottom side of the wiring layer 1c can be reliably connected to each other with high reliability, and an electrical resistance between them is very small.
[0087]
In addition, since the number of manufacturing steps is small, an effect of reducing the manufacturing cost can be obtained.
[0088]
(Fifth embodiment)
The fifth embodiment of the present invention will be described below.
[0089]
FIG. 14 is a flowchart illustrating the flow of a manufacturing method of a build-up type printed wiring board according to the present embodiment, and FIG. 15 is a vertical sectional view illustrating the state of each stage of the method.
[0090]
In this embodiment, a metal bump group is formed by performing a plating process partially on a conductor plate.
[0091]
In the manufacturing method according to this embodiment, a thin conductor plate 1 such as a copper foil is prepared as shown in FIG. The masking layer 5 is formed thick on the rough surface of the conductor plate 1, that is, the mat surface (step 1d). Since the thickness of the masking layer 5 corresponds to the height of the metal bump, the masking layer 5 having a thickness equivalent to the height of the metal bump to be formed, for example, about 60 μm is formed. In the present embodiment, a masking layer 5 made of a photosensitive resin of a kind that solubilizes a portion that receives light will be described as an example.
[0092]
Next, a mask pattern 21 is overlaid on the masking layer 5. This mask pattern 21 has perforated circular patterns 22, 22,... At positions where metal bumps are to be formed. Since these circular patterns 22, 22,... Correspond to the diameter of the metal bumps, the circular patterns 22, 22,... Are formed as through holes having a diameter of about 50 to 60 [mu] m, for example. It exposes in the state where this mask pattern 21 was piled up (step 2d), the part of circular pattern 22, 22, ... is made to react, and it solubilizes.
[0093]
When the mask pattern 21 is removed and developed (step 3d), only the masking layer 5 in the portion exposed to light is solubilized, so only this portion is removed by the development process, as shown in FIG. 15 (d). Are formed with a rectangular cross section, and the surface of the conductor 1 at the bottom of these holes 23 is exposed.
[0094]
Next, when, for example, an electroless plating process is performed in this state to deposit a metal (step 4d), as shown in FIG. 15 (e), the holes 23, 23,. Are formed.
[0095]
Next, the masking layer 5a is removed (step 5d), and then the solder layer 4 is formed on the heads of the metal bump groups 6, 6,... So that the head as shown in FIG. A metal bump group 6, 6,.
[0096]
Next, as shown in FIG. 15 (g), a prepreg 7 is laminated on the heads of these metal bump groups 6, 6,... And a conductor plate 1 ′ such as a copper foil is further laminated thereon (step 7d). When pressed under heating (step 8d), as shown in FIG. 15H, the metal bump groups 6, 6,... Penetrate through the prepreg 7, and the prepreg 7 is bonded to the mat surface of the conductor plate 1 ′. At the same time, the heads of the metal bump groups 6, 6,... Are pressed against the mat surface of the conductor plate 1 ′ and heated. By this heating, the solder 4 on the head is melted and the metal bump groups 6, 6,... Are soldered to the mat surface of the conductor plate 1 ′, and a core substrate as shown in FIG.
[0097]
When the conductor plates 1 and 1 'on both sides of the core substrate thus formed are patterned (step 9d), two layers in which wiring layers 1a and 1'a are formed on both sides as shown in FIG. The core material 24 is obtained.
[0098]
Further, in order to form a multilayer board having four or more layers using the core material 24, the conductor plate 1 as shown in FIG. 15 (f) is laminated on both sides of the core material 24 via the prepreg 7. Further, it can be multilayered by pressing.
[0099]
According to the present embodiment, since the metal bump groups 6, 6,... Are directly formed by selectively performing plating on predetermined positions of the conductor plate 1, the trouble of performing subsequent etching processing is omitted. A unique effect is obtained.
[0100]
In addition, since the metal bumps are formed by plating only necessary portions, there is a specific effect that the material is not wasted and a cost advantage can be obtained.
[0101]
Furthermore, since the etching process itself is unnecessary, there is also a specific effect that there is no problem of waste liquid treatment that occurs as a result of etching.
[0102]
(Sixth embodiment)
The sixth embodiment of the present invention will be described below.
[0103]
FIG. 16 is a flowchart illustrating the flow of a manufacturing method of a build-up type printed wiring board according to the present embodiment, and FIG. 17 is a vertical sectional view illustrating the state of each stage of the method.
[0104]
In the present embodiment, a plating process is partially performed on the conductor plate, and the plating process is continued to form a group of metal bumps having a mushroom type cross section.
[0105]
In the manufacturing method according to this embodiment, a thin conductor plate 1 such as a copper foil is prepared as shown in FIG. The masking layer 5 is formed on the rough surface of the conductor plate 1, that is, the mat surface (step 1e). In the present embodiment, a masking layer 5 made of a photosensitive resin of a kind that solubilizes a portion that receives light will be described as an example.
[0106]
Next, a mask pattern 21 is overlaid on the masking layer 5. This mask pattern 21 has perforated circular patterns 22, 22,... At positions where metal bumps are to be formed. Since these circular patterns 22, 22,... Correspond to the diameter of the base portion of the metal bump, the circular patterns 22, 22,... Are formed as through holes having a diameter of about 50 to 60 [mu] m, for example. It exposes in the state where this mask pattern 21 was piled up (step 2d), the part of circular pattern 22, 22, ... is made to react, and it solubilizes.
[0107]
When the mask pattern 21 is removed and developed (step 3d), only the masking layer 5 in the portion exposed to light is solubilized, so only this portion is removed by the development process, as shown in FIG. 15 (d). Are formed with a rectangular cross section, and the surface of the conductor 1 at the bottom of these holes 23 is exposed.
[0108]
Next, in this state, for example, when an electroless plating process is performed to deposit a metal (step 4e), as shown in FIG. 17 (e), the holes 23, 23,. Metal layers 3, 3,... Corresponding to the bases of the metal bumps are formed.
[0109]
If plating is continued in this state (step 5e), the metal layers 3, 3,... Grow as shown in FIG. 17 (f), and metal bumps 6, 6,. Become so.
[0110]
Next, the masking layer 5a is removed (step 6e), and then the solder layer 4 is formed on the heads of the metal bump groups 6, 6,... (Step 7e), and the head as shown in FIG. A metal bump group 6, 6,... Covered with the layer 4 is formed.
[0111]
Next, as shown in FIG. 17 (h), a prepreg 7 is laminated on the heads of these metal bump groups 6, 6,. When pressed under heating (step 9e), as shown in FIG. 18 (a), the metal bump groups 6, 6,... Penetrate through the prepreg 7, and the prepreg 7 is bonded to the mat surface of the conductor plate 1 ′. At the same time, the heads of the metal bump groups 6, 6,... Are pressed against the mat surface of the conductor plate 1 ′ and heated. By this heating, the solder 4 on the head is melted and the metal bump groups 6, 6,... Are soldered to the mat surface of the conductor plate 1 ′, and a core substrate as shown in FIG.
[0112]
When the conductor plates 1 and 1 'on both sides of the core substrate thus formed are patterned (step 10e), two layers in which wiring layers 1a and 1'a are formed on both sides as shown in FIG. The core material 25 is obtained.
[0113]
Furthermore, in order to form a multilayer board having four or more layers using the core material 25, the conductor plate 1 as shown in FIG. 17 (g) is laminated on both sides of the core material 25 via the prepreg 7. Further, it can be multilayered by pressing.
[0114]
According to this embodiment, a plating process is selectively performed on a predetermined position of the conductor plate 1, and the heads of the metal bump groups 6, 6,... Have a mushroom-like cross-sectional shape by continuing this plating process. Therefore, when pressing through the prepreg, it is easy to penetrate the prepreg, and as a result, a specific effect can be obtained that the interlayer connection can be achieved more reliably.
[0115]
(Seventh embodiment)
The seventh embodiment of the present invention will be described below.
[0116]
FIG. 19 is a flowchart illustrating a flow of a manufacturing method of a build-up type printed wiring board according to the present embodiment, and FIGS. 20 and 21 are vertical sectional views illustrating states of the respective steps of the method.
[0117]
In this embodiment, a conductor plate having a mountain-shaped fine protrusion with a sharp point on the surface is used, and a plating process is partially performed on the conductor plate to form a metal bump group having a mountain-shaped cross section.
[0118]
In the manufacturing method according to this embodiment, a conductor plate 1 such as a copper foil is prepared as shown in FIG.
[0119]
A surface roughening treatment is performed on one surface of the conductor plate 1 (step 1f) to form minute ridge-shaped irregularities having sharp points on the surface as shown in FIG. Specific methods of surface roughening treatment include a method of pressing the surface to engrave irregularities, a method of using chemicals, a method of causing hard particles such as sand to collide with the surface at high speed, a grinder or a hammer, etc. A known method such as a mechanical processing method can be used.
[0120]
In this way, the masking layer 5 is formed on the surface of the conductor plate 1A on which the fine peaks and valleys are formed (step 2f).
[0121]
Next, a mask pattern 21 is overlaid on the masking layer 5. This mask pattern 21 has perforated circular patterns 22, 22,... At positions where metal bumps are to be formed. Since these circular patterns 22, 22,... Correspond to the diameter of the metal bumps themselves, for example, the circular patterns 22, 22,. It exposes in the state which this mask pattern 21 was piled up (step 3f), the part of circular pattern 22,22, ... is made to react, and it solubilizes.
[0122]
When the mask pattern 21 is removed and developed (step 4f), only the masking layer 5 in the exposed portion is solubilized, so that only this portion is removed by the development process, as shown in FIG. 20 (e). Are formed with a rectangular cross section, and minute irregularities on the surface of the conductor 1A at the bottom of the holes 23, 23,... Are exposed.
[0123]
Next, in this state, for example, when an electroless plating process is performed to deposit a metal (step 5f), as shown in FIG. 20 (f), the holes 23, 23,. Metal layers 3, 3,... Corresponding to the bases of the metal bumps are formed.
[0124]
At this time, since the metal layers 3, 3,... Are formed along the shape of the surface of the conductor plate 1A, the surfaces of the metal layers 3, 3,. Figure 20 A sharp mountain-shaped unevenness as shown in FIG.
[0125]
When plating is continued in this state (step 6f), the metal layers 3, 3,... Grow as shown in FIG. 20 (g), and the mountain-shaped metal bumps 6, 6,. Will be formed.
[0126]
Next, the masking layer 5a is removed (step 7f), and then the solder layer 4 is formed on the heads of the metal bump groups 6, 6,... (Step 8f), and the head as shown in FIG. A metal bump group 6, 6,... Covered with the layer 4 is formed.
[0127]
Next, as shown in FIG. 20 (i), a prepreg 7 is laminated on the heads of these metal bump groups 6, 6,... And a conductor plate 1 ′ such as a copper foil is further laminated thereon (step 9f). When pressed under heating (step 10f), as shown in FIG. 21A, the metal bump groups 6, 6,... Penetrate through the prepreg 7, and the prepreg 7 is bonded to the mat surface of the conductor plate 1 ′. At the same time, the heads of the metal bump groups 6, 6,... Are pressed against the mat surface of the conductor plate 1 ′ and heated. By this heating, the solder 4 at the head is melted and the metal bump groups 6, 6,... Are soldered to the mat surface of the conductor plate 1 ′, and a core substrate as shown in FIG.
[0128]
When patterning is performed on the conductor plates 1 and 1 'on both sides of the core substrate thus formed (step 11f), two layers in which wiring layers 1a and 1'a are formed on both sides as shown in FIG. The core material 26 is obtained.
[0129]
Further, in order to form a multilayer board having four or more layers using the core material 26, a conductor plate 1A as shown in FIG. 20 (h) is laminated on both surfaces of the core material 26 via the prepreg 7. Further, it can be multilayered by pressing.
[0130]
According to the present embodiment, the surface of the conductor plate 1 is roughened to form fine ridges with sharp peaks and the conductor plate 1A is formed, and a plating process is selectively performed on a predetermined position of the conductor plate 1A. Is formed so that the heads of the metal bump groups 6, 6,... Have a sharp mountain-like cross-sectional shape. Therefore, when pressing through the prepreg, it is easy to penetrate the prepreg, and thus the interlayer connection. A unique effect is achieved that can be achieved more reliably.
[0131]
【The invention's effect】
According to the present invention, since the front end surface of the metal bump group is soldered to the second conductor layer, a printed wiring board having reliable electrical connection between layers and high mechanical strength can be obtained. .
[0132]
By forming the metal bump group on the conductor plate by plating, the bottom surface of the metal bump can be reliably connected to the conductor plate, so that the diameter of the bottom surface of the metal bump can be reduced, thereby improving the degree of integration. Can do.
[0133]
When an etching protective layer is interposed, metal bumps can be formed more reliably.
[0134]
By using a high melting point solder for the connection between the metal bump and the conductor plate, it is possible to prevent interlayer connection during mounting.
[0135]
By soldering both the front end surface and the bottom surface of the metal bump, more reliable electrical connection and mechanical strength can be obtained.
[0136]
By forming the metal bump group and the wiring layer on the bottom side of the bump from one thick conductive plate by etching, the process can be shortened and the electrical resistance can be reduced.
[0137]
By connecting the layers using a conductive paste instead of the solder layer, the process can be simplified.
[0138]
By selectively plating the conductor plate to form the metal bump group, it is possible to provide a method for manufacturing a printed wiring board with low cost and little influence on the environment.
[0139]
Further, by devising the plating method, the cross-sectional shape of the metal bump can be formed from a cylindrical shape to a mushroom shape or a sharp mountain shape, thereby making it easy to form an interlayer connection.
[Brief description of the drawings]
FIG. 1 is a flowchart of a method for manufacturing a printed wiring board according to a first embodiment.
FIG. 2 is a vertical sectional view illustrating each state of the printed wiring board according to the first embodiment.
FIG. 3 is a vertical sectional view illustrating each state of the printed wiring board according to the first embodiment.
FIG. 4 is a vertical sectional view illustrating each state of the printed wiring board according to the first embodiment.
FIG. 5 is a flowchart of a method for manufacturing a printed wiring board according to a second embodiment.
FIG. 6 is a vertical cross-sectional view illustrating states of a printed wiring board according to a second embodiment.
FIG. 7 is a vertical cross-sectional view illustrating states of a printed wiring board according to a second embodiment.
FIG. 8 is a vertical sectional view illustrating each state of a printed wiring board according to a second embodiment.
FIG. 9 is a flowchart of a method for manufacturing a printed wiring board according to a third embodiment.
FIG. 10 is a vertical cross-sectional view illustrating states of a printed wiring board according to a third embodiment.
FIG. 11 is a vertical sectional view illustrating each state of a printed wiring board according to a third embodiment.
FIG. 12 is a flowchart of a method for manufacturing a printed wiring board according to a fourth embodiment.
FIG. 13 is a vertical sectional view illustrating each state of a printed wiring board according to a fourth embodiment.
FIG. 14 is a flowchart of a method for manufacturing a printed wiring board according to a fifth embodiment.
FIG. 15 is a vertical sectional view illustrating states of a printed wiring board according to a fifth embodiment.
FIG. 16 is a flowchart of a method for manufacturing a printed wiring board according to a sixth embodiment.
FIG. 17 is a vertical sectional view illustrating each state of a printed wiring board according to a sixth embodiment.
FIG. 18 is a vertical sectional view illustrating each state of a printed wiring board according to a sixth embodiment.
FIG. 19 is a flowchart of a method for manufacturing a printed wiring board according to a seventh embodiment.
FIG. 20 is a vertical sectional view illustrating states of a printed wiring board according to a seventh embodiment.
FIG. 21 is a vertical sectional view illustrating each state of a printed wiring board according to a seventh embodiment.
FIG. 22 is a vertical cross-sectional view illustrating a manufacturing procedure of a conventional multilayer board type printed wiring board.
[Explanation of symbols]
7: Prepreg (insulating layer),
1 ... Conductor plate (first conductor layer),
12 ... Conductor plate (second conductor layer),
6 ... Metal bump,
4 ... Solder layer,
2 ... Etching protective layer,
18 ... solder layer (second solder layer),
14: Conductive paste.

Claims (4)

Plating a copper layer to be a metal bump on the rough surface of the first conductor plate with or without an etching protective layer;
Forming a solder layer on a portion corresponding to the upper surface of the metal bump on the copper layer;
Etching the copper layer using the solder layer as a masking layer to form a substantially conical metal bump group;
Forming a laminate by laminating an insulating substrate and a second conductor plate on the tip side of the metal bump group ; and
Pressing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate; and the first conductor plate and Patterning the second conductor plate;
A method of manufacturing a printed wiring board, comprising: Forming a solder layer having a shape corresponding to the upper surface of the metal bump at a position where the metal bump is to be formed on the thick plate made of conductive metal, and
Etching the conductor metal using the solder layer as a masking layer to form a substantially conical metal bump group;
Forming a laminate by laminating an insulating substrate and a second conductor plate on the front end side of the metal bump group; and
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
A method of manufacturing a printed wiring board, comprising: Forming a masking layer in which a through hole is formed in a portion for forming the bottom surface of the metal bump on the rough surface of the first conductor plate;
Forming a metal bump group having a mushroom-shaped cross-sectional shape by performing copper plating on the rough surface of the first conductor plate through the masking layer;
Removing the masking layer, forming a laminate by laminating an insulating substrate and a second conductor plate on the tip side of the metal bump group,
Pressurizing the laminated body under heating to penetrate the metal bump group through the insulating substrate and simultaneously soldering the upper surface of the metal bump group to the second conductor plate;
Patterning the first conductor plate and the second conductor plate;
A method of manufacturing a printed wiring board, comprising: A method for manufacturing a printed wiring board according to Izu Re one of claims 1 to 3, wherein the solder layer is a printed wiring board manufacturing method characterized in that it is composed of a high melting point solder.

Images