JPH11204943A - Electronic circuit board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ensure reliable connection of conductors between upper and lower sheets in a multilayer electric circuit board which is produced by stacking insulator sheets on which conductor layers are formed and bonding the upper and lower layers. SOLUTION: An electric circuit board has a plurality of stacked insulator films 11, conductor patterns 15, 13 provided on the insulator films 11, and an adhesive layer 12 for bonding the insulator films 11. An alloy layer 27 is formed at the upper and lower junctions of the conductor pattern 15 in a step of heating and pressing the insulator films.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, wherein a conductive wiring pattern is formed on an organic resin sheet.
The present invention relates to an electronic circuit board manufactured by laminating this in multiple layers.

[0002]

2. Description of the Related Art In order to keep the thermal expansion coefficient of an insulating layer approximately equal to that of copper wiring, a conventionally used printed wiring board uses a glass cloth hardened with an organic resin such as epoxy as an insulating layer. I was However, when a glass cloth is used, the thickness of the insulating layer needs to be 0.1 mm or more. On the other hand, recently, a demand for a high-density wiring board is increasing, and a thin film wiring having a wiring width of 0.1 mm or less is being put to practical use. As described above, when the wiring width is reduced, it is necessary to reduce the thickness of the insulating layer in order to keep the impedance of the wiring constant, and a printed wiring board using a thick glass cloth has a limit in increasing the density. there were. Therefore, thin film wiring suitable for high density has begun to be used. However, since thin film wiring is formed by sequentially laminating a wiring layer and an insulating layer one by one, the time required for manufacturing becomes longer and the yield is poor. was there.

Therefore, a method of manufacturing an electronic circuit board by forming a wiring pattern on an organic resin sheet that does not contain a core material such as a glass cloth and stacking a large number of the wiring patterns is disclosed in Japanese Patent Laid-Open No. 4-16.
No. 2,589. In this publication, FIG.
Two manufacturing methods, the method shown in FIG. 6 and the method shown in FIGS. 7 and 8, are disclosed.

In the method shown in FIGS. 5 and 6, first, a wiring portion 108 having a desired pattern, a connection pad 106 for connecting upper and lower layers, and a connection pad 106 are formed on a plurality of polyimide sheets 100, respectively. Via part 1 for connection
07, the power supply sheet 101, the X wiring sheet 102, the Y wiring sheet 103, and the ground sheet 104
Is created respectively. Then, each of the sheets 102-1
An uncured polyimide is thinly applied on the surface of the substrate 04 to form an adhesive layer 205. Wiring section 108, connection pad 10
6 and the via portion 107 are formed of a conductive material such as gold. Then, when the sheets 101 to 104 are overlapped, aligned so that the via portion 107 and the connection pad 106 are overlapped, press-bonded and heated, the conductor material forming the via portion 107 and the conductor material forming the connection pad 106 Are metal-joined by thermal diffusion, and electrical continuity is obtained. At the same time, the uncured polyimide, which is the adhesive layer 205, is solidified in the other parts, and the upper and lower sheets can be adhered to each other, so that a wiring board in which wiring sheets and power supply sheets are stacked in multiple layers can be obtained. It is.

On the other hand, in the method shown in FIGS. 7 and 8, desired wiring patterns 309 and connection pads 306 are formed on the front and back surfaces of the polyimide sheets 302 and 303. In addition, the polyimide sheets 302 and 303 include the sheets 302 and 303, respectively.
A via portion 301 for connecting the connection pad 306 on the front surface and the connection pad 306 on the back surface is provided, and a projecting via portion 307 for connecting the connection pad of the sheet 302 to the connection pad of the sheet 303 is provided. And
A via insertion hole 308 according to the shape of the projecting via portion 307
An uncured adhesive sheet 305 provided with is provided, a projecting via portion 307 is inserted into the via insertion hole 308 of the adhesive sheet 305, the sheets 302 and 303 are overlapped, and heating and pressure bonding are performed. Thereby, the adhesive sheet 30
5, the polyimide sheets 302 and 303 are adhered, and the projecting via portions 307 and the connection pads 306 are joined. According to the two examples described above, the polyimide and the wiring are formed one by one and the multilayer thin film wiring is formed. Compared with the method of forming a substrate, (1) batch-stacking is possible, so that the manufacturing period is shortened. (2) Non-defective sheets can be stacked after inspecting the wiring pattern for each layer. (3) Since heating and pressure bonding can be performed at once, there are advantages such as the ability to form a multilayer wiring without applying a large number of thermal damages to a wiring layer.

[0006]

However, in the method shown in FIGS. 5 and 6, since the via portion 107 and the connection pad are heated and press-bonded with the adhesive layer 205 interposed therebetween, they are joined.
It is difficult to completely remove the uncured polyimide constituting the adhesive layer 205 from the joining portion, and there is a problem that conduction failure easily occurs at the joining portion. For example, the adhesive layer 205
When a polyamic acid, which is a polyimide precursor, is used as the material of the polyamic acid, the polyamic acid undergoes imidization at a temperature of 100 to 200 ° C., and the viscosity sharply increases. Even in this case, polyimide is generated at the joint, and the solidified polyimide remains at the joint.

In the method shown in FIGS. 7 and 8,
When the wiring pattern is increased in density and scale, the shapes of the projecting via portion 307 and the via insertion opening 308 are both miniaturized, so that it becomes difficult to insert the projecting via portion 307 into the via insertion opening 308. . For example, the diameter of the projecting via portion 307 is 30 μm, the via pitch is 300 μm, the sheet 302,
Assuming that the sheet size of 303 and 305 is 200 mm square, about 400,000 projecting via portions 307 must be inserted into the via insertion holes 308 and stacked. The clearance of the size of the via insertion hole 308 into which insertion is possible is determined by the dimensional stability of the adhesive sheet 305.
Considering the difference in the coefficient of thermal expansion and the difference in the moisture absorption property between the adhesive sheet 03 and the adhesive sheet 305, it is necessary to expect a dimensional variation of about ± 0.2%. From this value, a clearance of ± 200 μm or more is required to estimate the clearance in which all of the projecting via portions 307 can be inserted into the via insertion holes 308 of the adhesive sheet 305 over the entire surface of the 200 mm square sheet. For this purpose, it is necessary to make a 430 μm hole in the adhesive sheet 305,
It becomes impossible to provide the via insertion holes 308 at a pitch of 0 μm.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer electric circuit board manufactured by laminating insulator sheets on which conductor layers are formed and bonding the upper and lower layers, thereby reliably connecting the conductors between the upper and lower sheets. It is an object of the present invention to provide an electronic circuit board and a method of manufacturing the same.

[0009]

In order to achieve the above object, according to the present invention, the following electric circuit board is provided.

That is, it has a plurality of laminated insulator films, a conductor pattern provided on the insulator film, and an adhesive layer for bonding between the laminated insulator films. Including a portion penetrating the insulator film, a conductor pattern of at least one insulator film of the plurality of insulator films is connected to at least one of conductor patterns of an insulator film above and below the conductor pattern. The electric circuit board is characterized in that an alloy layer is formed on the connection part.

Further, in the present invention, in order to achieve the above object, the following manufacturing method is provided.

That is, a first step of forming a conductor pattern on a plurality of insulator films and a connecting portion for interconnecting the conductor patterns when the plurality of insulator films are laminated; A second step of forming at least one of a first metal layer and a second metal layer in the portion, and laminating the plurality of insulator films;
And a third step of forming an alloy layer of the first metal and the second metal between the connection portions by heating and pressing. .

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described.

In the first embodiment, an electronic circuit board is manufactured by laminating a plurality of insulating sheets each having a conductor layer formed thereon. At that time, the conductor layers are securely joined by forming an alloy by crimping at the joints between the conductor layers. Specifically, as shown in FIG. 2 (h), the electronic circuit board of the present embodiment has two polyimide films 15 each having a wiring pattern formed by a copper foil 13 and a through hole 15.
Are laminated to form an electronic circuit board. An adhesive layer 12 is disposed on the upper surfaces of the two polyimide films 15, respectively. The adhesive layer 12 located between the two polyimide films 15 is composed of two polyimide films 1
5 is adhered. The upper and lower through holes 15 are connected by a silver / tin alloy layer 27 which is an alloy layer of silver and tin.

Hereinafter, a method of manufacturing the electronic circuit board according to the first embodiment will be described.

First, a sheet in which a polyimide film 11 as an insulating layer and an adhesive layer 12 are sequentially laminated on a copper foil 13 is prepared (FIG. 1A). In the present embodiment, the thickness of the polyimide film 11 is 40 μm,
The thickness of the copper foil 13 is 18 μm, and the thickness of the adhesive layer 12 is
The thing of 35 micrometers was used. Further, as the adhesive layer 12, a layer made of an adhesive having a polyimide skeleton or an adhesive having an epoxy skeleton can be used. In the present embodiment, the adhesive layer 12 made of an adhesive having a polyimide skeleton is used.

The sheet is irradiated with a carbon dioxide gas laser in a galvano-mirror system, so that the polyimide film 11 and the adhesive layer 12 are oxidized and decomposed, and then a desmear liquid mainly composed of sodium permanganate is used. By removing the residue, a through hole 14 was provided (FIG. 1B). As another method of desmearing, dry etching can be used. As a dry etching method, a parallel plate type isotropic dry etching apparatus was used, and a favorable through hole 14 was obtained under the conditions of an output of 800 W and a time of 7 minutes and 30 seconds using oxygen gas at a pressure of 0.5 Torr as a reaction gas. Have been.

Next, the through-holes 14 were filled with copper using electrolytic copper plating to form through-holes 15 filled with conductors (FIG. 1 (c)). Specifically, the copper foil 13 on the back side of the polyimide film 11 was used as a cathode, and phosphor-containing copper was placed in opposition to the cathode, and electrolytic copper plating was performed using an acidic copper sulfate solution to fill copper. At that time, a protective film was stuck on the surface of the copper foil 13 so that copper was not deposited on the surface of the copper foil 13. Further, the shape of the apparatus may be devised so that the plating solution does not come into contact with the surface side of the copper foil 13 so that copper does not precipitate on the surface of the copper foil 13. In addition, not only the electrolytic copper plating but also the electroless copper plating may be used to fill the through holes 14 with copper.

Next, a gold film 16 was formed on the through hole 15 as an electrode for bonding the through hole by using electrogold plating (FIG. 1D). Electrogold plating uses a cyanide bath mainly composed of gold cyanide, and as a film for power supply,
Copper foil 13 and through hole 15 were used. The thickness of the gold film 16 was 0.5 μm. Here, too, it is necessary to prevent gold from depositing on the surface of the copper foil 13;
In the step (c), the protective film attached to the surface of the copper foil 13 was not peeled off, and electrogold plating was performed as it was. As described above, a method may be used in which the apparatus is devised so that the plating solution does not enter the copper foil side. Also, electroless gold plating can be used instead of electrogold plating.

Next, a tin film 21 was formed on the surface of the copper foil 13 as an electrode for through-hole bonding by using electrotin plating (FIG. 2E). First, a protective film 22 was attached on the adhesive layer 12 and the gold film 16, and a resist film 23 was applied on the surface of the copper foil (13). The resist film 23 was exposed and developed to form a resist pattern exposing the copper foil 13 only at the position of the through hole 15. Then, electrotin plating was performed using an acid bath mainly composed of stannous sulfate and using a copper foil 13 as a power supply film. Thus, a tin film 21 having a thickness of 1.5 μm was formed. Note that the tin film 21 can also be formed by using electroless tin plating instead of electric tin plating. In the present embodiment, the gold film 1
Although the step of forming the tin film 21 first is followed by the step of forming the tin film 21, the reverse order, ie, the step of forming the tin film 21 first and then forming the gold film 16, is also possible.

Next, the resist film 23 shown in FIG. 2E is once peeled off, and a resist film 24 is formed on the surface of the copper foil 13 again. Then, by exposing and developing the resist film 24, a resist pattern 25 for protecting the tin film 21;
A resist pattern 26 having the shape of the wiring pattern 103 to be formed was formed (FIG. 2F).

The resist patterns 25, 26
Is used as an etching mask to etch the copper foil 13,
The copper foil 13 was processed into the shape of the tin film 21 and the shape of the wiring pattern 28. Then, the resist patterns 25 and 26
And the protective film 22 was peeled off (FIG. 2 (g)).

Two sheets having the shape shown in FIG.
These were overlapped and positioned so that the tin film 21 of the upper sheet 201 and the gold film 21 of the lower sheet 202 just overlapped, and then pressed while heating the entire sheet. The heating temperature was set to 250 degrees at which the tin film 21 was melted, the press pressure was set to 20 kg per square centimeter, and the heating and pressing times were set to 10 to 30 minutes. This allows
The adhesive layer 12 of the lower sheet 202 is solidified and adheres to the polyimide film 11 of the upper sheet 201. Also,
In the portion of the through hole 15, the tin film 21 of the upper sheet 201 is melted and alloyed with the gold of the gold film 16 of the lower sheet 202 as shown in FIG. / Tin alloy layer 27 is formed. As a result, the upper and lower through holes 15 are securely connected. In addition, this money /
A gold / copper alloy layer 1101 is formed between the tin alloy layer 27 and the copper foil 13 of the upper sheet 201, and the lower sheet 20
2 between the copper of the through hole 15 and the copper / tin alloy layer 1
102 is formed. These connect the gold / tin alloy layer 27 and the upper and lower through-holes 15 to strengthen the connection between the upper and lower through-holes 15.

As described above, in the first embodiment, when the upper and lower sheets 201 and 202 are bonded, the upper and lower polyimide films 11 are bonded by the adhesive layer 11 and
Since each of the sheets 201 and 202 is configured such that the gold / tin alloy layer 27 is formed between the upper and lower through holes 15, an electric circuit that ensures electrical connection between the upper and lower sheets 201 and 202 is provided. A substrate can be manufactured. Further, the electric circuit board according to the present embodiment has an adhesive layer 12 in advance.
Through holes 1 in the polyimide film 11 on which
5, the adhesive layer 12 does not exist on the joint surfaces of the upper and lower through holes 15. Therefore, the upper and lower sheets 20
In the step of heating and breathing 1, 202, there is no possibility that the adhesive layer 12 is solidified between the upper and lower through holes 15 and hinders joining. Moreover, in the manufacturing method of the present embodiment, the polyimide film 11
And the bonding of the through hole 15 can be performed simultaneously, so that the manufacturing process is simple.

In the first embodiment, a two-layer electric circuit board in which two sheets are stacked has been described. However, the present embodiment is not limited to a two-layer electric circuit board. Absent. When manufacturing an electric circuit board having three or more layers, in the final heating and pressing step, a desired number of sheets are stacked and heated and pressed, so that a multilayer electric circuit board is formed in the same step as in the case of two layers. A circuit board can be manufactured.

Next, a second embodiment of the present invention will be described. The second embodiment is intended to further simplify the manufacturing steps of the first embodiment.

The steps shown in FIGS. 1A to 1D are the same as those in the first embodiment. Then, after the step of FIG. 1D, a protective film 22 is applied on the adhesive layer 12 and the gold film 16 as shown in FIG. 3E, and a resist film 23 is applied on the surface of the copper foil (13). did. The resist film 23 was exposed and developed to form a resist pattern having a shape of the through hole 15 and a desired wiring pattern 28. And
Using this resist pattern as an etching mask, copper foil 1
By etching 3, the copper foil 13 was left in the shape of the through hole 15 and the shape of the wiring pattern 28, and the remaining copper foil 13 was removed.

On the copper foil 13 thus processed, a tin film 21 having a thickness of 1.5 μm was formed by electroless tin plating as shown in FIG.

Thereafter, when the protective film 22 is peeled off,
The sheet has the through holes 15 and the wiring patterns formed thereon. Two sheets are prepared, and they are stacked to form the tin film 21 of the upper sheet 501 and the gold film 2 of the lower sheet 502.
After the sheets were aligned so that they just overlap with each other, the entire sheet was pressed while heating. The heating temperature is the tin film 21
Was melted at a temperature of 250 ° C., the press pressure was 20 kg per square centimeter, and the heating and pressing time was 10 to 30 minutes. As a result, the lower sheet 50
The second adhesive layer 12 is solidified and adheres to the polyimide film 11 of the upper sheet 501. In addition, through hole 1
In part 5, the tin film 21 of the upper sheet 501 is melted,
The gold of the gold film 16 of the lower sheet 502 is alloyed to form the gold / tin alloy layer 27 at the interface between the upper and lower through holes 15.
As a result, the upper and lower through holes 15 are securely connected. The gold / tin alloy layer 27 and the upper sheet 501
9 in the same manner as in the first embodiment.
A copper / tin alloy layer 1102 is formed between the gold / copper alloy layer 1101 and the copper of the through hole 15 of the lower sheet 502 as shown in FIG. I have.

In the manufacturing process of the electric circuit board according to the second embodiment, since the copper foil 13 is patterned and then tin plating is performed, the resist film 23 has to be formed only once, which is advantageous in that the process is simple. There is. On the other hand, since the tin film 21 is also formed on the copper foil 13 constituting the wiring pattern, the resistance value of the wiring pattern is higher than that of the first embodiment. Therefore, the manufacturing method of the second embodiment is
It is suitable for efficiently manufacturing an electric circuit board for an application in which an increase in the resistance value of a wiring pattern is allowed.

In the second embodiment, FIG.
3D, a step of forming the gold film 16, and FIG.
(F) It is also possible to change the order of the steps of forming the tin film 21.

Next, a third embodiment of the present invention will be described. The third embodiment is different from the first embodiment in another manufacturing method.
An electric circuit board having the same configuration as that of the embodiment is manufactured.

The steps shown in FIGS. 1A to 1C are the same as those in the first embodiment. Then, after FIG. 1C, FIG.
As shown in (d), a resist film 323 is formed on each of the adhesive layer 12 and the copper foil 13, and the resist film 323 is patterned to form the copper foil 13 on the upper surface of the through hole 15 and the bottom surface of the through hole 15. Only make sure that it is exposed.

Then, the upper surface of the exposed through hole 15 and the copper foil 13 are formed on the copper foil 13 by electrogold plating, as shown in FIG.
The gold film 16 is formed as shown in FIG. Electro gold plating
A cyan bath mainly composed of gold cyanide was used, and a copper foil 13 was used as a power supply film. The thickness of the gold film 16 is 0.5
Microns. Here, electroplating was used,
It was also possible to use electroless gold plating. afterwards,
The resist film 323 is peeled off, and the copper foil 13 is processed into the shape of the wiring pattern 28 by a process similar to that shown in FIG.

On the other hand, a tin film 21 is formed on another polyimide film 11 having undergone the steps up to FIG. After that, the resist film 323 is peeled off,
The copper foil 13 is processed into the shape of the wiring pattern 28 by a process similar to that shown in FIG. Thereby, the through hole 15
The sheet 402 including the tin film 21 is formed on the upper surface of the substrate and the copper foil 13 at the position of the bottom surface of the through hole 15.
For the electrotin plating, an acid bath mainly composed of stannous sulfate was used, and a copper foil 13 was used as a power supply film. Tin film 21
Was 1.5 μm in thickness. This sheet 402
Becomes a lower layer sheet at the time of lamination.

The sheets 401 and 402 manufactured in the steps shown in FIGS. 4F and 4F 'were laminated and pressed while heating, thereby completing an electric circuit board. The heating and pressing conditions are the same as in the first embodiment. In this heating / pressing step, similarly to the first embodiment, the polyimide film 11 is adhered to the adhesive layer 12 by solidification, and an alloy layer such as the gold / tin alloy layer 27 is formed.

In the manufacturing method of the third embodiment, 3
When an electric circuit board having more than two layers is manufactured, FIG.
The sheet 401 shown in FIG. 4 (f) 'and the sheet 401 shown in FIG.

In the manufacturing process of the third embodiment, the gold film 1
By dividing the sheet into two types, a sheet 401 on which only 6 is formed and a sheet 402 on which only the tin film 21 is formed, the manufacturing process of each sheet can be simplified.

Further, as still another embodiment of the present invention, a tin film 21 is further formed on the gold film 16 after the step of FIG. A sheet in which the gold film 16 and the tin film 21 are laminated is formed, and this is alternately laminated with the sheet having neither the gold film 16 nor the tin film 21 in FIG. And a manufacturing method of pressing. Even with this method,
Since the gold / tin alloy layer 27, the gold / copper alloy layer 1101, and the copper / tin alloy layer 1102 are formed at the interface of the through holes 15 of the upper and lower sheets as in FIG. The through hole 15 can be joined in the same manner as in the embodiment.

In the first to third embodiments, the tin of the tin film 21 is completely alloyed by heating and pressing to form a gold / tin alloy 27 and a copper / tin alloy 1102. It is configured not to remain. This is because, when the tin film 21 that is not alloyed remains and the press is removed at the temperature of 250 ° C. during the hot pressing, the tin is molten, so that the gold / tin alloy 27 and the lower through hole 15 This is because film peeling occurs between the two. Therefore, it is desirable to design the thickness of the tin film 21 and the heating press time so that all the tin is alloyed. When designing these so that the tin film 21 remains, it is necessary to lower the temperature below the melting point of tin before removing the press.

In the first to third embodiments, the gold film 16 and the tin film 21 bonded to each other are configured to protrude from the adhesive layer 12 and the polyimide film 11. Protruding in this manner has the advantage that when the sheets 201 and the like are stacked, they are most likely to come into contact with each other and are easily joined. Therefore, the gold film 16 may be formed on the through-hole 15 so that the through-hole 15 is raised on the adhesive layer 12 side. However, in the present embodiment, since the bonding is performed by pressing, the bonding can be sufficiently performed even if the gold film 16 and the tin film 21 do not protrude. Therefore, the gold film 16 and the tin film 21 do not necessarily protrude. Good.

In the first to third embodiments, the gold film 16 and the tin film 21 are formed so as to have the same shape as the upper surface and the bottom surface of the through hole 15, but either one is formed larger. By doing so, alignment at the time of joining can be facilitated.

In each of the above-described embodiments, the gold / tin alloy layer 27 is formed at the joint between the upper and lower through holes 15 of the multilayer electric circuit board. Other alloy layers can be formed. An alloy layer that can be used in this embodiment is an alloy that can be formed by heating two types of metal layers. These metal layers are not limited to those composed of one kind of element, and may be layers composed of two or more elements, for example, metal layers of alloys. Then, an alloy, such as a gold / tin alloy, whose melting point after forming the alloy layer is higher than the lower melting point of the melting points of the respective metal layers before forming the alloy is selected. It is desirable to do. This is because, as in the embodiment described above, since the multilayer sheet is bonded and joined by heating and pressing, if the melting point after forming the alloy is lower than the melting point before forming the alloy, the pressing is performed after the joining. This is because, at the time of removal, the alloy layer portion is still in a molten state and the bonding is released. In such a case, there is no problem if the press is removed after cooling after the press, but it is not preferable in terms of production efficiency. Therefore, it is desirable to select a combination of metal layers that increases the melting point of the alloy. For example,
One of the metal layers is made of a metal having a high melting point, Au, Ag, Pt,
The metal layer may be any one of In or two or more, and the other metal layer may be any one of Sn, Pb, Bi, and Zn or a metal layer of two or more. For example, one is an Sn layer and the other is an Au layer,
The structure may be such that a Sn / Au alloy layer is formed at the joint. Similarly, joining the Pt layer and the Sn layer,
A structure for forming a Pt / Sn alloy layer, a structure for joining an Au layer and a Sn layer to form an Au / Sn alloy layer, and a structure for joining an In layer and a Sn layer to form an In / Sn alloy layer It can be configured. Alternatively, it is also possible to select a metal having a low melting point, join the Sn layer and the Pb layer, and form a Sn / Pb alloy layer. These metal layers are
Since the metal layer can be formed by plating except for i, the metal layer can be formed efficiently. For example, Au layer, Ag layer, Sn
The layer, the Pb layer, and the Zn layer can be formed by electroless plating or electroplating. Further, the In layer and the Pt layer can be formed by electroplating. In addition, it is of course possible to form the metal layer by a vacuum deposition method or a sputtering method other than plating.

In each of the above-described embodiments, a sheet in which the adhesive layer 12 is formed in advance on the polyimide film 11 is used, and the through holes 15 are formed in the polyimide film 11 and the adhesive layer 12. Was. Therefore, the adhesive layer 12 is formed at the joint between the upper and lower through holes 15.
There is an effect that there is no possibility that the adhesive layer cured at the time of the heat press does not hinder the joining without intervening. However, the present invention is not limited to a process using a sheet on which an adhesive layer is formed in advance. For example, using a polyimide film 11 on which the adhesive layer 12 is not formed, it is possible to adopt a method in which an adhesive is applied before heating and pressing steps, and then hot pressing is performed. In the case of this method, an adhesive layer is interposed between the gold film 16 and the tin film 21 at the joint of the through hole 15, but the gold and tin are pushed away by a hot press to form an alloy. Since a large force is required to make the wire, unlike the conventional method of crimping a metal, electrical connection can be made even if an adhesive layer is present.

The electric circuit board according to the present embodiment has a thin insulating layer (40 μm polyimide film 11).
And a 35 μm adhesive layer), so that a fine through hole 15 of about 100 μm can be easily formed. This has a through-hole diameter of less than half that of the conventional printed circuit board, which is advantageous for realizing a high-density wiring board. Even when a wiring pattern having a wiring width as small as about 30 μm is formed, since the insulating layer is thin, impedance matching of about 50Ω with a power supply layer formed in an adjacent layer can be performed. Excellent characteristics can be obtained. In addition, compared to a conventional method of laminating thin films one after another, the same number of substrates can be manufactured in a short manufacturing period,
A manufacturing method excellent in forming a multilayer substrate can be provided.

[0046]

As described above, according to the present invention,
An electronic circuit board capable of reliably connecting conductors between upper and lower sheets in a multilayer electric circuit board manufactured by laminating insulator sheets each having a conductor layer formed thereon and bonding the upper and lower layers, and manufacturing the same. It is possible to provide a method.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views showing steps of manufacturing an electric circuit board according to a first embodiment of the present invention.

FIGS. 2 (e) to 2 (h) are cross-sectional views showing steps of manufacturing the electric circuit board according to the first embodiment of the present invention.

FIGS. 3 (e) to 3 (g) are cross-sectional views showing steps of manufacturing an electric circuit board according to a second embodiment of the present invention.

FIGS. 4D to 4G are cross-sectional views illustrating steps of manufacturing an electric circuit board according to a third embodiment of the present invention.

FIG. 5 is an explanatory view showing a conventional method for manufacturing a multilayer wiring board.

FIG. 6 is a cross-sectional view illustrating a method for manufacturing a conventional multilayer wiring board.

FIG. 7 is a sectional view showing another method for manufacturing a conventional multilayer wiring board.

FIG. 8 is a sectional view of the multilayer wiring board manufactured by the method of FIG. 7;

FIG. 9 is a partial cross-sectional view of the electric circuit board of FIG. 2 (h).

[Explanation of symbols]

11: polyimide film, 12: adhesive layer, 13: copper foil, 14: through hole not filled with conductor, 15
... Through holes filled with conductors, 16 ... Gold film, 21 ...
Tin film, 22: protective film, 23, 323: resist film, 24: resist film, 28: wiring pattern, 27: gold / tin alloy layer, 100: polyimide sheet, 101: power supply sheet, 102: X wiring sheet, 103 ... Y wiring sheet, 104 ... ground sheet, 106 ... connection pad, 1
07 ... via part, 108 ... wiring part, 201, 202 ... sheet, 205 ... adhesive layer, 302, 303 ... polyimide sheet
305: adhesive sheet, 307: projecting via portion, 30
8: Via insertion hole, 309: Wiring pattern, 401, 40
2: Sheet, 501, 502: Sheet, 1101: Gold /
Copper alloy layer, 1102... Copper / tin alloy layer.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kyoko Amemiya 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi, Ltd. Production Technology Research Laboratory (72) Inventor Mamoru Mita 2-1-2, Marunouchi, Chiyoda-ku, Tokyo No.Hitachi Electric Wire Co., Ltd. Standing wire company

Claims (11)

[Claims] 1. An insulating film comprising: a plurality of laminated insulator films; a conductor pattern provided on the insulator film; and an adhesive layer for bonding the laminated insulator films to each other. Including a portion penetrating the insulator film, the conductor pattern of at least one of the plurality of insulator films is connected to at least one of the conductor patterns of the upper and lower insulator films than the conductor pattern. An electric circuit board, wherein an alloy layer is formed on the connection part. 2. The electric circuit board according to claim 1, wherein
An electric circuit board, wherein the melting point of the alloy constituting the alloy layer is higher than the melting point of the lowest melting point metal among the metals contained in the alloy layer. 3. The electric circuit board according to claim 1, wherein
The alloy layer is an alloy of a first metal and a second metal, the conductor pattern is made of a third metal, and the upper conductor pattern and the alloy layer connected by the connection portion An alloy layer of the first metal and the third metal is formed between the second metal and the third metal, between the lower conductor pattern and the alloy layer. An electric circuit board, wherein a layer of an alloy with a metal is formed. 4. The electric circuit board according to claim 1, wherein
The alloy forming the alloy layer is an alloy of Sn and Au, P
An electric circuit board, which is any one of an alloy of t and Sn, an alloy of Au and Sn, an alloy of Sn and Pb, and an alloy of In and Sn. 5. The electric circuit board according to claim 3, wherein
The first metal is any one of Au, Ag, Pt, and In, and the second metal is Sn, Pb, Bi,
An electric circuit board, which is any one of Zn. 6. A conductor pattern on a plurality of insulator films,
A first step of forming a connection portion for connecting the conductor patterns to each other when the plurality of insulator films are laminated; and forming a first metal layer and a second metal layer on the connection portion. A second step of forming at least one of the layers, and laminating the plurality of insulator films, heating and pressing, thereby forming the first metal and the second metal between the connection portions. And a third step of forming an alloy layer. 7. The method for manufacturing an electric circuit board according to claim 6, wherein in the second step, one of the first metal layer and the second metal layer is laminated. Sometimes formed on the connection portion of the insulator film that is on the upper layer side,
A method for manufacturing an electric circuit board, comprising: forming another metal layer on the connection portion of a lower insulating film. 8. The method of manufacturing an electric circuit board according to claim 6, wherein, in the second step, an upper surface of the insulator film, which becomes an odd-numbered layer when laminated, among the plurality of insulator films. And forming the first metal layer on the connection portion on the lower surface, and forming the second metal layer on the connection portion on the upper surface and the lower surface of the insulating film to be an even-numbered layer. A method for manufacturing an electric circuit board. 9. The method of manufacturing an electric circuit board according to claim 6, wherein, in the third step, the heating temperature is set to a temperature of a metal having a lower melting point of the first and second metals. A method for producing an electric circuit board, wherein the temperature is higher than the melting point. 10. The method of manufacturing an electric circuit board according to claim 9, wherein a layer of a metal having a lower melting point among the first and second metals formed in the second step is formed of a metal. A method for manufacturing an electric circuit board, wherein all of the metal layers are formed to have an alloy thickness in a third step. 11. The method for manufacturing an electric circuit board according to claim 6, wherein said first metal is Au, Ag, Pt, I
n, wherein the second metal is Sn,
An electric circuit board, which is any one of Pb, Bi, and Zn.