WO2018079198A1 - Resin circuit board - Google Patents
Resin circuit board Download PDFInfo
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- WO2018079198A1 WO2018079198A1 PCT/JP2017/035779 JP2017035779W WO2018079198A1 WO 2018079198 A1 WO2018079198 A1 WO 2018079198A1 JP 2017035779 W JP2017035779 W JP 2017035779W WO 2018079198 A1 WO2018079198 A1 WO 2018079198A1
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- metal
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- circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
Definitions
- the present invention relates to a resin circuit board.
- a resin circuit board having a structure in which a conductor layer is provided on a main surface of a resin layer having a via hole and a via conductor filled in the via hole is connected to the conductor layer is known. Yes.
- Patent Document 1 discloses a step of preparing a thermoplastic resin sheet, and an in-plane conductor pattern (conductor layer) mainly composed of copper in the thermoplastic resin sheet. And the step of providing an interlayer conductor pattern (via conductor) using a conductive paste containing bismuth as a main component, and heat-treating and pressing the thermoplastic resin sheet to melt the conductive paste. And a step of forming a solid solution layer of copper and bismuth between the interlayer conductor pattern formed by melting and integrating the conductive paste and the in-plane conductor pattern. .
- the via conductor When a low-melting-point metal is used for the via conductor as in the method described in Patent Document 1, the via conductor is remelted and becomes a liquid phase when the resin circuit board is reflowed, and the volume of the via conductor expands. As a result, the connection reliability between the via conductor and the conductor layer may be reduced.
- the present invention has been made to solve the above-described problems, and an object thereof is to provide a resin circuit board having excellent connection reliability between a via conductor and a conductor layer.
- a resin circuit board includes a resin layer having a via hole, a via conductor provided in the via hole, and a first conductor provided on one main surface of the resin layer and connected to the via conductor. And a via layer, wherein the via conductor includes a first metal portion in contact with the first conductor layer, and a second metal portion, and the first metal portion includes the resin layer. It includes a first metal having a melting point lower than the heat resistance temperature of the layer, and the second metal portion includes a second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer.
- the second metal in addition to the first metal portion including the first metal having a melting point lower than the heat resistance temperature of the resin layer, the second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer. Since the second metal part containing the metal is contained in the via conductor, the volume of the via conductor remelted at the time of reflow can be reduced. Therefore, it is possible to suppress a decrease in connection reliability between the via conductor and the conductor layer.
- the ratio of the second metal portion in the via conductor is preferably 30 vol% or more.
- the melting point of the first metal is preferably less than 500 ° C.
- the first metal is preferably Sn.
- an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
- the connection reliability is higher than when the first metal part and the first conductor layer are physically bonded. Can be improved.
- the melting point of the alloy phase is higher than the melting point of the first metal, even if the resin circuit board is reheated, the decrease in connection reliability due to remelting of the alloy phase is suppressed. Can do.
- the melting point of the second metal is preferably 500 ° C. or higher.
- the second metal is preferably Cu.
- the electric resistance is lowered.
- the resin circuit board according to an aspect of the present invention further includes a second conductor layer provided on the other main surface of the resin layer and connected to the via conductor, and the second metal portion is formed on the second conductor layer. It is preferable to contact.
- the second conductor layer is preferably made of the same metal as the second metal included in the second metal portion.
- the second conductor layer and the second metal part are made of the same metal, it is possible to suppress the generation of stress at the interface due to the different material constants.
- the resin circuit board excellent in the connection reliability of a via conductor and a conductor layer can be provided.
- FIG. 1A is a cross-sectional view schematically showing an example of the resin circuit board of the present invention
- FIG. 1B is an enlarged view of the vicinity of a via conductor constituting the resin circuit board shown in FIG. It is sectional drawing.
- 2A, FIG. 2B, FIG. 2C, FIG. 2D, FIG. 2E, and FIG. 2F are examples of the method for manufacturing the resin circuit board shown in FIG. It is sectional drawing shown typically.
- FIG. 3A is a cross-sectional view schematically showing a sample of a comparative example
- FIG. 3B is a cross-sectional view schematically showing a sample of an example.
- FIG. 4 is a cross-sectional view schematically showing a resin circuit board including the sample of the example.
- FIG. 1A is a cross-sectional view schematically showing an example of the resin circuit board of the present invention
- FIG. 1B is an enlarged view of the vicinity of a via conductor constituting the resin circuit board shown in FIG. It is sectional drawing.
- a resin circuit board 1 shown in FIG. 1A constitutes a multilayer circuit board, and includes resin layers 10A and 10B. As shown in an enlarged view in FIG. 1B, the resin layer 10 ⁇ / b> A has a via hole 15, and a via conductor 20 is provided in the via hole 15 so as to fill the via hole 15.
- a first conductor layer 31 is provided on one main surface (lower main surface in FIGS. 1A and 1B) of the resin layer 10 ⁇ / b> A, and the first conductor layer 31 is connected to the via conductor 20.
- a second conductor layer 32 is provided on the other main surface (the upper main surface in FIGS.
- the via conductor 20 includes a first metal part 21 and a second metal part 22.
- the first metal part 21 is in contact with the first conductor layer 31, and the second metal part 22 is in contact with the second conductor layer 32.
- the first metal part 21 and the second metal part 22 are in contact with each other.
- the resin constituting the resin layer may be a thermoplastic resin or a thermosetting resin.
- the thermoplastic resin include liquid crystal polymer (LCP), thermoplastic polyimide resin, polyetheretherketone resin (PEEK), polyphenylene sulfide resin (PPS), polyetherimide resin, polyamideimide resin, and those resins. A mixture etc. are mentioned.
- the thermosetting resin include epoxy resins such as glass epoxy resins, thermosetting polyimide resins, and the like.
- the first metal portion constituting the via conductor includes a first metal having a melting point lower than the heat resistant temperature of the resin layer.
- the heat resistant temperature of the resin layer means a temperature when the resin layer is reduced by 5% by weight when the thermogravimetric method is used.
- the heat resistant temperature of the resin layer is usually about 400 ° C.
- Discovery TGA manufactured by TA Instruments is used.
- fusing point of a 1st metal is less than the heat-resistant temperature of a resin layer, It is preferable that it is less than 500 degreeC, and it is more preferable that it is less than 400 degreeC.
- the melting point of the first metal is preferably 100 ° C. or higher, more preferably 150 ° C. or higher.
- the first metal examples include Sn, Bi, and Pb. Of these, Sn is preferable.
- the 1st metal part may contain only 1 type of 1st metals, and may contain 2 or more types.
- the first metal portion may be substantially composed of the first metal or may be composed of an alloy including the first metal and another metal (for example, the second metal).
- the 1st metal part may contain the part comprised substantially from the 1st metal, and the part comprised from the alloy containing a 1st metal. Even if the melting point of the alloy is equal to or higher than the heat resistance temperature of the resin layer, as long as it is an alloy containing the first metal, It can be said.
- the alloy is preferably an alloy including the first metal and the second metal, and in particular, Sn and the second metal as the first metal. It is preferable that it is an alloy containing Cu which is.
- the first metal portion is disposed on the first conductor layer side and is in contact with the first conductor layer.
- an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
- both alloy phases are also formed in the interface of a 1st metal part and a 2nd metal part.
- the alloy phase is preferably made of an alloy containing a first metal and a second metal, and in particular made of an alloy containing Sn as the first metal and Cu as the second metal. It is preferable that In addition, it can confirm that the alloy phase is formed by performing a composition analysis by energy dispersive X-ray analysis (EDX) etc., for example.
- EDX energy dispersive X-ray analysis
- the second metal portion constituting the via conductor includes a second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer.
- fusing point of a 2nd metal is more than the heat-resistant temperature of a resin layer, It is preferable that it is 500 degreeC or more.
- the second metal examples include Cu, Ag, and Al. Among these, Cu is preferable. When the second metal is Cu, the electric resistance is lowered. Note that the second metal portion may include only one type of the second metal or two or more types.
- the second metal portion is preferably substantially composed of the second metal, and more preferably substantially composed of Cu.
- the second metal portion is preferably made of a second metal plating, and more preferably made of Cu plating.
- the proportion of the second metal portion in the via conductor is preferably 30 vol% or more from the viewpoint of improving the connection reliability between the via conductor and the conductor layer.
- the ratio of the second metal portion in the via conductor is preferably less than 100 vol%, and more preferably 98 vol% or less.
- the ratio of the second metal portion in the via conductor can be obtained from a cross-sectional photograph.
- the diameter of the via conductor is constant, it can be obtained from the ratio of the thickness of the second metal part in the cross-sectional photograph.
- the second metal portion is preferably disposed on the second conductor layer side and in contact with the second conductor layer.
- the via conductor further includes a third metal part including the first metal, and the second metal part is sandwiched between the first metal part in contact with the first conductor layer and the third metal part in contact with the second conductor layer. It may be. That is, in the resin circuit board according to the embodiment of the present invention, the via conductor may include only the first metal portion and the second metal portion, or may include three or more metal portions. . Further, the second metal part may be in contact with the first metal part or may not be in contact with it.
- the shape of the via conductor is not particularly limited, and is not limited to a columnar shape such as a columnar shape or a prismatic shape, but also a truncated cone shape such as a truncated cone shape or a truncated pyramid shape (tapered shape) Or the like.
- the height of the via conductor is not particularly limited, but is preferably 5 ⁇ m or more, more preferably 10 ⁇ m or more, and is preferably 100 ⁇ m or less, and more preferably 50 ⁇ m or less.
- the diameter of the via conductor is not particularly limited, but is preferably 5 ⁇ m or more, more preferably 10 ⁇ m or more, preferably 200 ⁇ m or less, and more preferably 50 ⁇ m or less.
- the diameter of the via conductor means the diameter when the cross-sectional shape is circular, and the maximum length passing through the center of the cross-section when the cross-sectional shape is not circular.
- all via conductors include the first metal portion and the second metal portion described above, but one of the first metal portion and the second metal portion.
- via conductors that do not include both may exist.
- the second conductor layer is preferably made of the same metal as the second metal contained in the second metal portion, and is made of Cu such as Cu foil. More preferably.
- the second conductor layer and the second metal part are made of the same metal, it is possible to suppress the generation of stress at the interface due to the different material constants.
- the first conductor layer is preferably made of the same metal as the second conductor layer, and more preferably made of Cu such as Cu foil.
- the surface of the first conductor layer and the second conductor layer may be subjected to a surface treatment for improving adhesion with the via conductor.
- the surface of the Cu foil may be subjected to Co or Ni treatment.
- the first conductor layer and the second conductor layer are made of Cu.
- the resin circuit board 1 shown in FIG. 1A is preferably manufactured as follows. 2A, FIG. 2B, FIG. 2C, FIG. 2D, FIG. 2E, and FIG. 2F are examples of the method for manufacturing the resin circuit board shown in FIG. It is sectional drawing shown typically.
- the metal layer 32a for the second conductor layer is disposed on the lower main surface.
- via holes 15 are formed at predetermined positions of the resin layer 10A by laser processing. Specifically, the via hole 15 is formed so as to reach the surface of the metal layer 32a by irradiating a laser from the surface where the metal layer 32a for the second conductor layer is not attached.
- the second metal portion 22 is formed up to a predetermined height of the via hole 15.
- Examples of the method for forming the second metal part include a method of depositing Cu plating by electrolytic plating.
- the via conductor 20 is formed by forming the first metal portion 21 so as to fill the via hole 15.
- the method for forming the first metal part include a method of depositing Sn plating by electrolytic plating, a method of filling a conductive paste such as Sn—Ag, and the like.
- the metal layer 32a on the resin layer 10A is etched to form the second conductor layer 32 having a desired pattern.
- the second conductor layer 32 can be formed by forming a predetermined resist pattern on the surface of the metal layer 32a, immersing in an etching solution and performing etching, and then removing the resist pattern.
- the first conductor layer 31 is formed on the resin sheet having the resin layer 10B after the via conductor 20 is formed (see FIG. 2F).
- the first conductor layer 31 on the resin layer 10B is a first conductor layer for the resin layer 10A and corresponds to a second conductor layer for the resin layer 10B.
- the first conductor layer 33 is formed after the via conductor 20 is formed.
- these resin sheets are laminated
- the second conductor layer 32 is disposed on the upper main surface as in FIG. A plurality of resin sheets are integrated by this thermocompression treatment. Further, the first metal in the via conductor is melted by the thermocompression treatment, and an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
- the resin circuit board 1 shown in FIG. 1 can be manufactured.
- the resin circuit board 1 shown to Fig.1 (a) has a multilayer structure provided with a some resin layer
- the resin circuit board concerning one embodiment of this invention is provided with a some resin layer. It may have a multilayer structure or may have a single layer structure including only one resin layer.
- the heat resistant temperature of the glass epoxy resin sheet was 430 ° C.
- Via processing with a diameter of 100 ⁇ m was performed on the glass epoxy resin sheet using a laser processing machine, and via holes were formed at predetermined positions. Thereafter, desmear treatment was performed.
- Cu plating was deposited in the via hole by electrolytic plating.
- Four levels were prepared with Cu plating thicknesses of 20 ⁇ m, 30 ⁇ m, 90 ⁇ m, and 98 ⁇ m.
- samples A-2 and A-3 in which Sn plating of 80 ⁇ m, 70 ⁇ m, 10 ⁇ m, and 2 ⁇ m in thickness was deposited on four levels of samples with Cu plating thicknesses of 20 ⁇ m, 30 ⁇ m, 90 ⁇ m, and 98 ⁇ m, respectively.
- A-4 and A-5 were prepared.
- Samples B-2, B-3, B-4, and B-5 were prepared by filling Sn-Ag conductive paste into via holes in which Cu plating was deposited with respect to the above four-level samples.
- Sample A-1 in which Sn plating was deposited to 100 ⁇ m and Sample B-1 in which Sn—Ag conductive paste was filled were prepared with respect to a sample in which Cu plating was not deposited. .
- FIG. 3A is a cross-sectional view schematically showing a sample of a comparative example
- FIG. 3B is a cross-sectional view schematically showing a sample of an example.
- the via conductor 20 including only the second metal part 22 is formed in the sample of the comparative example.
- the via conductor 20 including a first metal part 21 and a second metal part 22 is formed in the sample of the comparative example.
- a glass epoxy resin material (cured) with a Cu foil having a thickness of 200 ⁇ m was prepared.
- the samples A-1 to A-5 and B-1 to B-5 described above were laminated on the Cu foil surface, and pressure-bonded by a vacuum hot press at about 260 ° C.
- FIG. 4 is a cross-sectional view schematically showing a resin circuit board including the sample of the example.
- a Cu foil pattern (second conductor layer) 32 having a diameter of 250 ⁇ m patterned for a measurement terminal is formed on one via conductor 20 on the second metal portion 22 side.
- a Cu foil (first conductor layer) 31 serving as a common terminal is formed on the first metal portion 21 side of the via conductor 20 which is the opposite surface.
- Table 1 shows the number of good conduction among the 20 pieces. In Table 1, when the number of continuity after reflow was 0 or more and 4 or less, it was determined as x (defect), 5 or more and 19 or less as ⁇ (good), and 20 as ⁇ (good). .
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- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
This resin circuit board is provided with: a resin layer which has a via hole; a via conductor which is provided within the via hole; and a first conductor layer which is provided on one main surface of the resin layer and is connected to the via conductor. This resin circuit board is characterized in that: the via conductor comprises a first metal part that is in contact with the first conductor layer, and a second metal part; the first metal part contains a first metal which has a melting point that is lower than the upper temperature limit of the resin layer; and the second metal part contains a second metal which has a melting point that is equal to or higher than the upper temperature limit of the resin layer.
Description
本発明は、樹脂回路基板に関する。
The present invention relates to a resin circuit board.
各種電子機器に用いられる回路基板として、ビアホールを有する樹脂層の主面に導体層が設けられ、ビアホール内に充填されたビア導体が導体層と接続された構造を有する樹脂回路基板が知られている。
As a circuit board used in various electronic devices, a resin circuit board having a structure in which a conductor layer is provided on a main surface of a resin layer having a via hole and a via conductor filled in the via hole is connected to the conductor layer is known. Yes.
このような樹脂回路基板の製造方法として、例えば、特許文献1には、熱可塑性樹脂シートを用意する工程と、上記熱可塑性樹脂シートに、銅を主成分とする面内導体パターン(導体層)を設けるとともに、ビスマスを主成分とした導電性ペーストを用いて層間導体パターン(ビア導体)を設ける工程と、上記熱可塑性樹脂シートに熱処理及び加圧処理を施すことによって、上記導電性ペーストを溶融一体化するとともに、当該導電性ペーストが溶融一体化してなる上記層間導体パターンと上記面内導体パターンとの間に、銅及びビスマスの固溶体層を形成する工程と、を有する方法が開示されている。
As a method for producing such a resin circuit board, for example, Patent Document 1 discloses a step of preparing a thermoplastic resin sheet, and an in-plane conductor pattern (conductor layer) mainly composed of copper in the thermoplastic resin sheet. And the step of providing an interlayer conductor pattern (via conductor) using a conductive paste containing bismuth as a main component, and heat-treating and pressing the thermoplastic resin sheet to melt the conductive paste. And a step of forming a solid solution layer of copper and bismuth between the interlayer conductor pattern formed by melting and integrating the conductive paste and the in-plane conductor pattern. .
特許文献1に記載されている方法のように、ビア導体に低融点金属を用いる場合には、樹脂回路基板のリフロー時にビア導体が再溶融して液相となり、ビア導体の体積が膨張することによって、ビア導体と導体層との接続信頼性が低下する虞があった。
When a low-melting-point metal is used for the via conductor as in the method described in Patent Document 1, the via conductor is remelted and becomes a liquid phase when the resin circuit board is reflowed, and the volume of the via conductor expands. As a result, the connection reliability between the via conductor and the conductor layer may be reduced.
本発明は上記の問題を解決するためになされたものであり、ビア導体と導体層との接続信頼性に優れる樹脂回路基板を提供することを目的とする。
The present invention has been made to solve the above-described problems, and an object thereof is to provide a resin circuit board having excellent connection reliability between a via conductor and a conductor layer.
本発明の一態様に係る樹脂回路基板は、ビアホールを有する樹脂層と、上記ビアホール内に設けられたビア導体と、上記樹脂層の一方主面に設けられ、上記ビア導体と接続された第1導体層と、を備える樹脂回路基板であって、上記ビア導体は、上記第1導体層に接している第1金属部と、第2金属部とを含み、上記第1金属部は、上記樹脂層の耐熱温度未満の融点を有する第1の金属を含み、上記第2金属部は、上記樹脂層の耐熱温度以上の融点を有する第2の金属を含むことを特徴とする。
A resin circuit board according to an aspect of the present invention includes a resin layer having a via hole, a via conductor provided in the via hole, and a first conductor provided on one main surface of the resin layer and connected to the via conductor. And a via layer, wherein the via conductor includes a first metal portion in contact with the first conductor layer, and a second metal portion, and the first metal portion includes the resin layer. It includes a first metal having a melting point lower than the heat resistance temperature of the layer, and the second metal portion includes a second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer.
本発明の一態様に係る樹脂回路基板では、樹脂層の耐熱温度未満の融点を有する第1の金属を含む第1金属部に加えて、樹脂層の耐熱温度以上の融点を有する第2の金属を含む第2金属部がビア導体に含まれているため、リフロー時に再溶融するビア導体の体積を減少させることができる。したがって、ビア導体と導体層との接続信頼性の低下を抑制することができる。
In the resin circuit board according to one embodiment of the present invention, in addition to the first metal portion including the first metal having a melting point lower than the heat resistance temperature of the resin layer, the second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer. Since the second metal part containing the metal is contained in the via conductor, the volume of the via conductor remelted at the time of reflow can be reduced. Therefore, it is possible to suppress a decrease in connection reliability between the via conductor and the conductor layer.
本発明の一態様に係る樹脂回路基板において、上記ビア導体に占める上記第2金属部の割合は、30vol%以上であることが好ましい。
ビア導体に占める上記第2金属部の割合を30vol%以上にすることによって、リフロー時に再溶融するビア導体の体積をさらに減少させることができるため、ビア導体と導体層との接続信頼性をさらに向上させることができる。 In the resin circuit board according to one aspect of the present invention, the ratio of the second metal portion in the via conductor is preferably 30 vol% or more.
By setting the ratio of the second metal portion in the via conductor to 30 vol% or more, the volume of the via conductor remelted at the time of reflow can be further reduced, so that the connection reliability between the via conductor and the conductor layer is further increased. Can be improved.
ビア導体に占める上記第2金属部の割合を30vol%以上にすることによって、リフロー時に再溶融するビア導体の体積をさらに減少させることができるため、ビア導体と導体層との接続信頼性をさらに向上させることができる。 In the resin circuit board according to one aspect of the present invention, the ratio of the second metal portion in the via conductor is preferably 30 vol% or more.
By setting the ratio of the second metal portion in the via conductor to 30 vol% or more, the volume of the via conductor remelted at the time of reflow can be further reduced, so that the connection reliability between the via conductor and the conductor layer is further increased. Can be improved.
本発明の一態様に係る樹脂回路基板において、上記第1の金属の融点は、500℃未満であることが好ましい。特に、上記第1の金属は、Snであることが好ましい。
In the resin circuit board according to one embodiment of the present invention, the melting point of the first metal is preferably less than 500 ° C. In particular, the first metal is preferably Sn.
本発明の一態様に係る樹脂回路基板においては、上記第1金属部と上記第1導体層との界面に、両者の合金相が形成されていることが好ましい。
第1金属部と第1導体層との界面に両者の合金相が形成されていると、第1金属部と第1導体層とが物理的に接着している場合に比べて接続信頼性を向上させることができる。さらに、合金相の融点は第1の金属の融点よりも高くなるため、樹脂回路基板が再加熱された場合であっても、合金相が再溶融することによる接続信頼性の低下を抑制することができる。 In the resin circuit board according to one aspect of the present invention, it is preferable that an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
When the alloy phase of both is formed at the interface between the first metal part and the first conductor layer, the connection reliability is higher than when the first metal part and the first conductor layer are physically bonded. Can be improved. Furthermore, since the melting point of the alloy phase is higher than the melting point of the first metal, even if the resin circuit board is reheated, the decrease in connection reliability due to remelting of the alloy phase is suppressed. Can do.
第1金属部と第1導体層との界面に両者の合金相が形成されていると、第1金属部と第1導体層とが物理的に接着している場合に比べて接続信頼性を向上させることができる。さらに、合金相の融点は第1の金属の融点よりも高くなるため、樹脂回路基板が再加熱された場合であっても、合金相が再溶融することによる接続信頼性の低下を抑制することができる。 In the resin circuit board according to one aspect of the present invention, it is preferable that an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
When the alloy phase of both is formed at the interface between the first metal part and the first conductor layer, the connection reliability is higher than when the first metal part and the first conductor layer are physically bonded. Can be improved. Furthermore, since the melting point of the alloy phase is higher than the melting point of the first metal, even if the resin circuit board is reheated, the decrease in connection reliability due to remelting of the alloy phase is suppressed. Can do.
本発明の一態様に係る樹脂回路基板において、上記第2の金属の融点は、500℃以上であることが好ましい。特に、上記第2の金属は、Cuであることが好ましい。第2の金属がCuであると、電気抵抗が低くなる。
In the resin circuit board according to one embodiment of the present invention, the melting point of the second metal is preferably 500 ° C. or higher. In particular, the second metal is preferably Cu. When the second metal is Cu, the electric resistance is lowered.
本発明の一態様に係る樹脂回路基板は、上記樹脂層の他方主面に設けられ、上記ビア導体と接続された第2導体層をさらに備え、上記第2金属部が上記第2導体層に接していることが好ましい。
The resin circuit board according to an aspect of the present invention further includes a second conductor layer provided on the other main surface of the resin layer and connected to the via conductor, and the second metal portion is formed on the second conductor layer. It is preferable to contact.
本発明の一態様に係る樹脂回路基板において、上記第2導体層は、上記第2金属部に含まれる上記第2の金属と同じ金属から構成されていることが好ましい。第2導体層と第2金属部とが同じ金属から構成されていると、材料定数が異なることによる界面での応力の発生を抑制することができる。
In the resin circuit board according to one aspect of the present invention, the second conductor layer is preferably made of the same metal as the second metal included in the second metal portion. When the second conductor layer and the second metal part are made of the same metal, it is possible to suppress the generation of stress at the interface due to the different material constants.
本発明によれば、ビア導体と導体層との接続信頼性に優れる樹脂回路基板を提供することができる。
ADVANTAGE OF THE INVENTION According to this invention, the resin circuit board excellent in the connection reliability of a via conductor and a conductor layer can be provided.
以下、本発明の一実施の形態に係る樹脂回路基板について説明する。
しかしながら、本発明は、以下の構成に限定されるものではなく、本発明の要旨を変更しない範囲において適宜変更して適用することができる。なお、以下において記載する本発明の一実施の形態に係る樹脂回路基板の個々の望ましい構成を2つ以上組み合わせたものもまた本発明である。 Hereinafter, a resin circuit board according to an embodiment of the present invention will be described.
However, the present invention is not limited to the following configurations, and can be applied with appropriate modifications without departing from the scope of the present invention. In addition, what combined two or more each desirable structures of the resin circuit board based on one embodiment of this invention described below is also this invention.
しかしながら、本発明は、以下の構成に限定されるものではなく、本発明の要旨を変更しない範囲において適宜変更して適用することができる。なお、以下において記載する本発明の一実施の形態に係る樹脂回路基板の個々の望ましい構成を2つ以上組み合わせたものもまた本発明である。 Hereinafter, a resin circuit board according to an embodiment of the present invention will be described.
However, the present invention is not limited to the following configurations, and can be applied with appropriate modifications without departing from the scope of the present invention. In addition, what combined two or more each desirable structures of the resin circuit board based on one embodiment of this invention described below is also this invention.
図1(a)は、本発明の樹脂回路基板の一例を模式的に示す断面図であり、図1(b)は、図1(a)に示す樹脂回路基板を構成するビア導体付近の拡大断面図である。
FIG. 1A is a cross-sectional view schematically showing an example of the resin circuit board of the present invention, and FIG. 1B is an enlarged view of the vicinity of a via conductor constituting the resin circuit board shown in FIG. It is sectional drawing.
図1(a)に示す樹脂回路基板1は、多層回路基板を構成しており、樹脂層10A及び10Bを備えている。図1(b)に拡大して示すように、樹脂層10Aは、ビアホール15を有しており、ビアホール15を充填するようにビア導体20がビアホール15内に設けられている。樹脂層10Aの一方主面(図1(a)及び図1(b)において下側の主面)には第1導体層31が設けられており、第1導体層31はビア導体20と接続されている。さらに、樹脂層10Aの他方主面(図1(a)及び図1(b)において上側の主面)には第2導体層32が設けられており、第2導体層32もビア導体20と接続されている。図1(a)及び図1(b)では、ビア導体20は、第1金属部21と、第2金属部22とを含んでいる。第1金属部21が第1導体層31に接しており、第2金属部22が第2導体層32に接している。また、第1金属部21と第2金属部22とは接している。
A resin circuit board 1 shown in FIG. 1A constitutes a multilayer circuit board, and includes resin layers 10A and 10B. As shown in an enlarged view in FIG. 1B, the resin layer 10 </ b> A has a via hole 15, and a via conductor 20 is provided in the via hole 15 so as to fill the via hole 15. A first conductor layer 31 is provided on one main surface (lower main surface in FIGS. 1A and 1B) of the resin layer 10 </ b> A, and the first conductor layer 31 is connected to the via conductor 20. Has been. Further, a second conductor layer 32 is provided on the other main surface (the upper main surface in FIGS. 1A and 1B) of the resin layer 10A, and the second conductor layer 32 is also connected to the via conductor 20. It is connected. In FIG. 1A and FIG. 1B, the via conductor 20 includes a first metal part 21 and a second metal part 22. The first metal part 21 is in contact with the first conductor layer 31, and the second metal part 22 is in contact with the second conductor layer 32. The first metal part 21 and the second metal part 22 are in contact with each other.
本発明の一実施の形態に係る樹脂回路基板において、樹脂層を構成する樹脂は、熱可塑性樹脂でもよいし、熱硬化性樹脂でもよい。熱可塑性樹脂としては、例えば、液晶ポリマー(LCP)、熱可塑性ポリイミド樹脂、ポリエーテルエーテルケトン樹脂(PEEK)、ポリフェニレンスルフィド樹脂(PPS)、ポリエーテルイミド樹脂、ポリアミドイミド樹脂、及び、これらの樹脂の混合物等が挙げられる。熱硬化性樹脂としては、例えば、ガラスエポキシ樹脂等のエポキシ樹脂、熱硬化性ポリイミド樹脂等が挙げられる。
In the resin circuit board according to the embodiment of the present invention, the resin constituting the resin layer may be a thermoplastic resin or a thermosetting resin. Examples of the thermoplastic resin include liquid crystal polymer (LCP), thermoplastic polyimide resin, polyetheretherketone resin (PEEK), polyphenylene sulfide resin (PPS), polyetherimide resin, polyamideimide resin, and those resins. A mixture etc. are mentioned. Examples of the thermosetting resin include epoxy resins such as glass epoxy resins, thermosetting polyimide resins, and the like.
本発明の一実施の形態に係る樹脂回路基板において、ビア導体を構成する第1金属部は、樹脂層の耐熱温度未満の融点を有する第1の金属を含んでいる。
In the resin circuit board according to one embodiment of the present invention, the first metal portion constituting the via conductor includes a first metal having a melting point lower than the heat resistant temperature of the resin layer.
本明細書において、樹脂層の耐熱温度とは、熱重量測定法を用いた場合において、樹脂層が5重量%減少した時の温度を意味する。樹脂層の耐熱温度は、通常、400℃程度である。熱重量測定法における測定装置としては、TAインスツルメント社製のDiscovery TGAが用いられる。
In the present specification, the heat resistant temperature of the resin layer means a temperature when the resin layer is reduced by 5% by weight when the thermogravimetric method is used. The heat resistant temperature of the resin layer is usually about 400 ° C. As a measuring device in the thermogravimetric method, Discovery TGA manufactured by TA Instruments is used.
第1の金属の融点は、樹脂層の耐熱温度未満であれば特に限定されないが、500℃未満であることが好ましく、400℃未満であることがより好ましい。また、第1の金属の融点は、100℃以上であることが好ましく、150℃以上であることがより好ましい。
Although it will not specifically limit if melting | fusing point of a 1st metal is less than the heat-resistant temperature of a resin layer, It is preferable that it is less than 500 degreeC, and it is more preferable that it is less than 400 degreeC. The melting point of the first metal is preferably 100 ° C. or higher, more preferably 150 ° C. or higher.
第1の金属としては、例えば、Sn、Bi、Pb等が挙げられる。これらの中では、Snが好ましい。なお、第1金属部は、第1の金属を1種のみ含んでもよいし、2種以上含んでもよい。
Examples of the first metal include Sn, Bi, and Pb. Of these, Sn is preferable. In addition, the 1st metal part may contain only 1 type of 1st metals, and may contain 2 or more types.
第1金属部は、実質的に第1の金属から構成されていてもよいし、第1の金属と他の金属(例えば第2の金属)とを含む合金から構成されていてもよい。また、第1金属部は、実質的に第1の金属から構成されている部分と、第1の金属を含む合金から構成されている部分とを含んでいてもよい。なお、上記合金の融点が樹脂層の耐熱温度以上であっても、第1の金属を含む合金である限り、「第1金属部は、樹脂層の耐熱温度未満の融点を有する第1の金属を含む」と言うことができる。
The first metal portion may be substantially composed of the first metal or may be composed of an alloy including the first metal and another metal (for example, the second metal). Moreover, the 1st metal part may contain the part comprised substantially from the 1st metal, and the part comprised from the alloy containing a 1st metal. Even if the melting point of the alloy is equal to or higher than the heat resistance temperature of the resin layer, as long as it is an alloy containing the first metal, It can be said.
第1の金属部が合金から構成される場合、上記合金は、第1の金属と第2の金属とを含む合金であることが好ましく、特に、第1の金属であるSnと第2の金属であるCuとを含む合金であることが好ましい。
When the first metal part is composed of an alloy, the alloy is preferably an alloy including the first metal and the second metal, and in particular, Sn and the second metal as the first metal. It is preferable that it is an alloy containing Cu which is.
本発明の一実施の形態に係る樹脂回路基板において、第1金属部は、第1導体層側に配置されており、第1導体層に接している。特に、接続信頼性を向上させる観点から、第1金属部と第1導体層との界面に両者の合金相が形成されていることが好ましい。また、第1金属部と第2金属部との界面にも両者の合金相が形成されていることが好ましい。上記合金相は、第1の金属と第2の金属とを含む合金から構成されていることが好ましく、特に、第1の金属であるSnと第2の金属であるCuとを含む合金から構成されていることが好ましい。なお、合金相が形成されていることは、例えば、エネルギー分散型X線分析(EDX)等による組成分析を行うことによって確認することができる。
In the resin circuit board according to one embodiment of the present invention, the first metal portion is disposed on the first conductor layer side and is in contact with the first conductor layer. In particular, from the viewpoint of improving connection reliability, it is preferable that an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer. Moreover, it is preferable that both alloy phases are also formed in the interface of a 1st metal part and a 2nd metal part. The alloy phase is preferably made of an alloy containing a first metal and a second metal, and in particular made of an alloy containing Sn as the first metal and Cu as the second metal. It is preferable that In addition, it can confirm that the alloy phase is formed by performing a composition analysis by energy dispersive X-ray analysis (EDX) etc., for example.
本発明の一実施の形態に係る樹脂回路基板において、ビア導体を構成する第2金属部は、樹脂層の耐熱温度以上の融点を有する第2の金属を含んでいる。
In the resin circuit board according to one embodiment of the present invention, the second metal portion constituting the via conductor includes a second metal having a melting point equal to or higher than the heat resistance temperature of the resin layer.
第2の金属の融点は、樹脂層の耐熱温度以上であれば特に限定されないが、500℃以上であることが好ましい。
Although it will not specifically limit if melting | fusing point of a 2nd metal is more than the heat-resistant temperature of a resin layer, It is preferable that it is 500 degreeC or more.
第2の金属としては、例えば、Cu、Ag、Al等が挙げられる。これらの中では、Cuが好ましい。第2の金属がCuであると、電気抵抗が低くなる。なお、第2金属部は、第2の金属を1種のみ含んでもよいし、2種以上含んでもよい。
Examples of the second metal include Cu, Ag, and Al. Among these, Cu is preferable. When the second metal is Cu, the electric resistance is lowered. Note that the second metal portion may include only one type of the second metal or two or more types.
第2金属部は、実質的に第2の金属から構成されていることが好ましく、実質的にCuから構成されていることがより好ましい。具体的には、第2金属部は、第2の金属のめっきから構成されていることが好ましく、Cuめっきから構成されていることがより好ましい。
The second metal portion is preferably substantially composed of the second metal, and more preferably substantially composed of Cu. Specifically, the second metal portion is preferably made of a second metal plating, and more preferably made of Cu plating.
本発明の一実施の形態に係る樹脂回路基板において、ビア導体に占める第2金属部の割合は、ビア導体と導体層との接続信頼性を向上させる観点から、30vol%以上であることが好ましい。ビア導体に占める第2金属部の割合は、100vol%未満であることが好ましく、98vol%以下であることがより好ましい。
In the resin circuit board according to one embodiment of the present invention, the proportion of the second metal portion in the via conductor is preferably 30 vol% or more from the viewpoint of improving the connection reliability between the via conductor and the conductor layer. . The ratio of the second metal portion in the via conductor is preferably less than 100 vol%, and more preferably 98 vol% or less.
ビア導体に占める第2金属部の割合は、断面写真から求めることができる。例えば、ビア導体の径が一定である場合には、断面写真における第2金属部の厚さの割合から求めることができる。
The ratio of the second metal portion in the via conductor can be obtained from a cross-sectional photograph. For example, when the diameter of the via conductor is constant, it can be obtained from the ratio of the thickness of the second metal part in the cross-sectional photograph.
本発明の一実施の形態に係る樹脂回路基板において、第2金属部は、第2導体層側に配置されており、第2導体層に接していることが好ましい。しかし、第2金属部は、第2導体層に接していなくてもよい。例えば、ビア導体が第1の金属を含む第3金属部をさらに含み、第1導体層に接する第1金属部と第2導体層に接する第3金属部との間に第2金属部が挟まれていてもよい。つまり、本発明の一実施の形態に係る樹脂回路基板において、ビア導体は、第1金属部及び第2金属部のみを含んでいてもよいし、3つ以上の金属部を含んでいてもよい。また、第2金属部は、第1金属部に接していてもよいし、接していなくてもよい。
In the resin circuit board according to one embodiment of the present invention, the second metal portion is preferably disposed on the second conductor layer side and in contact with the second conductor layer. However, the second metal portion may not be in contact with the second conductor layer. For example, the via conductor further includes a third metal part including the first metal, and the second metal part is sandwiched between the first metal part in contact with the first conductor layer and the third metal part in contact with the second conductor layer. It may be. That is, in the resin circuit board according to the embodiment of the present invention, the via conductor may include only the first metal portion and the second metal portion, or may include three or more metal portions. . Further, the second metal part may be in contact with the first metal part or may not be in contact with it.
本発明の一実施の形態に係る樹脂回路基板において、ビア導体の形状は特に限定されず、円柱状、角柱状等の柱状のほか、円錐台状、角錐台状等の錐台状(テーパー状)等であってもよい。
In the resin circuit board according to one embodiment of the present invention, the shape of the via conductor is not particularly limited, and is not limited to a columnar shape such as a columnar shape or a prismatic shape, but also a truncated cone shape such as a truncated cone shape or a truncated pyramid shape (tapered shape) Or the like.
ビア導体の高さは特に限定されないが、5μm以上が好ましく、10μm以上がより好ましく、また、100μm以下が好ましく、50μm以下がより好ましい。
The height of the via conductor is not particularly limited, but is preferably 5 μm or more, more preferably 10 μm or more, and is preferably 100 μm or less, and more preferably 50 μm or less.
ビア導体の径は特に限定されないが、5μm以上が好ましく、10μm以上がより好ましく、また、200μm以下が好ましく、50μm以下がより好ましい。なお、ビア導体の径とは、断面形状が円形の場合には直径、円形以外の場合には断面の中心を通る最大長さをいう。
The diameter of the via conductor is not particularly limited, but is preferably 5 μm or more, more preferably 10 μm or more, preferably 200 μm or less, and more preferably 50 μm or less. The diameter of the via conductor means the diameter when the cross-sectional shape is circular, and the maximum length passing through the center of the cross-section when the cross-sectional shape is not circular.
本発明の一実施の形態に係る樹脂回路基板においては、すべてのビア導体が上述した第1金属部と第2金属部とを含むことが好ましいが、第1金属部及び第2金属部の一方又は両方を含まないビア導体が存在していてもよい。
In the resin circuit board according to the embodiment of the present invention, it is preferable that all via conductors include the first metal portion and the second metal portion described above, but one of the first metal portion and the second metal portion. Alternatively, via conductors that do not include both may exist.
本発明の一実施の形態に係る樹脂回路基板において、第2導体層は、第2金属部に含まれる第2の金属と同じ金属から構成されていることが好ましく、Cu箔等のCuから構成されていることがより好ましい。第2導体層と第2金属部とが同じ金属から構成されていると、材料定数が異なることによる界面での応力の発生を抑制することができる。
In the resin circuit board according to one embodiment of the present invention, the second conductor layer is preferably made of the same metal as the second metal contained in the second metal portion, and is made of Cu such as Cu foil. More preferably. When the second conductor layer and the second metal part are made of the same metal, it is possible to suppress the generation of stress at the interface due to the different material constants.
また、第1導体層は、第2導体層と同じ金属から構成されていることが好ましく、Cu箔等のCuから構成されていることがより好ましい。
The first conductor layer is preferably made of the same metal as the second conductor layer, and more preferably made of Cu such as Cu foil.
本発明の一実施の形態に係る樹脂回路基板において、第1導体層及び第2導体層の表面には、ビア導体との密着性を向上させるための表面処理が施されていてもよい。例えば、Cu箔の表面にCo又はNi処理が施されていてもよい。このような場合も、第1導体層及び第2導体層はCuから構成されているものとする。
In the resin circuit board according to the embodiment of the present invention, the surface of the first conductor layer and the second conductor layer may be subjected to a surface treatment for improving adhesion with the via conductor. For example, the surface of the Cu foil may be subjected to Co or Ni treatment. Even in such a case, the first conductor layer and the second conductor layer are made of Cu.
図1(a)に示す樹脂回路基板1は、好ましくは、以下のように製造される。
図2(a)、図2(b)、図2(c)、図2(d)、図2(e)及び図2(f)は、図1に示す樹脂回路基板の製造方法の一例を模式的に示す断面図である。 The resin circuit board 1 shown in FIG. 1A is preferably manufactured as follows.
2A, FIG. 2B, FIG. 2C, FIG. 2D, FIG. 2E, and FIG. 2F are examples of the method for manufacturing the resin circuit board shown in FIG. It is sectional drawing shown typically.
図2(a)、図2(b)、図2(c)、図2(d)、図2(e)及び図2(f)は、図1に示す樹脂回路基板の製造方法の一例を模式的に示す断面図である。 The resin circuit board 1 shown in FIG. 1A is preferably manufactured as follows.
2A, FIG. 2B, FIG. 2C, FIG. 2D, FIG. 2E, and FIG. 2F are examples of the method for manufacturing the resin circuit board shown in FIG. It is sectional drawing shown typically.
まず、図2(a)に示すように、ガラスエポキシ樹脂等からなる樹脂層10Aに、第2導体層32となるパターニング前のCu箔(第2導体層用の金属層)32aを貼り付けた樹脂シートを準備する。なお、図2(a)では、図1(a)と異なり、下側の主面に第2導体層用の金属層32aが配置されている。
First, as shown to Fig.2 (a), Cu foil (metal layer for 2nd conductor layers) 32a before the patterning used as the 2nd conductor layer 32 was affixed on 10 A of resin layers which consist of a glass epoxy resin etc. Prepare a resin sheet. In FIG. 2A, unlike FIG. 1A, the metal layer 32a for the second conductor layer is disposed on the lower main surface.
次に、図2(b)に示すように、レーザー加工により、樹脂層10Aの所定の位置にビアホール15を形成する。具体的には、第2導体層用の金属層32aが貼り付けられていない方の面からレーザーを照射して、金属層32aの表面に達するようにビアホール15を形成する。
Next, as shown in FIG. 2B, via holes 15 are formed at predetermined positions of the resin layer 10A by laser processing. Specifically, the via hole 15 is formed so as to reach the surface of the metal layer 32a by irradiating a laser from the surface where the metal layer 32a for the second conductor layer is not attached.
続いて、図2(c)に示すように、ビアホール15の所定の高さまで第2金属部22を形成する。第2金属部を形成する方法としては、例えば、電解めっきによりCuめっきを析出させる方法等が挙げられる。
Subsequently, as shown in FIG. 2C, the second metal portion 22 is formed up to a predetermined height of the via hole 15. Examples of the method for forming the second metal part include a method of depositing Cu plating by electrolytic plating.
さらに、図2(d)に示すように、ビアホール15が埋まるように第1金属部21を形成することにより、ビア導体20を形成する。第1金属部を形成する方法としては、例えば、電解めっきによりSnめっきを析出させる方法、あるいは、Sn-Ag系等の導電ペーストを充填させる方法等が挙げられる。
Further, as shown in FIG. 2D, the via conductor 20 is formed by forming the first metal portion 21 so as to fill the via hole 15. Examples of the method for forming the first metal part include a method of depositing Sn plating by electrolytic plating, a method of filling a conductive paste such as Sn—Ag, and the like.
その後、図2(e)に示すように、樹脂層10A上の金属層32aをエッチングすることにより、所望のパターンを有する第2導体層32を形成する。例えば、金属層32aの表面に所定のレジストパターンを形成し、エッチング液に浸漬してエッチングを行った後、レジストパターンを除去することにより第2導体層32を形成することができる。
Thereafter, as shown in FIG. 2E, the metal layer 32a on the resin layer 10A is etched to form the second conductor layer 32 having a desired pattern. For example, the second conductor layer 32 can be formed by forming a predetermined resist pattern on the surface of the metal layer 32a, immersing in an etching solution and performing etching, and then removing the resist pattern.
別途、樹脂層10Bを有する樹脂シートに対しても、ビア導体20を形成した後、第1導体層31を形成しておく(図2(f)参照)。なお、樹脂層10B上の第1導体層31は、樹脂層10Aにとっての第1導体層であり、樹脂層10Bにとっては第2導体層に該当する。また、樹脂層10Bを有する樹脂シートに対しては、ビア導体20を形成した後、第1導体層33を形成しておく。
Separately, the first conductor layer 31 is formed on the resin sheet having the resin layer 10B after the via conductor 20 is formed (see FIG. 2F). The first conductor layer 31 on the resin layer 10B is a first conductor layer for the resin layer 10A and corresponds to a second conductor layer for the resin layer 10B. For the resin sheet having the resin layer 10B, the first conductor layer 33 is formed after the via conductor 20 is formed.
そして、図2(f)に示すように、これらの樹脂シートを積層し、真空ホットプレスにより圧着する。なお、図2(f)では、図1(a)と同様、上側の主面に第2導体層32が配置されている。この熱圧着処理により、複数の樹脂シートが一体化される。また、熱圧着処理によって、ビア導体中の第1の金属が溶融し、第1金属部と第1導体層との界面に両者の合金相が形成される。
And as shown in FIG.2 (f), these resin sheets are laminated | stacked and crimped | bonded by a vacuum hot press. In FIG. 2F, the second conductor layer 32 is disposed on the upper main surface as in FIG. A plurality of resin sheets are integrated by this thermocompression treatment. Further, the first metal in the via conductor is melted by the thermocompression treatment, and an alloy phase of both is formed at the interface between the first metal portion and the first conductor layer.
以上により、図1に示す樹脂回路基板1を製造することができる。
Thus, the resin circuit board 1 shown in FIG. 1 can be manufactured.
なお、図1(a)に示す樹脂回路基板1は、複数の樹脂層を備える多層構造を有するものであるが、本発明の一実施の形態に係る樹脂回路基板は、複数の樹脂層を備える多層構造を有していてもよいし、1つの樹脂層のみを備える単層構造を有していてもよい。
In addition, although the resin circuit board 1 shown to Fig.1 (a) has a multilayer structure provided with a some resin layer, the resin circuit board concerning one embodiment of this invention is provided with a some resin layer. It may have a multilayer structure or may have a single layer structure including only one resin layer.
以下、本発明の一実施の形態に係る樹脂回路基板をより具体的に開示した実施例を示す。なお、本発明は、これらの実施例のみに限定されるものではない。
Examples in which the resin circuit board according to one embodiment of the present invention is disclosed more specifically will be described below. In addition, this invention is not limited only to these Examples.
厚さ5μmのCu箔が貼り付けられた、厚さ100μmのガラスエポキシ樹脂シート(樹脂層)を準備した。ガラスエポキシ樹脂シートの耐熱温度は、430℃であった。
A glass epoxy resin sheet (resin layer) having a thickness of 100 μm, to which a Cu foil having a thickness of 5 μm was attached, was prepared. The heat resistant temperature of the glass epoxy resin sheet was 430 ° C.
ガラスエポキシ樹脂シートに対して、レーザー加工機を用いて直径100μmのビア加工を行い、所定の位置にビアホールを形成した。その後、デスミア処理を行った。
Via processing with a diameter of 100 μm was performed on the glass epoxy resin sheet using a laser processing machine, and via holes were formed at predetermined positions. Thereafter, desmear treatment was performed.
次に、電解めっきにより、ビアホールにCuめっきを析出させた。Cuめっきの厚さが20μm、30μm、90μm、98μmである4水準を作製した。
Next, Cu plating was deposited in the via hole by electrolytic plating. Four levels were prepared with Cu plating thicknesses of 20 μm, 30 μm, 90 μm, and 98 μm.
さらに、上記4水準のサンプルに対して、ビアホールが埋まるように電解めっきを行い、Snめっきを析出させた。つまり、Cuめっきの厚さが20μm、30μm、90μm、98μmである4水準のサンプルに対して、厚さ80μm、70μm、10μm、2μmのSnめっきをそれぞれ析出させたサンプルA-2、A-3、A-4及びA-5を作製した。
Furthermore, electrolytic plating was performed on the above four-level samples so as to fill the via holes, and Sn plating was deposited. That is, samples A-2 and A-3 in which Sn plating of 80 μm, 70 μm, 10 μm, and 2 μm in thickness was deposited on four levels of samples with Cu plating thicknesses of 20 μm, 30 μm, 90 μm, and 98 μm, respectively. , A-4 and A-5 were prepared.
また、上記4水準のサンプルに対して、Cuめっきを析出させたビアホールにSn-Ag系の導電ペーストを充填させたサンプルB-2、B-3、B-4及びB-5を作製した。
Samples B-2, B-3, B-4, and B-5 were prepared by filling Sn-Ag conductive paste into via holes in which Cu plating was deposited with respect to the above four-level samples.
さらに、比較例として、Cuめっきを析出させていないサンプルに対して、Snめっきを100μm析出させたサンプルA-1、及び、Sn-Ag系の導電ペーストを充填させたサンプルB-1を作製した。
Furthermore, as a comparative example, Sample A-1 in which Sn plating was deposited to 100 μm and Sample B-1 in which Sn—Ag conductive paste was filled were prepared with respect to a sample in which Cu plating was not deposited. .
次に、Cu箔のない樹脂面に保護シートを貼り、後加工でビア導体が侵食されないように保護した後、Cu箔面にレジストパターンを印刷形成した。そして、レジストパターンを形成していないCu箔をエッチングした後、レジストパターンを剥離した。これにより、所定のCu箔パターンとビア導体とを有するガラスエポキシ樹脂シートを作製した。
Next, a protective sheet was applied to the resin surface without the Cu foil, and the via conductor was protected from being eroded by post-processing, and then a resist pattern was printed on the Cu foil surface. And after etching Cu foil which has not formed the resist pattern, the resist pattern was peeled. This produced the glass epoxy resin sheet which has a predetermined Cu foil pattern and a via conductor.
以上のように、10水準のサンプルA-1~A-5及びB-1~B-5を作製した。
図3(a)は、比較例のサンプルを模式的に示す断面図であり、図3(b)は、実施例のサンプルを模式的に示す断面図である。
図3(a)に示すように、比較例のサンプルでは、第2金属部22のみを含むビア導体20が形成されており、図3(b)に示すように、実施例のサンプルでは、第1金属部21と第2金属部22とを含むビア導体20が形成されている。 As described above, 10-level samples A-1 to A-5 and B-1 to B-5 were produced.
FIG. 3A is a cross-sectional view schematically showing a sample of a comparative example, and FIG. 3B is a cross-sectional view schematically showing a sample of an example.
As shown in FIG. 3A, in the sample of the comparative example, the viaconductor 20 including only the second metal part 22 is formed. As shown in FIG. A via conductor 20 including a first metal part 21 and a second metal part 22 is formed.
図3(a)は、比較例のサンプルを模式的に示す断面図であり、図3(b)は、実施例のサンプルを模式的に示す断面図である。
図3(a)に示すように、比較例のサンプルでは、第2金属部22のみを含むビア導体20が形成されており、図3(b)に示すように、実施例のサンプルでは、第1金属部21と第2金属部22とを含むビア導体20が形成されている。 As described above, 10-level samples A-1 to A-5 and B-1 to B-5 were produced.
FIG. 3A is a cross-sectional view schematically showing a sample of a comparative example, and FIG. 3B is a cross-sectional view schematically showing a sample of an example.
As shown in FIG. 3A, in the sample of the comparative example, the via
別途、厚さ200μmのCu箔付きガラスエポキシ樹脂材(硬化済み)を準備した。このCu箔面に、前述のサンプルA-1~A-5及びB-1~B-5を積層し、約260℃の真空ホットプレスにて圧着した。
Separately, a glass epoxy resin material (cured) with a Cu foil having a thickness of 200 μm was prepared. The samples A-1 to A-5 and B-1 to B-5 described above were laminated on the Cu foil surface, and pressure-bonded by a vacuum hot press at about 260 ° C.
図4は、実施例のサンプルを備える樹脂回路基板を模式的に示す断面図である。
図4に示す樹脂回路基板2では、1つのビア導体20に対し、測定端子用にパターニングした直径250μmのCu箔パターン(第2導体層)32が第2金属部22側に形成されている。また、反対面であるビア導体20の第1金属部21側には、共通端子となるCu箔(第1導体層)31が形成されている。 FIG. 4 is a cross-sectional view schematically showing a resin circuit board including the sample of the example.
In theresin circuit board 2 shown in FIG. 4, a Cu foil pattern (second conductor layer) 32 having a diameter of 250 μm patterned for a measurement terminal is formed on one via conductor 20 on the second metal portion 22 side. Further, a Cu foil (first conductor layer) 31 serving as a common terminal is formed on the first metal portion 21 side of the via conductor 20 which is the opposite surface.
図4に示す樹脂回路基板2では、1つのビア導体20に対し、測定端子用にパターニングした直径250μmのCu箔パターン(第2導体層)32が第2金属部22側に形成されている。また、反対面であるビア導体20の第1金属部21側には、共通端子となるCu箔(第1導体層)31が形成されている。 FIG. 4 is a cross-sectional view schematically showing a resin circuit board including the sample of the example.
In the
それぞれのサンプルについて、積層直後の導通と、250℃リフローを3回通した後の導通を各n=20で計測した。20個中、良好な導通があった数を表1に示す。表1では、リフロー後の導通数が0個以上4個以下のものを×(不良)、5個以上19個以下のものを△(可)、20個のものを○(良)と判定した。
About each sample, the conduction | electrical_connection immediately after lamination | stacking and the conduction | electrical_connection after passing 250 degreeC reflow 3 times were measured by each n = 20. Table 1 shows the number of good conduction among the 20 pieces. In Table 1, when the number of continuity after reflow was 0 or more and 4 or less, it was determined as x (defect), 5 or more and 19 or less as △ (good), and 20 as ○ (good). .
表1より、ビア導体にCuめっきが含まれるサンプルA-2~A-5及びB-2~B-5では、ビア導体にCuめっきが含まれないサンプルA-1及びB-1に比べてリフロー後の導通が良好であり、接続信頼性に優れることが確認された。サンプルA-3~A-5及びB-3~B-5の結果から、Cuめっきの割合が30vol%以上であると、接続信頼性がさらに向上することが確認された。
From Table 1, Samples A-2 to A-5 and B-2 to B-5 where the via conductor contains Cu plating are compared to Samples A-1 and B-1 where the via conductor does not contain Cu plating. It was confirmed that the conduction after reflow was good and the connection reliability was excellent. From the results of Samples A-3 to A-5 and B-3 to B-5, it was confirmed that the connection reliability was further improved when the Cu plating ratio was 30 vol% or more.
1,2 樹脂回路基板
10A,10B 樹脂層
15 ビアホール
20 ビア導体
21 第1金属部
22 第2金属部
31,33 第1導体層
32 第2導体層
32a 第2導体層用の金属層 DESCRIPTION OFSYMBOLS 1, 2 Resin circuit board 10A, 10B Resin layer 15 Via hole 20 Via conductor 21 1st metal part 22 2nd metal part 31, 33 1st conductor layer 32 2nd conductor layer 32a Metal layer for 2nd conductor layers
10A,10B 樹脂層
15 ビアホール
20 ビア導体
21 第1金属部
22 第2金属部
31,33 第1導体層
32 第2導体層
32a 第2導体層用の金属層 DESCRIPTION OF
Claims (9)
- ビアホールを有する樹脂層と、
前記ビアホール内に設けられたビア導体と、
前記樹脂層の一方主面に設けられ、前記ビア導体と接続された第1導体層と、を備える樹脂回路基板であって、
前記ビア導体は、前記第1導体層に接している第1金属部と、第2金属部とを含み、
前記第1金属部は、前記樹脂層の耐熱温度未満の融点を有する第1の金属を含み、
前記第2金属部は、前記樹脂層の耐熱温度以上の融点を有する第2の金属を含むことを特徴とする樹脂回路基板。 A resin layer having via holes;
Via conductors provided in the via holes;
A resin circuit board comprising: a first conductor layer provided on one main surface of the resin layer and connected to the via conductor;
The via conductor includes a first metal part in contact with the first conductor layer, and a second metal part,
The first metal part includes a first metal having a melting point lower than a heat resistant temperature of the resin layer,
The resin circuit board, wherein the second metal part includes a second metal having a melting point equal to or higher than a heat resistant temperature of the resin layer. - 前記ビア導体に占める前記第2金属部の割合は、30vol%以上である請求項1に記載の樹脂回路基板。 2. The resin circuit board according to claim 1, wherein a ratio of the second metal portion in the via conductor is 30 vol% or more.
- 前記第1の金属の融点は、500℃未満である請求項1又は2に記載の樹脂回路基板。 The resin circuit board according to claim 1, wherein the melting point of the first metal is less than 500 ° C. 3.
- 前記第1の金属は、Snである請求項1~3のいずれか1項に記載の樹脂回路基板。 The resin circuit board according to any one of claims 1 to 3, wherein the first metal is Sn.
- 前記第1金属部と前記第1導体層との界面に、両者の合金相が形成されている請求項1~4のいずれか1項に記載の樹脂回路基板。 The resin circuit board according to any one of claims 1 to 4, wherein an alloy phase of both of them is formed at an interface between the first metal part and the first conductor layer.
- 前記第2の金属の融点は、500℃以上である請求項1~5のいずれか1項に記載の樹脂回路基板。 6. The resin circuit board according to claim 1, wherein the melting point of the second metal is 500 ° C. or higher.
- 前記第2の金属は、Cuである請求項1~6のいずれか1項に記載の樹脂回路基板。 The resin circuit board according to any one of claims 1 to 6, wherein the second metal is Cu.
- 前記樹脂層の他方主面に設けられ、前記ビア導体と接続された第2導体層をさらに備え、
前記第2金属部が前記第2導体層に接している請求項1~7のいずれか1項に記載の樹脂回路基板。 A second conductor layer provided on the other main surface of the resin layer and connected to the via conductor;
The resin circuit board according to any one of claims 1 to 7, wherein the second metal portion is in contact with the second conductor layer. - 前記第2導体層は、前記第2金属部に含まれる前記第2の金属と同じ金属から構成されている請求項8に記載の樹脂回路基板。 The resin circuit board according to claim 8, wherein the second conductor layer is made of the same metal as the second metal included in the second metal portion.
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---|---|---|---|---|
JP2020167335A (en) * | 2019-03-29 | 2020-10-08 | Tdk株式会社 | Insulating sheet for multilayer substrate, multilayer substrate, and manufacturing method of the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10190232A (en) * | 1996-12-27 | 1998-07-21 | Shinko Electric Ind Co Ltd | Multilayer interconnection board and its manufacture |
JPH11204943A (en) * | 1998-01-08 | 1999-07-30 | Hitachi Ltd | Electronic circuit board and manufacture thereof |
JP2006108211A (en) * | 2004-10-01 | 2006-04-20 | North:Kk | Wiring board, multilayered wiring circuit board using the board, and method of manufacturing the multilayered wiring circuit board |
-
2017
- 2017-10-02 WO PCT/JP2017/035779 patent/WO2018079198A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10190232A (en) * | 1996-12-27 | 1998-07-21 | Shinko Electric Ind Co Ltd | Multilayer interconnection board and its manufacture |
JPH11204943A (en) * | 1998-01-08 | 1999-07-30 | Hitachi Ltd | Electronic circuit board and manufacture thereof |
JP2006108211A (en) * | 2004-10-01 | 2006-04-20 | North:Kk | Wiring board, multilayered wiring circuit board using the board, and method of manufacturing the multilayered wiring circuit board |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020167335A (en) * | 2019-03-29 | 2020-10-08 | Tdk株式会社 | Insulating sheet for multilayer substrate, multilayer substrate, and manufacturing method of the same |
CN111757596A (en) * | 2019-03-29 | 2020-10-09 | Tdk株式会社 | Insulating sheet for multilayer substrate, and method for producing multilayer substrate |
US11546989B2 (en) | 2019-03-29 | 2023-01-03 | Tdk Corporation | Multilayer board insulating sheet, multilayer board, and method of manufacturing multilayer board |
JP7238548B2 (en) | 2019-03-29 | 2023-03-14 | Tdk株式会社 | Insulating sheet for multilayer substrate, multilayer substrate, and method for manufacturing multilayer substrate |
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