JP5633256B2 - Manufacturing method of component-embedded substrate - Google Patents

Manufacturing method of component-embedded substrate Download PDF

Info

Publication number
JP5633256B2
JP5633256B2 JP2010196337A JP2010196337A JP5633256B2 JP 5633256 B2 JP5633256 B2 JP 5633256B2 JP 2010196337 A JP2010196337 A JP 2010196337A JP 2010196337 A JP2010196337 A JP 2010196337A JP 5633256 B2 JP5633256 B2 JP 5633256B2
Authority
JP
Japan
Prior art keywords
resin sheet
resin
component
electronic component
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010196337A
Other languages
Japanese (ja)
Other versions
JP2012054436A (en
Inventor
千阪　俊介
俊介 千阪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2010196337A priority Critical patent/JP5633256B2/en
Publication of JP2012054436A publication Critical patent/JP2012054436A/en
Application granted granted Critical
Publication of JP5633256B2 publication Critical patent/JP5633256B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

本発明は、電子部品を内蔵する部品内蔵基板の製造方法に関する。   The present invention relates to a method of manufacturing a component-embedded substrate that incorporates an electronic component.

従来の部品内蔵基板は、例えば特許文献１に記載の基板が知られている。以下に、図４を参照しながら、特許文献１に記載の部品内蔵基板について説明する。図４は部品内蔵基板を示す断面図である。   As a conventional component built-in substrate, for example, a substrate described in Patent Document 1 is known. The component built-in substrate described in Patent Document 1 will be described below with reference to FIG. FIG. 4 is a sectional view showing the component built-in substrate.

部品内蔵基板１０１は、熱可塑性樹脂からなる複数の絶縁層１０２が積層、熱圧着され構成されている。一部の絶縁層１０２には銅箔等からなる導体パターン１０３が形成されており、導体パターン１０３は、ビア１０４により部品内蔵基板の主面及び主面と反対の面に形成されたランド１０５と電気的に接続されている。部品内蔵基板１０１の内部には、電子部品１０６が内蔵されている。電子部品１０６の電極１０６ａは、前記ビア１０４により前記導体パターン１０３及び前記ランド１０５と電気的に接続されている。   The component-embedded substrate 101 is configured by laminating a plurality of insulating layers 102 made of a thermoplastic resin and thermocompression bonding. A conductive pattern 103 made of copper foil or the like is formed on some of the insulating layers 102. The conductive pattern 103 includes a land 105 formed on the main surface of the component-embedded substrate and a surface opposite to the main surface by vias 104. Electrically connected. An electronic component 106 is built in the component built-in substrate 101. The electrode 106 a of the electronic component 106 is electrically connected to the conductor pattern 103 and the land 105 through the via 104.

特開２００７−３０５６７４号公報JP 2007-305694 A

このような部品内蔵基板は、絶縁層に電子部品が内蔵されている部分や導体パターン、ビア等が形成されている部分と、絶縁層のみで構成される部分によって、熱圧着した後の部品内蔵基板表面の高さに違いが生じることがある。高さに違いが生じると、部品内蔵基板上に他の部品等を実装する場合、または部品内蔵基板を別の基板等の上に実装する場合に、他の部品や基板との接続が不安定になるという問題点があった。   Such a component-embedded board has a component embedded after thermocompression bonding by a portion where an electronic component is embedded in an insulating layer, a portion where a conductor pattern, a via, or the like is formed, and a portion composed only of an insulating layer. Differences may occur in the height of the substrate surface. If there is a difference in height, when mounting other components on the component-embedded board, or mounting the component-embedded board on another substrate, the connection with other components or the board is unstable. There was a problem of becoming.

本発明は、これらの状況を鑑み、熱可塑性樹脂からなる樹脂シートを複数枚積層する際、複数の開口部が形成された樹脂シートを積層することにより、表面が平坦な部品内蔵基板の製造方法を提供しようとするものである。 In view of these circumstances, the present invention is a method for manufacturing a component-embedded substrate having a flat surface by laminating a plurality of resin sheets made of a thermoplastic resin and laminating resin sheets having a plurality of openings. Is to provide.

本発明に係る部品内蔵基板の製造方法は、熱可塑性樹脂からなる複数枚の樹脂シートが相互に接着されて絶縁基材が形成され、前記絶縁基材中に電子部品が埋め込まれてなる部品内蔵基板の製造方法であって、前記樹脂シートとして、前記電子部品を挿入するための貫通孔が形成された第１の樹脂シートと、前記貫通孔が形成されていない第２の樹脂シートと、複数の開口部を有する第３の樹脂シートとを準備する樹脂シート準備工程と、前記第１の樹脂シートと前記第２の樹脂シートと前記第３の樹脂シートとを積層する樹脂シート積層工程と、前記貫通孔で形成されるキャビティ内に前記電子部品を挿入配置する電子部品配置工程と、前記積層した樹脂シートの積層体を熱圧着する熱圧着工程とを備え、前記熱圧着工程において、前記第３の樹脂シートの前記開口部に他の前記樹脂シートの樹脂が流動するものである。 In the method for manufacturing a component-embedded substrate according to the present invention, a plurality of resin sheets made of a thermoplastic resin are bonded to each other to form an insulating base, and the electronic component is embedded in the insulating base. A method for manufacturing a substrate, wherein the resin sheet includes a first resin sheet in which a through hole for inserting the electronic component is formed, a second resin sheet in which the through hole is not formed, and a plurality of resin sheets A resin sheet preparation step of preparing a third resin sheet having a plurality of openings, a resin sheet lamination step of laminating the first resin sheet, the second resin sheet, and the third resin sheet, comprising an electronic component disposing step of inserting placing the electronic component into a cavity formed in the through hole, and a thermocompression bonding step of a laminate of the resin sheet described above laminated thermocompression bonding, in the thermocompression bonding step, the first Other resins of the resin sheet in the opening of the resin sheet is intended to flow.

複数の開口部を有する第３の樹脂シートを積層することで、熱圧着する際、電子部品等の領域の樹脂が第３の樹脂シートの開口部へと流動する。この樹脂の流動により基板内部の段差や歪みを無くし、その結果、表面が平坦な部品内蔵基板の製造が可能となる。 By laminating the third resin sheet having a plurality of openings, the resin in a region such as an electronic component flows into the openings of the third resin sheet when thermocompression bonding is performed. This flow of resin eliminates steps and distortion inside the substrate, and as a result, it is possible to manufacture a component-embedded substrate having a flat surface.

本発明に係る部品内蔵基板の製造方法は、好ましくは、前記第３の樹脂シートの前記開口部は、積層方向において前記電子部品と重なる位置に設けられるものである。
また、本発明に係る部品内蔵基板の製造方法は、好ましくは、前記樹脂シート積層工程は、前記キャビティを形成するように前記第１の樹脂シートと前記第２の樹脂シートを積層する過程と、前記電子部品配置工程を経た後に、前記キャビティを覆うように第２の樹脂シートを積層する過程とを含み、前記過程のうち少なくとも一方の過程で第３の樹脂シートを積層するようにしたものである。 In the method for manufacturing a component-embedded substrate according to the present invention, preferably, the opening of the third resin sheet is provided at a position overlapping the electronic component in the stacking direction.
In the method for manufacturing a component-embedded substrate according to the present invention, preferably, the resin sheet laminating step includes laminating the first resin sheet and the second resin sheet so as to form the cavity; A step of laminating a second resin sheet so as to cover the cavity after the electronic component placement step, and laminating a third resin sheet in at least one of the steps. is there.

複数の開口部を有する第３の樹脂シートを積層することで、熱圧着する際、電子部品等の領域の樹脂が第３の樹脂シートの開口部へと流動する。この樹脂の流動により基板内部の段差や歪みを無くし、その結果、表面が平坦な部品内蔵基板の製造が可能となる。 By laminating the third resin sheet having a plurality of openings, the resin in a region such as an electronic component flows into the openings of the third resin sheet when thermocompression bonding is performed. This flow of resin eliminates steps and distortion inside the substrate, and as a result, it is possible to manufacture a component-embedded substrate having a flat surface.

本発明によれば、複数の開口部を有する第３の樹脂シートを積層することで、熱圧着する際、電子部品等の領域の樹脂が第３の樹脂シートの開口部へと流動する。この樹脂の流動により基板内部の段差や歪みを無くし、その結果、表面が平坦な部品内蔵基板の製造が可能となる。 According to the present invention, by laminating the third resin sheet having a plurality of openings, the resin in the region of the electronic component or the like flows into the openings of the third resin sheet when thermocompression bonding is performed. This flow of resin eliminates steps and distortion inside the substrate, and as a result, it is possible to manufacture a component-embedded substrate having a flat surface.

本発明の実施形態による部品内蔵基板の製造方法を説明するための製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process for demonstrating the manufacturing method of the component built-in board | substrate by embodiment of this invention. 図１に続く製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process following FIG. 図２に続く製造工程を示す断面図である。FIG. 3 is a cross-sectional view showing a manufacturing step that follows FIG. 2. 従来の部品内蔵基板の構造を示す断面図である。It is sectional drawing which shows the structure of the conventional component built-in board | substrate.

以下に、本発明の実施形態に係る部品内蔵基板の製造方法について、図１〜図３を参照して説明する。   Below, the manufacturing method of the component built-in board | substrate which concerns on embodiment of this invention is demonstrated with reference to FIGS.

まず、熱可塑性樹脂であるＬＣＰ（液晶ポリマー）からなる樹脂シート１ａを用意する。樹脂シート１ａの構成材料としては、ＬＣＰの他にＰＥＥＫ（ポリエーテルエーテルケトン）、ＰＥＩ（ポリエーテルイミド）、ＰＰＳ（ポニフェニレンスルファイド）、ＰＩ（ポリイミド）等が用いられる。この樹脂シート１ａは片面にＣｕからなる厚さ１８μｍの導体箔４を有している。なお、導体箔４の材料はＣｕ以外にＡｇ、Ａｌ、ＳＵＳ、Ｎｉ、Ａｕやその合金でもよい。また、この実施形態では１８μｍの厚さの導体箔を用いたが、導体箔４の厚みは３〜４０μｍ程度で回路形成が可能な厚さであればよい。（図１（ａ））。   First, a resin sheet 1a made of LCP (liquid crystal polymer) that is a thermoplastic resin is prepared. As a constituent material of the resin sheet 1a, PEEK (polyetheretherketone), PEI (polyetherimide), PPS (poniphenylene sulfide), PI (polyimide) and the like are used in addition to LCP. This resin sheet 1a has a conductor foil 4 made of Cu having a thickness of 18 μm on one side. The material of the conductor foil 4 may be Ag, Al, SUS, Ni, Au, or an alloy thereof other than Cu. In this embodiment, a conductor foil having a thickness of 18 μm is used. However, the conductor foil 4 may have a thickness of about 3 to 40 μm so that a circuit can be formed. (FIG. 1 (a)).

次に、前記樹脂シート１ａの樹脂シート側に炭酸ガスレーザーを照射してビア用の孔５ａを形成する。その後、ビア用の孔５ａのスミアを除去する。（図１（ｂ））。   Next, a carbon dioxide laser is irradiated on the resin sheet side of the resin sheet 1a to form a via hole 5a. Thereafter, the smear in the via hole 5a is removed. (FIG. 1 (b)).

次に、前記樹脂シート１ａの導体箔４の上にスクリーン印刷等で所望の回路パターンに対応するレジスト６を印刷する。（図１（ｃ））。   Next, a resist 6 corresponding to a desired circuit pattern is printed on the conductive foil 4 of the resin sheet 1a by screen printing or the like. (FIG. 1 (c)).

次に、前記導体箔４のうち前記レジスト６で被覆されていない部分をエッチングする。その後、レジスト６を除去して回路７を形成する。（図１（ｄ））。   Next, the portion of the conductor foil 4 that is not covered with the resist 6 is etched. Thereafter, the resist 6 is removed to form a circuit 7. (FIG. 1 (d)).

次に、前記ビア用の孔５ａに、スクリーン印刷等により導電性ペーストを充填し、ビア５を形成する。充填する導電性ペーストはＣｕを主成分とする。この導電性ペーストは、熱圧着する温度で前記回路７の導体金属と合金層を形成するような金属粉を適量入れるとよい。この導電性ペーストには導体金属としてＣｕを用いているので、この導電性ペーストはＡｇ／Ｃｕ／Ｎｉのうち少なくとも１種類と、Ｓｎ／Ｂｉ／Ｚｎのうち少なくとも１種類を入れるとよい。（図２（ｅ））。   Next, the via 5 is formed by filling the via hole 5a with a conductive paste by screen printing or the like. The conductive paste to be filled contains Cu as a main component. The conductive paste may contain an appropriate amount of metal powder that forms an alloy layer with the conductor metal of the circuit 7 at a temperature for thermocompression bonding. Since Cu is used as the conductive metal in this conductive paste, this conductive paste may contain at least one of Ag / Cu / Ni and at least one of Sn / Bi / Zn. (FIG. 2 (e)).

次に、パンチ加工により後述の電子部品９と同じか、もしくはそれより大きい面積の貫通孔８ａを形成する。これにより樹脂シート１ａは第１の樹脂シート１となる。（図２（ｆ））。   Next, a through hole 8a having the same area as or larger than an electronic component 9 described later is formed by punching. As a result, the resin sheet 1 a becomes the first resin sheet 1. (FIG. 2 (f)).

なお、図２（ｈ）に示す第２の樹脂シート２は、前述の第１の樹脂シート１の製造工程に対し、図２（ｆ）に示す貫通孔８ａの形成工程を省略して形成することで、第２の樹脂シート２となる。   Note that the second resin sheet 2 shown in FIG. 2 (h) is formed by omitting the step of forming the through holes 8a shown in FIG. 2 (f) with respect to the manufacturing process of the first resin sheet 1 described above. Thus, the second resin sheet 2 is obtained.

次に、前記第１の樹脂シート１や第２の樹脂シート２と同じ熱可塑性樹脂からなる樹脂シートを用意する。次に、この樹脂シートに炭酸ガスレーザーを照射して、ビア用の孔を形成する。その後、ビア用の孔のスミアを除去し、スクリーン印刷等により導電性ペーストを充填してビア５を形成する。次に、この樹脂シート全面にレーザー加工等で柱状の開口部を多数形成する。これにより、この樹脂シートは第３の樹脂シート３となる。   Next, a resin sheet made of the same thermoplastic resin as the first resin sheet 1 and the second resin sheet 2 is prepared. Next, the resin sheet is irradiated with a carbon dioxide laser to form via holes. Thereafter, smears in via holes are removed, and conductive paste is filled by screen printing or the like to form vias 5. Next, a large number of columnar openings are formed on the entire surface of the resin sheet by laser processing or the like. As a result, the resin sheet becomes the third resin sheet 3.

この実施形態において、第３の樹脂シート３の開口部は、第３の樹脂シート３の全面にわたって形成されているが、第３の樹脂シート３の一部分に形成してもよい。なお、開口部は柱状の形態だけではなく、スリット状やメッシュ状の形態でもよい。   In this embodiment, the opening of the third resin sheet 3 is formed over the entire surface of the third resin sheet 3, but may be formed in a part of the third resin sheet 3. Note that the opening may have not only a columnar shape but also a slit shape or a mesh shape.

また、第３の樹脂シート３は、前記第１の樹脂シート１及び第２の樹脂シート２と同一素材のものを用いる他に、第１樹脂シート１及び第２の樹脂シート２に比べてＴｇやＴｍが１０℃〜５０℃低い樹脂シートを使用することも可能である。（図２（ｇ））。   The third resin sheet 3 is made of the same material as the first resin sheet 1 and the second resin sheet 2, and has a Tg higher than that of the first resin sheet 1 and the second resin sheet 2. It is also possible to use a resin sheet having a Tm of 10 ° C to 50 ° C lower. (FIG. 2 (g)).

次に、前記第１の樹脂シート１及び前記第２の樹脂シート２を所定枚数積層する。まず、基板の下面に回路７が配置されるよう、第２の樹脂シート２の上下を裏返して使用する。これにより基板の下面に配置された回路７は外部電極１０となる。次に、第２の樹脂シート２の上に、上下を裏返した第１の樹脂シート１を２枚配置する。配置する際、第１の樹脂シート１に形成された貫通孔８ａが連なって後述の電子部品９が挿入されるための凹部が形成されるように配置する。その後、後述の熱圧着温度より低い温度（１５０〜２００℃）で仮圧着する。これにより、第１の樹脂シート１の貫通孔８ａが連なりキャビティ８が形成される。（図２（ｈ））。   Next, a predetermined number of the first resin sheets 1 and the second resin sheets 2 are laminated. First, the second resin sheet 2 is turned upside down so that the circuit 7 is disposed on the lower surface of the substrate. As a result, the circuit 7 disposed on the lower surface of the substrate becomes the external electrode 10. Next, two first resin sheets 1 that are turned upside down are arranged on the second resin sheet 2. When arrange | positioning, it arrange | positions so that the through-hole 8a formed in the 1st resin sheet 1 may continue and the recessed part for the below-mentioned electronic component 9 to be inserted may be formed. Then, temporary pressure bonding is performed at a temperature (150 to 200 ° C.) lower than a thermocompression bonding temperature described later. Thereby, the through-hole 8a of the 1st resin sheet 1 continues, and the cavity 8 is formed. (FIG. 2 (h)).

次に、電子部品９を前記キャビティ８に挿入する。（図３（ｉ））。   Next, the electronic component 9 is inserted into the cavity 8. (FIG. 3 (i)).

次に、前記第１の樹脂シート１及び電子部品９の上に、別の第２の樹脂シート２を配置する。この第２の樹脂シート２は、第２の樹脂シート２に形成された回路７が基板の下面に形成された外部電極１０側とは反対側、すなわち基板の上面側にくるように配置する。次に、この第２の樹脂シート２の上に、前記第３の樹脂シート３を、さらにこの第３の樹脂シート３の上に別の第２の樹脂シート２を配置する。この第３の樹脂シート３及び第２の樹脂シートは、それぞれの樹脂シートに形成された回路７が基板の上面側にくるように配置する。基板の上面に位置する第２の樹脂シート２に形成された回路７は、他のＩＣ部品等を実装するための電極１１となる。（図３（ｊ））。   Next, another second resin sheet 2 is disposed on the first resin sheet 1 and the electronic component 9. The second resin sheet 2 is arranged such that the circuit 7 formed on the second resin sheet 2 is on the opposite side of the external electrode 10 formed on the lower surface of the substrate, that is, on the upper surface side of the substrate. Next, the third resin sheet 3 is disposed on the second resin sheet 2, and another second resin sheet 2 is disposed on the third resin sheet 3. The third resin sheet 3 and the second resin sheet are arranged so that the circuit 7 formed on each resin sheet is on the upper surface side of the substrate. The circuit 7 formed on the second resin sheet 2 located on the upper surface of the substrate serves as an electrode 11 for mounting other IC components and the like. (FIG. 3 (j)).

次に、前記第１の樹脂シート１、第２の樹脂シート２、第３の樹脂シート３を２５０℃〜３００℃で熱圧着する。熱圧着することにより、隣り合った樹脂シートは相互に接着されて絶縁基材１２が形成される。熱圧着の際、電子部品９や回路７、ビア５の領域の樹脂は、積層方向から見て電子部品９や回路７、ビア５がない領域の第３の樹脂シート３に形成された開口部に流動する。その結果、平坦な表面の部品内蔵基板の製造が可能となる。また、熱圧着することにより樹脂シートが軟化し流動するため、前記電子部品９の周りの隙間は周辺の樹脂シートの流動により埋められる。   Next, the first resin sheet 1, the second resin sheet 2, and the third resin sheet 3 are thermocompression bonded at 250 ° C. to 300 ° C. By the thermocompression bonding, the adjacent resin sheets are bonded to each other to form the insulating base material 12. At the time of thermocompression bonding, the resin in the region of the electronic component 9, the circuit 7, and the via 5 is an opening formed in the third resin sheet 3 in the region where the electronic component 9, the circuit 7, and the via 5 are not present as viewed from the stacking direction. To flow. As a result, it is possible to manufacture a component-embedded substrate having a flat surface. Further, since the resin sheet softens and flows by thermocompression bonding, the gap around the electronic component 9 is filled by the flow of the surrounding resin sheet.

熱圧着後、部品内蔵基板の上面及び下面に形成された外部電極１０及び電極１１の表面に、ＮｉやＡｕでめっき処理を施す。（図３（ｋ））。   After thermocompression bonding, the surface of the external electrode 10 and the electrode 11 formed on the upper and lower surfaces of the component-embedded substrate is plated with Ni or Au. (FIG. 3 (k)).

なお、この実施形態では第１の樹脂シート１を２枚積層するものであったが、内蔵する電子部品９の挿入が可能なキャビティを形成するために、使用する第１の樹脂シート１の枚数を適宜変更することが可能である。また、第２の樹脂シート２及び第３の樹脂シート３の枚数についても、所望する基板に応じて変更することが可能である。さらに、第１の樹脂シート１、第２の樹脂シート２、第３の樹脂シート３を積層する順番は、所望する基板に応じて変更することが可能である。その際、第３の樹脂シート３は、部品が内蔵された第１の樹脂シート１と、外部電極１０の設けられた基板の下面との間に配置することも可能である。   In this embodiment, the two first resin sheets 1 are stacked. However, the number of the first resin sheets 1 used to form a cavity into which the built-in electronic component 9 can be inserted. Can be changed as appropriate. Further, the number of the second resin sheet 2 and the third resin sheet 3 can be changed according to a desired substrate. Furthermore, the order of stacking the first resin sheet 1, the second resin sheet 2, and the third resin sheet 3 can be changed according to the desired substrate. At that time, the third resin sheet 3 may be disposed between the first resin sheet 1 in which components are incorporated and the lower surface of the substrate on which the external electrode 10 is provided.

１：第１の樹脂シート
２：第２の樹脂シート
３：第３の樹脂シート
４：導体箔
５：ビア
５ａ：ビア用の孔
６：レジスト
７：回路
８：キャビティ
８ａ：貫通孔
９：電子部品
１０：外部電極
１１：電極
１２：絶縁基材
１０１：部品内蔵基板
１０２：絶縁層
１０３：導体パターン
１０４：ビア
１０５：ランド
１０６：電子部品
１０６ａ：電極 1: 1st resin sheet 2: 2nd resin sheet 3: 3rd resin sheet 4: Conductive foil 5: Via 5a: Hole for via 6: Resist 7: Circuit 8: Cavity 8a: Through hole 9: Electron Component 10: External electrode 11: Electrode 12: Insulating base material 101: Component-embedded substrate 102: Insulating layer 103: Conductive pattern 104: Via 105: Land 106: Electronic component 106a: Electrode

Claims (3)

熱可塑性樹脂からなる複数枚の樹脂シートが相互に接着されて絶縁基材が形成され、前記絶縁基材中に電子部品が埋め込まれてなる部品内蔵基板の製造方法であって、
前記樹脂シートとして、前記電子部品を挿入するための貫通孔が形成された第１の樹脂シートと、前記貫通孔が形成されていない第２の樹脂シートと、複数の開口部を有する第３の樹脂シートとを準備する樹脂シート準備工程と、
前記第１の樹脂シートと前記第２の樹脂シートと前記第３の樹脂シートとを積層する樹脂シート積層工程と、
前記貫通孔で形成されるキャビティ内に前記電子部品を挿入配置する電子部品配置工程と、
前記積層した樹脂シートの積層体を熱圧着する熱圧着工程と、
を備え、
前記熱圧着工程において、前記第３の樹脂シートの前記開口部に他の前記樹脂シートの樹脂が流動する部品内蔵基板の製造方法。 A method of manufacturing a component-embedded substrate in which a plurality of resin sheets made of a thermoplastic resin are bonded to each other to form an insulating base material, and an electronic component is embedded in the insulating base material,
As the resin sheet, a first resin sheet in which a through hole for inserting the electronic component is formed, a second resin sheet in which the through hole is not formed, and a third resin sheet having a plurality of openings A resin sheet preparation step of preparing a resin sheet;
A resin sheet laminating step of laminating the first resin sheet, the second resin sheet, and the third resin sheet;
An electronic component placement step of inserting and placing the electronic component in a cavity formed by the through hole;
A thermocompression bonding step of thermocompression bonding the laminated body of the resin sheets;
Equipped with a,
In the thermocompression bonding step, the component-embedded substrate manufacturing method in which the resin of the other resin sheet flows into the opening of the third resin sheet . 前記第３の樹脂シートの前記開口部は、積層方向において前記電子部品と重なる位置に設けられる、請求項１に記載の部品内蔵基板の製造方法。The method for manufacturing a component-embedded substrate according to claim 1, wherein the opening of the third resin sheet is provided at a position overlapping the electronic component in the stacking direction. 前記樹脂シート積層工程は、The resin sheet lamination step includes
前記キャビティを形成するように前記第１の樹脂シートと前記第２の樹脂シートを積層する過程と、前記電子部品配置工程を経た後に、前記キャビティを覆うように第２の樹脂シートを積層する過程とを含み、A process of laminating the first resin sheet and the second resin sheet so as to form the cavity, and a process of laminating the second resin sheet so as to cover the cavity after the electronic component arranging step. Including
前記過程のうち少なくとも一方の過程で第３の樹脂シートを積層するようにした、The third resin sheet is laminated in at least one of the processes.
請求項１または請求項２に記載の部品内蔵基板の製造方法。The manufacturing method of the component built-in substrate according to claim 1 or 2.
JP2010196337A 2010-09-02 2010-09-02 Manufacturing method of component-embedded substrate Expired - Fee Related JP5633256B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010196337A JP5633256B2 (en) 2010-09-02 2010-09-02 Manufacturing method of component-embedded substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010196337A JP5633256B2 (en) 2010-09-02 2010-09-02 Manufacturing method of component-embedded substrate

Publications (2)

Publication Number Publication Date
JP2012054436A JP2012054436A (en) 2012-03-15
JP5633256B2 true JP5633256B2 (en) 2014-12-03

Family

ID=45907450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010196337A Expired - Fee Related JP5633256B2 (en) 2010-09-02 2010-09-02 Manufacturing method of component-embedded substrate

Country Status (1)

Country Link
JP (1) JP5633256B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5913535B1 (en) * 2014-11-19 2016-04-27 株式会社フジクラ Component built-in substrate and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69225495T2 (en) * 1991-12-31 1998-10-08 Tessera Inc METHOD FOR THE CONSTRUCTION OF MULTI-LAYER CIRCUITS, STRUCTURES WITH PERSONALIZATION CHARACTERISTICS AND COMPONENTS USED IN THEM
JP4862641B2 (en) * 2006-12-06 2012-01-25 株式会社デンソー Multilayer substrate and method for manufacturing multilayer substrate

Also Published As

Publication number Publication date
JP2012054436A (en) 2012-03-15

Similar Documents

Publication Publication Date Title
JP5333680B2 (en) Component built-in substrate and manufacturing method thereof
US9247646B2 (en) Electronic component built-in substrate and method of manufacturing the same
JP5610064B2 (en) Component built-in resin substrate and manufacturing method thereof
JP2007266196A (en) Multilayer printed-wiring board and manufacturing method thereof
US9480172B2 (en) Method for producing a printed circuit board consisting of at least two printed circuit board regions, and printed circuit board
JP2006324568A (en) Multilayer module and its manufacturing method
JP5454681B2 (en) Module substrate and manufacturing method thereof
JP2004140018A (en) Process for producing multilayer board, multilayer board, and mobile apparatus using it
US10362672B2 (en) Resin multilayer substrate and method of manufacturing the same
JP2013540368A (en) Printed circuit board and manufacturing method thereof
JP6673304B2 (en) Multilayer board
JP2013073989A (en) Surface mounting passive element component, component carrier tape, wiring board with built-in component
JP2008182039A (en) Multilayer wiring board and its manufacturing method
JP2013020993A (en) Manufacturing method of component built-in substrate
JP5633256B2 (en) Manufacturing method of component-embedded substrate
JP2013102047A (en) Component built-in wiring board and method of manufacturing the same
WO2018163859A1 (en) Multi-layer substrate, electronic apparatus, and method for producing multi-layer substrate
JP2012089568A (en) Organic multilayer substrate and manufacturing method therefor
WO2011043382A1 (en) Circuit substrate and method of production thereof
JP6387226B2 (en) Composite board
JP2008258358A (en) Rigid flexible board and manufacturing method thereof
JP2006202870A (en) Three-dimensional electronic circuit module, its manufacturing method, and electronic apparatus using them
JP4824972B2 (en) Circuit wiring board and manufacturing method thereof
JP5779908B2 (en) Component built-in wiring board
JP2011238772A (en) Circuit board and method for manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130613

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20140110

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140224

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140304

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140411

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140916

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140929

R150 Certificate of patent or registration of utility model

Ref document number: 5633256

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees