JP2013073989A - Surface mounting passive element component, component carrier tape, wiring board with built-in component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the wiring density of a conducting path from the component terminal when located in the plate thickness.SOLUTION: The surface mounting passive element component includes a rectangular parallelepiped element member, first terminal electrodes provided, respectively, on the first end face on one side of the element member in the longitudinal direction, and on a part of at least the upper and lower surfaces of the element member continuous to the first end face so as to be continuous thereto, and second terminal electrodes provided, respectively, on the second end face on the other side of the element member in the longitudinal direction, and on a part of at least the upper and lower surfaces of the element member continuous to the second end face so as to be continuous thereto. The area each of the first and second terminal electrodes provided on the upper surface of the element member is wider than the area of the terminal electrode provided on the lower surface of the element member.

Description

  The present invention relates to a surface-mounted passive element component having a leadless configuration, a component carrier tape that accommodates the surface-mounted passive component component, and is configured to be suitable for transportation, storage, and mounting to a component mounter, and The present invention relates to a component-embedded wiring board in which the surface-mount type passive element component is located within the thickness of the board, and in particular, the surface-mount type passive element component suitable for improving the mounting density and the surface-mount type passive element component are accommodated. The present invention relates to a component carrier tape and a component built-in wiring board in which the surface-mount type passive element component is positioned inside the plate thickness.

  As one of the basic technologies to advance the downsizing, high performance, and multi-functionality of portable electronic devices, wiring boards with built-in components that improve the placement density of components by positioning passive element components inside the board thickness are used. Yes. As a component located inside, for example, a surface-less passive element component in a leadless form that is distributed as a single component can be used. When such a component is used, it is easy to mount the wiring pattern on the wiring pattern serving as the inner wiring layer, for example, with solder, which is advantageous in terms of productivity and efficiency.

  In such a wiring board structure, the internal connection between the internal components and the wiring pattern is directly made only to one wiring layer. From the viewpoint of conductive path design in the plate thickness direction from the component, a known connection via that can be provided between the surfaces of the wiring pattern in one of the plate thickness directions as viewed from the component This means that a design with a short wiring length becomes possible. However, in the other direction of the plate thickness direction, in order to avoid the position of the built-in component itself, it is pulled out in the horizontal direction (direction perpendicular to the plate thickness direction) in the mounted wiring layer, and further in the vertical direction ( A conductive path is required to be drawn out in the thickness direction).

  Such a restriction is not a problem and is not noticeable when the arrangement density of internal components and conductive paths is not so high, but it further improves the arrangement density of internal parts and thereby increases the density of conductive paths. If there is a need to provide this, it may be necessary to take some measures to improve this. This is also the same from the viewpoint of obtaining a wiring board with improved electrical characteristics by making the wiring length as short as possible.

  A known example of a component built-in wiring board in which a component such as a passive element component is positioned inside the plate thickness is disclosed in Japanese Patent Application Laid-Open No. 2003-197849.

JP 2003-197849 A

  The present invention has been made in consideration of the above circumstances, and a surface-mounted passive element component that can improve the arrangement density of the conductive path from the terminal electrode when positioned inside the plate thickness, and this It is an object of the present invention to provide a component carrier tape that accommodates a surface-mounted passive element component, and a component built-in wiring board in which the surface-mounted passive component component is positioned inside the plate thickness.

  In order to solve the above problems, a surface-mounted passive element component that is one embodiment of the present invention includes a rectangular parallelepiped element member and a first end that is an end surface on one side in the longitudinal direction of the element member. A first terminal electrode provided on the part surface and at least partially on the upper surface and the lower surface of the element member continuous with the first end surface so as to be continuous with the first end surface; And on the second end surface, which is the end surface on the other side in the longitudinal direction of the element member, and on each of at least the upper surface and the lower surface of the element member connected to the second end surface. A second terminal electrode provided to be continuous with the second end surface, and each of the first terminal electrode and the second terminal electrode is formed of the element member. The area provided on the upper surface is provided on the lower surface of the element member. And wherein the wider than the area you are.

  This surface-mount type passive element component is characterized by the shape and size of the terminal electrode. Of the terminal electrodes, the area provided on the upper surface of the element member is relatively wide, and the area provided on the lower surface of the element member is relatively narrow. When the surface-mount type passive element component having such a configuration is embedded in the thickness of the plate, the surface of the terminal electrode on the upper surface side and the lower surface side is electrically connected to the wiring pattern located opposite to each other. And adapted to the electrical connection structure that can be easily adopted for each.

  When the surfaces of the terminal electrodes on the upper surface side and the lower surface side are respectively provided for electrical connection with the wiring pattern located opposite to them, the wiring length between them can be shortened and electrical connection can be made. . These electrical connections are positioned so as to overlap with the components when viewed in a plan view, so that the arrangement density of the conductive paths from the terminal electrodes can be improved. As an electrical connection that can be easily adopted, the terminal electrode on the lower surface side can be used for electrical connection by, for example, solder, while the terminal electrode on the upper surface side can be used for electrical connection, for example, by a plating via in a via hole. .

  The formation of via-hole plated vias includes a step of forming a via hole that requires precision in the position of the formation. Therefore, it is preferable that the area of the terminal electrode to be electrically connected is large. Since there is no such circumstance in the connection by solder, it is not necessary to increase the area of the terminal electrode so much as long as the area can ensure reliability.

  The component carrier tape according to another aspect of the present invention includes a tape base material in which holes having a bottom cover tape or unnecessary dents in the bottom cover tape are arranged on the bottom surface, and a rectangular parallelepiped element member; On the first end surface, which is an end surface on one side in the longitudinal direction of the element member, and on at least a part on the upper surface and the lower surface of the element member connected to the first end surface. A first terminal electrode provided so as to be continuous with the first end surface; a second end surface which is an end surface on the other side in the longitudinal direction of the element member; and the first terminal electrode A second terminal electrode provided at least partially on the upper surface and the lower surface of the element member connected to the second end surface so as to continue to the second end surface; 1 terminal electrode and the second terminal electrode are both the element portion. The surface-mounted passive element component in which the area provided on the upper surface of the element member is wider than the area provided on the lower surface of the element member, Alternatively, a surface-mounted passive element component housed in each of the recesses, and a surface-mounted passive element component attached to the tape substrate so as to be confined in the hole or the recess of the tape substrate. A top cover tape, and all of the surface-mount type passive element components are positioned in the hole or in the recess of the tape base material in a posture in which the upper surface side of the element member faces the top cover tape. It is accommodated in the inside.

  This component carrier tape is a carrier tape that accommodates the above-described surface-mounted passive element components. Here, all of the surface mount type passive element components are accommodated in the holes or recesses of the tape base material with the upper surface side of the element member having a large area of the terminal electrode facing the top cover tape. In this way, when the component carrier tape is mounted on the mounter, the top cover tape is peeled off, and the component is adsorbed by the nozzle, the upper surface side of the surface-mounted passive element component is always the adsorption surface. Therefore, when surface-mount type passive element components are placed on a board, the bottom side that is suitable for soldering is always facing the board. Will improve.

  A component built-in wiring board according to still another aspect of the present invention includes a plate-like insulating layer having a first surface and a second surface opposite to the first surface, and a rectangular parallelepiped element member; On the first end surface, which is an end surface on one side in the longitudinal direction of the element member, and on at least a part on the upper surface and the lower surface of the element member connected to the first end surface. A first terminal electrode provided so as to be continuous with the first end surface; a second end surface which is an end surface on the other side in the longitudinal direction of the element member; and the first terminal electrode A second terminal electrode provided at least partially on the upper surface and the lower surface of the element member connected to the second end surface so as to continue to the second end surface; 1 terminal electrode and the second terminal electrode both have an area provided on the upper surface of the element member. Is a surface-mounted passive element component that is wider than the area provided on the lower surface of the element member, wherein the upper surface side is on the second surface side of the plate-like insulating layer. A surface-mounted passive element component positioned in the thickness direction of the plate-like insulating layer so that the upper surface and the second surface are parallel to each other, and the first surface of the plate-like insulating layer A first wiring pattern provided on the top, a solder member for electrically connecting the first wiring pattern and the lower surface side of the first and second terminal electrodes of the surface-mount passive element component; And at least the second terminal of the surface-mount type passive element component through the part of the plate-like insulating layer in the thickness direction and electrically conducting with the second wiring pattern from the second wiring pattern. In a via hole extending so as to be electrically connected to the upper surface side of the electrode. Characterized by comprising a via.

  This component built-in wiring board is a wiring board in which the above-described surface-mounted passive element component is positioned inside the thickness of the board. With respect to the plate-like insulating layer, the component is arranged so that the upper surface side of the element member faces the second surface side of the plate-like insulating layer and the upper surface and the second surface are parallel to each other. Then, the first and second terminal electrodes are electrically connected to a first wiring pattern provided on the first surface of the plate-like insulating layer by solder. In addition, at least the second terminal electrode is electrically connected to the second wiring pattern provided on the second surface of the plate-like insulating layer by the via hole plating via.

  That is, in this wiring board, the components located inside and the first and second wiring patterns provided on each surface of the plate-like insulating layer are electrically connected via solder or via-hole plated vias, respectively. Thus, the component can be electrically connected to the wiring pattern on any surface of the plate-like insulating layer with a very short wiring length therebetween. Here, the solder and the plating via in the via hole are positioned so as to overlap with the components in a plan view, and accordingly, the arrangement density of the conductive path from the terminal electrode can be improved accordingly. In addition, since the components are connected by solder and connected by via-plated vias, they have terminal electrode shapes and sizes suitable for both.

  According to the present invention, a surface-mounted passive element component capable of improving the arrangement density of the conductive path from the terminal electrode when positioned inside the plate thickness, and a component containing the surface-mounted passive element component It is possible to provide a carrier tape and a component built-in wiring board in which the surface-mount type passive element component is positioned inside the plate thickness.

The block diagram which shows the external appearance of the surface mount-type passive element component which is one Embodiment of this invention with a trigonometric method. The block diagram which shows the external appearance of the surface mount-type passive element component which is another embodiment with a trigonometric method. The perspective view which shows the structure of the component carrier tape which is one Embodiment of this invention, and the top view which expanded and drew a part. Sectional drawing which shows typically the structure of the component built-in wiring board which is one Embodiment of this invention. FIG. 5 is a process diagram schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. 4. FIG. 6 is a supplementary plan view in the manufacturing process shown in FIG. 5. FIG. 5 is a process diagram schematically showing another part of the manufacturing process of the component built-in wiring board shown in FIG. 4. FIG. 5 is a process diagram schematically showing still another part of the manufacturing process of the component built-in wiring board shown in FIG. 4. FIG. 5 is a process diagram schematically showing still another part of the manufacturing process of the component built-in wiring board shown in FIG. 4. Sectional drawing which shows typically the structure of the component built-in wiring board which is another embodiment. Process drawing which shows typically a part of manufacturing process of the component built-in wiring board shown in FIG.

  As an embodiment of the present invention, the first terminal electrode is further connected to the first end surface on a part of each side surface on both sides of the element member connected to the first end surface. The second terminal electrode is further connected to the second end surface on a part of each side surface on both sides of the element member connected to the second end surface. Can be provided. This configuration assumes a chip capacitor. Unlike the chip resistor, the terminal electrode of the chip capacitor is usually formed not only on the upper surface and lower surface of the element member but also on the side surfaces on both sides. Therefore, this can be followed as an embodiment.

  As an embodiment, the first terminal electrode is provided so as to have a rectangular shape on the lower surface of the element member, and the rectangular shape is also formed on the side surfaces on both sides of the element member. The first terminal electrode on the lower surface and the first terminal electrode on the side surfaces on both sides have the same length when viewed in the longitudinal direction of the element member The second terminal electrode is provided so as to have a rectangular shape on the lower surface of the element member, and also has a rectangular shape on the side surfaces on both sides of the element member. The second terminal electrode on the lower surface and the second terminal electrode on the side surfaces on both sides have the same length when viewed in the longitudinal direction of the element member, It can be.

  This configuration further defines the shape of the terminal electrode provided on the side surfaces on both sides of the element member, including the length seen in the longitudinal direction of the element member, assuming the case of the chip capacitor as described above. Is. In this embodiment, the length of the terminal electrode on the side surface as viewed in the longitudinal direction of the element member is matched with that of the terminal electrode on the lower surface. That is, that of the terminal electrode on the top surface is relatively long and that on the bottom surface and side surfaces is relatively short. This is because the area of the terminal electrode on the upper surface, which is an electrical connection target of the plating via in the via hole, is preferably large, but the terminal electrode on the other surface does not have such a situation. Further, since solder may spread on the terminal electrodes on the side surfaces, it is preferable that the terminal electrodes are separated from each other in terms of suppressing the occurrence of defects such as solder bridges.

  Further, as an embodiment, both the first terminal electrode and the second terminal electrode may have at least a copper layer as a surface layer. If a copper surface layer is provided, good electrical connection to both solder and via-hole plated vias is easy.

  As an embodiment, each of the first terminal electrode and the second terminal electrode has a copper layer as at least a surface layer on the upper surface of the element member, and the lower surface of the element member Above, it can be said that it has at least a tin layer as a surface layer. If the copper surface layer is provided, good electrical connection to the via-hole plated via is easy, and if the tin surface layer is provided, good electrical connection to the solder is easy.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram showing the appearance of a surface-mounted passive element component according to an embodiment in a trigonometric method. The surface-mounted passive element component 41A is, for example, a chip resistor, and includes an element member EM having a resistor and terminal electrodes T1 and T2.

  The shape as a whole is a rectangular parallelepiped shape as shown in the figure. The terminal electrode T1 continues to the end surface on one end side in the longitudinal direction of the element member EM and to the upper surface and part of the lower surface of the element member EM connected to the end surface. It is provided as follows. Similarly, the terminal electrode T2 is also formed on the end surface on the other direction side in the longitudinal direction of the element member EM and on the end surface on a part of the upper surface and the lower surface of the element member EM connected to the end surface. It is provided so that it may continue.

  Here, the surface-mounted passive element component 41A is characterized by the shape and size of the terminal electrodes T1 and T2. Of the terminal electrodes T1 and T2, the area provided on the upper surface side of the element member EM is relatively wide, and the area provided on the lower surface side of the element member EM is relatively narrow. When the surface-mount type passive element component 41A having such a configuration is embedded in the thickness of the component-embedded wiring board, the wiring patterns in which the surfaces of the terminal electrodes on the upper surface side and the lower surface side are respectively opposed to each other. And can be adapted to an electrical connection structure that can be easily adopted for each. As will be described later in detail, the lower surface side is scheduled to be used for solder connection, and the upper surface side is a so-called via-hole plating in which a hole is formed in an insulating layer and a conductor is plated inside to form a conductive path. It is planned to be used for via connection.

  Specific examples of dimensions of each part of the surface mount passive element component 41A are as follows. In the case of a so-called 0603 type component, assuming that the length L = 0.6 mm, the width W = 0.3 mm, and the height H = 0.23 mm, the terminal electrode length Ls on the lower surface side is, for example, 0.10 mm, the upper surface side The terminal electrode length L1 can be set to 0.24 mm, for example. The reason why the shape of the terminal electrodes T1 and T2 on the upper surface and the lower surface is rectangular in this way is that the shape is adopted in a normal surface mount type passive element component and is considered to be most easily adopted. .

  FIG. 2 is a configuration diagram showing the appearance of a surface-mount type passive element component according to another embodiment using a trigonometric method. The surface-mounted passive element component 41B is, for example, a chip capacitor, and includes an element member EM having a laminated dielectric layer and terminal electrodes T1 and T2.

  The surface-mount type passive element component 41B is formed such that the regions of the terminal electrodes T1 and T2 are spread over part of the side surfaces on both sides of the rectangular parallelepiped. A normal chip capacitor follows the terminal electrode region formed on the side as described above. However, like the surface-mounted passive element component 41A, the area of the terminal electrodes T1 and T2 provided on the upper surface side of the element member EM is relatively wide, and on the lower surface side of the element member EM. The point which made the provided area relatively narrow is the same.

  Specific examples of dimensions of each part of the surface mount passive element component 41B are as follows. In the case of a so-called 0603 type component, assuming that the length L = 0.6 mm, the width W = 0.3 mm, and the height H = 0.3 mm, the terminal electrode length Ls on the lower surface side and the side surfaces on both sides is set to, for example,. The terminal electrode length Ll on the upper surface side can be 10 mm, for example, 0.24 mm. The rectangular shape of the terminal electrodes T1 and T2 on the upper surface, the lower surface, and the side surface is considered to be the most easily adopted because it is a shape that is used in normal surface-mount passive element components. Because it is.

  In FIG. 2, the reason why the length of the terminal electrode on the side surface is aligned with the length of the terminal electrode on the lower surface side is that solder may spread in the terminal electrode T1 and T2 regions on the side surface. This is because it is considered preferable that the gaps are separated from each other in terms of suppressing the occurrence of defects such as solder bridges.

  Next, FIG. 3 is a perspective view showing a configuration of a component carrier tape according to an embodiment of the present invention and a plan view illustrating a part thereof in an enlarged manner. This component carrier tape 400 has a tape base 401 and a top cover tape 402, and transports and stores the surface-mounted passive element component 41A (41B), which is a small piece, so as to be easy to handle, and further to the component mounter. A large number of them are accommodated so as to be adapted for mounting.

  More specifically, the tape base material 401 is, for example, a paperboard having a certain thickness for housing components, and component housing holes 401a are arranged in the longitudinal direction. The tape base 401 is also provided with feed holes 401b at a pitch that is synchronized with the component housing holes 401a.

  A top cover tape 402 is stuck on the component housing hole 401 a of the tape base 401 so as to close the hole. When the component carrier tape 400 is mounted on the component mounter, the top cover tape 402 is peeled off from the tape base material 401 as shown, just before the component accommodation hole 401a is sent to the component adsorption point.

  When the component carrier tape 400 is mounted on the component mounter, intermittent feed of the component carrier tape 400 can be controlled using the feed hole 401b. The component carrier tape 400 is in a state where the top cover tape 402 is peeled off at the component adsorption point, and the component carrier tape 400 can be removed as it is intermittently sent.

  In the component carrier tape 400 having the above-described configuration, all of the surface-mounted passive element components 41A (41B) in the component accommodation holes 401a are on the top cover side (that is, the terminal electrode side having a large area). It is accommodated in a posture facing the tape 402. In this way, when the component carrier tape 400 is mounted on the component mounter, the top cover tape 401 is peeled off, and the component 41A (41B) is adsorbed by the nozzle, the upper surface always becomes the adsorbing surface. Therefore, when the component 41A (41B) is placed on the board, the lower surface side suitable for soldering always faces the substrate, so it is necessary to change the position of the component 41A (41B) to change it. Suitable for productivity improvement.

  In the configuration of the component carrier tape 400 shown in FIG. 3, since the component accommodation hole 401a normally passes through the tape substrate 401, the tape substrate is secured so as to secure the bottom surface of the component accommodation hole 401a. A bottom cover tape (not shown) is pasted on the surface of 401 facing the top cover tape 402. Alternatively, it is also possible to employ a configuration in which a hole up to the middle depth of the cardboard serving as the tape base 401 is provided so as to make the bottom cover tape unnecessary, and this is used as a component housing hole. Further, a resin such as polystyrene resin may be used as the tape substrate 401, and a recess may be formed instead of opening a hole to accommodate the component. In this case, of course, the bottom cover tape is unnecessary.

  Next, FIG. 4 is a cross-sectional view schematically showing a configuration of a component built-in wiring board according to an embodiment of the present invention. As shown in FIG. 4, this component built-in wiring board has insulating layers (plate-like insulating layers) 11, 12, 13, wiring layers (wiring patterns) 21, 22, 23, 24 (= total 4). Layer wiring), interlayer connector 31, through-hole conductor 32, via-hole plated via (interlayer connector) 33M, via-hole plated via 33Ma, surface-mounted passive element component 41B (41A). The solder 51 and the solder resists 61 and 62 are provided. Reference numeral 21r denotes a roughened surface for improving adhesion, which is formed on the side of the wiring pattern 21 facing the insulating layer 11. Reference numerals T1 and T2 denote terminal electrodes of the component 41B, which have the same configuration as already described together with the component 41B.

  This component built-in wiring board is provided with a surface-mount type passive element component 41 </ b> B located inside the plate-like insulating layers 11, 12, and 13 in the thickness direction. The structural feature is that the component 41B is electrically connected to the wiring pattern 21 provided on the outer surface of the plate-like insulating layer 11 by the solder 51, and is formed into a plate-like shape by the via-hole plated via 33Ma. The wiring pattern 24 provided on the outer surface of the insulating layer 13 is also electrically connected.

  That is, in this wiring board, the embedded component 41B and the wiring patterns 21 and 24 provided on each surface of the plate-like insulating layers 11 and 13 are electrically connected via the solder 51 and the via-hole plated via 33Ma, respectively. In this way, the component 41B can be electrically connected to the wiring patterns 21 and 24 on either surface of the plate-like insulating layers 11 and 13 with a very short wiring length therebetween. . The solder 51 and the via-hole plated via 33Ma are positioned so as to overlap with the component 41B in plan view, and accordingly, the arrangement density of the conductive paths from the terminal electrodes T1 and T2 of the component 41B is improved accordingly. Can do. As a result, it is possible to contribute to increasing the arrangement density of the internal components 41B. Further, since the wiring length can be shortened, the electrical characteristics are excellent.

  These points are clearly superior in comparison with the structure in which the via hole plating via 33Ma does not exist. When the via hole plating via 33Ma does not exist, the electrical connection between the terminal electrode T2 of the component 41B and the wiring layer 24 on one surface is as follows: solder 51, wiring layer 21, interlayer connector 31, wiring layer 22, through There can only be a route that reaches the wiring layer 24 via the hole conductor 32, the wiring layer 23, and the interlayer connector 33M, and this route always avoids the position of the component 41B itself, The structure of the body 32 and the interlayer connection body 33M is required. Therefore, there is a certain limit to the improvement in the arrangement density of the built-in components due to the vertical conductive path provided in this way, and the electric characteristics are also inferior in comparison.

  In addition, the formation of the via hole plating via 33Ma includes a via hole forming step (described later) that requires formation position accuracy. Therefore, the area of the terminal electrode T2 that is an electrical connection target is larger. preferable. Since there is no such circumstance in the connection by solder, it is not necessary to increase the area of the terminal electrode so much as long as the area can ensure reliability. In view of this point, the component 41B has a wiring pattern with a larger area of the terminal electrodes T1 and T2 so that electrical connection between the terminal electrode T2 and the wiring pattern 24 by the via-hole plated via 33Ma is possible. 24. On the other hand, electrical connection by the solder 51 is performed with the wiring pattern 21 by making the one where the area of the terminal electrodes T 1 and T 2 is narrower facing the wiring pattern 21.

  As the terminal electrodes T1 and T2 of the component 41B, those in which copper plating is formed in the sense that they can be connected by the solder 51 can be used. According to this, the compatibility of the electrical connection with the material (copper plating) of the via hole plating via 33Ma is very good. Alternatively, a configuration in which at least a copper layer is provided as a surface layer on the upper surfaces of the terminal electrodes T1 and T2 and at least a tin layer is provided as a surface layer on the lower surfaces of the terminal electrodes T1 and T2 may be employed. According to this, the compatibility of the electrical connection with the material of the via hole plating via 33Ma (copper plating) is greatly improved, while the connection by the solder 51 becomes more general.

  Hereinafter, the configuration of the component built-in wiring board will be described in more detail.

  As can be seen from the points already described, the terminal electrodes T1 and T2 of the component 41B have their lower surfaces facing the embedded component mounting lands included in the wiring layer 21. The terminal electrodes T1, T2 of the component 41B and this land are electrically and mechanically connected by solder 51 (for example, including at least tin). The solder 51 is located on this land of the wiring layer 21 in a shape including fillets formed around the terminal electrodes T1 and T2 so as to cover the end surface of the component 41B. An example of a setting method for such a land for the embedded component 41B of the wiring layer 21 will be supplementarily described later along with the manufacturing process (FIG. 6).

  The upper surface of the terminal electrode T2 of the component 41B is in contact with the via hole plating via 33Ma. The via hole plating via 33Ma is electrically connected to the wiring pattern 24 and extended from the wiring pattern 24 to the terminal electrode T2 of the component 41B. The via hole plating via 33Ma has, for example, a truncated cone shape (that is, a shape having an axis and a diameter changing in the direction of the axis as shown in the figure). It comes from.

  The via-hole plating via 33Ma may be provided for each of the terminal electrodes T1 and T2 of the component 41B. Even in such a case, there is no problem as a structure, and this can cope with a case where it is desired to provide the terminal electrodes T1 and T2 on both sides in designing a necessary conductive path. Further, in connection with this, the land for the component 41B by the wiring layer 21 is a dummy land that serves only to mechanically fix the component 41B, or one of both, and is electrically exclusively used for the terminal electrode T2 (T1). ) And the wiring pattern 24 may be connected to each other by a via hole plating via 33Ma.

  The wiring layers 21 and 24 are wiring layers on both main surfaces as a wiring board, and various components can be mounted thereon. Solder resists 61 and 62 are formed on both main surfaces except for the land portions of the wiring layers 21 and 24 on which the solder is to be mounted in the mounting, so that the solder melted at the time of solder connection is fixed to the land portions and then functions as a protective layer. (The thickness is about 20 μm, for example). A Ni / Au plating layer (not shown) having high corrosion resistance may be formed on the surface layer of the land portion.

  Each of the wiring layers 22 and 23 is an inner wiring layer. In order, the insulating layer 11 is between the wiring layer 21 and the wiring layer 22, and the insulating layer 12 is between the wiring layer 22 and the wiring layer 23. The insulating layer 13 is located between the wiring layer 24 and the wiring layer 24 and separates the wiring layers 21 to 24. Each of the wiring layers 21 to 24 is made of, for example, a metal (copper) foil having a thickness of 18 μm.

  Each of the insulating layers 11 to 13 is, for example, a thickness of 60 μm except for the insulating layer 12, and only the insulating layer 12 is a thickness of 300 μm (may be adjusted depending on the height of the component 41B). It is a rigid material. In particular, the insulating layer 12 has an opening at a position corresponding to the embedded component 41B, and provides a space for embedding the component 41B. Insulating layers 11 and 13 fill the space inside the through-hole conductor 32 of the insulating layer 12 and the opening portion of the insulating layer 12 so as to be in close contact with the surface of the component 41B, and are deformed so as to form a space inside. Does not exist.

  The wiring layer 21 and the wiring layer 22 can be conducted by an interlayer connector 31 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 11. The wiring layer 22 and the wiring layer 23 can be conducted by a through-hole conductor 32 provided so as to penetrate the insulating layer 12. The wiring layer 23 and the wiring layer 24 can be electrically connected to the wiring pattern 24 through a via-hole plated via 33 </ b> M extending from the wiring pattern 24 so as to be electrically connected to the wiring pattern 23.

  The interlayer connector 31 is derived from conductive bumps formed by screen printing of a conductive composition, and has a diameter in the axial direction (up and down lamination direction in the illustration of FIG. 4) depending on the manufacturing process. Has changed. The diameter is, for example, 100 μm on the thick side. In addition, the via-hole plated via 33M and the via-hole plated via 33Ma, which are interlayer connection bodies, are common in terms of materials (composition) and methods of forming them.

  In this embodiment, the wiring patterns 21 and 24 to which the component 41B is electrically connected are formed on the outermost wiring layer having no multilayer wiring structure on the surface facing the surface in contact with the insulating layers 11 and 13, respectively. Therefore, the increase in the number of wiring layers is limited in the sense that the outermost wiring layer is not built up and multi-layered. However, it is an advantage that a very thin wiring board with built-in components can be provided by minimizing the thickness of the plate-like insulating layer related to the built-in components.

  Further, as described above, the solder 51 is used, which is advantageous in terms of productivity and efficiency when mounting the component 41B during the manufacturing process. In particular, since the solder 51 is positioned so as to extend over the end surface of the component 41B and a well-shaped solder fillet is formed, the mounting stability and reliability can be further improved.

  Next, the manufacturing process of the component built-in wiring board shown in FIG. 4 will be described with reference to FIGS. 5, FIG. 7, FIG. 8, and FIG. 9 are process diagrams schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. 6 is a supplementary plan view in the manufacturing process shown in FIG. In these drawings, the same or equivalent components as those shown in FIG. 4 are denoted by the same reference numerals.

  It demonstrates from FIG. FIG. 5 shows a manufacturing process of a part centered on the wiring layer 21 and the component 41B in each configuration shown in FIG. First, as shown in FIG. 5A, a cream solder 51A is printed on a region corresponding to a land for a component 41B of a metal foil (electrolytic copper foil) 21A to be a wiring layer 21, for example, by screen printing. . The cream solder 51A is obtained by dispersing fine solder particles in a flux and can be easily printed in a predetermined pattern by using screen printing. A dispenser can be used instead of screen printing.

  After printing the cream solder 51A, as shown in FIG. 5B, the component 41B is placed on the metal foil 21A via the cream solder 51A. That is, for example, the component 41B is sucked and taken out from the component carrier tape 400 described above by the nozzle 450 of the mounter and placed at a predetermined position on the metal foil 21A. After placement, the cream solder 51A is reflowed in a reflow furnace, for example. As a result, the component 41B is connected and fixed onto the metal foil 21A via the solder 51. Subsequently, as shown in FIG. 5C, a roughening process is performed on the surface of the metal foil 21A to form a roughened surface 21r. The member obtained as described above is referred to as a laminated member 1.

  As the roughening process, a blackening reduction process or a microetching process can be employed. Examples of the micro-etching process include CZ processing (MEC product name) and bond film processing (Atotech product name). By the roughening treatment, the adhesion between the metal foil 21A and the insulating layer 11 laminated thereon and the reliability of the electrical connection with the interlayer connector 31 can be improved.

  In addition, to supplement the illustration of FIG. 5C, in this state, the component 41B is fixed on the metal foil 21A, and the land in the normal sense does not yet exist in the metal foil 21A. That is, when the cream solder 51A is reflowed on the metal foil 21A, it is difficult to control the spread of melting, and when the land is formed by patterning of the metal foil 21A, the solder that remains in the land area is formed. Hateful. In order to improve this point, the following measures can be exemplified with reference to FIG.

  First, as shown in FIG. 6A, a nickel gold plating layer 56 is formed in advance on a region corresponding to a land for the component 41B on the metal foil 21A. More specifically, the nickel plating layer is selectively formed on the metal foil 21A in a thickness of, for example, about 5 μm, and then a gold plating layer is formed on the nickel plating layer with a thickness of, for example, 0.05 μm.

  If such a nickel gold plating layer 56 is provided in advance, when the solder fine particles contained therein are melted by reflow of the cream solder 51A, the molten solder is only on the gold plating layer having relatively high wettability compared to copper. By spreading, the shape of the solder 51 can be controlled. Note that the gold component is taken into the solder 51 and disappears by reflow.

  Alternatively, as shown in FIG. 6B, there is a countermeasure in which a damming resin pattern 57 is formed in advance instead of using the nickel gold plating layer 56. As shown in FIG. 6B, the damming resin pattern 57 is, for example, a frame so as to limit the spread of the solder 51 to be positioned in the region corresponding to the land for the component 41B on the metal foil 21A. It is formed in a shape. The damming resin pattern 57 can be provided by the same material and the same patterning method as the solder resist, for example. The thickness can be about 20 μm, for example.

  Next, a description will be given with reference to FIG. FIG. 7 shows a manufacturing process of a portion centering on the insulating layer 12 and the same 11 among the components shown in FIG. First, as shown in FIG. 7A, for example, an FR-4 insulating layer 12 having a thickness of, for example, 300 μm in which metal foils (electrolytic copper foils) 22A and 23A having a thickness of 18 μm are laminated on both surfaces is prepared. A through-hole 72 for forming a through-hole conductor is formed at a predetermined position, and a part opening 71 is formed in a part corresponding to the part 41B to be embedded.

  Next, electroless plating and electrolytic plating are performed to form a through-hole conductor 32 on the inner wall of the through-hole 72 as shown in FIG. At this time, a conductor is also formed on the inner wall of the opening 71. Subsequently, as shown in FIG. 7C, the metal foils 22 </ b> A and 23 </ b> A are patterned in a predetermined manner using well-known photolithography to form wiring layers 22 and 23. By patterning the wiring layers 22 and 23, the conductor formed on the inner wall of the opening 71 is also removed.

  Next, as shown in FIG. 7D, conductive bumps (cone shape having a bottom diameter of 100 μm and a height of 100 μm, for example) are formed in a paste-like manner at predetermined positions on the wiring layer 22. It is formed by screen printing of a composition (for example, a silver paste in which silver particles are dispersed in a large amount in a paste-like resin). After printing, it is dried and cured to some extent.

  Subsequently, as shown in FIG. 7E, an FR-4 prepreg 11A (nominal thickness, for example, 60 μm) to be the insulating layer 11 is laminated on the wiring layer 22 side using a press machine. The prepreg 11 </ b> A is provided with an opening corresponding to the embedded component 41 </ b> B, similar to the insulating layer 12, in advance.

  In this lamination process, the head of the interlayer connector 31 is made to penetrate the prepreg 11A. Note that the broken line at the head of the interlayer connector 31 in FIG. 7E indicates that there are both cases where the head is plastically deformed at this stage and where it is not plastically deformed (the following figures). But it is the same). By this step, the wiring layer 22 is depressed and positioned on the prepreg 11A side. Let the laminated member obtained by the above be the laminated member 2. FIG.

  The steps shown in FIG. 7 can be performed as follows. In the stage of FIG. 7A, only the through holes 72 are formed, and the subsequent steps of FIGS. 7B, 7C, and 7D are performed without forming the opening 71 for the embedded component. Next, as a process corresponding to FIG. 7E, prepreg 11A (without opening) is stacked. And it is the process of forming simultaneously the opening part for the components to embed in the insulating layer 12 and the prepreg 11A.

  Next, a description will be given with reference to FIG. FIG. 8 is a diagram showing an arrangement relationship in which the laminated members 1 and 2 obtained as described above are laminated. A laminated member 3 in the figure is a member obtained by laminating a prepreg 13 </ b> A to be an insulating layer 13 on a metal foil (electrolytic copper foil) 24 </ b> A to be a wiring layer 24.

  The respective laminated members 1, 2, and 3 are laminated in the arrangement as shown in FIG. 8, and are pressed and heated by a press. Thereby, the prepregs 11A and 13A are completely cured, and the whole is laminated and integrated. At this time, due to the fluidity of the prepregs 11A and 13A obtained by heating, the prepregs 11A and 13A are deformed and entered into the space around the component 41B and the space inside the through-hole conductor 32, and no gap is generated.

  In addition, the interlayer connection body 31 is electrically connected to the metal foil 21A. As a result, the interlayer connector 31 is fixed in a shape in which the head is crushed by plastic deformation (that is, a shape having a shaft and narrower on the head side of the shaft as shown in FIG. 4).

  After the lamination shown in FIG. 8, the process shown in FIG. 9 is performed. That is, via holes 33h and 33ha for forming via-hole plating vias 33M and 33Ma are processed and formed on the material obtained in the stacking process shown in FIG.

  More specifically, as shown in FIG. 9, via holes 33h and 33ha are formed at necessary positions from the exposed surface side of the metal foil 24A by, for example, laser processing. The via hole 33h is provided at a position where an interlayer connection between the metal foil 24A serving as the wiring layer 24 and the wiring layer 23 is necessary so as to communicate with and penetrate the metal foil 24A and the insulating layer 13. The via hole 33ha is provided so as to communicate with the metal foil 24A and the insulating layer 13 and reach the terminal electrode 41a corresponding to the position of the terminal electrode T2 of the component 41B. The via hole 33h and the via hole 33ha can be formed at the same time in the same process and do not hinder the improvement of the production efficiency.

  The formation of the via holes 33h and 33ha is not only a method of drilling so that the metal foil 24A and the insulating layer 13 are continuously lost by laser processing, but first, only the metal foil 24A is penetrated by etching, and then Using the etched metal foil 24A as a mask, the insulating layer 13 can then be removed by laser processing to form a hole. At the stage of etching only the metal foil 24A, a patterned resist mask for etching is formed on the metal foil 24A. The former method is considered to be preferable from the viewpoint of efficiency, and the latter method is considered to be excellent in controllability of the hole shape although it is inefficient.

  The size of the via holes 33h and 33ha can be, for example, about 100 μm on the larger side as a diameter. As shown in the figure, the via holes 33h and 33ha formed by laser processing generally have a shape with a slightly smaller diameter toward the back. This is because the laser spot at the time of laser processing is outputted with a slightly smaller energy density at the edge of the spot.

  In this embodiment, since the area of the upper surface side of the terminal electrode T2 of the component 41B is relatively large, the formation position accuracy of the via hole 33ha reaching the terminal electrode T2 can be made coarser. Therefore, the occurrence of defects in this process can be greatly suppressed.

  After forming the via holes 33h and 33ha as shown in FIG. 9, the electroless plating and electrolytic plating processes are performed to electrically conduct the metal foil 24A, and from this metal foil 24A, the wiring layer 23 and the terminal electrode of the component 41B Via hole plating vias 33M and 33Ma are formed so as to be electrically connected to T2. The plating vias 33M and 33Ma are required to be formed at least on the inner walls of the via holes 33h and 33ha, but may be formed so as to almost fill and fill the via holes 33h and 33ha. In order to control the shape as such a via, the above plating step may be performed after a patterned resist mask is formed on the metal foil 24A. The plating vias 33M and 33Ma can be formed at the same time in the same process and do not hinder the improvement of the production efficiency.

  In the via hole plating vias 33M and 33Ma, for example, copper can be used as a material thereof. Correspondingly, the surface of the terminal electrode T2 of the component 41B also has a copper plating layer. It is preferable for effectively improving the reliability of contact between the terminal electrode T2 and the via hole inner plating 33Ma.

  After the above steps, the metal foils 21A and 24A on both the upper and lower surfaces are patterned by using a well-known photolithography, and then a layer of solder resists 61 and 62 is formed, as shown in FIG. A component built-in wiring board can be obtained.

  In the embodiment shown in FIG. 4, as a modified example, the via-hole plated via 33 </ b> M which is an interlayer connector is replaced with an interlayer connector having the same configuration as the interlayer connector 31 made of a conductive composition. It is also possible.

  Next, another embodiment will be described with reference to FIG. FIG. 10 is a cross-sectional view schematically showing a configuration of a component built-in wiring board according to another embodiment. Components identical or equivalent to those shown in the already described drawings are denoted by the same reference numerals. It is. The description of the part is omitted unless there is an additional matter.

  In this embodiment, the number of wiring layers is increased as compared with the embodiment shown in FIG. 4. Specifically, the wiring layer (wiring pattern) 20 is provided on the outer side of the wiring layer 21. Accordingly, an insulating layer 10 that separates the wiring layer 20 from the wiring layer 20 and an interlayer connector 30 that penetrates the insulating layer 10 and electrically connects the wiring layer 20 and the wiring layer 21 are newly provided. . Depending on the manufacturing process, the wiring layer 21 is located in the thickness direction of the insulating layer 11 unlike the one shown in FIG. This embodiment has an advantage of increasing the number of wiring layers as described above as compared with that shown in FIG.

  FIG. 11 is a process diagram schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. 10, and shows a process corresponding to the stacking process shown in FIG. In FIG. 11, the same reference numerals are given to the same or equivalent components as those shown in the already described drawings. The description of the part is omitted unless there is an additional matter.

  In the lamination process shown in FIG. 11, the laminated member 1A is used instead of the laminated member 1 (see FIGS. 8 and 5). The laminated member 1A uses the insulating layer 10 in which the wiring pattern 21 is formed on one side instead of the metal foil 21A in the laminated member 1, and then mounts the component 41B on the wiring pattern 21 with solder 51 and further roughens the laminated member 1A. It is a member obtained by forming the surface 21r. The insulating layer 10 on which the wiring pattern 21 is formed on one side is prepared as a double-sided copper-clad plate having a metal foil 20A, in which an interlayer connector 30 is formed so as to penetrate the insulating layer 10, and the metal foil on one side is predetermined. Obtained by patterning.

  Each of the laminated members 1A, 2 and 3 is arranged in the arrangement as shown in FIG. Thereby, the prepregs 11A and 13A are completely cured, and the whole is laminated and integrated. At this time, due to the fluidity of the prepregs 11A and 13A obtained by heating, the prepregs 11A and 13A are deformed and entered into the space around the component 41B and the space inside the through-hole conductor 32, and no gap is generated. This is the same as the description in FIG.

  After the stacking process shown in FIG. 11, the same process as the process shown in FIG. 9 and the subsequent plating process are performed. Subsequently, the metal foils 20A and 24A on the upper and lower surfaces are patterned by using a well-known photolithography, followed by forming layers of solder resists 61 and 62, so that the component built-in wiring as shown in FIG. A board can be obtained. Also in the component built-in wiring board shown in FIG. 10, the arrangement density of the conductive path from the terminal electrode T2 (T1) of the component 41B can be improved, and as a result, the arrangement density of the components provided inside can be improved. This is the same as that shown in FIG.

  DESCRIPTION OF SYMBOLS 1, 1A ... Laminated member, 2 ... Laminated member, 3 ... Laminated member 10, 11, 12, 13 ... Insulating layer (plate-like insulating layer), 11A, 13A ... Pre-preg, 20, 21, 22, 23, 24 ... Wiring layer (wiring pattern), 20A, 21A, 22A, 23A, 24A ... metal foil (copper foil), 21r ... roughened surface, 30, 31 ... interlayer connector (conductive bump by conductive composition printing), 32 ... through-hole conductor, 33h ... via hole, 33ha ... via hole, 33M ... interlayer connection (via-hole plated via), 33Ma ... via-hole plated via, 41A, 41B ... surface mount passive element parts, 51 ... solder, 51A ... Cream solder, 56 ... nickel gold plating layer, 57 ... damming resin pattern, 61, 62 ... solder resist, 71 ... opening for parts, 72 ... through hole, 400 ... part key Riatepu, 401 ... tape base, 401a ... housing component hole, 401b ... feed hole, 402 ... top cover tape, 450 ... suction nozzle, EM ... element member, T1, T2 ... terminal electrodes.

Claims (7)

A rectangular parallelepiped element member;
On the first end surface, which is an end surface on one side in the longitudinal direction of the element member, and on at least a part on the upper surface and the lower surface of the element member connected to the first end surface. A first terminal electrode provided to be continuous with the first end surface;
On the second end surface, which is the end surface on the other side in the longitudinal direction of the element member, and on at least a part on the upper surface and the lower surface of the element member connected to the second end surface. A second terminal electrode provided so as to be continuous with the second end surface;
The area where the first terminal electrode and the second terminal electrode are both provided on the upper surface of the element member is larger than the area provided on the lower surface of the element member. A surface-mount passive element component that is characterized by its large size. The first terminal electrode is further provided to be connected to the first end surface on a part of each side surface of the element member continuous to the first end surface,
The second terminal electrode is further provided so as to be continuous with the second end surface on a part of each side surface of the element member that is continuous with the second end surface. 2. The surface mount type passive element component according to claim 1, wherein The first terminal electrode is provided to have a rectangular shape on the lower surface of the element member, and is also provided to have a rectangular shape on the side surfaces on both sides of the element member. And
The first terminal electrode on the lower surface and the first terminal electrode on the side surfaces on both sides have the same length as viewed in the longitudinal direction of the element member;
The second terminal electrode is provided to have a rectangular shape on the lower surface of the element member, and is also provided to have a rectangular shape on the side surfaces on both sides of the element member. And
The second terminal electrode on the lower surface and the second terminal electrode on the side surfaces on both sides have the same length when viewed in the longitudinal direction of the element member. 2. A surface-mounted passive element component according to 2.   The surface-mounted passive element component according to claim 1, wherein each of the first terminal electrode and the second terminal electrode has at least a copper layer as a surface layer.   Each of the first terminal electrode and the second terminal electrode has a copper layer as at least a surface layer on the upper surface of the element member, and at least a tin layer as a surface layer on the lower surface of the element member. The surface-mount type passive element component according to claim 1, further comprising a layer. A tape base material in which holes having a bottom cover tape on the bottom surface or unnecessary dents in the bottom cover tape are arranged;
A rectangular parallelepiped element member; on a first end surface which is an end surface on one side in the longitudinal direction of the element member; and on at least an upper surface of the element member connected to the first end surface; A first terminal electrode provided on a part of the lower surface so as to be continuous with the first end surface; a second end that is an end surface on the other side in the longitudinal direction of the element member; A second terminal electrode provided on the surface and at least a part on the upper surface and the lower surface of the element member connected to the second end surface so as to continue to the second end surface; Each of the first terminal electrode and the second terminal electrode provided on the upper surface of the element member is provided on the lower surface of the element member. A surface mount type passive element component having a larger area than the tape base Surface mount passive device components of the are housed within the respective hole or the recess,
A top cover tape affixed on the tape substrate so as to confine the surface-mount passive element component in the hole or in the recess of the tape substrate,
All of the surface mount type passive element components are accommodated in the hole or the recess of the tape base material in a posture in which the upper surface side of the element member faces the top cover tape. Parts carrier tape. A plate-like insulating layer having a first surface and a second surface facing the first surface;
A rectangular parallelepiped element member; on a first end surface which is an end surface on one side in the longitudinal direction of the element member; and on at least an upper surface of the element member connected to the first end surface; A first terminal electrode provided on a part of the lower surface so as to be continuous with the first end surface; a second end that is an end surface on the other side in the longitudinal direction of the element member; A second terminal electrode provided on the surface and at least a part on the upper surface and the lower surface of the element member connected to the second end surface so as to continue to the second end surface; Each of the first terminal electrode and the second terminal electrode provided on the upper surface of the element member is provided on the lower surface of the element member. A surface-mounted passive element component having a larger area than the upper surface side, A surface-mount type passive element positioned inside the plate-like insulating layer in the thickness direction so that the upper surface and the second surface are parallel to the second surface side of the plate-like insulating layer Parts,
A first wiring pattern provided on the first surface of the plate-like insulating layer;
A solder member for electrically connecting the first wiring pattern and the lower surface side of the first and second terminal electrodes of the surface-mounted passive element component;
A second wiring pattern provided on the second surface of the plate-like insulating layer;
At least the second terminal electrode of the surface-mount type passive element component penetrating through a part of the plate-like insulating layer in the thickness direction and electrically conducting with the second wiring pattern from the second wiring pattern A wiring board with a built-in component, comprising: a via-hole plated via extending to be electrically connected to the upper surface side of the wiring board.

Images