JP3525832B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP3525832B2
JP3525832B2 JP33311999A JP33311999A JP3525832B2 JP 3525832 B2 JP3525832 B2 JP 3525832B2 JP 33311999 A JP33311999 A JP 33311999A JP 33311999 A JP33311999 A JP 33311999A JP 3525832 B2 JP3525832 B2 JP 3525832B2
Authority
JP
Japan
Prior art keywords
heat dissipation
members
semiconductor device
heat
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP33311999A
Other languages
Japanese (ja)
Other versions
JP2001156225A (en
Inventor
真光　　邦明
平井　　康義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP33311999A priority Critical patent/JP3525832B2/en
Priority to US09/717,227 priority patent/US6703707B1/en
Priority to FR0015130A priority patent/FR2801423B1/en
Priority to DE10066441A priority patent/DE10066441B4/en
Priority to DE10066443A priority patent/DE10066443B8/en
Priority to DE10058446A priority patent/DE10058446B8/en
Priority to DE10066446A priority patent/DE10066446B4/en
Priority to DE10066445A priority patent/DE10066445B4/en
Priority to DE10066442A priority patent/DE10066442B4/en
Publication of JP2001156225A publication Critical patent/JP2001156225A/en
Priority to US10/321,365 priority patent/US6693350B2/en
Priority to US10/699,746 priority patent/US6998707B2/en
Priority to US10/699,828 priority patent/US6992383B2/en
Priority to US10/699,837 priority patent/US6960825B2/en
Priority to US10/699,785 priority patent/US6891265B2/en
Priority to US10/699,744 priority patent/US20040089940A1/en
Priority to US10/699,838 priority patent/US6798062B2/en
Priority to US10/699,954 priority patent/US6967404B2/en
Priority to US10/699,784 priority patent/US20040089941A1/en
Application granted granted Critical
Publication of JP3525832B2 publication Critical patent/JP3525832B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
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    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
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    • H01L2924/1304—Transistor
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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, with which heat radiation or electric conductivity can be improved and various semiconductor chips can be easily housed. SOLUTION: A pair of heat radiating members 2 and 3 are located so as to sandwich planar located Si chips 1a and 1b, and the main electrodes of the Si chips 1a and 1b and the respective heat radiating members 2 and 3 mainly composed of metals of Cu or Al are connected through a bonding member 4 so as to electrically and thermally connect them. On the heat radiating member 2 on one side, a protruding part 2a is formed corresponding to the confronted Si chips 1a and 1b and the top end of that protruding part 2a and the main electrode are connected. Then, the Si chips 1a and 1b and the respective heat radiating members 2 and 3 are sealed with resins.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体チップの両
面に放熱部材を設け、両面から放熱を行うようになって
いる半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which heat radiating members are provided on both sides of a semiconductor chip and heat is radiated from both sides.

【０００２】[0002]

【従来の技術】半導体チップの両面から放熱を行う半導
体装置には、例えば、特開平６−２９１２２３号公報に
記載の発明がある。図１２は、この公報に記載の半導体
装置の構成を示す模式図であり、（ａ）は上面図、
（ｂ）は（ａ）におけるＧ−Ｇ断面図で、（ｃ）は
（ａ）におけるＨ−Ｈ断面図である。2. Description of the Related Art A semiconductor device that radiates heat from both sides of a semiconductor chip is disclosed in, for example, Japanese Patent Laid-Open No. 6-291223. FIG. 12 is a schematic view showing the configuration of the semiconductor device described in this publication, (a) is a top view,
(B) is a GG sectional view in (a), and (c) is an HH sectional view in (a).

【０００３】図１２に示すように、この半導体装置は、
一対の放熱部材Ｊ２、Ｊ３が、半導体チップＪ１を挟む
様にして、半導体チップＪ１と熱的かつ電気的に接続さ
れてなる半導体装置（以下、この様な半導体装置を、半
導体チップの両面において熱的かつ電気的に接続した半
導体装置という）である。そして、平面的に配置された
複数の半導体チップ（図１２ではその一部のみ図示）Ｊ
１と、一対の放熱部材Ｊ２、Ｊ３とが、樹脂Ｊ５により
封止されて１つの半導体装置となっている。As shown in FIG. 12, this semiconductor device has
A semiconductor device in which a pair of heat dissipation members J2 and J3 are thermally and electrically connected to the semiconductor chip J1 so as to sandwich the semiconductor chip J1 (hereinafter, such a semiconductor device is heated on both sides of the semiconductor chip). It is called a semiconductor device that is electrically and electrically connected). Then, a plurality of semiconductor chips arranged in a plane (only a part thereof is shown in FIG. 12) J
1 and the pair of heat dissipation members J2 and J3 are sealed with resin J5 to form one semiconductor device.

【０００４】また、各々の放熱部材Ｊ２、Ｊ３が電極と
しての役割も兼ねており、各々の放熱部材Ｊ２、Ｊ３の
半導体チップＪ１と接触している面とは反対側の面が、
樹脂Ｊ５から露出した状態となっており、この露出した
面を放熱作用を持つ接触体（図示せず）に接触させて放
熱を行うようにしている。また、半導体チップＪ１の制
御電極と接続された制御用端子Ｊ４が樹脂から外部に出
ている。The heat radiating members J2 and J3 also serve as electrodes, and the surface of each of the heat radiating members J2 and J3 opposite to the surface in contact with the semiconductor chip J1 is
It is exposed from the resin J5, and the exposed surface is brought into contact with a contact body (not shown) having a heat radiating action to radiate heat. Further, the control terminal J4 connected to the control electrode of the semiconductor chip J1 is exposed from the resin.

【０００５】ここで、この放熱部材Ｊ２、Ｊ３としては
半導体チップＪ１と熱膨張係数の近似したＷ（タングス
テン）やＭｏ（モリブデン）を用いており、半導体チッ
プＪ１の制御電極が形成された面と接続している放熱部
材Ｊ２がエミッタであり、半導体チップＪ１の制御電極
が形成された面の反対側の面と接続している放熱部材Ｊ
３がコレクタである。また、エミッタ電極である放熱部
材Ｊ２のための貫通孔を中央に有する絶縁板Ｊ６におい
て、複数の半田バンプＪ７を突出させておき、この半田
バンプＪ７をコレクタ電極である放熱部材Ｊ３の上に位
置する複数の半導体チップＪ１の各々のユニットパター
ンに存在するボンディングパッドと接合させるようにな
っている。As the heat radiating members J2 and J3, W (tungsten) and Mo (molybdenum) having a thermal expansion coefficient similar to that of the semiconductor chip J1 are used, and the surface of the semiconductor chip J1 on which the control electrode is formed is used. The connected heat dissipation member J2 is an emitter, and the heat dissipation member J is connected to the surface of the semiconductor chip J1 opposite to the surface on which the control electrodes are formed.
3 is a collector. In addition, a plurality of solder bumps J7 are made to protrude in an insulating plate J6 having a through hole for a heat dissipation member J2 which is an emitter electrode in the center, and the solder bumps J7 are positioned above the heat dissipation member J3 which is a collector electrode. The plurality of semiconductor chips J1 are bonded to the bonding pads existing in the respective unit patterns.

【０００６】[0006]

【発明が解決しようとする課題】上記従来技術では、電
極兼用型放熱部材Ｊ２、Ｊ３としてはＳｉ（シリコン）
よりなる半導体チップＪ１と線熱膨張係数が近似した金
属材料、つまりＷやＭｏを用いているが、これらの金属
の電気伝導度はＣｕ（銅）やＡｌ（アルミニウム）の電
気伝導度の約３分の１倍、熱伝導率は３分の１〜３分の
２倍程度となっている。従って、半導体チップに大電流
を流すという要求が高まりつつある現在、放熱部材や電
極、あるいは放熱を兼ねた電極としてＷやＭｏを用いる
ことは問題である。In the above-mentioned prior art, the heat radiation members J2 and J3 also serving as electrodes are made of Si (silicon).
A metal material having a linear thermal expansion coefficient similar to that of the semiconductor chip J1 made of, for example, W or Mo is used. The electric conductivity of these metals is about 3 that of Cu (copper) or Al (aluminum). The thermal conductivity is about 1/3 and the thermal conductivity is about 1/3 to 2/3. Therefore, at the present time when the demand for supplying a large current to the semiconductor chip is increasing, it is a problem to use W or Mo as a heat radiating member or an electrode, or as an electrode that also serves as heat radiating.

【０００７】また、一般に、大電流を流すためには大き
なチップが必要になるが、大きなチップを作ることは技
術的な課題が多く、小さなチップを多数作り、１つのパ
ッケージに収納する方が作り易い。In general, a large chip is required to pass a large current, but there are many technical problems in making a large chip. It is better to make a large number of small chips and store them in one package. easy.

【０００８】上記従来公報に記載の技術では、複数の半
導体チップＪ１を半導体装置内に形成しているものの、
図１２に示すように、放熱部材Ｊ２が単純な矩形であ
り、かつ、装置の中央に設けられているため、異なる半
導体チップを１つの装置に配置する際に制約がある。つ
まり、各々の半導体チップの厚みが異なったり、接触し
てはいけない領域が各々の半導体チップで異なる場合な
どにおいて、１つの単純な矩形のエミッタ電極によっ
て、それらの異なる半導体チップの全てと接続すること
は困難である。In the technique described in the above publication, a plurality of semiconductor chips J1 are formed in the semiconductor device,
As shown in FIG. 12, since the heat dissipation member J2 is a simple rectangle and is provided in the center of the device, there are restrictions when arranging different semiconductor chips in one device. That is, in the case where the thickness of each semiconductor chip is different, or the area that should not be in contact is different in each semiconductor chip, etc., connect all of these different semiconductor chips with one simple rectangular emitter electrode. It is difficult.

【０００９】本発明は、上記問題点に鑑み、半導体チッ
プの両面と熱的かつ電気的に接続した放熱部材を有する
半導体装置において、放熱性や電気伝導性を改善した半
導体装置を提供することを１つの目的とし、また、異な
る半導体チップを容易に収納できる半導体装置を提供す
ることを他の目的とする。In view of the above problems, the present invention provides a semiconductor device having a heat dissipation member that is thermally and electrically connected to both sides of a semiconductor chip, with improved heat dissipation and electrical conductivity. Another object is to provide a semiconductor device which can easily accommodate different semiconductor chips.

【００１０】[0010]

【課題を解決するための手段】上記目的を達成するた
め、請求項１に記載の発明では、チップの両面と熱的か
つ電気的に接続した半導体装置において、放熱面（１
０）を有する一対の放熱部材（２、３）がタングステン
およびモリブデンよりも、電気伝導度および熱伝導率の
うちの少なくとも一方が高い金属材料からなることを特
徴としている。In order to achieve the above object, in the invention according to claim 1, in a semiconductor device thermally and electrically connected to both surfaces of a chip, a heat dissipation surface (1
The pair of heat dissipation members (2, 3) having (0) are made of a metal material having at least one of electric conductivity and thermal conductivity higher than that of tungsten and molybdenum.

【００１１】本発明によれば、放熱部材（２、３）とし
てタングステンやモリブデンよりも電気伝導度や熱伝導
率が良い金属を用いているため、放熱性や電気伝導性を
改善した半導体装置を提供することができる。また、請
求項１に記載の発明では、半導体チップ（１ａ、１ｂ）
と一対の放熱部材（２、３）とがモールド樹脂（９）に
より封止されており、モールド樹脂（９）が、一対の放
熱部材（２、３）と熱膨張係数が近似した樹脂であるこ
とを特徴としている。この発明によれば、樹脂（９）に
よって半導体チップ（１ａ、１ｂ）と放熱部材（２、
３）とを結び付けることにより、これらの部材（１〜
３）の接続を補強することができる。従って、半導体チ
ップ（１ａ、１ｂ）と放熱部材（２、３）との熱膨張係
数が異なる場合に生じる熱応力を緩和することができ
る。特に、放熱部材（２、３）と熱膨張係数が近似した
樹脂（９）を用いると、温度変化の際に、半導体チップ
（１ａ、１ｂ）に対して放熱部材（２、３）と同様の伸
縮を促す応力が加えられるため、接合部材（４）に加わ
る応力が緩和され、歪みが抑制される。 According to the present invention, since the heat dissipation member (2, 3) is made of a metal having better electric conductivity or thermal conductivity than tungsten or molybdenum, a semiconductor device having improved heat dissipation and electric conductivity can be obtained. Can be provided. Also, the contract
In the invention described in claim 1, the semiconductor chips (1a, 1b)
And a pair of heat dissipation members (2, 3) on the mold resin (9)
It is more sealed, and the mold resin (9) has a pair of
It is a resin that has a thermal expansion coefficient similar to that of the thermal member (2, 3).
It is characterized by. According to this invention, the resin (9)
Therefore, the semiconductor chips (1a, 1b) and the heat dissipation member (2,
3) by connecting with these members (1
The connection of 3) can be reinforced. Therefore, the semiconductor chip
Expansion coefficient between the heat sink (1a, 1b) and the heat dissipation member (2, 3)
It can relieve the thermal stress caused by different numbers.
It Especially, the coefficient of thermal expansion was close to that of the heat dissipation members (2, 3).
When resin (9) is used, the semiconductor chip
Similar to the heat dissipation members (2, 3) with respect to (1a, 1b)
Since a stress that causes shrinkage is applied, it is applied to the joining member (4).
Stress is relaxed and strain is suppressed.

【００１２】[0012]

【００１３】[0013]

【００１４】請求項２に記載の発明では、請求項１に記
載の発明において、放熱面（１０）が、各々の放熱部材
（２、３）のうち、半導体チップ（１ａ、１ｂ）と対向
する面の端部にある面であり、これらの放熱面（１０）
が同一平面上にあることを特徴としている。[0014] In the invention described in claim 2, in serial <br/> mounting of the invention in claim 1, heat radiating surface (10), of each of the heat dissipating member (2, 3), the semiconductor chip (1a, 1b) is a surface at the end of the surface facing 1b), and these heat dissipation surfaces (10)
Are on the same plane.

【００１５】本発明によれば、絶縁基板を介して放熱面
（１０）と接触して冷却を行う外部の冷却部材を１つ用
意すれば良く、半導体装置を外部の冷却部材に組み付け
るときの自由度を向上させることができる。According to the present invention, it suffices to prepare one external cooling member for cooling by contacting with the heat dissipation surface (10) through the insulating substrate, and freedom when assembling the semiconductor device to the external cooling member. The degree can be improved.

【００１６】請求項３に記載の発明では、請求項１また
は２に記載の発明において、各々の放熱部材（２、３）
のうち放熱面（１０）以外の部位には、半導体チップ
（１ａ、１ｂ）と外部とを電気的に接続するための導体
（１７）を当該部位から突出して形成していることを特
徴としている。[0016] In the invention described in claim 3, also claim 1
In the invention described in 2 , each heat dissipation member (2, 3)
A conductor (17) for electrically connecting the semiconductor chips (1a, 1b) and the outside is formed at a portion other than the heat dissipation surface (10) so as to project from the portion. .

【００１７】これにより、この各々の導体（１７）を介
して外部と電気的に接続することができるため、放熱面
（１０）において配線を接続する必要が無い。その結
果、熱の伝導方向における部材の接続界面を減らすこと
ができ、放熱性をさらに改善することができる。また、
半導体装置の厚みを減少させることができる。As a result, the conductors (17) can be electrically connected to the outside through the conductors (17), so that it is not necessary to connect wiring at the heat dissipation surface (10). As a result, the connecting interface of the members in the heat conduction direction can be reduced, and the heat dissipation can be further improved. Also,
The thickness of the semiconductor device can be reduced.

【００１８】請求項４に記載の発明では、請求項３に記
載の発明において、各々の導体（１７）が各々の放熱部
材（２、３）の放熱面（１０）に垂直な方向において略
同じ位置から略同じ方向に突出しており、各々の導体
（１７）が互いに略平行の位置関係にあることを特徴と
している。According to a fourth aspect of the invention, in the third aspect of the invention, the conductors (17) are substantially the same in the direction perpendicular to the heat radiating surface (10) of the heat radiating members (2, 3). It is characterized in that the conductors (17) protrude from the position in substantially the same direction and that the conductors (17) are in a substantially parallel positional relationship with each other.

【００１９】本発明によれば、近接した平行導体で互い
に逆方向の電流が流れると、導体（１７）周囲に発生す
る磁界はほぼ打ち消されるため、インダクタンスを大幅
に抑制することができる。According to the present invention, when currents flowing in mutually opposite directions flow in parallel parallel conductors, the magnetic field generated around the conductor (17) is almost canceled, so that the inductance can be greatly suppressed.

【００２０】請求項５に記載の発明では、請求項１に記
載の発明において、放熱面（１０）が、各々の放熱部材
（２、３）のうち、半導体チップ（１ａ、１ｂ）と対向
している面とは反対側の面であり、各々の放熱面（１
０）において、各々の放熱部材（２、３）と熱的かつ電
気的に接続された外部配線部材（１１）を有し、各々の
放熱部材（２、３）に対し、各々の放熱面（１０）から
少なくとも１つの貫通していないネジ穴（２３ａ）を形
成しており、外部配線部材（１１）に対し、貫通してい
ないネジ穴（２３ａ）と対応する位置において貫通した
ネジ穴（２３ｂ）を形成しており、各々の放熱部材
（２、３）と各々の外部配線部材（１１）とをこれらの
ネジ穴（２３ａ、２３ｂ）によってネジ止めしているこ
とを特徴としている。[0020] In the invention described in claim 5, in serial <br/> mounting of the invention in claim 1, heat radiating surface (10), of each of the heat dissipating member (2, 3), the semiconductor chip (1a, 1b) is the surface opposite to the surface facing the heat radiation surface (1b).
0) has an external wiring member (11) thermally and electrically connected to each heat dissipation member (2, 3), and for each heat dissipation member (2, 3), each heat dissipation surface ( 10) forming at least one threaded hole (23a) which does not penetrate, and penetrates the external wiring member (11) at a position corresponding to the threaded hole (23a) which does not penetrate. ) Is formed, and each heat radiation member (2, 3) and each external wiring member (11) are screwed by these screw holes (23a, 23b).

【００２１】本発明によれば、放熱部材（２、３）には
貫通していないネジ穴（２３ａ）を形成しているため、
半導体チップ（１ａ、１ｂ）に対してネジが接触するこ
とは無く、任意の位置にこれらのネジ穴（２３ａ、２３
ｂ）を形成することができる。またネジにより固定して
いるため、放熱部材（２、３）と外部配線部材（１１）
とを固定する際の圧力を高くしても、半導体チップ（１
ａ、１ｂ）に対しては圧力が加わることはない。According to the present invention, since the heat dissipating members (2, 3) are formed with the screw holes (23a) which do not penetrate therethrough,
The screws do not come into contact with the semiconductor chips (1a, 1b), and these screw holes (23a, 23b) are placed at arbitrary positions.
b) can be formed. Further, since they are fixed by screws, the heat dissipation members (2, 3) and the external wiring member (11)
Even if the pressure for fixing and is increased, the semiconductor chip (1
No pressure is applied to a) and 1b).

【００２２】従って、良好に放熱部材（２、３）の放熱
面（１０）と外部配線部材（１１）との接触抵抗を低下
させることができ、放熱性や電気伝導性を改善すること
ができる。Therefore, the contact resistance between the heat radiating surface (10) of the heat radiating member (2, 3) and the external wiring member (11) can be satisfactorily reduced, and the heat radiating property and the electrical conductivity can be improved. .

【００２３】請求項６に記載の発明では、平面的に配置
された複数の半導体チップ（１ａ、１ｂ）の両面（６
ａ、６ｂ)において熱的かつ電気的に接続した半導体装
置において、放熱面（１０）を有する一対の放熱部材
（２、３）のうち、各々の半導体チップ（１ａ、１ｂ）
と対向する部位に、各々の半導体チップ（１ａ、１ｂ）
側に段状に突出する突出部（２ａ）を有し、この各々の
突出部（２ａ）の先端部を各々の半導体チップ（１ａ、
１ｂ）と、接合部材（４）を介して熱的かつ電気的に接
続していることを特徴としている。According to a sixth aspect of the invention, both sides (6) of the plurality of semiconductor chips (1a, 1b) arranged in a plane are arranged.
a, 6b) in the semiconductor device thermally and electrically connected, each semiconductor chip (1a, 1b) of the pair of heat dissipation members (2, 3) having a heat dissipation surface (10).
Each semiconductor chip (1a, 1b) is provided at a portion facing
It has a projecting portion (2a) projecting stepwise on the side, and the tip of each projecting portion (2a) is attached to each semiconductor chip (1a,
1b) is thermally and electrically connected to each other via the joining member (4).

【００２４】これにより、各々の半導体チップ（１ａ、
１ｂ）の電極部の形状に応じて突出部（２ａ）の形状を
調節することができるため、異なる半導体チップ（１
ａ、１ｂ）を容易に収納することができる半導体装置を
提供することができる。また、請求項６に記載の発明で
は、半導体チップ（１ａ、１ｂ）と一対の放熱部材
（２、３）とがモールド樹脂（９）により封止されてお
り、モールド樹脂（９）が、一対の放熱部材（２、３）
と熱膨張係数が近似した樹脂であることを特徴としてい
る。この発明によれば、樹脂（９）によって半導体チッ
プ（１ａ、１ｂ）と放熱部材（２、３）とを結び付ける
ことにより、これらの部材（１〜３）の接続を補強する
ことができる。従って、半導体チップ（１ａ、１ｂ）と
放熱部材（２、３）との熱膨張係数が異なる場合に生じ
る熱応力を緩和することができる。特に、放熱部材
（２、３）と熱膨張係数が近似した樹脂（９）を用いる
と、温度変化の際に、半導体チップ（１ａ、１ｂ）に対
して放熱部材（２、３）と同様の伸縮を促す応力が加え
られるため、接合部材（４）に加わる応力が緩和され、
歪みが抑制される。 As a result, each semiconductor chip (1a,
Since the shape of the protruding portion (2a) can be adjusted according to the shape of the electrode portion of 1b), different semiconductor chips (1
It is possible to provide a semiconductor device that can easily store a, 1b). In the invention according to claim 6,
Is a semiconductor chip (1a, 1b) and a pair of heat dissipation members
(2, 3) is sealed with mold resin (9)
The mold resin (9) is heated by the pair of heat dissipation members (2, 3).
Is a resin whose coefficient of thermal expansion is similar to
It According to this invention, the semiconductor chip is made of resin (9).
To connect the heat sink (2a, 3) with the heat sink (1a, 1b).
To reinforce the connection of these members (1 to 3)
be able to. Therefore, with the semiconductor chips (1a, 1b)
It occurs when the coefficient of thermal expansion is different from that of the heat dissipation member (2, 3)
It is possible to relieve thermal stress. Especially, the heat dissipation member
Resin (9) having a thermal expansion coefficient similar to that of (2, 3) is used.
And when the temperature changes, the semiconductor chips (1a, 1b)
Then, the same stress that causes expansion and contraction as with the heat dissipation members (2, 3) is applied.
Therefore, the stress applied to the joining member (4) is relaxed,
Distortion is suppressed.

【００２５】請求項７に記載の発明では、請求項６に記
載の発明において、放熱面（１０）が、各々の放熱部材
（２、３）のうち、各々の半導体チップ（１ａ、１ｂ）
と対向している面とは反対側の面であり、各々の放熱面
（１０）が略平面となり、さらに、これらの放熱面（１
０）が互いに略平行の関係となっていることを特徴とし
ている。According to a seventh aspect of the present invention, in the sixth aspect of the invention, the heat dissipation surface (10) has a semiconductor chip (1a, 1b) of each heat dissipation member (2, 3).
Is a surface on the side opposite to the surface facing each other, and each heat dissipation surface (10) is a substantially flat surface, and further, these heat dissipation surfaces (1
0) are substantially parallel to each other.

【００２６】本発明によれば、半導体チップ（１ａ、１
ｂ）が厚い場合は、突出部（２ａ）の突出量を相対的に
少なくし、半導体チップ（１ａ、１ｂ）が薄いときは、
突出量を相対的に多くする等して、各々の半導体チップ
（１ａ、１ｂ）に対応して各々の突出量（２ａ）を調節
することにより、各々の放熱面（１０）が略平面であ
り、かつ、互いに略平行の関係にすることができる。According to the present invention, the semiconductor chips (1a, 1
When b) is thick, the protrusion amount of the protrusion (2a) is relatively small, and when the semiconductor chips (1a, 1b) are thin,
By adjusting the amount of protrusion (2a) corresponding to each semiconductor chip (1a, 1b) by relatively increasing the amount of protrusion, each heat dissipation surface (10) is a substantially flat surface. , And substantially parallel to each other.

【００２７】その結果、例えば、一対の外部の部材によ
り各々の放熱面（１０）を挟む等して組み付ける際に、
各々の放熱部材（２、３）や各々の半導体チップ（１
ａ、１ｂ）に対して均等に力が加わる等、組み付け性の
向上を図ることができる。As a result, for example, when assembling each heat radiating surface (10) by a pair of external members,
Each heat dissipation member (2, 3) and each semiconductor chip (1
It is possible to improve the assemblability, for example, applying a force evenly to a) and 1b).

【００２８】請求項８に記載の発明では、請求項６に記
載の発明において、請求項２に記載の発明と同様の特徴
を有し、同様の効果を発揮することができる。According to the invention described in claim 8 , in the invention described in claim 6 , it has the same characteristics as the invention described in claim 2 and can exert the same effect.

【００２９】[0029]

【００３０】請求項９に記載の発明では、請求項５ない
し８のいずれか１つに記載の発明において、請求項５に
記載の発明と同様の特徴を有し、同様の効果を発揮する
ことができる。In the invention described in claim 9 , the invention described in any one of claims 5 to 8 has the same features as the invention described in claim 5, and the same. It can be effective.

【００３１】請求項１０に記載の発明では、請求項９に
記載の発明において、請求項３に記載の発明と同様の特
徴を有し、同様の効果を発揮することができる。[0031] In the invention according to claim 1 0, in the invention described in claim 9, has the same features of the invention described in claim 3, it is possible to achieve the same effect.

【００３２】請求項１１に記載の発明によれば、請求項
６または７に記載の発明において、請求項５に記載の発
明と同様の特徴を有し、同様の効果を発揮することがで
きる。According to the invention described in claim 1 1, claim
The invention described in 6 or 7 has the same features as the invention described in claim 5 , and can exhibit the same effect.

【００３３】請求項１２に記載の発明では、請求項１な
いし１１のいずれか１つに記載の発明において、各々の
放熱部材（２、３）には、各々の放熱部材（２、３）の
剛性を減少させるための空間部（１５）を形成している
ことを特徴としている。これにより、放熱部材（２、
３）の剛性を下げることができるため、半導体チップ
（１ａ、１ｂ）や接合部材（４）に加わる応力を低減す
ることができる。In the invention described in claim 12 , in the invention described in any one of claims 1 to 11, each heat dissipation member (2, 3) has a respective heat dissipation member (2, 3). ) Is formed to form a space portion (15) for reducing the rigidity. Thereby, the heat dissipation member (2,
Since the rigidity of 3) can be reduced, the stress applied to the semiconductor chips (1a, 1b) and the bonding member (4) can be reduced.

【００３４】請求項１３に記載の発明では、請求項１な
いし１２のいずれか１つに記載の発明において、一対の
放熱部材（２、３）として、銅を主成分とする金属、お
よび、アルミニウムを主成分とする金属のうちの少なく
とも一方を用いることを特徴としている。[0034] In the invention according to claim 1 3, in the invention according to any one of claims 1 to 1 2, as a pair of heat radiation members (2, 3), a metal composed mainly of copper, and It is characterized in that at least one of metals having aluminum as a main component is used.

【００３５】一般に、銅やアルミニウムを主成分とする
金属は、電気伝導率や熱伝導率が良好であり、さらに硬
度も低いため加工性が良い。従って、放熱性や電気伝導
性、さらには加工性を改善した半導体装置を提供するこ
とができる。特に、請求項５、８、１５等に記載の発明
の様に、放熱部材（２、３）に対して突出部（２ａ）や
空間部（１５）を形成したり、放熱部材（２、３）と導
体（１７）とを一体で形成したりするときは、本請求項
に記載の金属を放熱部材（２、３）として用いると、こ
の様な複雑な形状を容易に形成することができる。In general, a metal containing copper or aluminum as a main component has good electric conductivity and thermal conductivity, and also has low hardness, so that it has good workability. Therefore, it is possible to provide a semiconductor device having improved heat dissipation, electrical conductivity, and workability. In particular, as in the invention described in claims 5, 8, 15 and the like, the protrusion (2a) and the space (15) are formed on the heat dissipation member (2, 3), and the heat dissipation member (2, 3). ) And the conductor (17) are integrally formed, such a complicated shape can be easily formed by using the metal according to the present invention as the heat dissipation member (2, 3). .

【００３６】[0036]

【００３７】[0037]

【００３８】請求項１４に記載の発明では、請求項１な
いし１３のいずれか１つに記載の発明において、各々の
放熱部材（２、３）における半導体チップ（１ａ、１
ｂ）と対向する部分の少なくとも１つに対して、半導体
チップ（１ａ、１ｂ）と熱膨張係数が近似した金属材料
（１６）を用いることを特徴としている。これにより、
半導体装置全体の歪みを半導体チップ（１ａ、１ｂ）に
近づけることができるため、半導体チップ（１ａ、１
ｂ）に対する応力を低減させることができる。[0038] In the invention described in claim 1 4, claim 1 to the invention described in any one of 1 3, the semiconductor chip in each of the heat radiating member (2,3) (1a, 1
The metal material (16) having a thermal expansion coefficient similar to that of the semiconductor chips (1a, 1b) is used for at least one of the portions facing b). This allows
Since the strain of the entire semiconductor device can be brought close to that of the semiconductor chips (1a, 1b), the semiconductor chips (1a, 1b)
The stress on b) can be reduced.

【００３９】請求項１５に記載の発明では、請求項１な
いし１４のいずれか１つに記載の発明において、接合部
材（４）がバンプ形状となっており、このバンプ形状の
接合部材（４）の隙間に樹脂（１８）を充填しているこ
とを特徴としている。[0039] In the invention described in claim 1 5, in the invention according to any one of claims 1 to 1 4, the bonding member (4) has a bump shape, joining members of the bump shape ( It is characterized in that the resin (18) is filled in the gap of 4).

【００４０】これにより、接合部材（４）の間の樹脂
（１８）により、接合部材（４）の塑性変形を抑制する
ことができ、半導体チップ（１ａ、１ｂ）と放熱部材
（２、３）との接続を補強することができる。As a result, the plastic deformation of the joining member (4) can be suppressed by the resin (18) between the joining members (4), and the semiconductor chips (1a, 1b) and the heat dissipation members (2, 3). The connection with can be reinforced.

【００４１】なお、上記各手段の括弧内の符号は、後述
する実施形態に記載の具体的手段との対応関係を示すも
のである。The reference numerals in parentheses of the above-mentioned means indicate the correspondence with the concrete means described in the embodiments described later.

【００４２】[0042]

【発明の実施の形態】（第１実施形態）図１は、本発明
の第１実施形態の半導体装置の断面図であり、（ａ）は
全体図、（ｂ）は（ａ）におけるＡの部分の拡大図であ
る。以下、本実施形態を、図１に示す例について述べ
る。図１（ａ）に示すように、平面的に配置された２つ
の半導体チップとしてのＳｉチップ１ａ、１ｂを挟む様
にして、一対の放熱部材２、３が配置されており、Ｓｉ
チップ１ａ、１ｂの主電極と各々の放熱部材２、３と
が、熱的かつ電気的に接続されるように接合部材４を介
して接続されている。以下、特に記述が無い限り、接続
とは、熱的かつ電気的な接続を示すものとする。また、
Ｓｉチップ１ａの制御電極と、リードフレームに繋がっ
ている制御用端子５とがワイヤボンドにより形成された
ワイヤ８を介して電気的に接続されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention, in which (a) is an overall view and (b) is a view of A in (a). It is an enlarged view of a part. The present embodiment will be described below with reference to the example shown in FIG. As shown in FIG. 1A, a pair of heat dissipation members 2 and 3 are arranged so as to sandwich two planarly arranged Si chips 1a and 1b as semiconductor chips.
The main electrodes of the chips 1a and 1b and the respective heat dissipation members 2 and 3 are connected via a joining member 4 so as to be thermally and electrically connected. Hereinafter, unless otherwise specified, the term “connection” refers to thermal and electrical connection. Also,
The control electrode of the Si chip 1a and the control terminal 5 connected to the lead frame are electrically connected via a wire 8 formed by wire bonding.

【００４３】詳しくは、Ｓｉチップ１ａ、１ｂの上側の
面、つまり、Ｓｉチップ１ａにおいてワイヤボンドされ
ている側の面（以下、一面とする）６ａと対向する放熱
部材（以下、一面側の放熱部材とする）２には、Ｓｉチ
ップ１ａ、１ｂの主電極と対向する位置で段状に突出し
た突出部２ａが形成されており、その突出部２ａの先端
が略平面になっており、この平面部と主電極とが接合部
材４を介して接続されている。ここで、略平面とは、平
面もしくは、突出部２ａの平面部と主電極との接続に支
障をきたさない程度に平面であることを示す。More specifically, the upper surface of the Si chips 1a and 1b, that is, the surface (hereinafter referred to as one surface) 6a of the Si chip 1a on which the wire is bonded (hereinafter referred to as one surface), is disposed as a heat dissipation member (hereinafter referred to as "one surface side heat dissipation"). (Referred to as a member) 2 is formed with a protruding portion 2a protruding stepwise at a position facing the main electrodes of the Si chips 1a, 1b, and the tip of the protruding portion 2a is substantially flat. The plane portion and the main electrode are connected via the joining member 4. Here, the term “substantially flat” means a flat surface or a flat surface that does not hinder the connection between the flat portion of the protrusion 2a and the main electrode.

【００４４】次に、この突出部２ａについて、より詳し
く述べる。図１（ｂ）に示すように、一般にＳｉチップ
１ａ、１ｂがパワーデバイスである場合、Ｓｉチップ１
ａ、１ｂの周縁部における耐圧は、Ｓｉチップ１ａ、１
ｂの一面６ａと、一面６ａとは反対側の面である他面６
ｂのうちの片面に設けたガードリング７により保たれて
いる。Next, the protrusion 2a will be described in more detail. As shown in FIG. 1B, in general, when the Si chips 1a and 1b are power devices, the Si chip 1
The withstand voltage at the peripheral portions of a and 1b is
b one surface 6a and the other surface 6 which is the surface opposite to the one surface 6a
It is held by a guard ring 7 provided on one side of b.

【００４５】本実施形態の様に、Ｓｉチップ１ａ、１ｂ
の両面に放熱部材２、３となる金属を接合する場合、ガ
ードリング７のある面（本例では一面）６ａにも放熱部
材２を接合する。しかし、Ｓｉチップ１ａ、１ｂの周辺
部では、矢印Ｂで示す距離、つまり図中の破線の領域に
おいて、ガードリング７やＳｉチップ１ａ、１ｂの端面
等と一面側の放熱部材２との電気的な絶縁を行う必要が
あるため、この絶縁領域を確保するための工夫が必要と
なる。As in this embodiment, Si chips 1a, 1b
When the metal to be the heat radiating members 2 and 3 is bonded to both surfaces, the heat radiating member 2 is also bonded to the surface (one surface in this example) 6a on which the guard ring 7 is present. However, in the peripheral portion of the Si chips 1a and 1b, in the distance indicated by the arrow B, that is, in the area indicated by the broken line in the drawing, the electrical contact between the guard ring 7 and the end surfaces of the Si chips 1a and 1b and the heat dissipation member 2 on the one surface side is performed. Since it is necessary to perform proper insulation, it is necessary to devise to secure this insulation region.

【００４６】そのため、一面側の放熱部材２においてＳ
ｉチップ１ａ、１ｂの主電極に対向する部分に突出部２
ａが形成されている。換言すれば、一面側の放熱部材２
は、この高耐圧化領域（絶縁領域）を避けるためにＳｉ
チップ１ａ、１ｂのガードリング７に対向する部分にお
いて凹んだ形状となっている。Therefore, in the heat dissipation member 2 on the one surface side, S
Protrusions 2 are formed on the portions of the i-chips 1a and 1b facing the main electrodes.
a is formed. In other words, the heat dissipation member 2 on the one surface side
In order to avoid this high breakdown voltage region (insulation region),
The portions of the chips 1a and 1b facing the guard ring 7 are recessed.

【００４７】また、Ｓｉチップ１ａ、１ｂの他面６ｂと
対向している放熱部材（以下、他面側の放熱部材とす
る）３には、突出部は形成されておらず略平面となって
いる。また、各々の放熱部材２、３のうちＳｉチップ１
ａ、１ｂと対向している面と反対側の面は放熱面１０を
構成しており、この放熱面１０は略平面となっており、
これらの放熱面１０は互いに略平行の関係にある。Further, the heat dissipating member 3 (hereinafter, referred to as the heat dissipating member on the other surface side) 3 facing the other surface 6b of the Si chips 1a, 1b is not formed with a protruding portion and has a substantially flat surface. There is. In addition, the Si chip 1 of each of the heat dissipation members 2 and 3
The surface opposite to the surface facing a and 1b constitutes a heat dissipation surface 10, and this heat dissipation surface 10 is a substantially flat surface.
These heat dissipation surfaces 10 are substantially parallel to each other.

【００４８】ここで、Ｓｉチップ１ａ、１ｂとしては、
本例では、図１においてワイヤボンドされているＳｉチ
ップがＩＧＢＴ（Insulated Gate Bipolar Transisto
r）１ａであり、もう一方のＳｉチップがＦＷＤ（フリ
ーホイールダイオード）１ｂである。ＩＧＢＴ１ａにお
いては、それぞれ、一面側の放熱部材２がエミッタ、他
面側の放熱部材３がコレクタ、制御電極がゲートとなっ
ている。また、他面側の放熱部材３において略平面と
は、平面もしくは、他面側の放熱部材３に対するＳｉチ
ップ１ａ、１ｂの搭載性を阻害しない程度に平面である
ことを示す。Here, as the Si chips 1a and 1b,
In this example, the wire-bonded Si chip in FIG. 1 is an IGBT (Insulated Gate Bipolar Transistor).
r) 1a, and the other Si chip is FWD (free wheel diode) 1b. In the IGBT 1a, the heat dissipation member 2 on the one surface side is the emitter, the heat dissipation member 3 on the other surface side is the collector, and the control electrode is the gate. In addition, the substantially flat surface of the heat dissipation member 3 on the other surface side means a flat surface or a flat surface that does not impair the mountability of the Si chips 1a and 1b on the heat dissipation member 3 on the other surface side.

【００４９】そして、図１（ａ）に示すように、ＩＧＢ
Ｔ１ａとＦＷＤ１ｂでは、ＦＷＤ１ｂの方がチップの厚
みが厚くなっている。従って、一面側の放熱部材２のう
ち、ＩＧＢＴ１ａと対向する突出部２ａの突出量が相対
的に大きくなっており、ＦＷＤ１ｂと対向する突出部２
ａの突出量が相対的に小さくなっている。Then, as shown in FIG.
In T1a and FWD1b, the FWD1b has a thicker chip. Therefore, in the heat dissipation member 2 on the one surface side, the protrusion amount of the protrusion 2a facing the IGBT 1a is relatively large, and the protrusion 2 facing the FWD 1b is relatively large.
The protrusion amount of a is relatively small.

【００５０】また、一面および他面側の放熱部材２、３
としては、例えば、ＣｕやＡｌを主成分とする金属等
の、ＷおよびＭｏよりも電気伝導度または熱伝導率が高
く安価な金属材料を用いることができる。図２は、各々
の放熱部材２、３として利用できる金属の例を示した図
表である。図２に示すように、各々の放熱部材２、３と
して、具体的には、金属ａ〜金属ｌや無酸素銅等を用い
ることができる。ここで、例えば、金属ａは質量比でＦ
ｅ（鉄）を２．３％、Ｚｎ（亜鉛）を０．１％、Ｐ（リ
ン）を０．０３％含み、残りがＣｕである合金である。Further, the heat radiation members 2, 3 on the one surface and the other surface side
For example, a metal material such as a metal containing Cu or Al as a main component, which has a higher electric conductivity or thermal conductivity than W and Mo and is inexpensive, can be used. FIG. 2 is a table showing examples of metals that can be used as the heat dissipation members 2 and 3. As shown in FIG. 2, each of the heat dissipation members 2 and 3 may be specifically metal a to metal l, oxygen-free copper, or the like. Here, for example, the metal a is F in mass ratio.
An alloy containing 2.3% of e (iron), 0.1% of Zn (zinc), 0.03% of P (phosphorus), and the balance of Cu.

【００５１】また、接合部材４としては、熱応力に起因
するせん断応力に勝るせん断強度を持ち、熱伝導および
電気伝導に優れるものが望ましい。そのような接合部材
４として、例えば、半田、ろう材あるいは導電性接着剤
等を用いることができる。また、ワイヤボンドに用いら
れるワイヤ８は、Ａｕ（金）やＡｌ等、一般的にワイヤ
ボンドに使われるものを用いることができる。Further, it is desirable that the joining member 4 has shear strength superior to shear stress caused by thermal stress and is excellent in heat conduction and electric conduction. As such a joining member 4, for example, solder, a brazing material, a conductive adhesive, or the like can be used. The wire 8 used for wire bonding may be Au (gold), Al or the like which is generally used for wire bonding.

【００５２】また、図１に示すように、これらの部材１
〜５、８が、各々の放熱部材２、３のうちＳｉチップ１
ａ、１ｂと対向している面とは反対側の放熱面１０と、
制御用端子５のワイヤボンドされていない部分とが露出
した状態で樹脂９により封止されている。これらの放熱
部材２、３における樹脂９から露出した各々の放熱面１
０は、放熱と電極の役割を兼ねている。また、樹脂封止
に用いられる樹脂９は、各々の放熱部材２、３と熱膨張
係数が近似した樹脂を用いると良い。この様な樹脂９と
しては、例えば、エポキシ系モールド樹脂を用いること
ができる。Further, as shown in FIG. 1, these members 1
5 to 8 are Si chips 1 of the heat dissipation members 2 and 3, respectively.
a and the heat dissipation surface 10 opposite to the surface facing 1b,
The control terminal 5 is sealed with the resin 9 in a state where the wire-bonded portion is not exposed. Each heat dissipation surface 1 exposed from the resin 9 in these heat dissipation members 2 and 3
0 serves both as heat dissipation and as an electrode. Further, as the resin 9 used for resin sealing, it is preferable to use a resin having a thermal expansion coefficient similar to that of each of the heat dissipation members 2 and 3. As such a resin 9, for example, an epoxy type molding resin can be used.

【００５３】また、外部と電気的に接続するための一対
の外部配線部材１１によって、上述の樹脂封止された各
々の部材１〜５、８が挟まれており、放熱面１０と外部
配線部材１１とが接触している。この外部配線部材１１
は平板状であり、この平板のうち外部と配線する部分が
平板状のまま、あるいは細い線形状として導出されてい
るものである。Further, the above-mentioned resin-sealed members 1 to 5 and 8 are sandwiched by a pair of external wiring members 11 for electrically connecting to the outside, and the heat dissipation surface 10 and the external wiring members are connected. 11 is in contact. This external wiring member 11
Is a flat plate, and a portion of the flat plate that is connected to the outside is led out as a flat plate or as a thin line.

【００５４】さらに、一対の平板状の高熱伝導絶縁基板
１２を介して、上述の樹脂封止された部材１〜５、８と
外部配線部材１１とが、一対の外部冷却部材１３に挟ま
れる様にして接触している。そして、各々の外部冷却部
材１３においてボルト１４等を用ることにより、樹脂封
止された各部材１〜５、８、外部配線部材１１、高熱伝
導絶縁基板１２、および、外部冷却部材１３が固定され
ている。Further, the resin-sealed members 1 to 5 and 8 and the external wiring member 11 are sandwiched by the pair of external cooling members 13 via the pair of flat plate-shaped high thermal conductive insulating substrates 12. Then they are in contact. Then, by using bolts 14 and the like in each of the external cooling members 13, the resin-sealed members 1 to 5, 8, the external wiring member 11, the high thermal conductive insulating substrate 12, and the external cooling member 13 are fixed. Has been done.

【００５５】ここで、外部配線部材１１は熱伝導および
電気伝導に優れるものであれば何でも良い。また、高熱
伝導絶縁基板１２としては、例えば、ＡｌＮ（窒化アル
ミニウム）、ＳｉＮ（窒化シリコン）、Ａｌ2Ｏ3（酸化
アルミニウム）、ＳｉＣ（炭化シリコン）、ＢＮ（窒化
ボロン）およびダイヤモンド等を用いることができる。
また、外部冷却部材１３としては、放熱フィンを設けた
ものや、水冷する様になっているもの等を用いることが
できる。Here, the external wiring member 11 may be made of any material as long as it is excellent in heat conduction and electric conduction. Further, as the high thermal conductive insulating substrate 12, for example, AlN (aluminum nitride), SiN (silicon nitride), Al 2 O 3 (aluminum oxide), SiC (silicon carbide), BN (boron nitride), diamond or the like is used. You can
Further, as the external cooling member 13, a member provided with a radiation fin, a member designed to be water-cooled, or the like can be used.

【００５６】以上、この様な構成をとることにより、電
気的な経路に関しては、一面側の放熱部材２と接続され
た外部配線部材１１、一面側の放熱部材２、Ｓｉチップ
１ａ、１ｂ、そして、他面側の放熱部材３、他面側の放
熱部材３と接続された外部配線部材１１の順に、あるい
はその逆の順に電流が流れることになる。また、熱的な
経路に関しては、Ｓｉチップ１ａ、１ｂから発生した熱
が、順に、一面および他面側の放熱部材２、３、各々の
外部配線部材１１、各々の高熱伝導絶縁基板１２、各々
の外部冷却部材１３へと伝わり放熱される。As described above, by adopting such a configuration, regarding the electric path, the external wiring member 11 connected to the heat dissipation member 2 on the one surface side, the heat dissipation member 2 on the one surface side, the Si chips 1a, 1b, and The current flows through the heat radiating member 3 on the other surface side and the external wiring member 11 connected to the heat radiating member 3 on the other surface side, or vice versa. As for the thermal path, the heat generated from the Si chips 1a and 1b is, in order, the heat radiating members 2 and 3 on the one surface and the other surface, each external wiring member 11, each high thermal conductive insulating substrate 12, respectively. The heat is transmitted to the external cooling member 13 and is radiated.

【００５７】次に、この様な構成の半導体装置の製造方
法を図１に示した例について述べる。まず、Ｓｉチップ
１ａ、１ｂの他面６ｂ側における主電極と他面側の放熱
部材３とを接合部材４を用いて接続する。次に、Ｓｉチ
ップ１ａの制御電極と制御用端子５とをワイヤボンドに
より電気的に接続する。その後、Ｓｉチップ１ａ、１ｂ
の一面６ａ側の主電極と一面側の放熱部材２における突
出部２ａの先端とを、接合部材４を用いて接続する。こ
こで、一面側の放熱部材２の突出部２ａは、予め、例え
ばプレス等により形成しておくことができる。Next, a method of manufacturing a semiconductor device having such a structure will be described with reference to the example shown in FIG. First, the main electrode on the other surface 6b side of the Si chips 1a, 1b and the heat dissipation member 3 on the other surface side are connected using the joining member 4. Next, the control electrode of the Si chip 1a and the control terminal 5 are electrically connected by wire bonding. After that, Si chips 1a, 1b
The main electrode on the one surface 6a side and the tip of the protruding portion 2a of the heat dissipation member 2 on the one surface side are connected using the joining member 4. Here, the protrusion 2a of the heat dissipation member 2 on the one surface side can be formed in advance by, for example, a press or the like.

【００５８】次に、金型（図示せず）を用意し、金型内
に上述の様に一体化したＳｉチップ１ａ、１ｂと一面お
よび他面側の放熱部材２、３を設置して樹脂封止を行
い、各々の放熱部材２、３間の電気的絶縁を確保する。
続いて、上述の様に、各々の放熱面１０に対して、外部
配線部材１１、高熱伝導絶縁基板１２、外部冷却部材１
３の順に配置し、各々の外部冷却部材１３をボルト締め
することにより、これらの部材１１〜１３を固定する。
以上の様にして、本実施形態の半導体装置が完成する。Next, a mold (not shown) is prepared, and the Si chips 1a and 1b integrated as described above and the heat radiating members 2 and 3 on one side and the other side are installed in the mold and the resin is set. Sealing is performed to ensure electrical insulation between the heat dissipation members 2 and 3.
Then, as described above, the external wiring member 11, the high thermal conductive insulating substrate 12, and the external cooling member 1 are attached to each heat dissipation surface 10.
These members 11 to 13 are fixed by arranging them in the order of 3 and bolting each of the external cooling members 13 to each other.
As described above, the semiconductor device of this embodiment is completed.

【００５９】ところで、本実施形態によれば、一面およ
び他面側の放熱部材２、３としてＣｕやＡｌを主成分と
する金属等の熱伝導や電気伝導に優れる金属を用いてい
るため、放熱性や電気伝導性を改善した半導体装置を提
供することができる。また、この様な部材は、一般に従
来のＷやＭｏに比べてコストが低いため、低コストな半
導体装置を提供することもできる。さらには、本実施形
態では一面側の放熱部材２に突出部２ａを設けている
が、一般にＣｕやＡｌを主成分とする金属は、上記のＷ
やＭｏに比べて硬度が低いため、この突出部２ａを形成
するときの加工性も良好である。By the way, according to the present embodiment, since the heat dissipation members 2 and 3 on the one surface and the other surface are made of a metal having excellent heat conduction and electric conduction, such as a metal having Cu or Al as a main component, heat dissipation is performed. It is possible to provide a semiconductor device having improved conductivity and electrical conductivity. In addition, such a member generally has a lower cost than conventional W and Mo, so that it is possible to provide a low-cost semiconductor device. Further, in the present embodiment, the projecting portion 2a is provided on the heat dissipation member 2 on the one surface side. However, in general, a metal containing Cu or Al as a main component is the above-mentioned W.
Since the hardness is lower than that of Mo and Mo, the workability when forming the protrusion 2a is also good.

【００６０】また、一面側の放熱部材２に突出部２ａを
設けて、その突出部２ａを各々の異なるＳｉチップ１
ａ、１ｂの電極に接続しているため、適切に各々のＳｉ
チップ１ａ、１ｂと一面側の放熱部材２との接続を行う
ことができる。つまり、各々のＳｉチップ１ａ、１ｂの
厚みに対応して各々の突出部２ａの突出量を変え、各々
のＳｉチップ１ａ、１ｂの主電極の形状に対応して、突
出部２ａの形状を変えることができる。従って、異なる
半導体チップ１ａ、１ｂを容易に収納することができる
半導体装置を提供することができる。Further, the heat dissipating member 2 on the one surface side is provided with the projecting portion 2a, and the projecting portion 2a is provided for each different Si chip 1.
Since it is connected to the electrodes of a and 1b,
It is possible to connect the chips 1a and 1b to the heat dissipation member 2 on the one surface side. That is, the amount of protrusion of each protrusion 2a is changed according to the thickness of each Si chip 1a, 1b, and the shape of the protrusion 2a is changed corresponding to the shape of the main electrode of each Si chip 1a, 1b. be able to. Therefore, it is possible to provide a semiconductor device that can easily store different semiconductor chips 1a and 1b.

【００６１】本実施形態では、放熱面１０に凹凸があっ
たり、各々の放熱面１０が略平行の関係に無くても良い
が、特に本例では、上述の様に各々の放熱面１０が略平
面で、かつ互いに略平行であるものとしている。これ
は、上述の様に、各々のＳｉチップ１ａ、１ｂの厚さに
対応して突出部２ａの突出量を調節することにより、各
々のＳｉチップ１ａ、１ｂにおける相対的な表面上の段
差を突出部２ａで吸収することができ、各々の放熱面１
０を略平面にし、かつ互いに略平行の関係にすることが
できる。In the present embodiment, the heat radiating surface 10 may be uneven or the heat radiating surfaces 10 may not be in a substantially parallel relationship, but in particular, in the present example, each heat radiating surface 10 is substantially in the above-mentioned manner. It is assumed that they are flat and substantially parallel to each other. As described above, by adjusting the amount of protrusion of the protrusion 2a in accordance with the thickness of each Si chip 1a, 1b, the relative step difference on the surface of each Si chip 1a, 1b can be obtained. It can be absorbed by the protrusion 2a, and each heat dissipation surface 1
It is possible to make 0 substantially flat and to be substantially parallel to each other.

【００６２】その結果、本例の様に、各々の放熱面１０
に対して、外部配線部材１１、高熱伝導絶縁基板１２、
および、外部冷却部材１３を挟んでボルト締めする際
に、各々の放熱面１０が略平面であるため、放熱面１０
やこれらの部材１１〜１３の界面を容易に接触させるこ
とができる。以上、放熱面１０が略平面であるとは、平
面もしくは、放熱面１０と外部配線部材１１との接触性
を阻害しない程度に平面であることを示す。As a result, as in this example, each heat dissipation surface 10
On the other hand, the external wiring member 11, the high thermal conductive insulating substrate 12,
Also, when the external cooling member 13 is sandwiched and bolted, since the respective heat radiation surfaces 10 are substantially flat, the heat radiation surfaces 10
Also, the interfaces of these members 11 to 13 can be easily brought into contact with each other. As described above, the fact that the heat dissipation surface 10 is substantially flat means that the heat dissipation surface 10 is a flat surface or a flat surface that does not hinder the contact between the heat dissipation surface 10 and the external wiring member 11.

【００６３】さらに、各々の放熱面１０が互いに略平行
の関係にあるため、ボルト締めの際に各々の部材１〜
５、８、９、１１〜１３に対して均等に力が加わり、力
の偏りによりこれらの部材１〜５、８、９、１１〜１３
が破壊すること等が無く、組み付け性の向上を図ること
ができる。以上、各々の放熱面１０が互いに略平行の関
係にあるとは、互いに平行の関係にあるか、もしくは、
上述の組み付け性の向上を阻害しない程度に平行である
ことを示す。Furthermore, since the heat radiating surfaces 10 are in substantially parallel relation to each other, each member 1 to
A force is applied evenly to 5, 8, 9, 11 to 13, and due to the bias of the force, these members 1 to 5, 8, 9, 11 to 13
It is possible to improve the assembling property without breaking. As described above, the fact that the respective heat radiation surfaces 10 are substantially parallel to each other means that they are parallel to each other, or
It is shown that they are parallel to the extent that they do not hinder the above-mentioned improvement in the assembling property.

【００６４】一般に、ＩＧＢＴ１ａとＦＷＤ１ｂとはペ
アで用いられるが、ＩＧＢＴ１ａとＦＷＤ１ｂとの間の
距離が短い方が、回路動作上、理想的な動作をさせるこ
とができる。本実施形態によれば、ＩＧＢＴ１ａとＦＷ
Ｄ１ｂとを一体に樹脂封止された半導体装置内に近接し
て配置しているため、ＩＧＢＴ１ａを用いた理想的な半
導体装置を提供することができる。Generally, the IGBT 1a and the FWD 1b are used as a pair, but the shorter the distance between the IGBT 1a and the FWD 1b, the more ideal the circuit operation. According to the present embodiment, the IGBT 1a and the FW
Since the D1b and the D1b are disposed close to each other in the resin-sealed semiconductor device, an ideal semiconductor device using the IGBT 1a can be provided.

【００６５】また、異なる半導体チップ１ａ、１ｂを容
易に収納することができる半導体装置を提供するという
目的に限れば、一面および他面側の放熱部材２、３はＣ
ｕやＡｌを主成分とするもの等に限らず、一般に、電気
伝導性を有する部材を用いても良い。つまり、熱応力に
起因する接合部材４の破壊を防止することを重視する場
合は、一面および他面側の放熱部材２、３としてＳｉチ
ップ１ａ、１ｂと熱膨張係数が近似した金属を用いれば
良く、放熱性や電気伝導性を重視する場合は、一面およ
び他面側の放熱部材２、３としてＣｕやＡｌを主成分と
する金属を用いれば良い。For the purpose of providing a semiconductor device in which different semiconductor chips 1a and 1b can be easily housed, the heat radiation members 2 and 3 on one surface and the other surface are C-shaped.
Not limited to those containing u or Al as a main component, a member having electrical conductivity may be generally used. That is, when it is important to prevent the destruction of the joining member 4 due to the thermal stress, use of a metal having a thermal expansion coefficient similar to that of the Si chips 1a and 1b as the heat radiating members 2 and 3 on the one surface and the other surface. If the heat dissipation and the electric conductivity are important, the metal having Cu or Al as a main component may be used as the heat dissipation members 2 and 3 on the one surface and the other surface.

【００６６】また、本例で用いる樹脂９は、一面および
他面側の放熱部材２、３との絶縁を図る目的の他に、樹
脂９によってＳｉチップ１ａ、１ｂと各々の放熱部材
２、３とを結び付けることにより、Ｓｉチップ１ａ、１
ｂと各々の放熱部材２、３との接続を補強することにも
着眼をおいている。従って、本例の様に、各々の放熱部
材２、３としてＳｉチップ１ａ、１ｂと熱膨張係数が異
なるＣｕやＡｌを主成分とした金属を用いる場合も、発
生する熱応力に起因する接合部材４の破壊を、樹脂９に
より緩和することができる。Further, the resin 9 used in this example is used for the purpose of insulating the heat radiation members 2 and 3 from the one surface and the other surface side, and the Si chips 1a and 1b and the respective heat radiation members 2 and 3 are made of the resin 9 in order to insulate the heat radiation members 2 and 3 from each other. By connecting with, the Si chips 1a, 1
It also focuses on reinforcing the connection between b and the respective heat dissipation members 2, 3. Therefore, as in the present example, even when a metal mainly composed of Cu or Al having a thermal expansion coefficient different from that of the Si chips 1a and 1b is used as each of the heat dissipation members 2 and 3, a joining member caused by the generated thermal stress is used. The destruction of No. 4 can be alleviated by the resin 9.

【００６７】特に、一面および他面側の放熱部材２、３
と熱膨張係数が近似した樹脂９を用いると、温度変化の
際に、Ｓｉチップ１ａ、１ｂに対して各々の放熱部材
２、３と同様の伸縮を促す応力が加えられるため、接合
部材４に加わる応力が緩和されて歪みが抑制され、接続
部の信頼性が向上する。Particularly, the heat radiation members 2, 3 on the one surface and the other surface side.
If a resin 9 having a thermal expansion coefficient similar to that is used, stress similar to that of the heat radiating members 2 and 3 that promotes expansion and contraction is applied to the Si chips 1a and 1b when the temperature changes, so that the joining member 4 is applied. The applied stress is relaxed, the strain is suppressed, and the reliability of the connection portion is improved.

【００６８】なお、本例では、他面側の放熱部材３には
突出部を設けていない例について示したが、突出部を設
けても良い。また、熱結合をより高めるために、外部配
線部材１１と高熱伝導絶縁基板１２、および、高熱伝導
絶縁基板１２と外部冷却部材１３のそれぞれの接触面に
熱伝導性のグリス等を用いても良い。In this example, the heat dissipation member 3 on the other surface side is not provided with a projection, but a projection may be provided. Further, in order to further enhance thermal coupling, heat conductive grease or the like may be used on the contact surfaces of the external wiring member 11 and the high thermal conductive insulating substrate 12 and between the high thermal conductive insulating substrate 12 and the external cooling member 13. .

【００６９】また、外部配線部材１１と高熱伝導絶縁基
板１２との接触は、各々の部材１１、１２の熱膨張係数
の違いを考慮すると本例の様に挟んで固定する方が望ま
しいが、放熱面１０と外部配線部材１１との接触は同じ
部材を用いたり、あるいは熱膨張係数の違いがあまり大
きくない部材を用いることができるため、半田やろう材
等を用いて接続しても良い。Further, the contact between the external wiring member 11 and the high thermal conductive insulating substrate 12 is preferably pinched and fixed as in this example in consideration of the difference in coefficient of thermal expansion between the members 11 and 12, but The surface 10 and the external wiring member 11 can be in contact with each other by using the same member or by using a member having a not so large difference in thermal expansion coefficient, so that solder or brazing material can be used for connection.

【００７０】また、一面側の放熱部材２の突出部２ａは
別体で形成しても良く、例えば、平板状の本体に半田付
けや溶接等により突出部２ａを接合したものとすること
ができる。また、一面側の放熱部材２と他面側の放熱部
材３の材質は、必ずしも同一でなくても良い。また、本
例では、金型を用いて樹脂封止する例について示した
が、金型を用いずにポッティング等により封止しても良
い。Further, the protruding portion 2a of the heat dissipation member 2 on the one surface side may be formed as a separate body. For example, the protruding portion 2a may be joined to a flat plate-like body by soldering or welding. . Further, the materials of the heat dissipation member 2 on the one surface side and the heat dissipation member 3 on the other surface side do not necessarily have to be the same. Further, in this example, an example in which the mold is used for resin sealing is shown, but it is also possible to perform sealing by potting or the like without using the mold.

【００７１】また、樹脂封止に用いる樹脂９として、一
面および他面側の放熱部材２、３と熱膨張係数が近似し
た樹脂９を用いる例について示したが、この樹脂９に限
るものではなく、Ｓｉチップ１ａ、１ｂと各々の放熱部
材２、３との結合強度を考慮する必要が無い場合等は、
適当な樹脂を用いれば良い。Further, as the resin 9 used for the resin sealing, the example in which the resin 9 having a thermal expansion coefficient similar to that of the heat radiating members 2 and 3 on the one surface and the other surface is used is shown, but the resin 9 is not limited to this. , When it is not necessary to consider the bonding strength between the Si chips 1a and 1b and the respective heat dissipation members 2 and 3,
A suitable resin may be used.

【００７２】また、本実施形態では、Ｓｉチップとして
ＩＧＢＴ１ａとＦＷＤ１ｂとを用いる例について示した
が、Ｓｉチップが単数であったり、同じＳｉチップを複
数用いる等して、Ｓｉチップと各々の放熱部材２、３と
の接続構成が複雑でない場合も考えられる。この場合
は、各々の放熱部材２、３に突出部２ａを形成しなくて
も良く、上述の様に、一面および他面側の放熱部材２、
３として、ＣｕやＡｌを主成分とする金属等の、Ｗおよ
びＭｏよりも電気伝導度または熱伝導率が高く安価な金
属材料を用いることで、放熱性や電気伝導性を改善した
半導体装置を提供することができる。In this embodiment, the IGBT 1a and the FWD 1b are used as the Si chip, but the number of Si chips is one or the same Si chip is used more than once. It is also possible that the connection configuration with a few is not complicated. In this case, it is not necessary to form the protruding portion 2a on each of the heat dissipation members 2 and 3, and as described above, the heat dissipation members 2 on the one surface and the other surface side,
As 3, there is provided a semiconductor device having improved heat dissipation and electric conductivity by using an inexpensive metal material having higher electric conductivity or thermal conductivity than W and Mo, such as a metal mainly composed of Cu or Al. Can be provided.

【００７３】（第２実施形態）本実施形態は、第１実施
形態において一面側の放熱部材２の内部形状が異なるも
のである。図３は第２実施形態にかかる半導体装置に関
する図であって、（ａ）は全体の概略断面図、（ｂ）〜
（ｄ）は一面側の放熱部材２、および、この放熱部材２
と対向するＳｉチップ１ａ、１ｂの部分概略断面図であ
る。また、図４（ａ）〜（ｃ）は、図３（ｂ）〜（ｄ）
におけるＣ−Ｃ断面形状において、とり得る種々の形状
を示す図である。(Second Embodiment) This embodiment is different from the first embodiment in the internal shape of the heat dissipation member 2 on the one surface side. 3A and 3B are diagrams related to a semiconductor device according to a second embodiment, where FIG. 3A is an overall schematic cross-sectional view, and FIG.
(D) is a heat dissipation member 2 on one surface and this heat dissipation member 2
FIG. 3 is a partial schematic cross-sectional view of Si chips 1a and 1b facing each other. Further, FIGS. 4A to 4C are shown in FIGS.
It is a figure which shows the various possible shapes in CC sectional shape in.

【００７４】ここで、図３（ａ）では、一面側の放熱部
材２の一部が省略されているが、この部分に、図３
（ｂ）〜（ｄ）に示す断面形状が適用される。また、図
３（ａ）は、図１における外部配線部材１１、高熱伝導
絶縁基板１２および外部冷却部材１３を省略したもので
ある。以下、主として、図１と異なるところを述べ、同
一部分は図３および図４中、同一符号を付して説明を簡
略化する。Here, in FIG. 3A, a part of the heat radiating member 2 on the one surface side is omitted, but in this part, FIG.
The cross-sectional shapes shown in (b) to (d) are applied. 3 (a) omits the external wiring member 11, the high thermal conductive insulating substrate 12 and the external cooling member 13 in FIG. Hereinafter, differences from FIG. 1 will be mainly described, and the same portions will be denoted by the same reference numerals in FIGS. 3 and 4 to simplify the description.

【００７５】図３および図４に示すように、本実施形態
の一面側の放熱部材２のうち、Ｓｉチップ１ａ、１ｂと
接続する部分に空間部１５が形成されている。この空間
部１５の形状は図４（ａ）に示す例では格子状であり、
図４（ｂ）に示す例では同心円状であり、図４（ｃ）に
示す例では同心的に配置された矩形状である。As shown in FIGS. 3 and 4, in the heat dissipation member 2 on the one surface side of the present embodiment, a space 15 is formed in a portion connected to the Si chips 1a, 1b. The shape of the space portion 15 is a lattice shape in the example shown in FIG.
The example shown in FIG. 4 (b) is concentric, and the example shown in FIG. 4 (c) is rectangular concentrically arranged.

【００７６】この空間部１５におけるＳｉチップ１ａ、
１ｂと一面側の放熱部材２との接続面に垂直な方向の形
状は、図３（ｂ）〜（ｄ）に示すように、Ｓｉチップ１
ａ、１ｂと接続する部分が開口している場合や、放熱面
１０となる部分が開口している場合や、Ｓｉチップ１
ａ、１ｂと接続する部分、および放熱面１０となる部分
が閉じている場合がある。The Si chip 1a in the space portion 15,
As shown in FIGS. 3 (b) to 3 (d), the Si chip 1 has a shape perpendicular to the connection surface between the heat radiation member 2 on the one side and the heat radiation member 2 on the one surface side.
When the part connected to a and 1b is open, the part which becomes the heat dissipation surface 10 is open, or the Si chip 1
In some cases, the portion connecting to a and 1b and the portion serving as the heat radiation surface 10 are closed.

【００７７】また、この空間部１５は、例えば切削加工
により形成することができる。また、図３（ｄ）に示す
Ｓｉチップ１ａ、１ｂと接続する部分も放熱面１０とな
る部分も閉じている場合は、例えば、図３（ｂ）に示
す、Ｓｉチップ１ａ、１ｂと接続する部分が開口してい
る一面側の放熱部材２と同様のものを切削等により形成
した後、その開口部を覆うように板状の所望の金属を溶
接等により接合することによって形成することができ
る。The space 15 can be formed by cutting, for example. Further, when both the portions connected to the Si chips 1a and 1b shown in FIG. 3D and the portion serving as the heat radiation surface 10 are closed, the portions are connected to the Si chips 1a and 1b shown in FIG. 3B, for example. It can be formed by forming the same one as the heat dissipation member 2 on the one surface side where the portion is opened by cutting or the like, and then joining a desired plate-shaped metal by welding or the like so as to cover the opening. .

【００７８】ところで、本実施形態によれば、第１実施
形態に記載の発明と同様の効果を発揮することができ
る。さらに、一面側の放熱部材２に空間部１５を設ける
ことにより、この放熱部材２の剛性を減少させることが
できる。その結果、Ｓｉチップ１ａ、１ｂや接合部材４
に働く応力を低減させることができ、Ｓｉチップ１ａ、
１ｂの破壊を低減させたり、Ｓｉチップ１ａ、１ｂと一
面側の放熱部材２との接続の信頼性を高めることができ
る。By the way, according to this embodiment, the same effect as that of the invention described in the first embodiment can be exhibited. Further, by providing the space portion 15 in the heat dissipation member 2 on the one surface side, the rigidity of the heat dissipation member 2 can be reduced. As a result, the Si chips 1a, 1b and the bonding member 4
The stress acting on the Si chip 1a,
It is possible to reduce the destruction of 1b and improve the reliability of the connection between the Si chips 1a and 1b and the heat dissipation member 2 on the one surface side.

【００７９】なお、本実施形態に記述していない構成
や、各部材の例等は第１実施形態と同様である。また、
この空間部１５はＳｉチップ１ａ、１ｂの厚み方向に伸
びている例について示したが、Ｓｉチップ１ａ、１ｂの
平面方向に伸びるように形成しても良い。また、本例で
は、一面側の放熱部材２に空間部１５を形成している
が、他面側の放熱部材３に形成しても良い。また、空間
部１５は各々の放熱部材２、３のうちＳｉチップ１ａ、
１ｂと接触する部分に一様に形成しなくても、適宜、必
要な位置に設ければ良い。The configuration not described in this embodiment, examples of each member, etc. are the same as those in the first embodiment. Also,
Although the space 15 is shown as an example extending in the thickness direction of the Si chips 1a and 1b, it may be formed to extend in the plane direction of the Si chips 1a and 1b. Further, in this example, the space 15 is formed in the heat dissipation member 2 on the one surface side, but it may be formed in the heat dissipation member 3 on the other surface side. In addition, the space 15 includes the Si chip 1a of the heat dissipation members 2 and 3,
Even if it is not formed uniformly in the portion that contacts 1b, it may be provided at a necessary position as appropriate.

【００８０】また、空間部１５は本例の形状に限られる
ものではなく、一面および他面側の放熱部材２、３に空
間部１５を形成することにより、各々の放熱部材２、３
の剛性を下げるものであれば良い。また、各々の放熱部
材２、３としてＣｕやＡｌを用いているときは、各々の
放熱部材２、３が加工し易い材質であるため、この様な
空間部１５を形成し易い。Further, the space portion 15 is not limited to the shape of this example, but by forming the space portion 15 in the heat dissipating members 2 and 3 on the one surface and the other surface side, the respective heat dissipating members 2 and 3 are formed.
Anything that lowers the rigidity of Further, when Cu or Al is used for each of the heat radiating members 2 and 3, since each of the heat radiating members 2 and 3 is a material that can be easily processed, it is easy to form such a space portion 15.

【００８１】（第３実施形態）図５は第３実施形態にか
かる半導体装置の概略断面図であり、図１における外部
配線部材１１、高熱伝導絶縁基板１２および外部冷却部
材１３を省略したものである。以下、主として、図１と
異なるところを述べ、同一部分は図５中、同一符号を付
して説明を簡略化する。図５に示すように、本実施形態
は、一面および他面側の放熱部材２、３のうちのＳｉチ
ップ１ａ、１ｂと対向する部分に、Ｍｏ、ＷあるいはＣ
ｕ−Ｍｏ等のＳｉチップに熱膨張係数が近似した金属
（以下、部分配置金属とする）１６を用いるものであ
る。(Third Embodiment) FIG. 5 is a schematic sectional view of a semiconductor device according to a third embodiment, in which the external wiring member 11, the high thermal conductive insulating substrate 12 and the external cooling member 13 in FIG. 1 are omitted. is there. Hereinafter, differences from FIG. 1 will be mainly described, and the same portions will be denoted by the same reference numerals in FIG. 5 to simplify the description. As shown in FIG. 5, in the present embodiment, Mo, W, or C is formed in the portion of the heat dissipation members 2, 3 on the one surface and the other surface facing the Si chips 1a, 1b.
A metal (hereinafter referred to as a partially arranged metal) 16 having a thermal expansion coefficient similar to that of a Si chip such as u-Mo is used.

【００８２】そして、この部分配置金属１６は、予め、
各々の放熱部材２、３に半田付けやろう付、あるいは、
焼きバメや圧入により形成しておくことができる。ま
た、Ｓｉチップ１ａ、１ｂと部分配置金属１６とを高精
度に位置合わせするためには、Ｓｉチップ１ａ、１ｂと
部分配置金属１６とを、予め半田付けやろう付け等によ
り接合しておき、次に、部分配置金属１６と各々の放熱
部材２、３とを半田付けやろう付け等により接合する様
にすると良い。The partially arranged metal 16 is previously
Soldering or brazing to each heat dissipation member 2, 3, or
It can be formed by shrinkage fitting or press fitting. In order to align the Si chips 1a, 1b and the partially arranged metal 16 with high accuracy, the Si chips 1a, 1b and the partially arranged metal 16 are previously joined by soldering or brazing, Next, the partially arranged metal 16 and the respective heat radiation members 2, 3 may be joined by soldering, brazing or the like.

【００８３】ところで、本実施形態によれば、第１実施
形態と同様の効果を発揮することができる。さらに、Ｓ
ｉチップ１ａ、１ｂと一面および他面側の放熱部材２、
３との接続部分の熱膨張係数が近似しているため、温度
変化により発生する接続部分での熱応力を低減させるこ
とができ、接続強度を増加させることができる。また、
Ｓｉチップ１ａ、１ｂと熱膨張係数が近似した金属が加
わることにより各々の放熱部材２、３の全体の歪みがＳ
ｉに近くなるため、Ｓｉチップ１ａ、１ｂへの応力を低
減することができる。By the way, according to this embodiment, the same effect as that of the first embodiment can be exhibited. Furthermore, S
The i-chips 1a and 1b and the heat dissipation member 2 on one surface and the other surface side,
Since the thermal expansion coefficient of the connection portion with 3 is similar, it is possible to reduce the thermal stress at the connection portion caused by the temperature change and increase the connection strength. Also,
By adding a metal whose coefficient of thermal expansion is close to that of the Si chips 1a and 1b, the total strain of the heat dissipation members 2 and 3 is S.
Since it is close to i, the stress on the Si chips 1a and 1b can be reduced.

【００８４】従って、第１実施形態と同様の効果を保ち
つつ、Ｓｉチップ１ａ、１ｂの破壊やＳｉチップ１ａ、
１ｂと各々の放熱部材２、３との接続強度に対する信頼
性の高い半導体装置を提供することができる。Therefore, the Si chips 1a and 1b are destroyed or the Si chips 1a and
It is possible to provide a semiconductor device having high reliability with respect to the connection strength between 1b and each of the heat dissipation members 2 and 3.

【００８５】なお、本実施形態に記述していない構成
や、各部材の例等は第１実施形態と同様である。また、
各々の放熱部材２、３のうちのＳｉチップ１ａ、１ｂと
接続する部分の全てに部分配置金属１６を設けなくて
も、必要な位置に、適宜設ければ良い。また、本実施形
態に対しても、第２実施形態と同様に各々の放熱部材
２、３に空間部１５を形成しても良い。The configuration not described in this embodiment, examples of each member, etc. are the same as those in the first embodiment. Also,
Even if the partly arranged metal 16 is not provided at all of the parts of each of the heat dissipation members 2 and 3 that are connected to the Si chips 1a and 1b, they may be appropriately provided at necessary positions. Further, also in the present embodiment, the space portion 15 may be formed in each of the heat dissipation members 2 and 3 as in the second embodiment.

【００８６】（第４実施形態）図６は第４実施形態にか
かる半導体装置の概略断面図である。本実施形態は、第
１実施形態における外部配線部材１１に関するものであ
る。以下、主として、図１と異なるところを述べ、同一
部分は図６中、同一符号を付して説明を簡略化する。ま
た、図６においては、高熱伝導絶縁基板１２と外部冷却
部材１３については省略してある。(Fourth Embodiment) FIG. 6 is a schematic sectional view of a semiconductor device according to a fourth embodiment. The present embodiment relates to the external wiring member 11 in the first embodiment. Hereinafter, differences from FIG. 1 will be mainly described, and the same portions will be denoted by the same reference numerals in FIG. 6 to simplify the description. Further, in FIG. 6, the high thermal conductive insulating substrate 12 and the external cooling member 13 are omitted.

【００８７】図６に示す様に、一面および他面側の放熱
部材２、３のうち、放熱面１０の端部にある面からＳｉ
チップ１ａ、１ｂの主電極とつながり、外部と電気的に
接続するための主電極端子である導体１７が引き出され
ている。この導体１７は図１に示した外部配線部材１１
の機能を有するものである。引き出される各々の導体１
７の位置関係は、各々の放熱部材２、３の放熱面１０に
垂直な方向において、略同じ位置から略同じ方向に突出
しており、各々の導体１７が互いに略平行の関係にあ
る。また、図１における外部配線部材１１は設けずに、
放熱面１０に対して高熱伝導絶縁基板１２を介して外部
冷却部材１３を接触させる（図示せず）。As shown in FIG. 6, of the heat dissipating members 2 and 3 on the one surface side and the other surface side, the surface from the end portion of the heat dissipating surface 10 is Si.
A conductor 17 is connected to the main electrodes of the chips 1a and 1b and is a main electrode terminal for electrically connecting to the outside. This conductor 17 is the external wiring member 11 shown in FIG.
It has the function of. Each conductor drawn 1
The positional relationship of 7 is such that, in the direction perpendicular to the heat dissipation surface 10 of each of the heat dissipation members 2 and 3, they project from substantially the same position in substantially the same direction, and the respective conductors 17 are substantially parallel to each other. Further, without providing the external wiring member 11 in FIG.
The external cooling member 13 is brought into contact with the heat dissipation surface 10 through the high thermal conductive insulating substrate 12 (not shown).

【００８８】ここで、各々の放熱部材２、３と導体１７
とは、電気抵抗を考慮すると一体で形成されることが望
ましいが、導体１７を別途接合する場合は、ネジ止め、
溶接、ろう付け、半田付け等が考えられる。その際、導
体１７は金属等、一般的に電気伝導に優れるものであれ
ば何でも良い。Here, each heat dissipation member 2, 3 and the conductor 17
Is preferably formed integrally in consideration of electric resistance, but when the conductor 17 is separately joined, screwing,
Welding, brazing, soldering, etc. can be considered. At that time, the conductor 17 may be made of metal or the like as long as it is generally excellent in electric conduction.

【００８９】また、上述の様に、導体１７が略同じ位置
から略同じ方向に突出しているとは、同じ位置から同じ
方向に突出している、もしくは、各々の導体１７の根元
部分が近接するとともに、各々の導体１７が互いに略平
行の関係にあるように出ていることを示す。また、各々
の導体１７が互いに略平行の関係にあるとは、平行の関
係にある、もしくは、後述の様に、寄生インダクタンス
を抑制できる程度に平行であることを示す。As described above, the fact that the conductors 17 project from substantially the same position in substantially the same direction means that the conductors 17 project from the same position in the same direction, or the root portions of the respective conductors 17 are close to each other. , The respective conductors 17 are projected so as to be in a substantially parallel relationship with each other. Further, the fact that the respective conductors 17 are in a substantially parallel relationship with each other means that they are in a parallel relationship or, as will be described later, that they are parallel to the extent that parasitic inductance can be suppressed.

【００９０】本実施形態によれば、第１実施形態に記載
の発明と同様の効果を発揮することができる。さらに、
各々の導体１７を介して外部と電気的に接続することが
できるため、各々の放熱部材２、３の放熱面１０に対し
て外部配線部材１１を接続する必要が無い。According to this embodiment, the same effect as the invention described in the first embodiment can be exhibited. further,
Since it can be electrically connected to the outside through each conductor 17, it is not necessary to connect the external wiring member 11 to the heat dissipation surface 10 of each heat dissipation member 2, 3.

【００９１】その結果、外部配線部材１１を用いるとき
と比較して、熱の伝導方向における部材数の減少により
接続界面を減らすことができ、接続界面における熱抵抗
が減少するため放熱性をさらに改善することができる。
また、Ｓｉチップ１ａ、１ｂの厚み方向における半導体
装置の厚みを減少させることができ、寸法を減少させた
半導体装置を提供することができる。As a result, as compared with the case where the external wiring member 11 is used, the number of members in the heat conduction direction can be reduced, so that the connection interface can be reduced and the thermal resistance at the connection interface can be reduced, so that the heat dissipation can be further improved. can do.
Further, it is possible to reduce the thickness of the semiconductor device in the thickness direction of the Si chips 1a and 1b, and it is possible to provide a semiconductor device having a reduced size.

【００９２】また、特に好ましい形態として、本例で
は、各々の導体１７が近接して互いに略平行になるよう
にしており、本例の半導体装置では、互いに逆方向の全
く同じ強さの電流が流れる。近接した平行導体において
互いに逆方向の電流が流れると、導体周囲に発生する磁
界が打ち消されるため、寄生インダクタンスを大幅に抑
制することができる。As a particularly preferable mode, in this example, the conductors 17 are arranged close to each other and are substantially parallel to each other. In the semiconductor device of this example, currents of exactly the same strength in opposite directions are generated. Flowing. When currents flowing in opposite directions in parallel conductors that are close to each other cancel the magnetic field generated around the conductors, the parasitic inductance can be significantly suppressed.

【００９３】また、本実施形態では、第１実施形態と同
様に、放熱性や電気伝導性の改善を目的とする場合は、
各々の放熱部材２、３としてＣｕやＡｌを主成分とした
金属を用いるが、ＣｕやＡｌは加工性が良いため、プレ
スや切削等により容易に本実施形態の導体１７を一体で
形成することができる。Further, in the present embodiment, as in the first embodiment, when the purpose is to improve heat dissipation and electric conductivity,
A metal containing Cu or Al as a main component is used as each of the heat radiating members 2 and 3. Since Cu and Al have good workability, the conductor 17 of the present embodiment can be easily integrally formed by pressing or cutting. You can

【００９４】なお、本実施形態に記述していない構成
や、各部材の例等は第１実施形態と同様である。また、
本例では、各々の導体１７が近接して互いに略平行にな
るようにしているが、この様に導体１７を引き出すこと
に限定するものではなく、各々の放熱部材２、３の異な
る部位から異なる方向に引き出しても良い。The configuration not described in this embodiment, examples of each member, etc. are the same as those in the first embodiment. Also,
In this example, the conductors 17 are arranged close to each other and are substantially parallel to each other. However, the present invention is not limited to such a case in which the conductors 17 are drawn out, and different portions of the heat dissipation members 2 and 3 are different from each other. You may pull out in the direction.

【００９５】また、複数の半導体チップを容易に樹脂封
止することを目的とし、一面および他面側の放熱部材
２、３として硬度が高いＷやＭｏ等を用いている場合
は、導体１７を一体で形成するのが困難なため、導体１
７を別体で形成すれば良い。Further, in order to easily seal a plurality of semiconductor chips with resin, when the heat radiation members 2 and 3 on the one surface and the other surface are made of W or Mo having high hardness, the conductor 17 is used. Conductor 1 is difficult to form integrally
7 may be formed as a separate body.

【００９６】（第５実施形態）図７は、第５実施形態の
半導体装置に関する図であって、（ａ）は断面図、
（ｂ）は（ａ）におけるＤ−Ｄ面を矢印方向から見た図
である。そして、図１における外部配線部材１１、高熱
伝導絶縁基板１２および外部冷却部材１３を省略したも
のである。本実施形態は、Ｓｉチップ１ａ、１ｂと一面
側の放熱部材２との接続方法が、第１実施形態と異なる
ものである。以下、主として、図１と異なるところにつ
いて述べ、同一部分には図７中、同一符号を付して説明
を簡略化する。(Fifth Embodiment) FIG. 7 is a diagram relating to a semiconductor device of the fifth embodiment, in which (a) is a sectional view,
(B) is the figure which looked at the DD surface in (a) from the arrow direction. The external wiring member 11, the high thermal conductive insulating substrate 12 and the external cooling member 13 in FIG. 1 are omitted. The present embodiment is different from the first embodiment in the method of connecting the Si chips 1a and 1b to the heat dissipation member 2 on the one surface side. Hereinafter, mainly different points from FIG. 1 will be described, and the same portions will be denoted by the same reference numerals in FIG. 7 to simplify the description.

【００９７】図７に示すように、バンプ形状の接合部材
４がＳｉチップ１ａ、１ｂの一面６ａ側の主電極と一面
側の放熱部材２との間に一様に形成され、この接合部材
４の間が樹脂１８で充填されている。この樹脂１８は金
属と似た物性を持っており、ぬれ性が良く、バンプ形状
の接合部材４への応力集中を防止するためのものであ
る。以下、この様な樹脂をＲＡＢ（レジンアシストボン
ディング）樹脂１８という。このＲＡＢ樹脂１８は具体
的には、エポキシ系樹脂にシリカフィラーを配合したも
の等からなる。As shown in FIG. 7, the bump-shaped joining member 4 is uniformly formed between the main electrode on the one surface 6a side of the Si chips 1a, 1b and the heat dissipation member 2 on the one surface side. The space is filled with resin 18. This resin 18 has physical properties similar to those of metal, has good wettability, and is for preventing stress concentration on the bump-shaped joining member 4. Hereinafter, such a resin is referred to as a RAB (resin assist bonding) resin 18. The RAB resin 18 is specifically made of epoxy resin mixed with silica filler.

【００９８】そして、この様な構成を形成するには、第
１実施形態の半導体装置と同様に、Ｓｉチップ１ａ、１
ｂと他面側の放熱部材３との接続、および、ワイヤボン
ディングを行った後、Ｓｉチップ１ａ、１ｂの一面６ａ
側の主電極上に接合部材４をバンプ形状に配置し、一面
側の放熱部材２と接続する。Then, in order to form such a structure, the Si chips 1a, 1a and 1b are formed similarly to the semiconductor device of the first embodiment.
b and the heat radiation member 3 on the other surface side, and after wire bonding is performed, one surface 6a of the Si chips 1a, 1b
The bonding member 4 is arranged in the shape of a bump on the main electrode on the one side, and is connected to the heat dissipation member 2 on the one surface side.

【００９９】続いて、ＲＡＢ樹脂１８を注射器等に入れ
てバンプ状の接合部材４の隙間に充填する。その際、全
ての隙間に注射器で直接充填しなくても、毛細管現象に
より充填される。その後、上述の様に、金型内に一体化
したＳｉチップ１ａ、１ｂと各々の放熱部材２、３を入
れ、樹脂封止する。Then, the RAB resin 18 is put into a syringe or the like to fill the gaps in the bump-shaped joining member 4. At that time, all the gaps are filled by the capillary phenomenon without directly filling them with a syringe. Then, as described above, the integrated Si chips 1a and 1b and the respective heat radiating members 2 and 3 are put into the mold and resin-sealed.

【０１００】ところで、本実施形態では、第１実施形態
と同様の効果を発揮することができる。また、ＲＡＢ樹
脂１８により、接合部材４の塑性変形を抑制することが
できる。また、熱応力により接合部材４に発生したクラ
ックの進展をＲＡＢ樹脂１８によって防止することがで
きる。従って、接合部材４の間のＲＡＢ樹脂１８により
Ｓｉチップ１ａ、１ｂと一面側の放熱部材２との接続を
補強することができ、接続の信頼性を増すことができ
る。By the way, in this embodiment, the same effect as in the first embodiment can be exhibited. Further, the RAB resin 18 can suppress the plastic deformation of the joining member 4. Further, the RAB resin 18 can prevent the cracks generated in the joining member 4 due to thermal stress from developing. Therefore, the RAB resin 18 between the joining members 4 can reinforce the connection between the Si chips 1a and 1b and the heat dissipation member 2 on the one surface side, and the connection reliability can be increased.

【０１０１】なお、本実施形態に記述していない構成
や、各部材の例等は第１実施形態と同様である。また、
本例では、小さいバンプを一様に配置しているが、その
他、本例よりも大きな形状のバンプを数個配置する等し
ても良い。また、本例では、Ｓｉチップ１ａ、１ｂと一
面側の放熱部材２との接続にバンプ形状の接合部材４を
用いたが、他面側の放熱部材３との接続にバンプ形状の
接合部材４を用いても良い。また、樹脂封止の際にモー
ルド樹脂９がバンプ間に十分に充填される場合は、予め
ＲＡＢ樹脂１８で充填しなくても良い。この場合は、バ
ンプ間に充填されたモールド樹脂９がＲＡＢ樹脂１８の
作用をする。また、本実施形態に対して、第２〜第４実
施形態を適用させても良い。The configuration not described in this embodiment and examples of each member are the same as those in the first embodiment. Also,
In the present example, the small bumps are arranged uniformly, but in addition, several bumps having a larger shape than the present example may be arranged. In this example, the bump-shaped joining member 4 is used to connect the Si chips 1a and 1b to the heat dissipation member 2 on the one surface side, but the bump-shaped joining member 4 is used to connect to the heat dissipation member 3 on the other surface side. May be used. Further, when the mold resin 9 is sufficiently filled between the bumps during the resin sealing, the RAB resin 18 may not be filled in advance. In this case, the mold resin 9 filled between the bumps acts as the RAB resin 18. Also, the second to fourth embodiments may be applied to this embodiment.

【０１０２】（他の実施形態）以下、上記各実施形態の
変形例を示す。なお、以下の変形例は、上記各実施形態
において適用できるものであり、各変形例を組み合わせ
て各実施形態に適用させることができる。(Other Embodiments) Modifications of the above embodiments will be described below. The following modifications are applicable to each of the above-described embodiments, and the modifications can be combined and applied to each embodiment.

【０１０３】初めに、第１変形例について述べる。図８
は、第１変形例の半導体装置に関する概略断面図であ
り、（ａ）は全体の断面図、（ｂ）は（ａ）においてＥ
で示された部分の部分拡大図、（ｃ）は本変形例にかか
る説明図である。上記様々な実施形態に記載の発明で
は、一面側の放熱部材２に突出部２ａを設ける例につい
て示したが、上記図１（ｂ）に矢印Ｆで示すように、一
面側の放熱部材２は突出部２ａにおいて厚みが増すため
剛性が増加する。そして、この放熱部材２の剛性が大き
い程、Ｓｉチップ１ａ、１ｂに大きな圧縮応力をかける
ことになる。First, the first modification will be described. Figure 8
6A and 6B are schematic cross-sectional views of a semiconductor device of a first modified example, where FIG. 7A is an overall cross-sectional view, and FIG.
A partially enlarged view of a portion indicated by, and (c) is an explanatory view according to the present modification. In the invention described in the above various embodiments, the example in which the protruding portion 2a is provided on the heat dissipation member 2 on the one surface side is shown, but as shown by the arrow F in FIG. 1 (b), the heat dissipation member 2 on the one surface side is Since the thickness of the protrusion 2a is increased, the rigidity is increased. The greater the rigidity of the heat dissipation member 2, the greater the compressive stress applied to the Si chips 1a and 1b.

【０１０４】図８（ｃ）に示すように、一面側の放熱部
材２として、十分薄くした金属板を裏打ちすることによ
り絶縁領域を回避するための突起形状を設けたものを用
いて、剛性を低くしつつＳｉチップ１ａ、１ｂに接合す
る方法が考えられる。しかし、この方法では、一面側の
放熱部材２の放熱面１０が平面にならないため、外部配
線部材１１や外部冷却部材１３との接触が難しい。As shown in FIG. 8 (c), as the heat dissipation member 2 on the one surface side, one having a protrusion shape for avoiding an insulating region by lining a sufficiently thin metal plate is used to improve rigidity. A method of bonding to the Si chips 1a and 1b while lowering it can be considered. However, in this method, since the heat dissipation surface 10 of the heat dissipation member 2 on the one surface side is not flat, it is difficult to make contact with the external wiring member 11 and the external cooling member 13.

【０１０５】そこで、本変形例では、図８（ａ）、
（ｂ）に示すように、対向するＳｉチップ１ａ、１ｂの
端部に設けられたガードリング７よりも、Ｓｉチップ１
ａ、１ｂの内側に相当する部分が開口している開口パタ
ーン１９を有する絶縁膜２０が、一面側の放熱部材２に
対して形成されている。換言すれば、図１（ｂ）の絶縁
領域に相当する部分に絶縁膜２０が形成されており、Ｓ
ｉチップ１ａ、１ｂの一面６ａ側の主電極に相当する部
分が開口している。Therefore, in this modified example, as shown in FIG.
As shown in (b), the Si chip 1 is more than the guard ring 7 provided at the end of the facing Si chips 1a and 1b.
An insulating film 20 having an opening pattern 19 in which portions corresponding to the insides of a and 1b are opened is formed on the heat dissipation member 2 on the one surface side. In other words, the insulating film 20 is formed in a portion corresponding to the insulating region of FIG.
Portions corresponding to the main electrodes on one surface 6a side of the i-chips 1a and 1b are open.

【０１０６】ここで、この絶縁膜２０は、ピンホールの
無い緻密な膜が望ましく、また、一面側の放熱部材２の
熱収縮に耐え得る必要がある。そのような絶縁膜２０と
して、ポリイミドやガラス等からなる膜を用いることが
できる。また、本例の半導体装置の製造方法について
は、この絶縁膜２０を、予め一面側の放熱部材２に形成
しておき、その後、Ｓｉチップ１ａ、１ｂの一面６ａ側
と一面側の放熱部材２とを接続すれば良い。その他は、
第１実施形態の半導体装置と同様に製造することができ
る。Here, the insulating film 20 is preferably a dense film without pinholes, and needs to withstand the heat shrinkage of the heat dissipation member 2 on the one surface side. As such an insulating film 20, a film made of polyimide, glass or the like can be used. Further, in the method for manufacturing the semiconductor device of this example, the insulating film 20 is formed in advance on the heat dissipation member 2 on the one surface side, and then the one surface 6a side and the heat dissipation member 2 on the one surface side of the Si chips 1a, 1b. Just connect and. Others
It can be manufactured similarly to the semiconductor device of the first embodiment.

【０１０７】この方法によれば、絶縁膜２０によりガー
ドリング７と一面側の放熱部材２との絶縁を行うことが
できる。そのため、Ｓｉチップ１ａ、１ｂのガードリン
グ７を回避するための突出部２ａは設けずに、一面側の
放熱部材２は平板のまま使用する場合に好適である。こ
の場合、放熱性の許す限り一面側の放熱部材２を薄くす
ると、この放熱部材２の剛性を低くすることができ、Ｓ
ｉチップ１ａ、１ｂにかかる圧縮力を緩和することがで
きる。According to this method, the insulating film 20 can insulate the guard ring 7 from the heat radiating member 2 on the one surface side. Therefore, it is suitable when the heat dissipation member 2 on the one surface side is used as a flat plate without providing the protruding portion 2a for avoiding the guard ring 7 of the Si chips 1a and 1b. In this case, if the heat dissipation member 2 on the one surface side is thin as far as heat dissipation allows, the rigidity of the heat dissipation member 2 can be lowered, and S
The compressive force applied to the i-chips 1a and 1b can be relaxed.

【０１０８】例えば、一面および他面側の放熱部材２、
３の突出部２ａを設けない場合は、Ｓｉチップが単数で
あったり、各々のＳｉチップの厚みが同じ場合に特に好
適に用いることができるが、各々のＳｉチップの厚みが
異なっている場合も、接合部材４の量によって厚みの差
を吸収できる程度の違いであれば問題ない。For example, the heat dissipation members 2 on the one surface and the other surface,
In the case where the protruding portion 2a of No. 3 is not provided, it can be used particularly preferably when the number of Si chips is single or when the thickness of each Si chip is the same, but when the thickness of each Si chip is different. There is no problem as long as the difference in thickness can be absorbed depending on the amount of the joining member 4.

【０１０９】なお、本変形例に記述していない構成や、
各部材の例等は第１実施形態に準じる。また、本例で
は、一面側の放熱部材２に絶縁膜２０を形成する例につ
いて示したが、必要であれば他面側の放熱部材３に絶縁
膜２０を形成しても良い。また、樹脂封止の際に樹脂９
の充填性が悪い部分がある場合は、樹脂９による絶縁が
確保できない恐れがあるため、その部分に絶縁膜２０を
予め形成しておくことにより、確実に絶縁できるように
しても良い。この際は、一面側の放熱部材２に突出部２
ａがある場合にも適用できる。Incidentally, the configuration not described in this modification,
An example of each member is based on the first embodiment. Further, in this example, the example in which the insulating film 20 is formed on the heat dissipation member 2 on the one surface side has been described, but the insulating film 20 may be formed on the heat dissipation member 3 on the other surface side if necessary. In addition, the resin 9
If there is a portion where the filling property is poor, the insulation by the resin 9 may not be ensured. Therefore, an insulating film 20 may be formed in that portion in advance to ensure the insulation. At this time, the protrusion 2 is formed on the heat dissipation member 2 on the one surface side.
It is also applicable when there is a.

【０１１０】次に、第２変形例について述べる。図９
は、第２変形例の半導体装置の概略断面図である。本変
形例は、制御用端子５とＳｉチップ１ａの制御電極との
電気的な接続方法が異なるものであり、図９には、第４
実施形態（図６参照）において本変形例を適用した例を
示す。以下、主として、図６と異なるところについて述
べ、同一部分には図９中、同一符号を付して説明を簡略
化する。Next, a second modification will be described. Figure 9
[FIG. 11] is a schematic cross-sectional view of a semiconductor device of a second modification. This modification is different in the electrical connection method between the control terminal 5 and the control electrode of the Si chip 1a.
An example in which this modification is applied to the embodiment (see FIG. 6) will be described. Hereinafter, the points different from those in FIG. 6 will be mainly described, and the same portions will be denoted by the same reference numerals in FIG. 9 to simplify the description.

【０１１１】図９に示すように、制御電極と制御用端子
５との電気的な接続をバンプ２１を用いて行うものであ
る。このバンプ２１としては、上記接合部材４と同様
に、例えば、半田、ろう材あるいは導電性接着剤等を用
いることができる。本変形例によれば、ワイヤボンド工
程を省略でき、Ｓｉチップ１ａ、１ｂの主電極と各々の
放熱部材２、３との接合の際に制御用端子５も接合する
ことができ、製造工程を簡略化することができる。ま
た、樹脂封止の際のワイヤボンドのワイヤ流れ等の問題
も生じない。As shown in FIG. 9, the bump 21 is used to electrically connect the control electrode and the control terminal 5. As the bumps 21, for example, solder, a brazing material, a conductive adhesive, or the like can be used as in the bonding member 4. According to this modification, the wire bonding step can be omitted, and the control terminal 5 can also be bonded when the main electrodes of the Si chips 1a and 1b and the respective heat dissipation members 2 and 3 are bonded. It can be simplified. Further, there is no problem such as wire flow of wire bond during resin sealing.

【０１１２】次に、第３変形例について述べる。図１０
は、第３変形例の半導体装置の概略断面図である。本変
形例は、放熱面１０の位置が異なるものであり、図１０
は、第１実施形態において上記第２変形例を適用した発
明に対して、本変形例を適用した例を示す。以下、主と
して、図１および図９と異なるところについて述べ、同
一部分には図１０中、同一符号を付して説明を簡略化す
る。Next, a third modification will be described. Figure 10
[FIG. 8] A schematic cross-sectional view of a semiconductor device of a third modification. In this modified example, the position of the heat dissipation surface 10 is different, and FIG.
Shows an example in which the present modification is applied to the invention to which the second modification is applied in the first embodiment. Hereinafter, differences from FIG. 1 and FIG. 9 will be mainly described, and the same portions will be denoted by the same reference numerals in FIG. 10 to simplify the description.

【０１１３】図１０に示すように、本変形例の各々の放
熱部材２、３は断面が略楔型であり、一面側の放熱部材
２には突出部２ａが形成されている。また、一面側の放
熱部材２の各面のうちの突出部２ａが形成されている面
の端部にある面、および、他面側の放熱部材３の各面の
うちのＳｉチップ１ａ、１ｂと対向している面の端部に
ある面が、放熱面１０となっている。As shown in FIG. 10, each of the heat radiating members 2 and 3 of the present modification has a substantially wedge-shaped cross section, and the heat radiating member 2 on the one surface side is formed with a protrusion 2a. Further, one of the surfaces of the heat dissipation member 2 on the one surface side, which is at the end of the surface on which the protrusion 2a is formed, and the Si chip 1a, 1b of each surface of the heat dissipation member 3 on the other surface side. The surface at the end of the surface facing the heat dissipation surface 10 is the heat dissipation surface 10.

【０１１４】また、この放熱面１０はＳｉチップ１ａ、
１ｂと各々の放熱部材２、３との接続面に対して略垂直
になっており、一面側の放熱部材２の放熱面１０と他面
側の放熱部材３の放熱面１０とが同一平面上にある。ま
た、この放熱面１０に対して、高熱伝導絶縁基板１２を
介して外部冷却部材１３が接触されており、絶縁性のボ
ルト２２を用いて固定されている。The heat dissipation surface 10 is made up of the Si chip 1a,
1b is substantially perpendicular to the connecting surface between the heat radiating members 2 and 3, and the heat radiating surface 10 of the heat radiating member 2 on one side and the heat radiating surface 10 of the heat radiating member 3 on the other side are on the same plane. It is in. Further, an external cooling member 13 is in contact with the heat radiation surface 10 via a high heat conductive insulating substrate 12, and is fixed by using an insulating bolt 22.

【０１１５】本変形例によれば、外部冷却部材１３を２
つ用意する必要が無いため、半導体装置を外部冷却部材
１３に組み付けるときの自由度を向上させることができ
る。例えば、片面の冷却部しか持たない従来の冷却系に
対して置き換えが可能である。また、高熱伝導絶縁基板
１２の枚数を１枚にできるため部品代を削減することが
できる。According to this modification, the external cooling member 13 has two
Since it is not necessary to prepare one, the degree of freedom in assembling the semiconductor device to the external cooling member 13 can be improved. For example, it can be replaced with a conventional cooling system having only one side cooling unit. Moreover, since the number of the high thermal conductive insulating substrates 12 can be one, the cost of parts can be reduced.

【０１１６】なお、本例では、放熱面１０がＳｉチップ
１ａ、１ｂと各々の放熱部材２、３との接続面に対して
略垂直になっているが、その他、適宜角度を変えること
により、様々なタイプの外部冷却部材１３に対して組み
付けることができる。また、上記第４実施形態に述べた
導体を設ける場合には、各々の放熱部材２、３における
Ｓｉチップ１ａ、１ｂと対向している面の端部にある面
のうち、放熱面１０とは異なる面から導体を引き出す等
すれば良い。In this example, the heat dissipation surface 10 is substantially perpendicular to the connection surface between the Si chips 1a, 1b and the respective heat dissipation members 2, 3, but in addition, by changing the angle as appropriate, It can be assembled to various types of external cooling members 13. In the case where the conductor described in the fourth embodiment is provided, the heat radiation surface 10 is the surface at the end of the surface of each heat radiation member 2 and 3 facing the Si chips 1a and 1b. It suffices to pull out the conductors from different surfaces.

【０１１７】次に、第４変形例について述べる。図１１
は第４変形例の半導体装置の概略断面図である。本例
は、外部配線部材１１の固定方法が上記図１と異なるも
のである。以下、主として、図１と異なるところを述
べ、同一部分は図１１中、同一符号を付して説明を簡略
化する。Next, a fourth modification will be described. Figure 11
FIG. 11 is a schematic sectional view of a semiconductor device of a fourth modification. In this example, the method of fixing the external wiring member 11 is different from that shown in FIG. Hereinafter, differences from FIG. 1 will be mainly described, and the same portions will be denoted by the same reference numerals in FIG. 11 to simplify the description.

【０１１８】図１１に示すように、一面および他面側の
放熱部材２、３に対して、各々の放熱面１０からＳｉチ
ップ１ａ、１ｂまで貫通してないネジ穴２３ａが各々４
つ形成されており、この貫通していないネジ穴２３ａと
対応する位置において、外部配線部材１１に対して貫通
したネジ穴２３ｂが形成されている。As shown in FIG. 11, there are four screw holes 23a which do not penetrate from the heat radiating surface 10 to the Si chips 1a and 1b on the heat radiating members 2 and 3 on the one surface and the other surface, respectively.
Are formed, and a screw hole 23b that penetrates the external wiring member 11 is formed at a position corresponding to the screw hole 23a that does not penetrate.

【０１１９】そして、外部配線部材１１における放熱面
１０と接触している面とは反対側の面から、これらのネ
ジ穴２３ａ、２３ｂに対してネジ（図示せず）を挿入
し、各々の放熱部材２、３と外部配線部材１１とを固定
するようになっている。ここで、これらのネジ穴２３
ａ、２３ｂはドリル等により形成することができる。Then, from the surface of the external wiring member 11 opposite to the surface in contact with the heat radiation surface 10, screws (not shown) are inserted into these screw holes 23a and 23b, and the heat radiation of each is performed. The members 2 and 3 and the external wiring member 11 are fixed to each other. Here, these screw holes 23
A and 23b can be formed by a drill or the like.

【０１２０】ところで、本変形例によれば、一面および
他面側の放熱部材２、３には貫通していないネジ穴２３
ａを形成しているため、Ｓｉチップ１ａ、１ｂに対して
ネジが接触することは無く、任意の位置にこれらのネジ
穴２３ａ、２３ｂを形成することができる。By the way, according to this modification, the screw holes 23 that do not penetrate through the heat dissipation members 2 and 3 on the one surface and the other surface are provided.
Since a is formed, the screws do not come into contact with the Si chips 1a and 1b, and these screw holes 23a and 23b can be formed at arbitrary positions.

【０１２１】また、ネジによって固定しているため、各
々の放熱部材２、３と外部配線部材１１とを固定する際
の圧力を高くしても、Ｓｉチップ１ａ、１ｂに対しては
圧力が加わることはない。従って、良好に各々の放熱部
材２、３の放熱面１０と外部配線部材１１との接触抵抗
を低下させることができ、放熱性や電気伝導性を改善す
ることができる。Further, since the screws are fixed, the pressure is applied to the Si chips 1a and 1b even if the pressure for fixing the heat radiation members 2 and 3 and the external wiring member 11 is increased. There is no such thing. Therefore, the contact resistance between the heat radiation surface 10 of each of the heat radiation members 2 and 3 and the external wiring member 11 can be favorably reduced, and the heat radiation property and the electrical conductivity can be improved.

【０１２２】特に、他面側の放熱部材３のＳｉチップ１
ａ、１ｂの直下に相当する位置においてもネジ止めする
ことができ、Ｓｉチップ１ａ、１ｂと他面側の放熱部材
３との熱的かつ電気的な接続を確実に確保することがで
きる。Particularly, the Si chip 1 of the heat dissipation member 3 on the other surface side
The screws can be screwed even at the positions directly below a and 1b, and the thermal and electrical connection between the Si chips 1a and 1b and the heat dissipation member 3 on the other surface side can be reliably ensured.

【０１２３】なお、外部配線部材１１がネジ止めされた
半導体装置と高熱伝導絶縁基板１２および外部冷却部材
１３の熱的な接続は、例えば、第１実施形態と同様に行
えば良い。また、これらのネジ穴２３ａ、２３ｂは、各
部材２、３、１１に対して、最低１つずつ設ければ、上
述の様に固定することができる。また、本変形例は第３
変形例以外の実施形態および変形例に適用可能である。The semiconductor device to which the external wiring member 11 is screwed and the high thermal conductive insulating substrate 12 and the external cooling member 13 may be thermally connected in the same manner as in the first embodiment, for example. If at least one of these screw holes 23a and 23b is provided for each of the members 2, 3 and 11, they can be fixed as described above. In addition, this modification is the third
The present invention can be applied to the embodiments and modifications other than the modifications.

【図面の簡単な説明】[Brief description of drawings]

【図１】第１実施形態の半導体装置の概略断面図であ
る。FIG. 1 is a schematic cross-sectional view of a semiconductor device of a first embodiment.

【図２】放熱部材として利用する金属の例を示した図表
である。FIG. 2 is a table showing an example of a metal used as a heat dissipation member.

【図３】第２実施形態にかかる半導体装置の概略断面図
である。FIG. 3 is a schematic sectional view of a semiconductor device according to a second embodiment.

【図４】第２実施形態の放熱部材の概略断面図である。FIG. 4 is a schematic cross-sectional view of a heat dissipation member of the second embodiment.

【図５】第３実施形態の半導体装置の概略断面図であ
る。FIG. 5 is a schematic cross-sectional view of a semiconductor device of a third embodiment.

【図６】第４実施形態の半導体装置の概略断面図であ
る。FIG. 6 is a schematic sectional view of a semiconductor device of a fourth embodiment.

【図７】第５実施形態にかかる半導体装置の概略断面図
である。FIG. 7 is a schematic sectional view of a semiconductor device according to a fifth embodiment.

【図８】第１変形例の半導体装置に関する概略断面図で
ある。FIG. 8 is a schematic cross-sectional view of a semiconductor device of a first modification.

【図９】第２変形例の半導体装置の概略断面図である。FIG. 9 is a schematic sectional view of a semiconductor device of a second modification.

【図１０】第３変形例の半導体装置の概略断面図であ
る。FIG. 10 is a schematic sectional view of a semiconductor device of a third modification.

【図１１】第４変形例の半導体装置の概略断面図であ
る。FIG. 11 is a schematic sectional view of a semiconductor device of a fourth modification.

【図１２】従来の半導体装置にかかる模式図である。FIG. 12 is a schematic view of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

１ａ、１ｂ…半導体チップ、２、３…放熱部材、２ａ…
突出部、４…結合部材、７…ガードリング、９…樹脂、
１０…放熱面、１１…外部配線部材、１５…空間部、１
６…部分配置金属、１７…導体、１８…ＲＡＢ樹脂、１
９…開口パターン、２０…絶縁膜、２３ａ、２３ｂ…ネ
ジ穴。1a, 1b ... Semiconductor chips, 2, 3 ... Heat dissipation member, 2a ...
Projection part, 4 ... Coupling member, 7 ... Guard ring, 9 ... Resin,
10 ... Heat dissipation surface, 11 ... External wiring member, 15 ... Space part, 1
6 ... Partially arranged metal, 17 ... Conductor, 18 ... RAB resin, 1
9 ... Opening pattern, 20 ... Insulating film, 23a, 23b ... Screw holes.

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 25/07 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 25/07

Claims (15)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 放熱面（１０）を有する一対の放熱部材
（２、３）が、接合部材（４）を介して、半導体チップ
（１ａ、１ｂ）を挟む様にして、前記半導体チップ（１
ａ、１ｂ）と熱的かつ電気的に接続されており、 前記一対の放熱部材（２、３）がタングステンおよびモ
リブデンよりも、電気伝導度および熱伝導率のうちの少
なくとも一方が高い金属材料からなるものであって、 前記半導体チップ（１ａ、１ｂ）と前記一対の放熱部材
（２、３）とがモールド樹脂（９）により封止されてお
り、 前記モールド樹脂（９）が、前記一対の放熱部材（２、
３）と熱膨張係数が近似した樹脂である ことを特徴とす
る半導体装置。1. A semiconductor chip (1) such that a pair of heat dissipation members (2, 3) having a heat dissipation surface (10) sandwich the semiconductor chip (1a, 1b) via a joining member (4).
a, 1b) are thermally and electrically connected to each other, and the pair of heat dissipation members (2, 3) are made of a metal material having at least one of electrical conductivity and thermal conductivity higher than that of tungsten and molybdenum. a become ones, the semiconductor chip (1a, 1b) and the pair of the heat radiating member
(2, 3) is sealed with mold resin (9)
The mold resin (9) is heated by the pair of heat dissipation members (2,
A semiconductor device, which is a resin having a thermal expansion coefficient similar to that of 3) . 【請求項２】 前記放熱面（１０）が、前記各々の放熱
部材（２、３）のうち、前記半導体チップ（１ａ、１
ｂ）と対向する面の端部にある面であり、これらの放熱
面（１０）が同一平面上にあることを特徴とする請求項
１に記載の半導体装置。2. The semiconductor chip (1a, 1) of the heat dissipation members (2, 3) is the heat dissipation surface (10).
2. The semiconductor device according to claim 1 , which is a surface at an end of a surface facing b), and these heat dissipation surfaces (10) are on the same plane. 【請求項３】 前記各々の放熱部材（２、３）のうち前
記放熱面（１０）以外の部位には、前記半導体チップ
（１ａ、１ｂ）と外部とを電気的に接続するための導体
（１７）が当該部位から突出して形成されていることを
特徴とする請求項１または２に記載の半導体装置。3. A conductor () for electrically connecting the semiconductor chips (1a, 1b) to the outside is provided at a portion of each of the heat radiation members (2, 3) other than the heat radiation surface (10). The semiconductor device according to claim 1 or 2 , wherein 17) is formed so as to project from the portion. 【請求項４】 前記各々の導体（１７）が前記各々の放
熱部材（２、３）の前記放熱面（１０）に垂直な方向に
おいて略同じ位置から略同じ方向に突出しており、前記
各々の導体（１７）が互いに略平行の位置関係にあるこ
とを特徴とする請求項３に記載の半導体装置。4. The conductors (17) project from substantially the same position in the direction perpendicular to the heat dissipation surface (10) of the heat dissipation members (2, 3) in substantially the same direction. The semiconductor device according to claim 3 , wherein the conductors (17) are in a substantially parallel positional relationship with each other. 【請求項５】 前記放熱面（１０）が、前記各々の放熱
部材（２、３）のうち、前記半導体チップ（１ａ、１
ｂ）と対向している面とは反対側の面であり、 前記各
々の放熱面（１０）において、前記各々の放熱部材
（２、３）と熱的かつ電気的に接続された外部配線部材
（１１）を有し、 前記各々の放熱部材（２、３）に対し、前記各々の放熱
面（１０）から少なくとも１つの貫通していないネジ穴
（２３ａ）が形成されており、前記外部配線部材（１
１）に対し、前記貫通していないネジ穴（２３ａ）と対
応する位置において貫通したネジ穴（２３ｂ）が形成さ
れており、 前記各々の放熱部材（２、３）と前記各々の外部配線部
材（１１）とがこれらのネジ穴（２３ａ、２３ｂ）によ
ってネジ止めされていることを特徴とする請求項１に記
載の半導体装置。5. The semiconductor chip (1a, 1) of the respective heat dissipation members (2, 3) is provided with the heat dissipation surface (10).
b) a surface opposite to the surface facing the heat radiation surface (10), the external wiring member being thermally and electrically connected to the heat radiation member (2, 3). (11), at least one screw hole (23a) not penetrating from each heat dissipation surface (10) is formed for each heat dissipation member (2, 3), and the external wiring is provided. Member (1
1) is provided with a threaded hole (23b) penetrating at a position corresponding to the threaded hole (23a) not penetrating, the heat dissipation members (2, 3) and the external wiring members. The semiconductor device according to claim 1 , wherein (11) is screwed by these screw holes (23a, 23b). 【請求項６】 放熱面（１０）を有する一対の放熱部材
（２、３）が、接合部材（４）を介して、平面的に配置
された複数の半導体チップ（１ａ、１ｂ）を挟む様にし
て、前記各々の半導体チップ（１ａ、１ｂ）と熱的かつ
電気的に接続されており、 前記一対の放熱部材（２、３）のうち、前記各々の半導
体チップ（１ａ、１ｂ）と対向する部位に、前記各々の
半導体チップ（１ａ、１ｂ）側に段状に突出する突出部
（２ａ）を有し、 この各々の突出部（２ａ）の先端部が前記各々の半導体
チップ（１ａ、１ｂ）と、前記接合部材（４）を介して
熱的かつ電気的に接続されているものであって、 前記半導体チップ（１ａ、１ｂ）と前記一対の放熱部材
（２、３）とがモールド樹脂（９）により封止されてお
り、 前記モールド樹脂（９）が、前記一対の放熱部材（２、
３）と熱膨張係数が近似した樹脂である ことを特徴とす
る半導体装置。6. A pair of heat dissipating members (2, 3) having a heat dissipating surface (10) sandwich a plurality of semiconductor chips (1a, 1b) arranged in a plane with a joining member (4) interposed therebetween. And is thermally and electrically connected to the respective semiconductor chips (1a, 1b) and faces the respective semiconductor chips (1a, 1b) of the pair of heat dissipation members (2, 3). Has a projecting portion (2a) projecting stepwise on the side of each of the semiconductor chips (1a, 1b), and the tip portion of each projecting portion (2a) has a tip end of each of the semiconductor chips (1a, 1a, 1b). and 1b), be those which are thermally and electrically connected through the bonding member (4), said semiconductor chip (1a, 1b) and the pair of the heat radiating member
(2, 3) is sealed with mold resin (9)
The mold resin (9) is heated by the pair of heat dissipation members (2,
A semiconductor device, which is a resin having a thermal expansion coefficient similar to that of 3) . 【請求項７】 前記放熱面（１０）が、前記各々の放熱
部材（２、３）のうち、前記各々の半導体チップ（１
ａ、１ｂ）と対向している面とは反対側の面であり、 前記各々の放熱面（１０）が略平面となり、さらに、こ
れらの放熱面（１０）が互いに略平行の関係となってい
ることを特徴とする請求項６に記載の半導体装置。7. The heat dissipating surface (10) is provided on each of the semiconductor chips (1) of the heat dissipating members (2, 3).
a, 1b), which is the surface opposite to the surface facing each other, each of the heat dissipation surfaces (10) is substantially flat, and the heat dissipation surfaces (10) are substantially parallel to each other. The semiconductor device according to claim 6 , wherein the semiconductor device comprises: 【請求項８】 前記放熱面（１０）が、前記各々の放熱
部材（２、３）のうち、前記半導体チップ（１ａ、１
ｂ）と対向する面の端部にある面であり、これらの放熱
面（１０）が同一平面上にあることを特徴とする請求項
６に記載の半導体装置。8. The semiconductor chip (1a, 1) of the heat dissipation members (2, 3) is the heat dissipation surface (10).
A surface at the end of the surface facing b), these heat dissipation surfaces (10) being coplanar.
7. The semiconductor device according to item 6 . 【請求項９】 前記各々の放熱部材（２、３）のうち前
記放熱面（１０）以外の部位には、前記半導体チップ
（１ａ、１ｂ）と外部とを電気的に接続するための導体
（１７）が当該部位から突出して形成されていることを
特徴とする請求項６ないし８のいずれか１つに記載の半
導体装置。9. A conductor () for electrically connecting the semiconductor chips (1a, 1b) to the outside is provided on a portion of each of the heat dissipation members (2, 3) other than the heat dissipation surface (10). 17) the semiconductor device according to any one of claims 6 to 8, characterized in that it is formed to protrude from the site. 【請求項１０】 前記各々の導体（１７）が前記各々の
放熱部材（２、３）の前記放熱面（１０）に垂直な方向
において略同じ位置から略同じ方向に突出しており、前
記各々の導体（１７）が互いに略平行の位置関係にある
ことを特徴とする請求項９に記載の半導体装置。10. The conductors (17) project from substantially the same position in the direction perpendicular to the heat dissipation surface (10) of each heat dissipation member (2, 3) in substantially the same direction, and 10. The semiconductor device according to claim 9 , wherein the conductors (17) are in a substantially parallel positional relationship with each other. 【請求項１１】 前記放熱面（１０）が、前記各々の放
熱部材（２、３）のうち、前記半導体チップ（１ａ、１
ｂ）と対向している面とは反対側の面であり、 前記各々の放熱面（１０）において、前記各々の放熱部
材（２、３）と熱的かつ電気的に接続された外部配線部
材（１１）を有し、 前記各々の放熱部材（２、３）に対し、前記各々の放熱
面（１０）から少なくとも１つの貫通していないネジ穴
（２３ａ）が形成されており、前記外部配線部材（１
１）に対し、前記貫通していないネジ穴（２３ａ）と対
応する位置において貫通したネジ穴（２３ｂ）が形成さ
れており、 前記各々の放熱部材（２、３）と前記各々の外部配線部
材（１１）とがこれらのネジ穴（２３ａ、２３ｂ）によ
ってネジ止めされていることを特徴とする請求項６また
は７に記載の半導体装置。11. The heat dissipation surface (10) is the semiconductor chip (1a, 1) of the heat dissipation members (2, 3).
b) a surface on the opposite side to the surface facing the heat dissipation surface (10), and an external wiring member thermally and electrically connected to the heat dissipation members (2, 3). (11), at least one screw hole (23a) not penetrating from each heat dissipation surface (10) is formed for each heat dissipation member (2, 3), and the external wiring is provided. Member (1
1) is provided with a threaded hole (23b) penetrating at a position corresponding to the threaded hole (23a) not penetrating, the heat dissipation members (2, 3) and the external wiring members. (11) and is also claim 6, characterized in that it is screwed by these screw holes (23a, 23b)
Is a semiconductor device described in 7 . 【請求項１２】 前記各々の放熱部材（２、３）には、
前記各々の放熱部材（２、３）の剛性を減少させるため
の空間部（１５）が形成されていることを特徴とする請
求項１ないし１１のいずれか１つに記載の半導体装置。12. The heat dissipating members (2, 3) include:
The semiconductor device according to any one of claims 1 to 1 1, characterized in that the space portion to reduce the stiffness (15) is formed of each of the heat dissipating member (2, 3). 【請求項１３】 前記一対の放熱部材（２、３）とし
て、銅を主成分とする金属、および、アルミニウムを主
成分とする金属のうちの少なくとも一方を用いることを
特徴とする請求項１ないし１２のいずれか１つに記載の
半導体装置。13. The at least one of a metal containing copper as a main component and a metal containing aluminum as a main component is used as the pair of heat dissipation members (2, 3). the semiconductor device according to any one of 1 2. 【請求項１４】 前記各々の放熱部材（２、３）におけ
る前記半導体チップ（１ａ、１ｂ）と対向する部分の少
なくとも一部に対して、前記半導体チップ（１ａ、１
ｂ）と熱膨張係数が近似した金属材料（１６）が用いら
れることを特徴とする請求項１ないし１３のいずれか１
つに記載の半導体装置。14. The semiconductor chips (1a, 1) with respect to at least a part of a portion of each of the heat dissipation members (2, 3) facing the semiconductor chips (1a, 1b).
b) a to a metal material having a thermal expansion coefficient approximate (16) claims 1 characterized in that it is used either 1 3 1
The semiconductor device according to item 1. 【請求項１５】 前記接合部材（４）がバンプ形状とな
っており、このバンプ形状の接合部材（４）の隙間に樹
脂（１８）が充填されていることを特徴とする請求項１
ないし１４のいずれか１つに記載の半導体装置。15. The bonding member (4) has a bump shape, and a resin (18) is filled in a gap between the bump-shaped bonding member (4).
The semiconductor device according to any one of to 1 4.
JP33311999A 1999-11-24 1999-11-24 Semiconductor device Expired - Lifetime JP3525832B2 (en)

Priority Applications (18)

Application Number Priority Date Filing Date Title
JP33311999A JP3525832B2 (en) 1999-11-24 1999-11-24 Semiconductor device
US09/717,227 US6703707B1 (en) 1999-11-24 2000-11-22 Semiconductor device having radiation structure
FR0015130A FR2801423B1 (en) 1999-11-24 2000-11-23 SEMICONDUCTOR DEVICE WITH RADIANT STRUCTURE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING ELECTRONIC INSTRUMENT
DE10066441A DE10066441B4 (en) 1999-11-24 2000-11-24 Semiconductor device with radiating components
DE10066443A DE10066443B8 (en) 1999-11-24 2000-11-24 Semiconductor device with radiating components
DE10058446A DE10058446B8 (en) 1999-11-24 2000-11-24 Semiconductor device with radiating components
DE10066446A DE10066446B4 (en) 1999-11-24 2000-11-24 Method for producing an electronic component with two emission components
DE10066445A DE10066445B4 (en) 1999-11-24 2000-11-24 Semiconductor device with radiating structure
DE10066442A DE10066442B4 (en) 1999-11-24 2000-11-24 Semiconductor device with radiating structure
US10/321,365 US6693350B2 (en) 1999-11-24 2002-12-18 Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US10/699,746 US6998707B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,828 US6992383B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,837 US6960825B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,785 US6891265B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,744 US20040089940A1 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,838 US6798062B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,954 US6967404B2 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure
US10/699,784 US20040089941A1 (en) 1999-11-24 2003-11-04 Semiconductor device having radiation structure

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