JP5125530B2 - Power converter - Google Patents

Power converter Download PDF

Info

Publication number
JP5125530B2
JP5125530B2 JP2008006851A JP2008006851A JP5125530B2 JP 5125530 B2 JP5125530 B2 JP 5125530B2 JP 2008006851 A JP2008006851 A JP 2008006851A JP 2008006851 A JP2008006851 A JP 2008006851A JP 5125530 B2 JP5125530 B2 JP 5125530B2
Authority
JP
Japan
Prior art keywords
semiconductor element
heat spreader
electrode
wire bonding
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2008006851A
Other languages
Japanese (ja)
Other versions
JP2009171732A (en
Inventor
豊 田島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissan Motor Co Ltd
Original Assignee
Nissan Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissan Motor Co Ltd filed Critical Nissan Motor Co Ltd
Priority to JP2008006851A priority Critical patent/JP5125530B2/en
Publication of JP2009171732A publication Critical patent/JP2009171732A/en
Application granted granted Critical
Publication of JP5125530B2 publication Critical patent/JP5125530B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4846Connecting portions with multiple bonds on the same bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power converter capable of efficiently cooling a semiconductor device that performs power conversion without causing an increase in size, cost, thermal resistance or stress concentration. <P>SOLUTION: The power converter includes: a first substrate 13 mounted on a main surface of a first radiator 17; the first semiconductor device 11 mounted on a main surface of the first substrate 13; a first electrode 15 mounted on the main surface of the first radiator 17 or the main surface of the first substrate 13; a heat spreader 19 that is disposed on an upper surface of the first semiconductor device 11 and brings a plurality of first wire bonding lines 24 that electrically connect a first upper surface electrode 23 of the first semiconductor device 11 with the first electrode 13 into contact with the first upper surface electrode 23; a protrusion 19b provided on one surface side of the heat spreader 19 and brought into contact with or positioned in proximity to the first upper surface electrode 23 through the first wire bonding lines 24; a recess 19a that is approximated to the first wire bonding lines 24; and a second radiator 18 mounted on the other surface side of the heat spreader 19. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

この発明は、電力変換装置に関し、特に、多数の半導体素子を用いるために発熱に対する充分な対策を必要とする電力変換装置に関する。   The present invention relates to a power conversion device, and more particularly to a power conversion device that requires a sufficient countermeasure against heat generation in order to use a large number of semiconductor elements.

従来、一般に電力変換を行なう電力変換装置として、例えば、「半導体装置」(特許文献1参照)が知られている。
図19は、従来の半導体装置の構造を模式的に示す断面説明図である。図19に示すように、従来の半導体装置1は、下側半導体素子2と上側半導体素子3を有している。下側半導体素子2は、はんだ4aによって接続された、両側に金属パターンを有する絶縁基板5aを介して、冷却器6aに実装されており、上側半導体素子3は、はんだ4bによって接続された、両側に金属パターンを有する絶縁基板5bを介して、冷却器6bに実装されている。
Conventionally, as a power conversion device that generally performs power conversion, for example, a “semiconductor device” (see Patent Document 1) is known.
FIG. 19 is a cross-sectional explanatory view schematically showing the structure of a conventional semiconductor device. As shown in FIG. 19, the conventional semiconductor device 1 has a lower semiconductor element 2 and an upper semiconductor element 3. The lower semiconductor element 2 is mounted on the cooler 6a via an insulating substrate 5a having metal patterns on both sides connected by solder 4a, and the upper semiconductor element 3 is connected on both sides by solder 4b. It is mounted on the cooler 6b through an insulating substrate 5b having a metal pattern.

下側半導体素子2の主面電極上には電極7aが実装され、電極7a上には絶縁材8aを介して冷却器6bが載置されており、上側半導体素子3の主面電極上には電極7bが実装され、電極7b上には絶縁材8bを介して冷却器6cが載置されている。
この従来の半導体装置1は、下側半導体素子2と上側半導体素子3の何れも表面側及び裏面側にそれぞれ冷却器6a,6b,6cを有することで、冷却性能を高め温度上昇を抑えようとしている。また、両半導体素子2,3を上下に重ねた積層構造とすることで、平面大きさの縮小化を図っている。
特開2001−244407号公報
An electrode 7 a is mounted on the main surface electrode of the lower semiconductor element 2, and a cooler 6 b is placed on the electrode 7 a via an insulating material 8 a, and on the main surface electrode of the upper semiconductor element 3. An electrode 7b is mounted, and a cooler 6c is placed on the electrode 7b via an insulating material 8b.
The conventional semiconductor device 1 has the coolers 6a, 6b, and 6c on the front surface side and the back surface side of the lower semiconductor element 2 and the upper semiconductor element 3, respectively, thereby improving the cooling performance and suppressing the temperature rise. Yes. In addition, the planar size is reduced by forming a stacked structure in which the semiconductor elements 2 and 3 are stacked one above the other.
JP 2001-244407 A

しかしながら、従来の半導体装置1においては、以下の問題点がある。
半導体素子2もしくは3の両面を冷却する為には、半導体素子の両面側に熱抵抗を少なく、冷却器や放熱体を接合する必要がある。特に半導体素子の平面に活電位に接続する電極面を形成した場合、電極面と冷却器や放熱体と熱抵抗を少なく接合することは非常に困難となる。
この発明の目的は、電力変換を行なう半導体素子を、熱抵抗増大化を招くことなく、効率良く冷却することができる電力変換装置を提供することである。
However, the conventional semiconductor device 1 has the following problems.
In order to cool both surfaces of the semiconductor element 2 or 3, it is necessary to join a cooler or a heat radiator with less thermal resistance on both surfaces of the semiconductor element. In particular, when an electrode surface connected to the live potential is formed on the plane of the semiconductor element, it is very difficult to join the electrode surface, the cooler, and the heat radiating body with little thermal resistance.
An object of the present invention is to provide a power conversion device capable of efficiently cooling a semiconductor element that performs power conversion without causing an increase in thermal resistance.

上記目的を達成するため、この発明に係る電力変換装置は、第1放熱器と、前記第1放熱器の主面上に実装した第1基板と、前記第1基板の主面上に実装した第1半導体素子と、前記第1放熱器の主面上或いは前記第1基板の主面上に実装した第1電極と、前記第1半導体素子の上面に配置され、前記第1半導体素子の第1上面電極と前記第1電極を電気的に接続する複数の第1ワイヤボンディング線、及び前記第1上面電極を接触させたヒートスプレッダと、前記ヒートスプレッダの一面側に設けた、前記第1ワイヤボンディング線の間を通って前記第1上面電極に接触又は近接する凸部、及び前記第1ワイヤボンディング線に近接する凹部と、前記ヒートスプレッダの他面側に実装した第2放熱器とを有している。   In order to achieve the above object, a power converter according to the present invention is mounted on a first radiator, a first substrate mounted on a main surface of the first radiator, and a main surface of the first substrate. A first semiconductor element, a first electrode mounted on a main surface of the first radiator or the main surface of the first substrate, and disposed on an upper surface of the first semiconductor element. A plurality of first wire bonding lines that electrically connect one upper surface electrode and the first electrode; a heat spreader that contacts the first upper surface electrode; and the first wire bonding line provided on one surface side of the heat spreader. A convex portion in contact with or close to the first upper surface electrode, a concave portion in proximity to the first wire bonding line, and a second radiator mounted on the other surface side of the heat spreader. .

この発明によれば、第1放熱器の主面上には第1基板が実装され、第1基板の主面上には第1半導体素子が実装され、第1放熱器の主面上或いは第1基板の主面上には第1電極が実装され、第1半導体素子の上面には、第1半導体素子の第1上面電極と第1電極を電気的に接続する複数の第1ワイヤボンディング線、及び第1上面電極を接触させたヒートスプレッダが配置され、ヒートスプレッダの一面側には、第1ワイヤボンディング線の間を通って第1上面電極に接触又は近接する凸部、及び第1ワイヤボンディング線に近接する凹部が設けられ、ヒートスプレッダの他面側には第2放熱器が実装されている。
これにより、電力変換を行なう半導体素子を、大型化、コスト増加、熱抵抗増大化、応力集中を招くことなく、効率良く冷却することができる。
According to the present invention, the first substrate is mounted on the main surface of the first radiator, the first semiconductor element is mounted on the main surface of the first substrate, and the first surface of the first radiator is A first electrode is mounted on a main surface of one substrate, and a plurality of first wire bonding lines that electrically connect the first upper surface electrode of the first semiconductor element and the first electrode on the upper surface of the first semiconductor element. And a heat spreader that is in contact with the first upper surface electrode, and a convex portion that is in contact with or close to the first upper surface electrode through the first wire bonding line on one surface side of the heat spreader, and the first wire bonding line And a second radiator is mounted on the other side of the heat spreader.
Thereby, the semiconductor element which performs power conversion can be efficiently cooled without causing an increase in size, an increase in cost, an increase in thermal resistance, and stress concentration.

以下、この発明を実施するための最良の形態について図面を参照して説明する。
(第1実施の形態)
図1は、この発明の第1実施の形態に係る電力変換装置の構成を示す断面説明図である。図2は、図1のA−A線に沿う断面説明図である。図3は、図1のヒートスプレッダの裏面側の平面説明図である。図4は、図2においてヒートスプレッダを除いた平面説明図である。図5は、図4の各部断面構造を示し、(a)はB−B線に沿う断面説明図、(b)はC−C線に沿う断面説明図、(c)はD−D線に沿う断面説明図、(d)はE−E線に沿う断面説明図である。
The best mode for carrying out the present invention will be described below with reference to the drawings.
(First embodiment)
FIG. 1 is a cross-sectional explanatory view showing the configuration of the power conversion device according to the first embodiment of the present invention. FIG. 2 is a cross-sectional explanatory view taken along the line AA of FIG. 3 is an explanatory plan view of the back side of the heat spreader of FIG. FIG. 4 is an explanatory plan view of FIG. 2 excluding the heat spreader. 5 shows the cross-sectional structure of each part of FIG. 4, (a) is a cross-sectional explanatory view along the line BB, (b) is a cross-sectional explanatory view along the line CC, (c) is a DD line Cross-sectional explanatory drawing which follows, (d) is a cross-sectional explanatory drawing which follows the EE line.

図1から図5に示すように、電力変換装置10は、第1半導体素子11、第2半導体素子12、第1基板13、第2基板14、第1電極15、第2電極16、第1放熱器17、第2放熱器18、ヒートスプレッダ19、及び回路基板20を有しており、これらを層状に積み重ねて形成されている(図1参照)。
第1半導体素子11と第2半導体素子12は、金属体からなる熱拡散のための放熱性部材であるヒートスプレッダ19をその間に挟み込んでおり、第1半導体素子11の外側には第1基板13を介して第1放熱器17が、第2半導体素子12の外側には第2基板14を介して第2放熱器18が、それぞれ位置している。つまり、第1半導体素子11、第1基板13及び第1放熱器17と、第2半導体素子12、第2基板14及び第2放熱器18は、ヒートスプレッダ19を挟み、それぞれの主面側が向き合うように対向して(図中、上下に)配置されている(図1参照)。
As shown in FIGS. 1 to 5, the power conversion device 10 includes a first semiconductor element 11, a second semiconductor element 12, a first substrate 13, a second substrate 14, a first electrode 15, a second electrode 16, and a first semiconductor element 11. The radiator 17, the second radiator 18, the heat spreader 19, and the circuit board 20 are formed and formed by layering them (see FIG. 1).
The first semiconductor element 11 and the second semiconductor element 12 sandwich a heat spreader 19 that is a heat dissipating member made of a metal body for heat diffusion, and a first substrate 13 is placed outside the first semiconductor element 11. The first heat radiator 17 is located on the outside of the second semiconductor element 12, and the second heat radiator 18 is located on the outside of the second semiconductor element 12 via the second substrate 14. That is, the first semiconductor element 11, the first substrate 13, and the first radiator 17, and the second semiconductor element 12, the second substrate 14, and the second radiator 18 sandwich the heat spreader 19 so that their main surface sides face each other. (Refer to FIG. 1).

第1放熱器17の主面上には、絶縁層21を介して第1基板13が、第1基板13の主面上には、はんだ層22を介して第1半導体素子11が、それぞれ実装されている(図1参照)。なお、第1基板13は、絶縁層21を介さず直接、或いは絶縁層21の代わりにベースプレート(図示しない)を介して、第1放熱器17の主面上に実装しても良い。
また、第1放熱器17の主面上、第1基板13に隣接させて、絶縁層21を介し第1電極15を実装し、第1半導体素子11の第1上面電極23(図4参照)と第1電極15を、第1ワイヤボンディング線24で電気的に接続する(図2参照)と共に、第1上面電極23と第1ワイヤボンディング線24を、第1半導体素子11の上面側に位置するヒートスプレッダ19に、高熱伝導性材料、例えば高熱伝導率接着剤25を介して接触させる(図5参照)。
The first substrate 13 is mounted on the main surface of the first radiator 17 via the insulating layer 21, and the first semiconductor element 11 is mounted on the main surface of the first substrate 13 via the solder layer 22. (See FIG. 1). The first substrate 13 may be mounted on the main surface of the first radiator 17 directly without the insulating layer 21 or via a base plate (not shown) instead of the insulating layer 21.
Further, the first electrode 15 is mounted on the main surface of the first heat radiator 17 adjacent to the first substrate 13 via the insulating layer 21, and the first upper surface electrode 23 of the first semiconductor element 11 (see FIG. 4). And the first electrode 15 are electrically connected by a first wire bonding line 24 (see FIG. 2), and the first upper surface electrode 23 and the first wire bonding line 24 are positioned on the upper surface side of the first semiconductor element 11. The heat spreader 19 is brought into contact with a high thermal conductivity material, for example, a high thermal conductivity adhesive 25 (see FIG. 5).

なお、第1電極15は、絶縁層21を介さず直接、第1放熱器17の主面上に実装しても良く、第1放熱器17の主面上ではなく第1基板13の主面上に実装しても良い。
また、回路基板20は、例えば、ゲート配線基板であり、接続線26により第1半導体素子11の制御端子27に接続されている(図1,4参照)。
ここで、ヒートスプレッダ19の一面側に凹凸部を設け、凸部が、第1ワイヤボンディング線24の間を通って第1上面電極23に接触又は近接した状態、凹部が、第1ワイヤボンディング線24に近接した状態になるようにする。
The first electrode 15 may be directly mounted on the main surface of the first heat radiator 17 without the insulating layer 21 interposed therebetween, and is not on the main surface of the first heat radiator 17 but the main surface of the first substrate 13. May be implemented above.
The circuit board 20 is a gate wiring board, for example, and is connected to the control terminal 27 of the first semiconductor element 11 by a connection line 26 (see FIGS. 1 and 4).
Here, a concavo-convex portion is provided on one surface side of the heat spreader 19, the convex portion is in contact with or close to the first upper surface electrode 23 through the first wire bonding line 24, and the concave portion is the first wire bonding line 24. To be in close proximity to.

即ち、一般に、大電力変換を行なう第1半導体素子11への第1ワイヤボンディング線24による接続は、径が350〜500μm程度の金属線(例えば、アルミ線)を用いて行われ、しかも、これら複数の金属線は、ある程度規則的な間隔を空けて同方向へと引き出され、配線電極に接続される(図4参照)。
そこで、第1半導体素子11の第1上面電極23側に、第1ワイヤボンディング線24と同方向に延びる溝形状の凹部19aを離間して横並びに複数設け、隣接する凹部19aの間の仕切り壁状の凸部19bを有する、ヒートスプレッダ19(図3参照)を実装する。ヒートスプレッダ19の凹部19aは、第1ワイヤボンディング線24に近接配置可能な形状とする。
That is, generally, the connection by the first wire bonding wire 24 to the first semiconductor element 11 that performs high power conversion is performed using a metal wire (for example, aluminum wire) having a diameter of about 350 to 500 μm, and these The plurality of metal lines are drawn out in the same direction at regular intervals to some extent, and are connected to the wiring electrodes (see FIG. 4).
Therefore, a plurality of groove-shaped recesses 19a extending in the same direction as the first wire bonding lines 24 are provided apart from each other on the first upper surface electrode 23 side of the first semiconductor element 11, and a partition wall between the adjacent recesses 19a is provided. A heat spreader 19 (see FIG. 3) having a convex portion 19b is mounted. The recess 19 a of the heat spreader 19 has a shape that can be disposed close to the first wire bonding line 24.

これにより、隣接する凹部19aの間の凸部19bが、第1半導体素子11の第1上面電極23に接続されている複数本の第1ワイヤボンディング線24の間に入り込み、ヒートスプレッダ19を第1上面電極23に近接させる(図5参照)。
ヒートスプレッダ19の一面側に設けた溝状の凹部19aは、第1ワイヤボンディング線24の、第1半導体素子11の第1上面電極23に接続させるボンディング接続部分に対応する部分(図5(c)参照)を、このボンディング接続部分に対応しない部分(図5(d)参照)よりも浅くする。
そして、ヒートスプレッダ19の他面側、即ち、第1放熱器17が配置された主面側の反対側に、第2放熱器18を実装する(図1参照)。
Thereby, the convex part 19b between the adjacent concave parts 19a enters between the plurality of first wire bonding lines 24 connected to the first upper surface electrode 23 of the first semiconductor element 11, and the heat spreader 19 is moved to the first. It makes it adjoin to the upper surface electrode 23 (refer FIG. 5).
A groove-like recess 19a provided on one surface side of the heat spreader 19 corresponds to a bonding connection portion of the first wire bonding wire 24 to be connected to the first upper surface electrode 23 of the first semiconductor element 11 (FIG. 5C). Reference) is made shallower than the portion not corresponding to the bonding connection portion (see FIG. 5D).
And the 2nd heat radiator 18 is mounted in the other surface side of the heat spreader 19, ie, the opposite side to the main surface side in which the 1st heat radiator 17 is arrange | positioned (refer FIG. 1).

第2放熱器18の主面上には、絶縁層29を介して第2基板14が、第2基板14の主面上には、はんだ層30を介して第2半導体素子12が、それぞれ実装されている(図1参照)。なお、第2基板14は、絶縁層29を介さず直接、或いは絶縁層29の代わりにベースプレート(図示しない)を介して、第2放熱器18の主面上に実装しても良い。
また、第2放熱器18の主面上、第2基板14に隣接し、絶縁層29を介して第2電極16を実装し、第2半導体素子12の第2上面電極(図示しない)と第2電極16を、第2ワイヤボンディング線31で電気的に接続する。そして、第2上面電極と第2ワイヤボンディング線31を、ヒートスプレッダ19の第2半導体素子12側である他面側に、直接、或いは高熱伝導性材料、例えば高熱伝導率接着剤32を介して接触させる(図1参照)。
The second substrate 14 is mounted on the main surface of the second radiator 18 via an insulating layer 29, and the second semiconductor element 12 is mounted on the main surface of the second substrate 14 via a solder layer 30. (See FIG. 1). Note that the second substrate 14 may be mounted on the main surface of the second radiator 18 directly without the insulating layer 29 or via a base plate (not shown) instead of the insulating layer 29.
Further, the second electrode 16 is mounted on the main surface of the second radiator 18 adjacent to the second substrate 14 via the insulating layer 29, and the second upper surface electrode (not shown) of the second semiconductor element 12 and the second electrode 16 are mounted. The two electrodes 16 are electrically connected by the second wire bonding line 31. Then, the second upper surface electrode and the second wire bonding line 31 are brought into contact with the other surface side, which is the second semiconductor element 12 side, of the heat spreader 19 directly or through a high thermal conductivity material, for example, a high thermal conductivity adhesive 32. (See FIG. 1).

なお、第2電極16は、絶縁層29を介さず直接、第2放熱器18の主面上に実装しても良く、第2放熱器18の主面上ではなく第2基板14の主面上に実装しても良い。
更に、ヒートスプレッダ19の他面側に、一面側と同様に、第2ワイヤボンディング線31と同方向に延びる溝形状の複数の凹部と、隣接する凹部の間の仕切り壁状の凸部を設け、凸部が、第2ワイヤボンディング線31の間を通って第2上面電極に接触又は近接した状態、凹部が、第2ワイヤボンディング線31に近接した状態にする。
ヒートスプレッダ19の他面側に設けた溝状の凹部は、ヒートスプレッダ19の一面側に設けた溝状の凹部19aと同様に、第2ワイヤボンディング線31の、第2半導体素子12の第2上面電極に接続させるボンディング接続部分に対応する部分を、このボンディング接続部分に対応しない部分よりも浅くする。
The second electrode 16 may be directly mounted on the main surface of the second radiator 18 without the insulating layer 29 interposed therebetween, and is not on the main surface of the second radiator 18 but on the main surface of the second substrate 14. May be implemented above.
Further, on the other surface side of the heat spreader 19, similarly to the one surface side, a plurality of groove-shaped recesses extending in the same direction as the second wire bonding line 31, and a partition wall-shaped protrusion between adjacent recesses are provided, The convex portion is in contact with or close to the second upper surface electrode through the second wire bonding line 31, and the concave portion is in proximity to the second wire bonding line 31.
The groove-shaped recess provided on the other surface side of the heat spreader 19 is the second upper surface electrode of the second semiconductor element 12 of the second wire bonding line 31, similarly to the groove-shaped recess 19 a provided on the one surface side of the heat spreader 19. The portion corresponding to the bonding connection portion to be connected to the substrate is made shallower than the portion not corresponding to the bonding connection portion.

また、第1電極15と第2電極16とを電気的に接続し、第1半導体素子11の第1上面電極23と第2半導体素子12の第2上面電極が、電気的に同電位である構成とする。また、第1半導体素子11と第2半導体素子12が、電気的に同一の動作をしない状態を有する素子同士の組み合わせとする。
なお、この実施の形態では、電力変換装置として、例えば電動機を駆動するインバータ装置とし、第1半導体素子11がIGBT(Insulated Gate Bipolar Transistor)、第2半導体素子12がダイオードとする。また、第1半導体素子11は、エミッタ電極である第1上面電極23、ゲート電極である制御端子27を有している。ゲート電極(制御端子27)は、ゲート接続線(接続線26)を介してゲート配線基板(回路基板20)に接続される(図4参照)。
The first electrode 15 and the second electrode 16 are electrically connected, and the first upper surface electrode 23 of the first semiconductor element 11 and the second upper surface electrode of the second semiconductor element 12 are electrically at the same potential. The configuration. Further, the first semiconductor element 11 and the second semiconductor element 12 are a combination of elements having a state where they do not perform the same electrical operation.
In this embodiment, as the power conversion device, for example, an inverter device that drives an electric motor is used, the first semiconductor element 11 is an IGBT (Insulated Gate Bipolar Transistor), and the second semiconductor element 12 is a diode. The first semiconductor element 11 has a first upper surface electrode 23 that is an emitter electrode and a control terminal 27 that is a gate electrode. The gate electrode (control terminal 27) is connected to the gate wiring board (circuit board 20) via the gate connection line (connection line 26) (see FIG. 4).

そして、第1半導体素子11としてのIGBTと第2半導体素子12としてのダイオードを、電気的に通電方向を逆向きにする逆並列配置に接続して、スイッチ回路33(図1参照)を形成する。このスイッチ回路33は、例えば、3相インバータとしては、1つのハイサイド側アーム又はローサイド側アームを構成しており、このスイッチ回路33を6個形成し、電気的に適切に接続することによって、3相インバータを構成することができる。   Then, the IGBT as the first semiconductor element 11 and the diode as the second semiconductor element 12 are connected in an antiparallel arrangement in which the energization direction is electrically reversed to form the switch circuit 33 (see FIG. 1). . For example, as the three-phase inverter, the switch circuit 33 constitutes one high-side arm or low-side arm, and by forming six switch circuits 33 and electrically connecting them appropriately, A three-phase inverter can be configured.

上述した構成を有することにより、電力変換装置10は以下に示す効果を得ることができる。なお、電力変換装置10は、第1半導体素子11、第1基板13及び第1放熱器17からなる第1構成体と、第1構成体に対応する、第2半導体素子12、第2基板14及び第2放熱器18からなる第2構成体とが、ヒートスプレッダ19を挟んで対向配置された構造を有しており、第1構成体における効果について説明したことは、第2構成体についても同様に適用される。   By having the configuration described above, the power conversion device 10 can obtain the following effects. In addition, the power converter device 10 includes the first semiconductor element 11, the first substrate 13, and the first radiator 17, and the second semiconductor element 12 and the second substrate 14 corresponding to the first constituent body. And the second structure composed of the second heat radiator 18 have a structure in which the heat spreader 19 is interposed therebetween, and the effects of the first structure have been described for the second structure as well. Applies to

第1の効果として、電力変換を行なう第1半導体素子11は、第1半導体素子11の裏面側からだけでなく、第1半導体素子11の上面(主面)側からも、即ち、第1半導体素子11の両面側から放熱することができる。しかも、第1半導体素子11の第1上面電極23に対する電気的接続は、第1ワイヤボンディング線24により、容易、且つ、確実に実施できる状態のまま、第1半導体素子11の上面側からの放熱も低熱抵抗で容易に行うことができる。   As a first effect, the first semiconductor element 11 that performs power conversion is not only from the back surface side of the first semiconductor element 11 but also from the upper surface (main surface) side of the first semiconductor element 11, that is, the first semiconductor. Heat can be radiated from both sides of the element 11. In addition, the electrical connection of the first semiconductor element 11 to the first upper surface electrode 23 can be performed by the first wire bonding line 24 in a state where it can be easily and reliably performed, and heat is radiated from the upper surface side of the first semiconductor element 11. Can be easily performed with low thermal resistance.

即ち、第1半導体素子11の第1上面電極23とヒートスプレッダ19の間は、大部分が第1ワイヤボンディング線24とヒートスプレッダ19の凸部19bによる金属体が占めることになる。そして、配線された第1ワイヤボンディング線24が山形に浮いた状態になるが故に生じる隙間を、高熱伝導率接着剤25が埋めるような形状になる。このため、第1半導体素子11の上面側、即ち、ヒートスプレッダ19側からの熱流は、金属体であるヒートスプレッダ19を通って第2放熱器18に伝わることになる。この際、高熱伝導率接着剤25も、熱伝達に寄与する。   That is, the metal body by the 1st wire bonding line 24 and the convex part 19b of the heat spreader 19 occupies most between the 1st upper surface electrode 23 of the 1st semiconductor element 11, and the heat spreader 19. FIG. And it becomes the shape where the high heat conductivity adhesive agent 25 fills the clearance gap which arises because the wired 1st wire bonding line 24 will be in the state which floated in the mountain shape. For this reason, the heat flow from the upper surface side of the first semiconductor element 11, that is, from the heat spreader 19 side, is transmitted to the second radiator 18 through the heat spreader 19 that is a metal body. At this time, the high thermal conductivity adhesive 25 also contributes to heat transfer.

よって、第1半導体素子11の第1上面電極23と第2放熱器18の間を、大部分が金属体による低熱抵抗で熱結合することができる。このため、第1半導体素子11で生じた熱を、従来構造による第1半導体素子11裏面側、即ち、第1放熱器17側からの放熱に加え、上面側、即ち、ヒートスプレッダ19側からも低熱抵抗で放熱することができるので、電力変換装置10の大幅な小型化を容易に図ることができる。
第2の効果として、第1半導体素子11の直上に金属体であるヒートスプレッダ19を載置することになるので、このヒートスプレッダ19が、第1半導体素子11を発生源とするノイズに対しシールド体として機能する。特に、第1半導体素子11に極めて近接して配置できるので、高いシールド効果を得ることができる。
Therefore, most of the first upper surface electrode 23 of the first semiconductor element 11 and the second radiator 18 can be thermally coupled with a low thermal resistance due to a metal body. Therefore, the heat generated in the first semiconductor element 11 is reduced from the upper surface side, that is, the heat spreader 19 side, in addition to the heat radiation from the back side of the first semiconductor element 11 according to the conventional structure, that is, the first radiator 17 side. Since heat can be dissipated by the resistor, the power converter 10 can be greatly reduced in size easily.
As a second effect, since the heat spreader 19 that is a metal body is placed immediately above the first semiconductor element 11, the heat spreader 19 serves as a shield body against noise generated from the first semiconductor element 11. Function. In particular, since it can be arranged very close to the first semiconductor element 11, a high shielding effect can be obtained.

第3の効果として、装置構成物の高さばらつきや平行度違いによる隙間不均一があっても、その影響を受けないようにすることができ、また、製造が一層容易になる。
一般に、電力変換装置は複数の半導体素子から構成されている。また、第1半導体素子11上面側に配置する第2放熱器18は、電力変換装置全体として1つである方が部品点数の削減や製造工程の簡略化の観点から望ましい。このような状況において、第1半導体素子11の厚さは必ずしも均一ではなく、その上、第1基板13に対する第2放熱器18の平行度も常に合致するとは限らない。
As a third effect, even if there is a gap non-uniformity due to a variation in the height of the apparatus components or a difference in parallelism, it can be prevented from being affected by it, and the manufacturing becomes easier.
In general, a power converter is composed of a plurality of semiconductor elements. Further, it is desirable that the number of the second heat radiator 18 disposed on the upper surface side of the first semiconductor element 11 is one as the whole power conversion device from the viewpoint of reducing the number of parts and simplifying the manufacturing process. Under such circumstances, the thickness of the first semiconductor element 11 is not necessarily uniform, and the parallelism of the second radiator 18 with respect to the first substrate 13 does not always match.

この電力変換装置10の構成にあっては、これら構成部材の高さばらつきや平行度違いによる隙間不均一があっても、第2放熱器18又はヒートスプレッダ19の押圧時の高熱伝導率接着剤25の潰れにより、第1半導体素子11の第1上面電極23と、第2放熱器18或いはヒートスプレッダ19との間を、確実に埋めることができる。
つまり、電力変換装置10のような複数の構成部材を積層する構造、更に、各半導体素子関連部分の厚さが必ずしも均一とは限らない構造の場合、各構成部材の寸法公差による精度ばらつきが発生するのは避けられない。しかしながら、本構成での高熱伝導率接着剤25が備える、熱硬化処理前は容易に変形可能という性質を利用して、高熱伝導率接着剤25の潰れにより、各構成部材の精度ばらつきを容易に吸収しその影響を受けないようにすることができる。
In the configuration of the power conversion device 10, the high thermal conductivity adhesive 25 when the second radiator 18 or the heat spreader 19 is pressed even if there is a gap nonuniformity due to a height variation or parallelism difference between these components. By crushing, the space between the first upper surface electrode 23 of the first semiconductor element 11 and the second heat radiator 18 or the heat spreader 19 can be reliably filled.
In other words, in the case of a structure in which a plurality of structural members such as the power conversion device 10 are stacked and the thickness of each semiconductor element related part is not necessarily uniform, variation in accuracy due to dimensional tolerance of each structural member occurs. It is inevitable to do. However, by utilizing the property that the high thermal conductivity adhesive 25 in this configuration is easily deformable before the thermosetting treatment, the high thermal conductivity adhesive 25 is easily crushed, thereby easily causing variations in accuracy of each component. It can be absorbed and unaffected.

よって、第1半導体素子11やヒートスプレッダ19等の各構成部材における精度ばらつきの発生に、容易に対処することができ、第1半導体素子11の第1上面電極23と第2放熱器18との間を、常時、確実に熱結合することができる。
更に、電力変換装置10の製造が一層容易になる。即ち、高熱伝導率接着剤25は、塗布後に熱硬化処理を行なえばよいので、本構成のような、第1半導体素子11の上に第2放熱器18或いはヒートスプレッダ19を載せる積層構造体であっても、常温で高熱伝導率接着剤25を塗布した後、熱硬化を行えば、容易に構造体を形成することができる。
Therefore, it is possible to easily deal with the occurrence of variations in accuracy in the respective constituent members such as the first semiconductor element 11 and the heat spreader 19, and between the first upper surface electrode 23 of the first semiconductor element 11 and the second radiator 18. Can be reliably thermally coupled at all times.
Furthermore, manufacture of the power converter device 10 becomes easier. That is, since the high thermal conductivity adhesive 25 only needs to be heat-cured after application, it is a laminated structure in which the second radiator 18 or the heat spreader 19 is placed on the first semiconductor element 11 as in this configuration. However, after applying the high thermal conductivity adhesive 25 at normal temperature and then thermosetting, the structure can be easily formed.

第4の効果として、熱応力による信頼性上の懸念の発生を極力回避することができる。一般に、第2放熱器18やヒートスプレッダ19には、材料コストの面から銅やアルミニウム等が用いられるが、これら金属材料は、半導体とは熱膨張率が大きく異なる。これに対し、本構成にあっては、高熱伝導率接着剤25や第1ワイヤボンディング線24の変形により、熱膨張率が大きく異なる材料を接合していても熱応力を緩和することができる。   As a fourth effect, it is possible to avoid the occurrence of reliability concerns due to thermal stress as much as possible. In general, copper, aluminum, or the like is used for the second radiator 18 and the heat spreader 19 from the viewpoint of material cost, but these metal materials are greatly different in thermal expansion coefficient from semiconductors. On the other hand, in this configuration, thermal stress can be alleviated even when materials having greatly different thermal expansion coefficients are joined by deformation of the high thermal conductivity adhesive 25 and the first wire bonding line 24.

第5の効果として、第1半導体素子11及び第2半導体素子12の温度上昇を顕著に抑制することができる。即ち、第1半導体素子11が通電により発熱している場合、その熱は、第1半導体素子11裏面(第1放熱器17側)から、第1基板13を介して第1放熱器17に伝わり、加えて、第1半導体素子11上面(ヒートスプレッダ19側)から、ヒートスプレッダ19を介して第2半導体素子12、更に、第2基板14を介して第2放熱器18へも伝わる。これにより、第1半導体素子11の温度上昇を顕著に抑えることができ、第2半導体素子12についても同様に、温度上昇を顕著に抑制することができる。
ここで、本構成では、第1半導体素子11の上面電極と第2半導体素子12の上面電極が電気的に同電位であることにより、両半導体素子11,12を十分に近接配置することができる。つまり、電気的な絶縁を得るために間隔を空ける必要が無い。
As a fifth effect, the temperature rise of the first semiconductor element 11 and the second semiconductor element 12 can be remarkably suppressed. That is, when the first semiconductor element 11 generates heat by energization, the heat is transmitted from the back surface of the first semiconductor element 11 (on the first radiator 17 side) to the first radiator 17 via the first substrate 13. In addition, the heat is transmitted from the upper surface of the first semiconductor element 11 (on the heat spreader 19 side) to the second semiconductor element 12 via the heat spreader 19 and further to the second radiator 18 via the second substrate 14. Thereby, the temperature rise of the first semiconductor element 11 can be remarkably suppressed, and the temperature rise of the second semiconductor element 12 can be remarkably suppressed similarly.
Here, in this configuration, since the upper surface electrode of the first semiconductor element 11 and the upper surface electrode of the second semiconductor element 12 are electrically at the same potential, the semiconductor elements 11 and 12 can be disposed sufficiently close to each other. . In other words, there is no need to provide an interval in order to obtain electrical insulation.

即ち、第1半導体素子11と第2半導体素子12は、インバータ装置の各アームとして働くスイッチ回路33であるので、両半導体素子11,12の上面電極同士及び裏面電極同士が電気的に同電位になる。更に、両半導体素子11,12の上面電極を結合する高熱伝導性材料、例えば高熱伝導率接着剤25も、絶縁体である必要が無い。一般に電気伝導性を有する接合材料は、絶縁性を有する接合材料よりも熱伝導性が良い上に、薄くして熱抵抗を更に下げることができる。   That is, since the first semiconductor element 11 and the second semiconductor element 12 are the switch circuits 33 that function as the arms of the inverter device, the upper surface electrodes and the rear surface electrodes of both the semiconductor elements 11 and 12 are electrically at the same potential. Become. Furthermore, the high thermal conductivity material that joins the upper surface electrodes of the semiconductor elements 11 and 12, for example, the high thermal conductivity adhesive 25, does not need to be an insulator. In general, a bonding material having electrical conductivity has better thermal conductivity than a bonding material having insulating properties, and can be further reduced in thermal resistance.

つまり、第1半導体素子11の上面電極とヒートスプレッダ19の間、及び第2半導体素子12の上面電極とヒートスプレッダ19の間で、十分な電気的絶縁を図るために生じる熱抵抗の増加を招くことがない。この結果、第1半導体素子11と第2半導体素子12から生じた熱を、それぞれの上面側に対向配置された他方の半導体素子に低熱抵抗で伝えることができる。そして、この他方の半導体素子も、裏面側が低熱抵抗で放熱器(第1放熱器17或いは第2放熱器18)に熱結合していることにより、温度上昇を抑えることができる。
よって、第1半導体素子11と第2半導体素子12のそれぞれの発熱を、上下両面に低熱抵抗で伝えることができ、放熱器(第1放熱器17或いは第2放熱器18)へと導くことができるので、第1半導体素子11と第2半導体素子12の温度上昇を大幅に抑制することができる。
That is, an increase in thermal resistance may be caused between the upper surface electrode of the first semiconductor element 11 and the heat spreader 19 and between the upper surface electrode of the second semiconductor element 12 and the heat spreader 19 in order to achieve sufficient electrical insulation. Absent. As a result, the heat generated from the first semiconductor element 11 and the second semiconductor element 12 can be transmitted to the other semiconductor element disposed opposite to the upper surface side with a low thermal resistance. And this other semiconductor element can also suppress a temperature rise because the back surface side is thermally coupled to a radiator (the first radiator 17 or the second radiator 18) with a low thermal resistance.
Therefore, each heat generation of the first semiconductor element 11 and the second semiconductor element 12 can be transmitted to both the upper and lower surfaces with low thermal resistance, and can be led to the radiator (the first radiator 17 or the second radiator 18). Therefore, the temperature rise of the first semiconductor element 11 and the second semiconductor element 12 can be significantly suppressed.

第6の効果として、第1半導体素子11と第2半導体素子12のそれぞれの上面側に、放熱経路を、簡便、且つ、確実に設けることができる。つまり、第1半導体素子11の上面側に対向して第2半導体素子12を載置する状態になるが、その際、第1半導体素子11に対して第2半導体素子12を固定する部分の形状精度によって、両半導体素子11,12の上面電極間隔がばらつく懸念は否定できない。この場合でも、本構成では、高熱伝導率接着剤25の潰れによって寸法ばらつきを吸収することができるので、寸法ばらつきを吸収した後に硬化させて接合することができる。   As a sixth effect, a heat dissipation path can be easily and reliably provided on the upper surface side of each of the first semiconductor element 11 and the second semiconductor element 12. That is, the second semiconductor element 12 is placed so as to face the upper surface side of the first semiconductor element 11. At this time, the shape of the portion for fixing the second semiconductor element 12 to the first semiconductor element 11 is set. There is an undeniable concern that the distance between the upper surface electrodes of the semiconductor elements 11 and 12 varies depending on the accuracy. Even in this case, in this configuration, since the dimensional variation can be absorbed by the crushing of the high thermal conductivity adhesive 25, the dimensional variation can be absorbed and then cured and bonded.

更に、第1半導体素子11と第2半導体素子12のそれぞれの上面電極が同電位であるので、間に絶縁材料を介在させる必要が無い。このため、この絶縁材料の厚さばらつきによる接合不十分や、絶縁材料の表裏面と両半導体素子11,12の各上面電極の接合を共に行なうことによる製造工程の煩雑さも、生じない。   Furthermore, since the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12 are at the same potential, there is no need to interpose an insulating material therebetween. For this reason, there is no inadequate joining due to the variation in the thickness of the insulating material, and neither the manufacturing process is complicated due to the joining of the front and back surfaces of the insulating material and the upper surface electrodes of the two semiconductor elements 11 and 12 together.

第7の効果として、電力変換装置10は、第1半導体素子11の上面にヒートスプレッダ19を介して第2半導体素子12を載置する、上下積層構造を有することから、第1半導体素子11と第2半導体素子12を実装する投影面積を、左右並置構造に比べ大幅に減らすことができる。更に、第1半導体素子11と第2半導体素子12のそれぞれの上面電極の間に新たに絶縁材料を介在させず、且つ、両上面電極が同電位であるので、両半導体素子11,12を十分に近接配置することができる。よって、電力変換装置10の厚み増加を抑えると共に、半導体素子の実装部分の投影面積を大幅に抑えることが可能になるので、装置全体の小型化へ大きく寄与することができる。   As a seventh effect, since the power conversion device 10 has an upper and lower stacked structure in which the second semiconductor element 12 is mounted on the upper surface of the first semiconductor element 11 via the heat spreader 19, the first semiconductor element 11 and the first semiconductor element 11 2 The projected area for mounting the semiconductor element 12 can be greatly reduced as compared with the side-by-side structure. Further, since no new insulating material is interposed between the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12 and both the upper surface electrodes are at the same potential, the two semiconductor elements 11 and 12 are sufficiently connected. Can be placed close to each other. Therefore, the increase in thickness of the power conversion device 10 can be suppressed, and the projected area of the mounting portion of the semiconductor element can be greatly suppressed, which can greatly contribute to downsizing of the entire device.

第8の効果として、上記効果によって電力変換器の投影面積が減少すれば、半導体素子から平滑コンデンサまで連結するバスバを大幅に短くすることができる。よって、このバスバにおける寄生インダクタンスが減少するので、電力変換装置の大電流動作に対する安定度が著しく増大する。
第9の効果として、ヒートスプレッダ19が有する熱容量によって、第1半導体素子11と第2半導体素子12の温度上昇を、更に抑制することができる。例えば、電力変換装置10が自動車等へ搭載して用いられる場合、一般的に、最大出力は車両発進時等の短時間に限られる場合が多い。この場合、ヒートスプレッダ19の熱容量によって、半導体素子の温度上昇が遅くなる効果が得られる。最大出力の継続時間が限定的になるならば、結果として、半導体素子の温度を低い状態に保持することが可能になる。
As an eighth effect, if the projected area of the power converter is reduced by the above effect, the bus bar connected from the semiconductor element to the smoothing capacitor can be significantly shortened. Therefore, since the parasitic inductance in the bus bar is reduced, the stability of the power conversion device with respect to the large current operation is remarkably increased.
As a ninth effect, the temperature increase of the first semiconductor element 11 and the second semiconductor element 12 can be further suppressed by the heat capacity of the heat spreader 19. For example, when the power conversion device 10 is mounted and used in an automobile or the like, generally, the maximum output is often limited to a short time such as when the vehicle starts. In this case, the effect of slowing the temperature rise of the semiconductor element is obtained by the heat capacity of the heat spreader 19. If the duration of the maximum output becomes limited, as a result, the temperature of the semiconductor element can be kept low.

第10の効果として、第1半導体素子11の制御端子27を、回路基板20に容易に接続することができる。これは、電力変換装置10の製造コスト低減に繋がる。即ち、ヒートスプレッダ19が無い状態において、第1半導体素子11の上面電極と第2半導体素子12の上面電極を、熱結合のために近接させると、結果として、これら半導体素子11,12を実装している第1基板13と第2基板14の間隔も小さくなる。
この状態で、半導体素子の制御端子27を接続する回路基板20を、第1基板13又は第2基板14に実装すると、この電気接続にかかる接続線26や回路基板20上の配線パターンや抵抗等の電子部品を配置する空間的余裕を、十分確保することができない。この結果、複雑な配置構造を採用せざるを得ない事態になってコスト増加をもたらすことが懸念される。
As a tenth effect, the control terminal 27 of the first semiconductor element 11 can be easily connected to the circuit board 20. This leads to a reduction in manufacturing cost of the power conversion device 10. That is, in the state without the heat spreader 19, when the upper surface electrode of the first semiconductor element 11 and the upper surface electrode of the second semiconductor element 12 are brought close to each other for thermal coupling, as a result, the semiconductor elements 11 and 12 are mounted. The distance between the first substrate 13 and the second substrate 14 is also reduced.
In this state, when the circuit board 20 to which the control terminal 27 of the semiconductor element is connected is mounted on the first board 13 or the second board 14, the connection line 26 for the electrical connection, the wiring pattern on the circuit board 20, the resistance, etc. It is not possible to secure a sufficient space for arranging the electronic components. As a result, there is a concern that a complicated arrangement structure must be adopted, resulting in an increase in cost.

本構成では、ヒートスプレッダ19を有することにより、第1半導体素子11と第2半導体素子12の間を十分に小さい熱抵抗により放熱することができる状態を保ったまま、両半導体素子11,12の間及び第1基板13と第2基板14の間隔を、広くすることができる。よって、制御端子27の接続線26や回路基板20及び電子部品等を実装配置する空間を、容易に確保することができる。これにより、製造コストを削減することができる。
第11の効果として、第1ワイヤボンディング線24と第1電極15、及び第2ワイヤボンディング線31と第2電極16を、容易に接続することができる。これも、電力変換装置10の製造コストの削減に繋がる。
In this configuration, by having the heat spreader 19, the space between the first semiconductor element 11 and the second semiconductor element 12 can be dissipated between the two semiconductor elements 11 and 12 while maintaining a state in which heat can be radiated by a sufficiently small thermal resistance. In addition, the distance between the first substrate 13 and the second substrate 14 can be increased. Therefore, a space for mounting and arranging the connection line 26 of the control terminal 27, the circuit board 20, and the electronic component can be easily secured. Thereby, manufacturing cost can be reduced.
As an eleventh effect, the first wire bonding line 24 and the first electrode 15 and the second wire bonding line 31 and the second electrode 16 can be easily connected. This also leads to a reduction in manufacturing cost of the power conversion device 10.

即ち、ヒートスプレッダ19が無い状態では、上述したように、第1基板13と第2基板14の間隔が小さくなる。この状態では、第1電極15上での第1ワイヤボンディング線24の接続部分と、第2電極16上での第2ワイヤボンディング線31の接続部分が、干渉接触してしまう懸念がある。そこで、これら2つの接続部分を、干渉防止のためずらすような配置構成にすると、電力変換装置10の大型化を招いてしまう。
更に、これら接続部分の間隔に余裕を得るために、第1電極15を第1基板13より低くする形状、また、第2電極16を第2基板14より低くする形状にしたとしても、以下の問題が生じ易くなる。
That is, in the state without the heat spreader 19, as described above, the distance between the first substrate 13 and the second substrate 14 is reduced. In this state, there is a concern that the connection portion of the first wire bonding line 24 on the first electrode 15 and the connection portion of the second wire bonding line 31 on the second electrode 16 may interfere with each other. Therefore, if these two connecting portions are arranged so as to be shifted in order to prevent interference, the power conversion device 10 is increased in size.
Furthermore, in order to obtain a margin in the interval between these connection portions, even if the first electrode 15 is lower than the first substrate 13 and the second electrode 16 is lower than the second substrate 14, Problems are likely to arise.

第1ワイヤボンディング線24及び第2ワイヤボンディング線31は、半導体素子の上面電極に接続された後に、この上面電極より低い第1電極15及び第2電極16に接続されることになる。このため、第1ワイヤボンディング線24及び第2ワイヤボンディング線31と、第1半導体素子11及び第2半導体素子12の端部が近接し過ぎてしまう虞がある。第1ワイヤボンディング線24及び第2ワイヤボンディング線31と、第1半導体素子11及び第2半導体素子12の端部は、電気的に電位が異なっているため電気絶縁を確保する必要がある。よって、複雑な配置構造を採用せざるを得ない事態になってコスト増加をもたらすことが懸念される。   The first wire bonding line 24 and the second wire bonding line 31 are connected to the first electrode 15 and the second electrode 16 which are lower than the upper surface electrode after being connected to the upper surface electrode of the semiconductor element. For this reason, there is a possibility that the first wire bonding line 24 and the second wire bonding line 31 and the ends of the first semiconductor element 11 and the second semiconductor element 12 are too close to each other. Since the first wire bonding line 24 and the second wire bonding line 31 and the ends of the first semiconductor element 11 and the second semiconductor element 12 have different electrical potentials, it is necessary to ensure electrical insulation. Therefore, there is a concern that a complicated arrangement structure must be adopted, resulting in an increase in cost.

本構成では、ヒートスプレッダ19を設けたことにより、第1半導体素子11と第2半導体素子12の間を十分に小さい熱抵抗によって放熱できる状態を保ったまま、各半導体素子の上面電極より第1電極15及び第2電極16を高く位置させることが容易にできる。よって、第1ワイヤボンディング線24及び第2ワイヤボンディング線31と、第1半導体素子11及び第2半導体素子12の端部の隙間を、容易に広くすることができる。この結果、第1ワイヤボンディング線24及び第2ワイヤボンディング線31と、第1半導体素子11及び第2半導体素子12の端部の間の、電気絶縁を確保するための製造コストが、増加しないようにすることができる。   In this configuration, by providing the heat spreader 19, the first electrode is formed from the upper surface electrode of each semiconductor element while maintaining a state where heat can be radiated between the first semiconductor element 11 and the second semiconductor element 12 by a sufficiently small thermal resistance. 15 and the second electrode 16 can be easily positioned higher. Therefore, the gap between the first wire bonding line 24 and the second wire bonding line 31 and the end portions of the first semiconductor element 11 and the second semiconductor element 12 can be easily widened. As a result, the manufacturing cost for securing electrical insulation between the first wire bonding line 24 and the second wire bonding line 31 and the end portions of the first semiconductor element 11 and the second semiconductor element 12 does not increase. Can be.

第12の効果として、電力変換装置10の内部の電気絶縁を容易に実現することができる。この結果、製造コストを低減することができる。即ち、各半導体素子を実装している第1基板13及び第2基板14と、第1ワイヤボンディング線24及び第2ワイヤボンディング線31や第1電極15及び第2電極16、更に、制御端子27の接続線26や回路基板20は、それぞれ電気的に電位が異なっており電気絶縁を確保する必要がある。
本構成では、ヒートスプレッダ19を設けているため、これら電気的に電位が異なっている各構成部材の間隔を広くすることができる。よって、容易に、つまり、低コストに電気絶縁を図ることができる。
As a twelfth effect, electrical insulation inside the power converter 10 can be easily realized. As a result, the manufacturing cost can be reduced. That is, the first substrate 13 and the second substrate 14 on which each semiconductor element is mounted, the first wire bonding line 24 and the second wire bonding line 31, the first electrode 15 and the second electrode 16, and the control terminal 27. The connection lines 26 and the circuit board 20 have different electrical potentials, and it is necessary to ensure electrical insulation.
In the present configuration, since the heat spreader 19 is provided, it is possible to widen the interval between the constituent members having different electrical potentials. Therefore, electrical insulation can be achieved easily, that is, at low cost.

ところで、電力変換器10として、例えば3相インバータを例にすると、電力変換を行なうスイッチ回路33は、IGBTに高速整流ダイオード(Fast Recovery Diodes:FRD)が並列接続されている。並列接続されているIGBTとFRDには、スイッチング動作での極短時間の遷移状態を除けば、その両方に電流が流れることは無い。更に、当該インバータが、電動機を力行状態にしているときは主にIGBTに電流が流れ、電動機を回生状態にしているときは主にFRDに電流が流れる。
このため、例えば、第1半導体素子11をIGBT、第2半導体素子12をFRDとすると、第1半導体素子11及び第2半導体素子12のそれぞれの裏面電極は同電位になり、それぞれの上面電極も同電位になる。
When the power converter 10 is, for example, a three-phase inverter, for example, the switch circuit 33 that performs power conversion has an IGBT connected to a high speed rectifier diode (FRD) in parallel. In the IGBT and FRD connected in parallel, current does not flow through both of them except for a transition state of a very short time in the switching operation. Further, when the inverter is in the power running state, the current mainly flows through the IGBT, and when the inverter is in the regenerative state, the current mainly flows through the FRD.
Therefore, for example, if the first semiconductor element 11 is IGBT and the second semiconductor element 12 is FRD, the back electrodes of the first semiconductor element 11 and the second semiconductor element 12 are at the same potential, It becomes the same potential.

これら第1半導体素子11及び第2半導体素子12に同時に大電流が流れ、大きな発熱が生じることは無い。即ち、第1半導体素子11及び第2半導体素子12のそれぞれの上面電極を高熱伝導率接着剤25で接合しているので、電動機を力行駆動している間は、主にIGBTである第1半導体素子11が発熱し、第1半導体素子11の裏面側と主面側の両方から放熱される。このとき、第2半導体素子12の発熱は小さく、第1半導体素子11の温度抑制に悪影響を与えない。また、電動機を回生駆動している間は、主にFRDである第2半導体素子12が発熱し、第2半導体素子12の裏面側と主面側の両方から放熱される。このとき、第1半導体素子11の発熱は小さく、第2半導体素子12の温度抑制に悪影響を与えない。   A large current flows through the first semiconductor element 11 and the second semiconductor element 12 at the same time, and no significant heat is generated. That is, since the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12 are joined by the high thermal conductivity adhesive 25, the first semiconductor which is mainly an IGBT while the motor is driven by powering. The element 11 generates heat and is radiated from both the back surface side and the main surface side of the first semiconductor element 11. At this time, the heat generation of the second semiconductor element 12 is small and does not adversely affect the temperature suppression of the first semiconductor element 11. Further, during the regenerative drive of the electric motor, the second semiconductor element 12 which is mainly FRD generates heat and is radiated from both the back surface side and the main surface side of the second semiconductor element 12. At this time, the heat generation of the first semiconductor element 11 is small and does not adversely affect the temperature suppression of the second semiconductor element 12.

よって、第13の効果として、第1半導体素子11と第2半導体素子12が上下に積層された状態であるが、大きな発熱を生じる素子は1個であり、その発熱も上下に放熱することができる。従って、第1半導体素子11と第2半導体素子12同士の熱が加わって過剰に発熱させてしまう虞もない。また、第1半導体素子11と第2半導体素子12の上面電極が同電位であることにより、間に熱抵抗となる絶縁材料を必ずしも介在させる必要が無い。
このため、第1半導体素子11と第2半導体素子12の間は低熱抵抗で熱結合することができる。更に、第1半導体素子11と第2半導体素子12と放熱器17と放熱器18の間の熱結合は、従来通り、第1半導体素子11と第2半導体素子12の裏面側を絶縁層21を介して実装することにより行われており、この部分の熱結合を、十分、且つ、確実に行なうことは困難では無い。
Therefore, as a thirteenth effect, the first semiconductor element 11 and the second semiconductor element 12 are stacked one above the other, but there is one element that generates a large amount of heat, and that heat can also be dissipated up and down. it can. Therefore, there is no possibility that the heat of the first semiconductor element 11 and the second semiconductor element 12 is applied and excessive heat is generated. Further, since the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12 are at the same potential, it is not always necessary to interpose an insulating material that becomes a thermal resistance.
Therefore, the first semiconductor element 11 and the second semiconductor element 12 can be thermally coupled with a low thermal resistance. Furthermore, the thermal coupling between the first semiconductor element 11, the second semiconductor element 12, the radiator 17, and the radiator 18 is performed by using the insulating layer 21 on the back surface side of the first semiconductor element 11 and the second semiconductor element 12 as in the past. It is not difficult to perform sufficient and reliable thermal coupling of this part.

これらにより、第1半導体素子11と第2半導体素子12から生じた熱を上下両方向(表裏両面側)に流して、更に、効率良く冷却することができる。
第14の効果として、上面電極からの放熱に係る熱抵抗を小さくすることができる。第1ワイヤボンディング線24の第1半導体素子11の上面電極に対する高さ、及び第2ワイヤボンディング線31の第2半導体素子12の上面電極に対する高さは、一定ではない。よって、例えば、ワイヤボンディング線を半導体素子の上面電極に接続している部分は、必然的にワイヤボンディング線の位置が低くなる。この部分は、ヒートスプレッダ19の凹部19aも浅くして、ワイヤボンディング線とヒートスプレッダ19の空隙を小さいまま保つことができるので、上面電極からの放熱に係る熱抵抗を、更に小さくすることができる。加えて、半導体素子の冷却を図ることが可能になる。
(第2実施の形態)
As a result, the heat generated from the first semiconductor element 11 and the second semiconductor element 12 can be flowed in both the upper and lower directions (both front and back surfaces), and further efficiently cooled.
As a fourteenth effect, the thermal resistance related to heat radiation from the upper surface electrode can be reduced. The height of the first wire bonding line 24 relative to the upper surface electrode of the first semiconductor element 11 and the height of the second wire bonding line 31 relative to the upper surface electrode of the second semiconductor element 12 are not constant. Therefore, for example, in the portion where the wire bonding line is connected to the upper surface electrode of the semiconductor element, the position of the wire bonding line is inevitably lowered. In this portion, the concave portion 19a of the heat spreader 19 can also be made shallow so that the gap between the wire bonding line and the heat spreader 19 can be kept small, so that the thermal resistance related to heat radiation from the upper surface electrode can be further reduced. In addition, the semiconductor element can be cooled.
(Second Embodiment)

図6は、この発明の第2実施の形態に係る電力変換装置の各部断面構造を示す図5と同様の、(a)はB−B線に沿う断面説明図、(b)はC−C線に沿う断面説明図、(c)はD−D線に沿う断面説明図、(d)はE−E線に沿う断面説明図である。
図6に示すように、電力変換装置35は、第1半導体素子11及び第2半導体素子12を覆うヒートスプレッダ36を有している。つまり、ヒートスプレッダ36は、全周囲に、ヒートスプレッダ36の上面側である第1半導体素子11側に突出し、先端が第1半導体素子11の側方に位置して第1基板13側面に達する、突出壁部37を有している。第2半導体素子12側にも同様に、全周囲に、第2半導体素子12側に突出し、先端が第2半導体素子12の側方に位置して第2基板14側面に達する、突出壁部(図示しない)を有している。
6 is similar to FIG. 5 showing the cross-sectional structure of each part of the power conversion device according to the second embodiment of the present invention, (a) is a cross-sectional explanatory view along the line BB, (b) is CC Sectional explanatory drawing which follows a line, (c) is sectional explanatory drawing which follows a DD line, (d) is sectional explanatory drawing which follows an EE line.
As illustrated in FIG. 6, the power conversion device 35 includes a heat spreader 36 that covers the first semiconductor element 11 and the second semiconductor element 12. That is, the heat spreader 36 protrudes to the first semiconductor element 11 side, which is the upper surface side of the heat spreader 36, and has a tip that is located on the side of the first semiconductor element 11 and reaches the side surface of the first substrate 13. A portion 37 is provided. Similarly, on the second semiconductor element 12 side, a protruding wall portion (projecting toward the second semiconductor element 12 side and extending to the side of the second substrate 14 at the side of the second semiconductor element 12) (Not shown).

また、図6(a)に示すように、第1半導体素子11側の突出壁部37の、第1ワイヤボンディング線24が引き出される側には、第1ワイヤボンディング線24を引き出すための配線口37aが切り欠かれている。
その他の構成及び作用は、第1実施の形態のヒートスプレッダ19と同様である。
なお、電力変換装置35は、第1半導体素子11側の第1構成体と、第1構成体に対応する、第2半導体素子12側の第2構成体とが、ヒートスプレッダ36を挟んで対向配置された構造を有しており、第1構成体における構成及び効果について説明したことは、第2構成体についても同様に適用される。
Further, as shown in FIG. 6A, on the side of the protruding wall portion 37 on the first semiconductor element 11 side where the first wire bonding line 24 is drawn, a wiring port for drawing out the first wire bonding line 24 is provided. 37a is cut away.
Other configurations and operations are the same as those of the heat spreader 19 of the first embodiment.
In the power conversion device 35, the first structure on the first semiconductor element 11 side and the second structure on the second semiconductor element 12 side corresponding to the first structure are opposed to each other with the heat spreader 36 interposed therebetween. What has been described and the description of the configuration and effects of the first structure is similarly applied to the second structure.

上記構成を有することにより、電力変換装置35は、第1実施の形態に係る電力変換装置10によって得られる効果に加え、以下の効果も得ることができる。
第1の効果として、電力変換装置35の製造工程において、ヒートスプレッダ36を、半導体素子(第1半導体素子11と第2半導体素子12)の上面、即ち、ヒートスプレッダ36側面に合わせる位置合わせが容易になる。
By having the said structure, in addition to the effect acquired by the power converter device 10 which concerns on 1st Embodiment, the power converter device 35 can also acquire the following effects.
As a first effect, in the manufacturing process of the power conversion device 35, it is easy to align the heat spreader 36 with the upper surface of the semiconductor element (the first semiconductor element 11 and the second semiconductor element 12), that is, the side surface of the heat spreader 36. .

つまり、ヒートスプレッダ36の上下両面に形成されたそれぞれの凹部19a,(図示しない)を、第1ワイヤボンディング線24及び第2ワイヤボンディング線31へ嵌め込む際、嵌め込み部分が必ずしも容易に目視することができる形状であるとは限らないが、ヒートスプレッダ36の突出壁部37を第1半導体素子11と第2半導体素子12の各端部に合わせることで、ヒートスプレッダ36の一方の凹部19aに第1ワイヤボンディング線24を、他方の凹部(図示しない)に第2ワイヤボンディング線31を、容易に嵌め込むことができる。
ここで、ヒートスプレッダ36を、第1半導体素子11と第2半導体素子12の形状に基づいて、突出壁部37や凹部19aの寸法・間隔を決定して形成することは容易にできる。
In other words, when the respective recesses 19a (not shown) formed on the upper and lower surfaces of the heat spreader 36 are fitted into the first wire bonding line 24 and the second wire bonding line 31, the fitted part is not necessarily visually observed. The shape of the heat spreader 36 is not necessarily a shape that can be formed, but by aligning the protruding wall portion 37 of the heat spreader 36 with each end of the first semiconductor element 11 and the second semiconductor element 12, the first wire bonding is performed on one recess 19 a of the heat spreader 36. The second wire bonding line 31 can be easily fitted into the wire 24 and the other recess (not shown).
Here, it is possible to easily form the heat spreader 36 by determining the dimensions and intervals of the protruding wall portions 37 and the recessed portions 19 a based on the shapes of the first semiconductor element 11 and the second semiconductor element 12.

なお、高熱伝導率接着剤25として、絶縁性を備えた材料を用いれば、ヒートスプレッダ41と、第1半導体素子11及び第2半導体素子12の端部や、第1半導体素子11及び第2半導体素子12を実装している第1基板13及び第2基板14との間も、容易に電気絶縁状態にすることができる。
第2の効果として、第1半導体素子11及び第2半導体素子12の各上面電極からヒートスプレッダ36の突出壁部37を介して、第1半導体素子11を実装している第1基板13から第1放熱器17に放熱することもできる。
If an insulating material is used as the high thermal conductivity adhesive 25, the heat spreader 41, the end portions of the first semiconductor element 11 and the second semiconductor element 12, and the first semiconductor element 11 and the second semiconductor element are used. 12 can also be easily electrically insulated from the first substrate 13 and the second substrate 14 on which 12 is mounted.
As a second effect, the first semiconductor element 11 is mounted on the first semiconductor element 11 through the protruding wall portion 37 of the heat spreader 36 from the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12. Heat can be radiated to the radiator 17.

つまり、第1放熱器17が実際に冷却に寄与しているのは、主に第1半導体素子11の下部分、即ち、第1基板13側部分である。本構成により、従来、第1放熱器17が冷却に大きく寄与しなかった、第1半導体素子11周辺部分も、その周辺部分の周囲に突出壁部37が位置することにより、突出壁部37を介して、第1半導体素子11周辺部分の冷却に第1放熱器17を活用することができる。更に、電力変換装置の構造の都合上、第2放熱器18を用いない場合でも、第1放熱器17のみを活用して、第1半導体素子11と第2半導体素子12のそれぞれの上面電極からも放熱することができる。このことは、第2放熱器18が配置された側についても同様である。
これにより、上述した電力変換装置を、更に、容易に形成することができると共に、冷却性能を一層向上させることができる。
(第3実施の形態)
That is, the first radiator 17 actually contributes to cooling mainly in the lower part of the first semiconductor element 11, that is, the first substrate 13 side part. With this configuration, the peripheral portion of the first semiconductor element 11, which has conventionally not greatly contributed to the cooling by the first radiator 17, is also provided with the protruding wall portion 37 around the peripheral portion. Accordingly, the first radiator 17 can be used for cooling the peripheral portion of the first semiconductor element 11. Furthermore, for the convenience of the structure of the power conversion device, even when the second radiator 18 is not used, only the first radiator 17 is used and the upper surface electrodes of the first semiconductor element 11 and the second semiconductor element 12 are used. Can also dissipate heat. The same applies to the side where the second radiator 18 is disposed.
Thereby, while being able to form the power converter mentioned above more easily, cooling performance can be improved further.
(Third embodiment)

図7は、この発明の第3実施の形態に係る電力変換装置の構成を示す断面説明図である。図8は、図7のA−A線に沿う断面説明図である。図9は、図8のXから見た側面説明図である。図10は、図7のB−B線に沿う断面説明図である。図11は、図7のC−C線に沿う断面説明図である。
図7から図11に示すように、電力変換装置40は、ヒートスプレッダ41、配線パターン42及びゲート配線接続端子43を有している(図7,9,10参照)。ヒートスプレッダ41は、突出壁部37が形成されたヒートスプレッダ36と同様の構成(図11参照)を有するのに加え、ヒートスプレッダ41の上下両端面を貫通する貫通電極41a(図8〜10参照)を有している。
FIG. 7 is a cross-sectional explanatory view showing the configuration of the power converter according to the third embodiment of the present invention. FIG. 8 is a cross-sectional explanatory view taken along the line AA of FIG. FIG. 9 is an explanatory side view as seen from X in FIG. FIG. 10 is a cross-sectional explanatory view taken along line BB in FIG. FIG. 11 is a cross-sectional explanatory view taken along the line CC of FIG.
As shown in FIGS. 7 to 11, the power converter 40 includes a heat spreader 41, a wiring pattern 42, and a gate wiring connection terminal 43 (see FIGS. 7, 9, and 10). The heat spreader 41 has the same configuration (see FIG. 11) as the heat spreader 36 in which the protruding wall portion 37 is formed (see FIG. 11), and also has a through electrode 41a (see FIGS. 8 to 10) penetrating the upper and lower end faces of the heat spreader 41. doing.

ヒートスプレッダ41の一面側(第1半導体素子11側)主面に設けられた、制御信号線の配線パターン42は、ゲート電極接続線42aを介して、第1半導体素子11の制御端子27と電気的に接続し、ヒートスプレッダ41の端部近傍に設けたゲート配線接続端子43を、貫通電極41aを介して、配線パターン42と電気的に接続する(図9,10参照)。なお、貫通電極41aは、その周囲を絶縁部材により形成し、ヒートスプレッダ41との絶縁を図っている。また、貫通電極41aを介さずに、直接、ゲート配線接続端子43と配線パターン42を接続しても良い。
その他の構成及び作用は、第2実施の形態の電力変換装置35(図6参照)と同様である。
The control signal line wiring pattern 42 provided on the main surface of the heat spreader 41 on one side (the first semiconductor element 11 side) is electrically connected to the control terminal 27 of the first semiconductor element 11 via the gate electrode connection line 42a. The gate wiring connection terminal 43 provided in the vicinity of the end of the heat spreader 41 is electrically connected to the wiring pattern 42 through the through electrode 41a (see FIGS. 9 and 10). Note that the through electrode 41 a is formed with an insulating member around the through electrode 41 a so as to be insulated from the heat spreader 41. Further, the gate wiring connection terminal 43 and the wiring pattern 42 may be directly connected without using the through electrode 41a.
Other configurations and operations are the same as those of the power conversion device 35 (see FIG. 6) of the second embodiment.

なお、電力変換装置40は、第1半導体素子11側の第1構成体と、第1構成体に対応する、第2半導体素子12側の第2構成体とが、ヒートスプレッダ41を挟んで対向配置された構造を有しており、第1構成体における構成及び効果について説明したことは、第2構成体についても同様に適用される。
上記構成を有することにより、電力変換装置40は、第2実施の形態に係る電力変換装置35によって得られる効果に加え、以下の効果も得ることができる。
In the power conversion device 40, the first structure on the first semiconductor element 11 side and the second structure on the second semiconductor element 12 side corresponding to the first structure are opposed to each other with the heat spreader 41 interposed therebetween. What has been described and the description of the configuration and effects of the first structure is similarly applied to the second structure.
By having the said structure, in addition to the effect acquired by the power converter device 35 which concerns on 2nd Embodiment, the power converter device 40 can also acquire the following effects.

第1の効果として、制御端子(例えば、ゲート電極)27の接続に係るスペースを著しく小さくすることができる。第1半導体素子11の横にゲート配線基板20(図1参照)を配置した場合、そのゲート配線基板20に対しゲート接続線26を接続していたため、ゲート配線基板20自体の大きさや、ゲート配線基板20と半導体素子等が干渉するのを防ぐための空間分だけ電力変換装置が大型化してしまっていた。
本構成では、第1半導体素子11の上側に、ヒートスプレッダ41を活用してゲート配線基板20を配置することができるため、投影面積でみた場合に、ゲート配線基板20を配置するために用意しなければならないスペースを殆ど無くすことができる。これにより、電力変換装置を、更に、小型化することができる。
As a first effect, a space related to the connection of the control terminal (for example, the gate electrode) 27 can be remarkably reduced. When the gate wiring substrate 20 (see FIG. 1) is disposed beside the first semiconductor element 11, the gate connection line 26 is connected to the gate wiring substrate 20, so that the size of the gate wiring substrate 20 itself, the gate wiring, The power converter has been increased in size by a space for preventing the substrate 20 and the semiconductor element from interfering with each other.
In this configuration, since the gate wiring substrate 20 can be arranged on the upper side of the first semiconductor element 11 by using the heat spreader 41, it is necessary to prepare for arranging the gate wiring substrate 20 in terms of the projected area. Most of the necessary space can be eliminated. Thereby, a power converter device can be further reduced in size.

第2の効果として、電力変換装置40の電気的動作を、更に、安定化させることができる。制御端子27を有する第1半導体素子11としてIGBTを例に挙げると、一般にエミッタ電位に対してゲート電位を定めることにより、電気的なオン・オフ動作をさせる。このエミッタ電位は、即ち、第1上面電極(エミッタ電極)23の電位である。本構成においては、ヒートスプレッダ41を、喩え、高熱伝導率接着剤25として絶縁性を備えた材料を用いたとしても、第1ワイヤボンディング線24の一部に接触すると見なせる。よって、エミッタ電位と同電位になるヒートスプレッダ41上に、ゲート配線基板20を配置することができる。   As a second effect, the electrical operation of the power conversion device 40 can be further stabilized. Taking an IGBT as an example of the first semiconductor element 11 having the control terminal 27, an electric on / off operation is generally performed by determining a gate potential with respect to an emitter potential. This emitter potential is the potential of the first upper surface electrode (emitter electrode) 23. In this configuration, the heat spreader 41 can be regarded as contacting a part of the first wire bonding line 24 even if a material having an insulating property is used as the high thermal conductivity adhesive 25. Therefore, the gate wiring substrate 20 can be disposed on the heat spreader 41 having the same potential as the emitter potential.

以上により、ヒートスプレッダ41がシールド材として機能するため、ノイズ等によるゲート電位への悪影響を防ぐと共に、ゲート配線がエミッタ電位を有する金属体と容量結合できることにより、IGBT等の半導体素子に与えるゲート電位を、更に、安定化させることができる。   As described above, since the heat spreader 41 functions as a shield material, the gate potential applied to a semiconductor element such as an IGBT can be reduced by preventing adverse effects on the gate potential due to noise and the like, and allowing the gate wiring to be capacitively coupled to a metal body having an emitter potential. Furthermore, it can be stabilized.

第3の効果として、第1半導体素子11の上面に湿気等が侵入することを容易に防止することができる。従来、湿気等の侵入を防止するためには、第1半導体素子11の上面側を全て覆うようにゲル剤等を流し込み、熱硬化させていた。このため、製造工程が増えて製造コストの上昇が避けられなかった。本構成では、第1半導体素子11の上面側を、第1上面電極23や制御端子27及び制御端子27の接続線(ゲート電極接続線42aや配線パターン42)や回路基板部分も含めて、接着剤で容易に覆うことができる。よって、製造工程が増えることなく、湿気等の侵入を容易に防止することができる。
(第4実施の形態)
As a third effect, moisture or the like can be easily prevented from entering the upper surface of the first semiconductor element 11. Conventionally, in order to prevent intrusion of moisture or the like, a gel agent or the like is poured so as to cover the entire upper surface side of the first semiconductor element 11 and is thermally cured. For this reason, the manufacturing process increased and the increase in manufacturing cost was inevitable. In this configuration, the upper surface side of the first semiconductor element 11 is bonded to the first upper surface electrode 23, the control terminal 27, the connection line (gate electrode connection line 42 a and the wiring pattern 42) of the control terminal 27, and the circuit board portion. Can be easily covered with an agent. Therefore, entry of moisture and the like can be easily prevented without increasing the number of manufacturing steps.
(Fourth embodiment)

図12は、この発明の第4実施の形態に係る電力変換装置の構成を示す断面説明図である。図13は、図12のB−B線に沿う断面説明図である。図14は、図12のC−C線に沿う断面説明図である。
図12から図14に示すように、電力変換装置45は、第3実施の形態に係る電力変換装置40のヒートスプレッダ41と同様のヒートスプレッダ46を有しており(図4参照)、電力変換装置40の第1半導体素子11と同様の第1半導体素子47及び第3半導体素子49、第2半導体素子12と同様の第2半導体素子48及び第4半導体素子50の、4個の半導体素子を有している(図12,13参照)。
FIG. 12 is a cross-sectional explanatory view showing the configuration of the power converter according to the fourth embodiment of the present invention. FIG. 13 is a cross-sectional explanatory view taken along line BB in FIG. FIG. 14 is a cross-sectional explanatory view taken along the line CC of FIG.
As shown in FIGS. 12 to 14, the power conversion device 45 includes a heat spreader 46 similar to the heat spreader 41 of the power conversion device 40 according to the third embodiment (see FIG. 4). There are four semiconductor elements: a first semiconductor element 47 and a third semiconductor element 49 similar to the first semiconductor element 11, and a second semiconductor element 48 and a fourth semiconductor element 50 similar to the second semiconductor element 12. (See FIGS. 12 and 13).

そして、第1放熱器17側に、第1半導体素子47に加えて第4半導体素子50が、第2放熱器18側に、第2半導体素子48に加えて第3半導体素子49が、それぞれ実装されている。つまり、第1半導体素子47に対向する第2基板14の位置に、第1半導体素子47と同一の電気的動作を行わない第2半導体素子48が、第3半導体素子49に対向する第1基板13の位置に、第3半導体素子49と同一の電気的動作を行わない第4の半導体素子50が、それぞれ配置されている。   A fourth semiconductor element 50 is mounted on the first radiator 17 side in addition to the first semiconductor element 47, and a third semiconductor element 49 is mounted on the second radiator 18 side in addition to the second semiconductor element 48, respectively. Has been. In other words, the second semiconductor element 48 that does not perform the same electrical operation as the first semiconductor element 47 at the position of the second substrate 14 facing the first semiconductor element 47 is the first substrate facing the third semiconductor element 49. The fourth semiconductor element 50 that does not perform the same electrical operation as the third semiconductor element 49 is disposed at the position 13.

また、電力変換装置45は、ヒートスプレッダ46と共に、配線パターン42と同様の第1配線パターン51をヒートスプレッダ46の一面側に、第2配線パターン52をヒートスプレッダ46の他面側に、それぞれ有している。そして、第1半導体素子47の制御端子47aは、第1ゲート電極接続線51aを介して第1配線パターン51に、第3半導体素子49の制御端子49aは、第2ゲート電極接続線52aを介して第2配線パターン52に、それぞれ電気的に接続されている。
更に、第1配線パターン51と第2配線パターン52を、ヒートスプレッダ46の上下両端面を貫通する貫通電極46aを介して、ヒートスプレッダ46の端部近傍に設けたゲート配線接続端子(図示せず)に接続する。
In addition, the power conversion device 45 has a first wiring pattern 51 similar to the wiring pattern 42 together with the heat spreader 46 on one surface side of the heat spreader 46 and a second wiring pattern 52 on the other surface side of the heat spreader 46. . The control terminal 47a of the first semiconductor element 47 is connected to the first wiring pattern 51 via the first gate electrode connection line 51a, and the control terminal 49a of the third semiconductor element 49 is connected via the second gate electrode connection line 52a. The second wiring patterns 52 are electrically connected to each other.
Further, the first wiring pattern 51 and the second wiring pattern 52 are connected to a gate wiring connection terminal (not shown) provided in the vicinity of the end of the heat spreader 46 through the through electrodes 46a that penetrate the upper and lower end faces of the heat spreader 46. Connecting.

その他の構成及び作用は、第3実施の形態に係る電力変換装置40(図7〜11参照)と同様である。
なお、電力変換装置45は、第1半導体素子11側の第1構成体と、第1構成体に対応する、第2半導体素子12側の第2構成体とが、ヒートスプレッダ46を挟んで対向配置された構造を有しており、第1構成体における構成及び効果について説明したことは、第2構成体についても同様に適用される。
上記構成を有することにより、電力変換装置45は、第3実施の形態に係る電力変換装置40によって得られる効果に加え、以下の効果も得ることができる。
Other configurations and operations are the same as those of the power conversion device 40 (see FIGS. 7 to 11) according to the third embodiment.
In the power conversion device 45, the first structure on the first semiconductor element 11 side and the second structure on the second semiconductor element 12 side corresponding to the first structure are opposed to each other with the heat spreader 46 interposed therebetween. What has been described and the description of the configuration and effects of the first structure is similarly applied to the second structure.
By having the said structure, in addition to the effect acquired by the power converter device 40 which concerns on 3rd Embodiment, the power converter device 45 can also acquire the following effects.

この実施の形態に係る電力変換装置45にあっては、大容量化するために半導体素子としてIGBTとFRDを複数個ずつ並列に接続しており、第1半導体素子47と第3半導体素子49をIGBT、第2半導体素子48と第4半導体素子50をFRDとする。
第1の効果として、冷却性能の更なる向上を図ることができる。複数のIGBT47,49は、電気的に同一に動作し同時に発熱するため、IGBTのすぐ横に他のIGBTを配置すると、お互いの熱流が干渉して、更に、素子温度を上昇させてしまう。これは、FRDも同様である。本構成においては、複数のIGBTとFRDを並列させる場合でも、素子間隔を必要以上に開けることなく、IGBTの横に近接してFRDを配置することができるため、電気的に同一に動作する半導体素子同士が熱干渉することを防止して、半導体素子の冷却性能を、更に、向上させることができる。
In the power conversion device 45 according to this embodiment, a plurality of IGBTs and FRDs are connected in parallel as semiconductor elements in order to increase the capacity, and the first semiconductor element 47 and the third semiconductor element 49 are connected. The IGBT, the second semiconductor element 48 and the fourth semiconductor element 50 are FRD.
As a first effect, the cooling performance can be further improved. The plurality of IGBTs 47 and 49 operate in the same electrical manner and generate heat at the same time. Therefore, if another IGBT is arranged immediately next to the IGBT, the mutual heat flow interferes, and the element temperature is further increased. The same applies to FRD. In this configuration, even when a plurality of IGBTs and FRDs are arranged in parallel, the FRDs can be arranged close to the side of the IGBT without unnecessarily increasing the element spacing. It is possible to prevent the elements from interfering with each other and further improve the cooling performance of the semiconductor element.

第2の効果として、半導体素子の実装投影面積を削減することができる。一般に同じ電流容量の場合、IGBTの方がFRDよりも大型であることから、同一平面上に複数のIGBTとFRDを配置すると、IGBTとFRDの大きさの違いにより無駄なスペースが生じ易い。本構成では、第1半導体素子47としてIGBTを、その上面側にヒートスプレッダ46を挟んで第2半導体素子48としてFRDを、それぞれ配置する。そして、このFRDの横並びに第3半導体素子49としてIGBTを、第1半導体素子47の横並びに第4半導体素子50としてFRDを、それぞれ実装配置する。   As a second effect, the mounting projected area of the semiconductor element can be reduced. In general, in the case of the same current capacity, the IGBT is larger than the FRD. Therefore, if a plurality of IGBTs and FRDs are arranged on the same plane, a wasteful space is likely to be generated due to the difference in the sizes of the IGBTs and FRDs. In this configuration, an IGBT is disposed as the first semiconductor element 47, and an FRD is disposed as the second semiconductor element 48 with the heat spreader 46 interposed therebetween on the upper surface side. Then, an IGBT is mounted and arranged beside the FRD and the third semiconductor element 49, and an FRD beside the first semiconductor element 47 and the fourth semiconductor element 50.

第2半導体素子48と第3半導体素子49は、前述した第1の効果により、近接配置しても素子温度を上昇させず、第1半導体素子47と第4半導体素子50も同様に、近接配置しても素子温度を上昇させない。この結果、各半導体素子を近接配置することにより、半導体素子の温度上昇を抑えつつ、第1半導体素子47としてのIGBTの上面側の一部に、第3半導体素子49としてのIGBTの端部がかかる程度まで近づけることができ、容易に高密度配置することができる。
これにより、半導体素子の温度上昇を抑えつつ、投影面積で見て各半導体素子の端部が重なった状態まで近づける高密度配置が容易に可能になるため、電力変換装置を、更に、小型化することができる。
(第5実施の形態)
Due to the above-described first effect, the second semiconductor element 48 and the third semiconductor element 49 do not increase the element temperature even if they are arranged close to each other, and the first semiconductor element 47 and the fourth semiconductor element 50 are similarly arranged close to each other. However, the element temperature is not increased. As a result, by arranging the semiconductor elements close to each other, an end portion of the IGBT as the third semiconductor element 49 is formed on a part of the upper surface side of the IGBT as the first semiconductor element 47 while suppressing the temperature rise of the semiconductor element. It can be close to such a degree, and can be easily arranged in high density.
As a result, it is possible to easily arrange a high-density arrangement in which the end portions of the respective semiconductor elements overlap each other when viewed from the projected area while suppressing the temperature rise of the semiconductor elements, thereby further reducing the size of the power conversion device. be able to.
(Fifth embodiment)

図15は、この発明の第5実施の形態に係る電力変換装置の構成を示す断面説明図である。図16は、図15のヒートスプレッダの主面形状の平面説明図である。
図15,16に示すように、電力変換装置55は、第4実施の形態に係る電力変換装置45のヒートスプレッダ46に代えて、主面上に更にワイヤボンディング線を接続したヒートスプレッダ56を有している。ヒートスプレッダ56は、主面上に、第1ワイヤボンディング線24及び第2ワイヤボンディング線31に加えて、第3ワイヤボンディング線57及び第4ワイヤボンディング線58を接続することにより、恰も突部と凹部を有するヒートスプレッダ形状としている。
FIG. 15 is a cross-sectional explanatory view showing the configuration of the power converter according to the fifth embodiment of the present invention. FIG. 16 is an explanatory plan view of the main surface shape of the heat spreader of FIG.
As shown in FIGS. 15 and 16, the power converter 55 includes a heat spreader 56 in which wire bonding lines are further connected on the main surface instead of the heat spreader 46 of the power converter 45 according to the fourth embodiment. Yes. The heat spreader 56 connects the third wire bonding line 57 and the fourth wire bonding line 58 in addition to the first wire bonding line 24 and the second wire bonding line 31 on the main surface, so that the protrusions and the recesses are also formed. It has a heat spreader shape having

即ち、ヒートスプレッダ56の主面の一面側(第1基板13側)に、第3ワイヤボンディング線57を、第1ワイヤボンディング線24と略平行に(図15参照)、且つ、半導体素子の上面電極が接合される領域を覆うように配置して、複数本設ける。また、ヒートスプレッダ56の主面の他面側(第2基板14側)に、第4ワイヤボンディング線58を、第2ワイヤボンディング線31と略並行に(図15参照)、且つ、半導体素子の上面電極が接合される領域Sを覆うように配置して複数本設ける(図16参照)。
これにより、第3ワイヤボンディング線57及び第4ワイヤボンディング線58が、第4実施の形態で示したヒートスプレッダ46の突部と同様な形状となる。また、第3ワイヤボンディング線57の間及び第4ワイヤボンディング線58の間の各空間が、それぞれ第4実施の形態に示すヒートスプレッダ46の溝部と同様な形状となる。
That is, the third wire bonding line 57 is arranged on one side (first substrate 13 side) of the main surface of the heat spreader 56 so as to be substantially parallel to the first wire bonding line 24 (see FIG. 15), and the upper surface electrode of the semiconductor element. A plurality of them are provided so as to cover a region where the layers are joined. Further, a fourth wire bonding wire 58 is provided on the other surface side (second substrate 14 side) of the main surface of the heat spreader 56 substantially in parallel with the second wire bonding wire 31 (see FIG. 15), and the upper surface of the semiconductor element. A plurality of electrodes are provided so as to cover the region S to which the electrodes are bonded (see FIG. 16).
Thereby, the 3rd wire bonding line 57 and the 4th wire bonding line 58 become the shape similar to the protrusion of the heat spreader 46 shown in 4th Embodiment. Further, the spaces between the third wire bonding lines 57 and the fourth wire bonding lines 58 have the same shape as the grooves of the heat spreader 46 shown in the fourth embodiment.

その他の構成及び作用は、第4実施の形態と同様である。
なお、電力変換装置55は、第1半導体素子11側の第1構成体と、第1構成体に対応する、第2半導体素子12側の第2構成体とが、ヒートスプレッダ56を挟んで対向配置された構造を有しており、第1構成体における構成及び効果について説明したことは、第2構成体についても同様に適用される。
また、上記説明では、第4実施の形態に係る電力変換装置45に第3ワイヤボンディング線57及び第4ワイヤボンディング線58を付加する構成として説明したが、第1実施の形態から第3実施の形態に係る電力変換装置に対しても、同様に、第3ワイヤボンディング線57及び第4ワイヤボンディング線58を付加する構成としてもよい。
Other configurations and operations are the same as those in the fourth embodiment.
In the power conversion device 55, the first structure on the first semiconductor element 11 side and the second structure on the second semiconductor element 12 side corresponding to the first structure are opposed to each other with the heat spreader 56 interposed therebetween. What has been described and the description of the configuration and effects of the first structure is similarly applied to the second structure.
In the above description, the power conversion device 45 according to the fourth embodiment has been described as the configuration in which the third wire bonding line 57 and the fourth wire bonding line 58 are added, but the first to third embodiments are described. Similarly, the third wire bonding line 57 and the fourth wire bonding line 58 may be added to the power converter according to the embodiment.

上記構成を有することにより、電力変換装置55は、第4実施の形態に係る電力変換装置45によって得られる効果に加え、以下の効果も得ることができる。
主面の一面側と他面側のそれぞれに凹部と突部を有するヒートスプレッダを、更に、容易に形成することができる。これによって、電力変換装置の製造コストを、更に低減することができる。即ち、第3ワイヤボンディング線57及び第4ワイヤボンディング線58を、第1〜4実施の形態の各ヒートスプレッダの突部として、半導体素子の上面電極を経ての熱伝導に寄与させることができる。
By having the said structure, in addition to the effect acquired by the power converter device 45 which concerns on 4th Embodiment, the power converter device 55 can also acquire the following effects.
A heat spreader having recesses and protrusions on one side and the other side of the main surface can be further easily formed. Thereby, the manufacturing cost of a power converter device can further be reduced. That is, the third wire bonding line 57 and the fourth wire bonding line 58 can contribute to heat conduction through the upper surface electrode of the semiconductor element as the protrusions of the heat spreaders of the first to fourth embodiments.

また、第3ワイヤボンディング線57及び第4ワイヤボンディング線58の間のヒートスプレッダ56部分が、第1〜4実施の形態の各ヒートスプレッダの凹部、即ち、溝部と同様に、第1ワイヤボンディング線24及び第2ワイヤボンディング線31を介しての熱伝導に寄与させることができる。
よって、ヒートスプレッダ56として、微細な凹凸加工を施す必要が無く、従来の一般的な技術であるワイヤボンディング線接続により、同様な効果を得ることができる。この結果、電力変換装置の製造コストを、更に低減することができる。
(第6実施の形態)
Further, the heat spreader 56 portion between the third wire bonding line 57 and the fourth wire bonding line 58 is the same as the first wire bonding line 24 and the recess of each heat spreader of the first to fourth embodiments, that is, the groove part. The heat conduction through the second wire bonding line 31 can be contributed.
Therefore, the heat spreader 56 does not need to be subjected to fine uneven processing, and the same effect can be obtained by wire bonding line connection which is a conventional general technique. As a result, the manufacturing cost of the power conversion device can be further reduced.
(Sixth embodiment)

図17は、この発明の第6実施の形態に係る電力変換装置の構成を示す断面説明図である。図17に示すように、電力変換装置60は、第4実施の形態に係る電力変換装置45のヒートスプレッダ46に代えて、第1ヒートスプレッダ61と第2ヒートスプレッダ62の二つのヒートスプレッダを有している。
つまり、第1ヒートスプレッダ61は、一面側に第1半導体素子47及び第4半導体素子50を、他面側に第2半導体素子48及び第3半導体素子49を、それぞれ入り込ませることができる溝状の凹部61aを有し、第2ヒートスプレッダ62は、平板状基部の一方の面から略直交して突出する壁状部を並設したフィン部62aを有している。
FIG. 17 is a cross-sectional explanatory view showing the configuration of the power converter according to the sixth embodiment of the present invention. As illustrated in FIG. 17, the power conversion device 60 includes two heat spreaders, a first heat spreader 61 and a second heat spreader 62, instead of the heat spreader 46 of the power conversion device 45 according to the fourth embodiment.
That is, the first heat spreader 61 has a groove-like shape that allows the first semiconductor element 47 and the fourth semiconductor element 50 to enter one side and the second semiconductor element 48 and the third semiconductor element 49 to enter the other side, respectively. The second heat spreader 62 has a fin portion 62a having juxtaposed wall-like portions protruding substantially orthogonally from one surface of the flat plate-like base portion.

そして、第2ヒートスプレッダ62は、平板状基部を、第1半導体素子47、第2半導体素子48、第3半導体素子49、及び第4半導体素子50の上面電極上に載置し、第1ワイヤボンディング線24及び第2ワイヤボンディング線31の接続部分に対応する位置を開口した形状で実装されると共に、フィン部62aの先端が第1ヒートスプレッダ61の凹部61aに接続している。なお、第2ヒートスプレッダ62の平板状基部は、第1半導体素子47、第2半導体素子48、第3半導体素子49、及び第4半導体素子50の上面電極に高熱伝導率接着剤等で接合しても良い。
その他の構成及び作用は、第4実施の形態に係る電力変換装置45と同様である。
The second heat spreader 62 places the flat base on the upper surface electrodes of the first semiconductor element 47, the second semiconductor element 48, the third semiconductor element 49, and the fourth semiconductor element 50, and performs first wire bonding. The wire 24 and the second wire bonding line 31 are mounted so as to open at positions corresponding to the connecting portions, and the tips of the fin portions 62 a are connected to the recesses 61 a of the first heat spreader 61. The flat base of the second heat spreader 62 is bonded to the upper surface electrodes of the first semiconductor element 47, the second semiconductor element 48, the third semiconductor element 49, and the fourth semiconductor element 50 with a high thermal conductivity adhesive or the like. Also good.
Other configurations and operations are the same as those of the power converter 45 according to the fourth embodiment.

なお、上記説明では、第4実施の形態に係る電力変換装置45のヒートスプレッダ46に代えて第1ヒートスプレッダ61及び第2ヒートスプレッダ62を有する構成として説明したが、第1実施の形態から第3実施の形態に係る電力変換装置に対しても、同様に、ヒートスプレッダに代えて第1ヒートスプレッダ61及び第2ヒートスプレッダ62を有する構成としてもよい。
上記構成を有することにより、電力変換装置60は、第4実施の形態に係る電力変換装置45によって得られる効果に加え、以下の効果も得ることができる。
第1の効果として、更に上面電極側からの放熱に係る熱抵抗を低減することができると共に、ヒートスプレッダ(61,62)を半導体素子(47,48,49,50)の上面電極上に実装することが、更に容易になる。
In the above description, the first heat spreader 61 and the second heat spreader 62 are described in place of the heat spreader 46 of the power converter 45 according to the fourth embodiment, but the first to third embodiments are described. Similarly, the power converter according to the embodiment may be configured to include the first heat spreader 61 and the second heat spreader 62 instead of the heat spreader.
By having the said structure, in addition to the effect obtained by the power converter device 45 which concerns on 4th Embodiment, the power converter device 60 can also acquire the following effects.
As a first effect, it is possible to further reduce the thermal resistance related to heat radiation from the upper surface electrode side, and to mount the heat spreader (61, 62) on the upper surface electrode of the semiconductor element (47, 48, 49, 50). It becomes easier.

この熱抵抗の低減は以下の理由による。本構成によれば、予め、第1半導体素子47、第2半導体素子48、第3半導体素子49、及び第4半導体素子50の各上面電極に、第2ヒートスプレッダ62を高熱伝導率接着剤等で接合した後に、ワイヤボンディング線(24,31)を接続することができる。よって、ワイヤボンディング線(24,31)の下側にも、金属から成る第2ヒートスプレッダ62を配置することができるので、第1ワイヤボンディング線24及び第2ワイヤボンディング線31の下側も、高熱伝導率接着剤より更に低熱抵抗の第2ヒートスプレッダ62を設けることができる。このため、熱抵抗を、更に低減することができる。   This reduction in thermal resistance is due to the following reason. According to this configuration, the second heat spreader 62 is previously applied to the upper surface electrodes of the first semiconductor element 47, the second semiconductor element 48, the third semiconductor element 49, and the fourth semiconductor element 50 with a high thermal conductivity adhesive or the like. After bonding, the wire bonding lines (24, 31) can be connected. Therefore, since the second heat spreader 62 made of metal can be disposed also below the wire bonding lines (24, 31), the lower side of the first wire bonding line 24 and the second wire bonding line 31 is also highly heated. A second heat spreader 62 having a lower thermal resistance than that of the conductive adhesive can be provided. For this reason, thermal resistance can be further reduced.

第2の効果として、実装作業が容易になる。これは以下の理由による。第1半導体素子47、第2半導体素子48、第3半導体素子49、及び第4半導体素子50の各上面電極上に第2ヒートスプレッダ62を実装した後の、第1ヒートスプレッダ61の位置合わせは、第1ヒートスプレッダ61の溝状の凹部61aに、第2ヒートスプレッダ62のフィン部62aの先端部を、単純に嵌め込めば良い。よって、ヒートスプレッダの位置合わせと接合が容易にできる。なお、この接合には、高熱伝導率接着剤を用いれば良い。
更に、第1ワイヤボンディング線24及び第2ワイヤボンディング線31それ自体に、ヒートスプレッダが接触する可能性を排除することができるので、本構成を形成する実装作業において、第1ワイヤボンディング線24及び第2ワイヤボンディング線31に何らかの損傷を与えてしまう虞も無い。
As a second effect, the mounting operation becomes easy. This is due to the following reason. The positioning of the first heat spreader 61 after mounting the second heat spreader 62 on each upper surface electrode of the first semiconductor element 47, the second semiconductor element 48, the third semiconductor element 49, and the fourth semiconductor element 50 is as follows. What is necessary is just to fit the front-end | tip part of the fin part 62a of the 2nd heat spreader 62 in the groove-shaped recessed part 61a of the 1 heat spreader 61 simply. Accordingly, the heat spreader can be easily aligned and joined. Note that a high thermal conductivity adhesive may be used for this bonding.
Further, since the possibility of the heat spreader coming into contact with the first wire bonding line 24 and the second wire bonding line 31 itself can be eliminated, the first wire bonding line 24 and the second wire bonding line 31 in the mounting operation for forming this configuration can be eliminated. There is no risk of any damage to the two-wire bonding line 31.

上述した第1実施の形態から第6実施の形態においては、何れも、主面側に第1半導体素子11と第1放熱器17を配置したヒートスプレッダの他面側に、第2半導体素子12と第2放熱器18を配置する構成として説明した。しかしながら、必ずしもこの配置構成に限るものではない。
図18は、半導体素子と放熱器の配置構成の他の例を示す断面説明図である。図18に示すように、第1放熱器17上に、第1半導体素子11(47)及び第4半導体素子50を配置し、その上面電極の上に、ヒートスプレッダ65を配置する構成、即ち、ヒートスプレッダを挟んでその両面側に半導体素子と放熱器を配置するのではなく、ヒートスプレッダの一面側にのみ半導体素子と放熱器を配置する構成においても、上記各実施の形態で説明した各効果は、第1半導体素子11(47)及び第4半導体素子50に対し同様に得ることができる。
In each of the first to sixth embodiments described above, the second semiconductor element 12 and the second semiconductor element 12 are arranged on the other surface side of the heat spreader in which the first semiconductor element 11 and the first radiator 17 are arranged on the main surface side. It demonstrated as a structure which arrange | positions the 2nd heat radiator 18. FIG. However, the arrangement is not necessarily limited to this.
FIG. 18 is a cross-sectional explanatory view showing another example of the arrangement configuration of the semiconductor element and the heat radiator. As shown in FIG. 18, the first semiconductor element 11 (47) and the fourth semiconductor element 50 are arranged on the first heat radiator 17, and the heat spreader 65 is arranged on the upper surface electrode, that is, the heat spreader. Even in the configuration in which the semiconductor element and the radiator are arranged only on one surface side of the heat spreader, instead of arranging the semiconductor element and the radiator on both sides thereof, the effects described in the above embodiments are as follows. The same can be obtained for the first semiconductor element 11 (47) and the fourth semiconductor element 50.

このように、この発明に係る電力変換装置は、第1放熱器と、前記第1放熱器の主面上に実装した第1基板と、前記第1基板の主面上に実装した第1半導体素子と、前記第1放熱器の主面上或いは前記第1基板の主面上に実装した第1電極と、前記第1半導体素子の上面に配置され、前記第1半導体素子の第1上面電極と前記第1電極を電気的に接続する複数の第1ワイヤボンディング線、及び前記第1上面電極を接触させたヒートスプレッダと、前記ヒートスプレッダの一面側に設けた、前記第1ワイヤボンディング線の間を通って前記第1上面電極に接触又は近接する凸部、及び前記第1ワイヤボンディング線に近接する凹部と、前記ヒートスプレッダの他面側に実装した第2放熱器とを有している。   As described above, the power conversion device according to the present invention includes a first radiator, a first substrate mounted on the main surface of the first radiator, and a first semiconductor mounted on the main surface of the first substrate. An element, a first electrode mounted on a main surface of the first radiator or the main surface of the first substrate, and a first upper surface electrode of the first semiconductor element disposed on an upper surface of the first semiconductor element. A plurality of first wire bonding lines that electrically connect the first electrode, a heat spreader that is in contact with the first upper surface electrode, and the first wire bonding line provided on one surface side of the heat spreader. And a convex portion that contacts or is close to the first upper surface electrode, a concave portion that is close to the first wire bonding line, and a second radiator mounted on the other surface side of the heat spreader.

また、この発明において、前記第2放熱器の主面上に実装した第2基板と、前記第2基板の主面上に実装した第2半導体素子と、前記第2放熱器の主面上或いは前記第2基板の主面上に実装した第2電極と、前記第2半導体素子の第2上面電極と前記第2電極を電気的に接続する複数の第2ワイヤボンディング線を接触させた、前記ヒートスプレッダの他面側に設けた、前記第2ワイヤボンディング線の間を通って前記第2上面電極に接触又は近接する凸部、及び前記第2ワイヤボンディング線に近接する凹部とを有し、前記第1電極と前記第2電極を電気的に接続し、前記第1半導体素子の上面電極と前記第2半導体素子の上面電極が電気的に同一電位であることが好ましい。
また、この発明において、前記第1半導体素子と前記第2半導体素子は、同時に電気的に同一の動作をしない素子同士の組み合わせであることが好ましい。
In the present invention, the second substrate mounted on the main surface of the second radiator, the second semiconductor element mounted on the main surface of the second substrate, and the main surface of the second radiator or A second electrode mounted on a main surface of the second substrate; a second upper surface electrode of the second semiconductor element; and a plurality of second wire bonding lines that electrically connect the second electrode; A convex portion that is provided on the other surface side of the heat spreader and that is in contact with or close to the second upper surface electrode through the second wire bonding line, and a concave portion that is close to the second wire bonding line, Preferably, the first electrode and the second electrode are electrically connected, and the upper surface electrode of the first semiconductor element and the upper surface electrode of the second semiconductor element are electrically at the same potential.
In the present invention, it is preferable that the first semiconductor element and the second semiconductor element are a combination of elements that do not perform the same electrical operation at the same time.

また、この発明において、前記ヒートスプレッダに設けた凹部の、前記ワイヤボンディングと前記上面電極のボンディング接続位置に対応する部分が、ボンディング接続位置に対応しない部分よりも浅く形成されていることが好ましい。
また、この発明において、前記ヒートスプレッダの端部は、ヒートスプレッダ上面側に突出して前記半導体素子の側方に位置することが好ましい。
また、この発明において、前記各半導体素子の制御端子と前記ヒートスプレッダの一面側である主面に設けた配線パターンを、ゲート電極接続線で電気的に接続し、且つ、前記ヒートスプレッダの端部近傍に設けたゲート配線接続端子と前記配線パターンを、電気的に接続することが好ましい。
Moreover, in this invention, it is preferable that the part corresponding to the bonding connection position of the said wire bonding and the said upper surface electrode of the recessed part provided in the said heat spreader is formed shallower than the part which does not correspond to a bonding connection position.
Moreover, in this invention, it is preferable that the edge part of the said heat spreader protrudes in the heat spreader upper surface side, and is located in the side of the said semiconductor element.
Also, in the present invention, the wiring pattern provided on the main surface which is one side of the heat spreader and the control terminal of each semiconductor element is electrically connected by a gate electrode connection line, and in the vicinity of the end of the heat spreader. It is preferable to electrically connect the provided gate wiring connection terminal and the wiring pattern.

また、この発明において、前記第1基板上に実装した、制御端子を有する第1半導体素子と、前記第2基板上に実装した、制御端子を有する第3半導体素子と、前記ヒートスプレッダの一面側に設けた第1配線パターンと前記第1半導体素子の前記制御端子を電気的に接続する第1ゲート電極接続線、及び前記ヒートスプレッダの他面側に設けた第2配線パターンと前記第3半導体素子の前記制御端子を電気的に接続する第2ゲート電極接続線と、前記ヒートスプレッダに設けた、前記第1配線パターンと前記第2配線パターンを前記ヒートスプレッダの端部近傍に設けたゲート配線接続端子に接続する貫通電極と、前記第1半導体素子に対向する位置の前記第2基板上に実装した、前記第1半導体素子と同一の電気的動作を同時に行わない第2半導体素子と、前記第2半導体素子に対向する位置の前記第1基板上に実装した、前記第2半導体素子と同一の電気的動作を同時に行わない第4半導体素子とを有することが好ましい。   In the present invention, a first semiconductor element having a control terminal mounted on the first substrate, a third semiconductor element having a control terminal mounted on the second substrate, and one surface side of the heat spreader A first gate electrode connection line that electrically connects the first wiring pattern provided and the control terminal of the first semiconductor element; and a second wiring pattern provided on the other surface side of the heat spreader and the third semiconductor element. A second gate electrode connection line for electrically connecting the control terminal, and the first wiring pattern and the second wiring pattern provided in the heat spreader are connected to a gate wiring connection terminal provided in the vicinity of the end of the heat spreader. Do not simultaneously perform the same electrical operation as the first semiconductor element mounted on the second substrate at a position facing the through electrode and the first semiconductor element. And second semiconductor elements, mounted on the first substrate at a position opposite to the second semiconductor device, it is preferable that a fourth semiconductor device not to perform the second semiconductor element identical electrical behavior and at the same time.

また、この発明において、前記ヒートスプレッダの一面側に、前記第1ワイヤボンディング線の配線方向に沿って配置し、前記凸部とする第3ワイヤボンディングと、前記ヒートスプレッダの他面側に、前記第2ワイヤボンディング線の配線方向に沿って配置し、前記凸部する第4ワイヤボンディングとを有することが好ましい。
また、この発明において、前記ヒートスプレッダを構成する、一面側と他面側に凹部を有する第1ヒートスプレッダ、及び平板状基部にフィン部を有する第2ヒートスプレッダを有し、前記第2ヒートスプレッダの平板状基部が、前記各半導体素子の上面電極上にワイヤボンディング接続部分に対応する開口形状で実装されると共に、前記フィン部の先端が前記第1ヒートスプレッダの凹部に接続することが好ましい。
In the present invention, the first wire bonding line is arranged on the one surface side of the heat spreader along the wiring direction of the first wire bonding line, and the second wire is used as the convex portion, and the second surface side of the heat spreader is the second surface of the heat spreader. It is preferable to have the 4th wire bonding which arrange | positions along the wiring direction of a wire bonding line, and is the said convex part.
In the present invention, the heat spreader includes a first heat spreader having recesses on one surface side and the other surface side, and a second heat spreader having a fin portion on a flat plate-like base, and the flat plate-like base of the second heat spreader However, it is preferable that the semiconductor device is mounted on the upper surface electrode of each semiconductor element in an opening shape corresponding to the wire bonding connection portion, and the tip of the fin portion is connected to the concave portion of the first heat spreader.

この発明の第1実施の形態に係る電力変換装置の構成を示す断面説明図である。It is a section explanatory view showing the composition of the power converter concerning a 1st embodiment of this invention. 図1のA−A線に沿う断面説明図である。FIG. 2 is a cross-sectional explanatory view taken along line AA in FIG. 1. 図1のヒートスプレッダの裏面側の平面説明図である。It is a plane explanatory view on the back side of the heat spreader of FIG. 図2においてヒートスプレッダを除いた平面説明図である。FIG. 3 is an explanatory plan view excluding a heat spreader in FIG. 2. 図4の各部断面構造を示し、(a)はB−B線に沿う断面説明図、(b)はC−C線に沿う断面説明図、(c)はD−D線に沿う断面説明図、(d)はE−E線に沿う断面説明図である。4A and 4B are cross-sectional explanatory views taken along line BB, FIG. 4B is a cross-sectional explanatory view taken along line CC, and FIG. 4C is a cross-sectional explanatory view taken along line DD. (D) is sectional explanatory drawing which follows the EE line. この発明の第2実施の形態に係る電力変換装置の各部断面構造を示す図5と同様の、(a)はB−B線に沿う断面説明図、(b)はC−C線に沿う断面説明図、(c)はD−D線に沿う断面説明図、(d)はE−E線に沿う断面説明図である。FIG. 5A is a cross-sectional explanatory view taken along the line BB, and FIG. 5B is a cross-sectional view taken along the line CC, similar to FIG. 5 showing the cross-sectional structure of each part of the power conversion device according to the second embodiment of the present invention. Explanatory drawing, (c) is sectional explanatory drawing which follows the DD line, (d) is sectional explanatory drawing which follows the EE line. この発明の第3実施の形態に係る電力変換装置の構成を示す断面説明図である。It is a section explanatory view showing the composition of the power converter concerning a 3rd embodiment of this invention. 図7のA−A線に沿う断面説明図である。FIG. 8 is a cross-sectional explanatory view taken along line AA in FIG. 7. 図8のXから見た側面説明図である。It is side surface explanatory drawing seen from X of FIG. 図7のB−B線に沿う断面説明図である。FIG. 8 is a cross-sectional explanatory view taken along line BB in FIG. 7. 図7のC−C線に沿う断面説明図である。FIG. 8 is an explanatory cross-sectional view taken along the line CC in FIG. 7. この発明の第4実施の形態に係る電力変換装置の構成を示す断面説明図である。It is a section explanatory view showing the composition of the power converter concerning a 4th embodiment of this invention. 図12のB−B線に沿う断面説明図である。It is sectional explanatory drawing which follows the BB line of FIG. 図12のC−C線に沿う断面説明図である。FIG. 13 is an explanatory cross-sectional view taken along the line CC in FIG. 12. この発明の第5実施の形態に係る電力変換装置の構成を示す断面説明図である。It is sectional explanatory drawing which shows the structure of the power converter device which concerns on 5th Embodiment of this invention. 図15のヒートスプレッダの主面形状の平面説明図である。FIG. 16 is an explanatory plan view of the main surface shape of the heat spreader of FIG. 15. この発明の第6実施の形態に係る電力変換装置の構成を示す断面説明図である。It is sectional explanatory drawing which shows the structure of the power converter device which concerns on 6th Embodiment of this invention. 半導体素子と放熱器の配置構成の他の例を示す断面説明図である。It is sectional explanatory drawing which shows the other example of the arrangement configuration of a semiconductor element and a heat radiator. 従来の半導体装置の構造を模式的に示す断面説明図である。It is sectional explanatory drawing which shows the structure of the conventional semiconductor device typically.

符号の説明Explanation of symbols

10,35,40,45,55,60 電力変換装置
11,47 第1半導体素子
12,48 第2半導体素子
13 第1基板
14 第2基板
15 第1電極
16 第2電極
17 第1放熱器
18 第2放熱器
19,36,41,46,56,65 ヒートスプレッダ
19a,61a 凹部
19b 凸部
20 回路基板
21,29 絶縁層
22,30 はんだ層
23 第1上面電極
24 第1ワイヤボンディング線
25,32 高熱伝導率接着剤
26 接続線
27,47a,49a 制御端子
31 第2ワイヤボンディング線
33 スイッチ回路
37 突出壁部
37a 配線口
41a,46a 貫通電極
42 配線パターン
42a ゲート電極接続線
43 ゲート配線接続端子
49 第3半導体素子
50 第4半導体素子
51 第1配線パターン
51a 第1ゲート電極接続線
52 第2配線パターン
52a 第2ゲート電極接続線
57 第3ワイヤボンディング線
58 第4ワイヤボンディング線
61 第1ヒートスプレッダ
62 第2ヒートスプレッダ
62a フィン部
10, 35, 40, 45, 55, 60 Power converter 11, 47 First semiconductor element 12, 48 Second semiconductor element 13 First substrate 14 Second substrate 15 First electrode 16 Second electrode 17 First radiator 18 Second heat radiator 19, 36, 41, 46, 56, 65 Heat spreader 19a, 61a Concave portion 19b Convex portion 20 Circuit board 21, 29 Insulating layer 22, 30 Solder layer 23 First upper surface electrode 24 First wire bonding line 25, 32 High thermal conductivity adhesive 26 Connection line 27, 47a, 49a Control terminal 31 Second wire bonding line 33 Switch circuit 37 Projecting wall part 37a Wiring port 41a, 46a Through electrode 42 Wiring pattern 42a Gate electrode connecting line 43 Gate wiring connecting terminal 49 Third semiconductor element 50 Fourth semiconductor element 51 First wiring pattern 51a First gate Electrode connecting line 52 second wiring pattern 52a second gate electrode connecting line 57 third wire bonding line 58 fourth wire bonding line 61 first heat spreader 62 second heat spreader 62a fins

Claims (9)

第1放熱器と、
前記第1放熱器の主面上に実装した第1基板と、
前記第1基板の主面上に実装した第1半導体素子と、
前記第1放熱器の主面上或いは前記第1基板の主面上に実装した第1電極と、
前記第1半導体素子の上面に配置され、前記第1半導体素子の第1上面電極と前記第1電極を電気的に接続する複数の第1ワイヤボンディング線、及び前記第1上面電極を接触させたヒートスプレッダと、
前記ヒートスプレッダの一面側に設けた、前記第1ワイヤボンディング線の間を通って前記第1上面電極に接触又は近接する凸部、及び前記第1ワイヤボンディング線に近接する凹部と、
前記ヒートスプレッダの他面側に実装した第2放熱器と
を有することを特徴とする電力変換装置。
A first radiator;
A first substrate mounted on a main surface of the first radiator;
A first semiconductor element mounted on a main surface of the first substrate;
A first electrode mounted on the main surface of the first radiator or the main surface of the first substrate;
A plurality of first wire bonding lines disposed on an upper surface of the first semiconductor element and electrically connecting the first upper surface electrode of the first semiconductor element and the first electrode, and the first upper surface electrode are brought into contact with each other. A heat spreader,
A convex portion provided on one surface side of the heat spreader, in contact with or close to the first upper surface electrode through the first wire bonding line, and a concave portion adjacent to the first wire bonding line;
And a second radiator mounted on the other surface side of the heat spreader.
前記第2放熱器の主面上に実装した第2基板と、
前記第2基板の主面上に実装した第2半導体素子と、
前記第2放熱器の主面上或いは前記第2基板の主面上に実装した第2電極と、
前記第2半導体素子の第2上面電極と前記第2電極を電気的に接続する複数の第2ワイヤボンディング線を接触させた、前記ヒートスプレッダの他面側に設けた、前記第2ワイヤボンディング線の間を通って前記第2上面電極に接触又は近接する凸部、及び前記第2ワイヤボンディング線に近接する凹部とを有し、
前記第1電極と前記第2電極を電気的に接続し、前記第1半導体素子の上面電極と前記第2半導体素子の上面電極が電気的に同一電位であることを特徴とする請求項1に記載の電力変換装置。
A second substrate mounted on the main surface of the second radiator;
A second semiconductor element mounted on the main surface of the second substrate;
A second electrode mounted on the main surface of the second radiator or the main surface of the second substrate;
A second wire bonding line provided on the other surface side of the heat spreader, wherein a plurality of second wire bonding lines electrically connecting the second upper surface electrode of the second semiconductor element and the second electrode are brought into contact with each other. A convex portion that is in contact with or close to the second upper surface electrode, and a concave portion that is close to the second wire bonding line,
The first electrode and the second electrode are electrically connected, and the upper surface electrode of the first semiconductor element and the upper surface electrode of the second semiconductor element are electrically at the same potential. The power converter described.
前記第1半導体素子と前記第2半導体素子は、同時に電気的に同一の動作をしない素子同士の組み合わせであることを特徴とする請求項2に記載の電力変換装置。   The power conversion apparatus according to claim 2, wherein the first semiconductor element and the second semiconductor element are a combination of elements that do not perform the same electrical operation at the same time. 前記ヒートスプレッダに設けた凹部の、前記ワイヤボンディングと前記上面電極のボンディング接続位置に対応する部分が、ボンディング接続位置に対応しない部分よりも浅く形成されていることを特徴とする請求項1から3のいずれか一項に記載の電力変換装置。   The portion corresponding to the bonding connection position of the wire bonding and the upper surface electrode of the recess provided in the heat spreader is formed shallower than the portion not corresponding to the bonding connection position. The power converter device as described in any one. 前記ヒートスプレッダの端部は、ヒートスプレッダ上面側に突出して前記半導体素子の側方に位置することを特徴とする請求項1から4のいずれか一項に記載の電力変換装置。   5. The power conversion device according to claim 1, wherein an end portion of the heat spreader protrudes toward an upper surface of the heat spreader and is located on a side of the semiconductor element. 前記各半導体素子の制御端子と前記ヒートスプレッダの一面側である主面に設けた配線パターンを、ゲート電極接続線で電気的に接続し、且つ、前記ヒートスプレッダの端部近傍に設けたゲート配線接続端子と前記配線パターンを、電気的に接続することを特徴とする請求項1から5のいずれか一項に記載の電力変換装置。   A gate wiring connection terminal provided in the vicinity of the end of the heat spreader, wherein the control circuit of each semiconductor element and the wiring pattern provided on the main surface on one side of the heat spreader are electrically connected by a gate electrode connection line. The power converter according to claim 1, wherein the wiring pattern is electrically connected. 前記第1基板上に実装した、制御端子を有する第1半導体素子と、
前記第2基板上に実装した、制御端子を有する第3半導体素子と、
前記ヒートスプレッダの一面側に設けた第1配線パターンと前記第1半導体素子の前記制御端子を電気的に接続する第1ゲート電極接続線、及び前記ヒートスプレッダの他面側に設けた第2配線パターンと前記第3半導体素子の前記制御端子を電気的に接続する第2ゲート電極接続線と、
前記ヒートスプレッダに設けた、前記第1配線パターンと前記第2配線パターンを前記ヒートスプレッダの端部近傍に設けたゲート配線接続端子に接続する貫通電極と、
前記第1半導体素子に対向する位置の前記第2基板上に実装した、前記第1半導体素子と同一の電気的動作を同時に行わない第2半導体素子と、
前記第2半導体素子に対向する位置の前記第1基板上に実装した、前記第2半導体素子と同一の電気的動作を同時に行わない第4半導体素子と
を有することを特徴とする請求項6に記載の電力変換装置。
A first semiconductor element having a control terminal mounted on the first substrate;
A third semiconductor element having a control terminal mounted on the second substrate;
A first wiring pattern provided on one side of the heat spreader, a first gate electrode connection line for electrically connecting the control terminals of the first semiconductor element, and a second wiring pattern provided on the other side of the heat spreader; A second gate electrode connection line for electrically connecting the control terminal of the third semiconductor element;
A through electrode connected to the gate wiring connection terminal provided in the vicinity of the end of the heat spreader, the first wiring pattern and the second wiring pattern provided in the heat spreader;
A second semiconductor element that is mounted on the second substrate at a position facing the first semiconductor element and does not simultaneously perform the same electrical operation as the first semiconductor element;
7. A fourth semiconductor element mounted on the first substrate at a position facing the second semiconductor element and not performing the same electrical operation as the second semiconductor element at the same time. 8. The power converter described.
前記ヒートスプレッダの一面側に、前記第1ワイヤボンディング線の配線方向に沿って配置し、前記凸部とする第3ワイヤボンディングと、
前記ヒートスプレッダの他面側に、前記第2ワイヤボンディング線の配線方向に沿って配置し、前記凸部する第4ワイヤボンディングと
を有することを特徴とする請求項1から6のいずれか一項に記載の電力変換装置。
A third wire bonding disposed on one surface side of the heat spreader along a wiring direction of the first wire bonding line and serving as the convex portion;
It has 4th wire bonding which is arranged along the wiring direction of said 2nd wire bonding line on the other surface side of said heat spreader, and is said convex part. The power converter described.
前記ヒートスプレッダを構成する、一面側と他面側に凹部を有する第1ヒートスプレッダ、及び平板状基部にフィン部を有する第2ヒートスプレッダを有し、
前記第2ヒートスプレッダの平板状基部が、前記各半導体素子の上面電極上にワイヤボンディング接続部分に対応する開口形状で実装されると共に、前記フィン部の先端が前記第1ヒートスプレッダの凹部に接続する
ことを特徴とする請求項1から7のいずれか一項に記載の電力変換装置。
The heat spreader includes a first heat spreader having a concave portion on one side and the other side, and a second heat spreader having a fin portion on a flat plate-like base,
The flat base portion of the second heat spreader is mounted on the upper surface electrode of each semiconductor element in an opening shape corresponding to the wire bonding connection portion, and the tip of the fin portion is connected to the concave portion of the first heat spreader. The power conversion device according to any one of claims 1 to 7, wherein:
JP2008006851A 2008-01-16 2008-01-16 Power converter Active JP5125530B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008006851A JP5125530B2 (en) 2008-01-16 2008-01-16 Power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008006851A JP5125530B2 (en) 2008-01-16 2008-01-16 Power converter

Publications (2)

Publication Number Publication Date
JP2009171732A JP2009171732A (en) 2009-07-30
JP5125530B2 true JP5125530B2 (en) 2013-01-23

Family

ID=40972280

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008006851A Active JP5125530B2 (en) 2008-01-16 2008-01-16 Power converter

Country Status (1)

Country Link
JP (1) JP5125530B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011064841A1 (en) * 2009-11-25 2011-06-03 トヨタ自動車株式会社 Cooling structure of semiconductor device
DE112017007430T5 (en) 2017-04-12 2020-01-16 Mitsubishi Electric Corporation Semiconductor module, method for producing a semiconductor module and power converter device
US11545460B2 (en) 2020-01-10 2023-01-03 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing semiconductor device having first and second wires in different diameter

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09293808A (en) * 1996-04-25 1997-11-11 Fujitsu Ltd Semiconductor device
JP3525832B2 (en) * 1999-11-24 2004-05-10 株式会社デンソー Semiconductor device
JP3775152B2 (en) * 2000-02-25 2006-05-17 三菱マテリアル株式会社 Semiconductor device
JP3830860B2 (en) * 2001-05-31 2006-10-11 松下電器産業株式会社 Power module and manufacturing method thereof
JP4540884B2 (en) * 2001-06-19 2010-09-08 三菱電機株式会社 Semiconductor device
JP2003243560A (en) * 2002-02-13 2003-08-29 Nec Kyushu Ltd Semiconductor device
JP2004273837A (en) * 2003-03-10 2004-09-30 Koyo Seiko Co Ltd Semiconductor device
JP4019989B2 (en) * 2003-03-26 2007-12-12 株式会社デンソー Semiconductor device
JP3935100B2 (en) * 2003-04-17 2007-06-20 コーセル株式会社 Semiconductor mounting structure
JP4120876B2 (en) * 2003-05-26 2008-07-16 株式会社デンソー Semiconductor device
JP2005268496A (en) * 2004-03-18 2005-09-29 Denso Corp Semiconductor device
JP3978424B2 (en) * 2003-12-10 2007-09-19 トヨタ自動車株式会社 Semiconductor module, semiconductor device and load driving device
JP4086774B2 (en) * 2003-12-25 2008-05-14 三菱電機株式会社 Semiconductor device
JP2006066464A (en) * 2004-08-24 2006-03-09 Toyota Industries Corp Semiconductor device
JP5217015B2 (en) * 2008-01-16 2013-06-19 日産自動車株式会社 Power converter and manufacturing method thereof

Also Published As

Publication number Publication date
JP2009171732A (en) 2009-07-30

Similar Documents

Publication Publication Date Title
JP4973059B2 (en) Semiconductor device and power conversion device
JP5273101B2 (en) Semiconductor module and manufacturing method thereof
WO2013021647A1 (en) Semiconductor module, semiconductor device provided with semiconductor module, and method for manufacturing semiconductor module
US8610263B2 (en) Semiconductor device module
JP2003031765A (en) Power module and inverter
CN109637983B (en) Chip package
JP2017005165A (en) Semiconductor device
JP7040032B2 (en) Semiconductor device
JP2009278134A (en) Power module and inverter
JP2017017109A (en) Semiconductor device
US20140367842A1 (en) Power semiconductor device and method of manufacturing the same
JP7379886B2 (en) semiconductor equipment
JP6653199B2 (en) Semiconductor device
JP5125530B2 (en) Power converter
JP2012248700A (en) Semiconductor device
JP5217015B2 (en) Power converter and manufacturing method thereof
JP2007043204A (en) Power module and inverter
JP2015185835A (en) Semiconductor device and manufacturing method of the same
KR20180087330A (en) Metal slug for double sided cooling of power module
JP5840102B2 (en) Power semiconductor device
TW201916279A (en) Chip package
JP7163828B2 (en) Semiconductor module and semiconductor device having the same
JP5696676B2 (en) Electronic component mounting method
JP6953859B2 (en) Semiconductor device
KR20170095681A (en) Power module and method for the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101222

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20111117

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20120508

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121002

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121003

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20121015

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 5125530

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151109

Year of fee payment: 3

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130213

A072 Dismissal of procedure [no reply to invitation to correct request for examination]

Free format text: JAPANESE INTERMEDIATE CODE: A072

Effective date: 20130625