JP3500032B2 - Wiring board and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the durability of connections by separating a substrate solder material from element pads contg. Ca; this material contg. specified amt. of Sn and having a lower m.p. than that of element solder bumps contg. specified content of Sn. SOLUTION: A semiconductor element 1 has element solder bumps 3 contg. Sn by 0-20wt.% element pads 4 contg. Cu. Substrate solder bumps 8 having a lower m.p. than that of the element bump 3 and contg. Sn by 20wt.% or more and element 1 are set to heights enough to separate the substrate bumps 8 from the pads 4 when the bumps 8 are welded to the element bumps 3. This effectively prevents bonded parts from being broken for a long time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a wiring board with a semiconductor element in which a semiconductor element and a wiring board are joined by using solder bumps and a method for manufacturing the wiring board.

[0002]

2. Description of the Related Art Conventionally, when a semiconductor element (hereinafter referred to as a flip chip) is mounted on a flip chip mounting substrate (hereinafter also simply referred to as a substrate) by a so-called flip chip method, the following procedure is adopted. There is.

For example, as shown in FIG. 16 (a), bumps P3 made of high-temperature solder are formed on the pads P2 of the flip chip P1, and on the other hand, on the pads P5 of the flip chip mounting substrate P4, the high temperature solder is used. The bumps P6 made of eutectic solder having a low melting point are formed, and the bumps P3 and P6 are brought into contact with each other and heated to about 210 ° C. to melt only the eutectic solder to perform the joining.

Of these, the pad (chip side pad) P2 of the flip chip P1 is provided with a Cu layer formed mainly by Cu sputtering, while the pad (substrate side pad) of the flip chip mounting substrate P4. P5
Is obtained by plating a Cu layer formed by Cu plating with Ni plating and Au plating.

Also, the flip chip mounting substrate P4
As a method of forming the bump P6 of
Various methods are known. Solder paste printing method Solder paste is placed by printing on the underlying conductive pad formed on the substrate, and then the solder paste is melted by heating to form hemispherical or spherical solder bumps on the pad. how to.

Solder preform mounting method A method of forming solder bumps by mounting a solder preform on a pad of a substrate and then heating it to melt the solder preform. Solder bonding method A method of forming solder bumps by applying solder to the pads of the substrate by bonding and then heating to melt the solder.

Ball mounting method A small amount of eutectic solder paste is applied on a pad of a substrate, the ball is mounted on the pad, and then the eutectic solder paste is melted by heating so that the ball is fixed to the pad and soldered. Method of forming bumps.

Solder dipping method A method of forming a solder bump on a pad by immersing the product in the molten solder or bringing the product into contact with a jet of the molten solder. Electroless solder plating method A method of forming solder bumps by supplying solder to a pad by electroless plating.

[0009]

However, the above-mentioned
When the solder bumps are formed by the above method, there are the following problems, and further improvement is required. That is, as shown in FIG. 16B, when joining the flip chip P1 and the flip chip mounting substrate P4, the eutectic solder of the bump P6 on the flip chip mounting substrate 4 is melted and the chip side pad P2 is melted. Although about 60% of Sn is contained in the eutectic solder, Sn and Cu in the chip side pad P2 react with each other to form a large amount of a hard and brittle intermetallic compound P7.

This intermetallic compound P7 is the pad P on the chip side.
When formed in No. 2, due to stress due to the difference in thermal expansion between the flip chip P1 and the flip chip mounting substrate P4, a crack is generated in that portion during long-term use, and the chip side pad P2 and the bump P3 are cracked. There was a problem that the joint part was broken.

The present invention, durability of the joint portion is high and the intended productivity, quality, to provide a wiring substrate and a manufacturing method thereof excellent in cost.

[0012]

A wiring board according to claim 1 is provided.
It is clear that a semiconductor element having an element-side solder bump made of an element-side solder material containing no or at most 20 wt% or less of Sn on an element-side pad containing Cu, and having a lower melting point than the element-side solder bump, And a wiring board having board-side solder bumps made of a board-side solder material containing 20 wt% or more of Sn, and not melted (however, semi-melted
Excluding state) was melted on a side surface of the element-side solder bumps
The board side solder material crawled up and was fused to the element side.
Wiring with a semiconductor element in which the semiconductor element and the wiring board are joined by joining the solder bump and the board-side solder bump, and the board-side solder material is separated from the element-side pad A wiring board used as a board, wherein the height of the element-side solder bump is 70 μm or less.
In the above case, the height of the board-side solder bumps is set to a height at which the board-side solder material is separated from the element-side pads during the fusing, and is set to 10 to 40 μm. . The height of the solder bump means the height of the solder bump itself, that is, the height from the bottom surface (top surface of the pad) of each solder bump to the top of the solder bump.

That is, conventionally, when the board-side solder bumps are fused and bonded to the board-side solder bumps, the board-side solder material containing 20 wt% or more of Sn reaches and reaches the board-side solder bumps containing Cu. Then, Cu and Sn may react with each other to form a large amount of brittle intermetallic compound, and a crack or the like may occur in that portion.

On the other hand, in the present invention, since the board-side solder material is not separated from and in contact with the element-side pad, naturally, a brittle intermetallic compound is not formed by the reaction between Cu and Sn. Therefore, even if stress is applied to the joint due to the difference in thermal expansion between the semiconductor element and the wiring board,
Cracks are less likely to occur, and breakage of the joint portion can be effectively prevented for a long period of time. Further, in the present invention, the height of the solder bumps on the substrate side is not melted during the above-mentioned fusion bonding.
Side (excluding semi-molten state) Element side solder bump
Even if the melted board-side solder material creeps up, the board-side solder material does not reach the element-side pads, specifically, the height is lower than in the past. Therefore, on a wiring board having board-side solder bumps set to such a height,
When semiconductor elements are joined, the board-side solder material does not reach the element-side pads at the time of fusion, so naturally Cu and S
No brittle intermetallic compound is formed due to the reaction with n. This
This is because the substrate-side solder material wets and spreads on the element-side solder bumps, and the extent of the wet-spreading is affected by the height of the board-side solder bumps. Therefore, even if stress is applied to the joint portion due to the difference in thermal expansion between the semiconductor element and the wiring board, cracks are less likely to occur, and breakage of the joint portion can be effectively prevented for a long period of time. Further, in the present invention, containing
When the height of the child-side solder bumps is 70 μm or more, the height of the board-side solder bumps is set to 10 to 40 μm . The height of the element-side solder bumps actually provided on the semiconductor element is usually about 70 μm. Therefore, when the board-side solder material is fused to the element-side solder bumps, the board-side solder material is attached to the element-side pads. The height of the solder bumps on the substrate should be 10
It is preferable to set the height to 0 μm. Therefore, if the height of the board-side solder bumps is 10 μm or more, the volume of the board-side solder material is sufficient and the bonding force can be secured, and if the height is 40 μm or less, the board-side solder material has the element-side pad when melted. It is suitable because it does not reach.

As a solder material containing no Sn or containing 20 wt% or less at most, for example, Pb is used.
Simple substance, Pb-based solder (97.5Pb-2.5Ag, 95P
b-5Ag, 90Pb-5Ag-5Sb, 90Pb-5
Ag-5Sn, etc., Pb-Sn solder, Sn is 20
Containing less than wt% (97Pb-3Sn, 95Pb-5
Sn, 90Pb-10Sn), and other components (Ag, S
b, Cu, In, etc.) are added.

As a solder material containing 20 wt% or more of Sn, for example, in the case of Pb-Sn type solder, Pb is used.
-Sn eutectic solder (37Pb-63Sn) and its vicinity composition (33Pb-67Sn, 35Pb-65Sn, 40
Pb-60Sn, 45Pb-55Sn, etc., roughly 20-4
5 wt%, Sn80 to 55 wt%). These have a melting point of about 200 ° C. or less, and the difference in melting point from the element-side solder material is large, so that they are easy to handle. Other components (Ag, Sb, Cu, I
n, Bi, Cd, etc. added (for example, 36 Pb-
60Sn-4Ag, 40Pb-57Sn-3Bi, etc.) may be used.

Further, the fused board-side solder material may include Au formed on the surface thereof for preventing oxidation of the board-side solder bumps and the element-side solder bumps due to corrosion. . In the invention of wiring substrate according to claim 2, made from a high temperature solder element side solder material mainly composed of Pb, substrate side solder material consisting of Pb-Sn eutectic solder.

That is, in the present invention, since the melting temperature of the element-side solder material is set higher than the melting temperature of the board-side solder material, the temperature between the two melting temperatures (that is, the element-side solder material does not melt). Also, by heating at a temperature at which the board-side solder material melts, only the board-side solder material is melted, and then cooled, so that the board-side solder material is fused to the element-side solder bump, and the semiconductor element is wired. It can be bonded to a substrate.

The high-temperature solder containing Pb as a main component is, for example, 97 out of Pb-based solder and Pb-Sn solder.
Pb-3Sn, 95Pb-5Sn, 90Pb-10Sn
Etc. can be mentioned. On the other hand, Pb of the solder material on the board side
The -Sn eutectic solder is preferable because it is easily available and has a low melting point and easily wets high-temperature solder, but the composition may be determined in consideration of the melting point of the element-side solder material. For example, in order to further lower the melting point, a material to which In, Bi, Ag or the like is added may be used.

The element-side pad may be configured to have a layer containing Cu as a main component at the interface with the element-side solder bump. In this case, the element-side solder material is well wetted in the layer containing Cu, so that the element-side solder bump having a stable shape can be formed. Moreover, according to the present invention, since the formation of the intermetallic compound in the layer can be prevented, it is possible to effectively prevent breakage of the joint portion for a long period of time, as in the first aspect.

The invention of the wiring board according to claim 3 is 20 wt.
% Of Sn is contained in the substrate side solder bumps, and the semiconductor element having the element side solder bumps on the element side pads is not melted (however, in a semi-melted state).
Excluding the above ) The substrate melted on the side surface of the element side solder bump
A wiring board for joining by fusion crawls up plate side solder material, high of the element-side solder bumps
Is 70 μm or more, the height of the board-side solder bumps is the height at which the board-side solder material is separated from the element-side pads during the fusion bonding, and is set to 10 to 40 μm. Has been done. The height of the solder bump means the height of the solder bump itself, that is, the height from the bottom surface (top surface of the pad) of each solder bump to the top of the solder bump. Sn has a property of easily forming an intermetallic compound, and is used for the element side pad such as Cu, Ni, Au, Ag, Pt.
And the like form an intermetallic compound. However, in the present invention, S
Since the board-side solder material containing n is separated from the element-side pad, no intermetallic compound is formed. Therefore, similarly to the first aspect, even if stress is applied to the joint portion due to the difference in thermal expansion between the semiconductor element and the wiring board, cracks are less likely to occur and breakage of the joint portion can be effectively prevented for a long period of time.

Further, in the present invention, the solder bumps on the substrate side
At the time of fusion mentioned above, the height is not melted (however, half
Melted on the side of the element side solder bump
Even if the board-side solder material creeps up, the board-side solder material
Does not reach the element side pad, more specifically
It has a low height. Therefore, set it at such a height.
On the wiring board with solder bumps on the board side,
, The solder material on the board side will
Reaction of Cu and Sn, of course, since it does not reach
No brittle intermetallic compound is formed. Furthermore, the present invention
If the height of the element side solder bump is 70 μm or more,
In this case, the height of the board-side solder bumps is set to a height at which the board-side solder material forming the board-side solder bumps is separated from the element-side pads during the fusion, and Is set to 10 to 40 μm. That is, as described above, the height of the solder bumps on the substrate side is 10 μm.
When the above is the case, the volume of the board-side solder material is sufficient to secure a bonding force, and when the height is 40 μm or less, the board-side solder material does not reach the element-side pad during melting. Therefore, even if Sn, which easily forms an intermetallic compound, is used as the substrate-side solder material,
When the board-side solder material is fused to the element-side solder bumps, the board-side solder material does not reach the element-side pad, so a brittle intermetallic compound is not formed, and thus cracks are less likely to occur and the joint portion is long-term. Can be effectively prevented from breaking.

[0023]

[0024]

In the invention of the wiring board according to claim 4 , the height of the board-side solder bumps is 60% of the height of the element-side solder bumps.
It is the following.

That is, when the height is set to such a level, the solder material on the substrate side does not reach the pad on the element side at the time of fusion, so that a brittle intermetallic compound is not formed, and therefore,
Cracks are less likely to occur, and breakage of the joint can be effectively prevented. The 60% rule is set for geometrical reasons, as described below.

First, consider a state in which the semiconductor element and the wiring board are bonded. In this state, when the semiconductor element and the wiring board are closest to each other, as shown in FIG.
The top of the element-side solder bump contacts the board-side pad. In this case, the state in which the board-side solder material does not climb to the element-side pad and the volume of the board-side solder material is the largest is the state shown in FIG. 1A, and the upper end of the board-side solder material in the figure is This is a state immediately before reaching the lower outer periphery of the element side pad in the figure.

Since the pad diameters of the device-side pad and the board-side pad are usually almost the same, the solder volume of the joint (the total volume of the device-side solder bump and the board-side solder bump) is shown in FIG. As shown in (b), it is approximated as a volume of a cylinder having the element side pad as the bottom surface and the bump height of the element side solder bump as the height. Further, for example, an element-side solder bump made of normal high-temperature solder can be regarded as a substantially hemispherical shape in which the pad diameter and the bump height are substantially equal to each other. Therefore, the radius of the element-side solder bump (= element-side solder bump height = board-side solder bump Radius of)
Where r is the volume a of the element-side solder bump and the volume b of the joint portion are obtained from the following equations (1) and (2).

Volume of element-side solder bump a = (2/3) · πr ³ (1) Volume of joint part (cylinder) b = πr ³ (2) Therefore, volume of solder material on the substrate side (= board side) The volume V of the solder bump can be regarded as the volume b of the bonding portion (cylinder) minus the volume a of the element-side solder bump, and can be obtained from the following equation (3).

Volume of solder bumps on the substrate V = ba−πr ³ − (2/3) · πr ³ = (1/3) πr ³ = 0.33πr ³ (3) Therefore, the volume V is the element 1/2 of the volume a of the side solder bump
In the following case, the board-side solder material does not reach the element-side pad.

Here, since the substrate-side solder bump has a shape obtained by cutting a substantially sphere by surface tension when melted, its volume V is determined by the pad diameter r of the substrate-side pad and the bump height T.
Therefore, it can be calculated in different cases as follows. still,
In the following calculation, the radius of the cut sphere forming the bump shape is L, and the difference between the radius L of the sphere and the bump height T is t.

As shown in FIG. 2A, when the bump is smaller than a hemispherical shape, L ² = r ² + t ² and T = L−t L = (r ² / T + T) / 2 (4) t = ^{(r 2 / T-T)} / 2 ... (5)

[0033]

[Equation 1]

As shown in FIG. 2B, when the bump is larger than a hemisphere, L ² = r ² + t ² , T = L + t to L = (r ² / T + T) / 2 t = (T-r ² / T) / 2

[0035]

[Equation 2]

Here, as shown in FIG. 1C, the volume V of the substrate-side solder bump made of, for example, eutectic solder is equal to the volume b (= (2 /
³⁾ πr 3) half ^{(V = (1/3) πr 3} ) because it is less, as in the case of shown in FIG. 2 (a), becomes smaller than the hemispherical bump.

Therefore, the volume V of the board-side solder bump can be calculated from the above equation (6). For example, the volume V of the solder bumps on the substrate in the allowable limit state shown in FIG.
Since V = 0.33πr ³ from the equation (3), the bump height T can be obtained by obtaining L and t that satisfy the following equation (7).

[0038] ^{0.33πr 3 = π (L 3 ×} 2/3-L 2 t + t 3/3) ... (7) Conversely, given a bump height T, L, a t determined, as a result, V = If 0.33πr ³ is satisfied, the bump height T
Is the desired value. Therefore, T =
0.6 × r, that is, as in the present invention, the bump height T of the board-side solder bumps is the pad diameter r of the board-side pads.
Assuming that 60% of (= height of element-side pad having the same pad diameter and a hemispherical shape), L = (r ² /0.6r+0.6r) from the above formula (4).
/2=1.13×r the formula (5) than, t = (r ² /0.6r-0.6r)
/2=0.53xr. Therefore, from the equation (6), V = π [(1.13 × r) ³ × 2 / 3− (1.13 ×)
^{r) 2 × 0.53r + (0.53r} ) 3 /3]=0.33
πr ³ , and this volume V coincides with the solder volume in the limit state in which the board-side solder material does not reach the element-side pad at the time of joining, as shown in FIG. 1A and the equation (3).

From this, if the bump height of the board-side solder bumps is 60% or less of the bump height of the element-side solder bumps, the board-side solder material cannot reach the element-side pads at the time of bonding, and therefore, It can be seen that the component of the board-side solder material does not react with the component of the element-side pad to form an intermetallic compound.

[0040]

[0041]

In the invention of the method for manufacturing a wiring board according to claim 5 , a metal mask having a through hole having a plate thickness of 20 to 30 μm and a through hole diameter of 100 μm or less is used, and a solder grain size of 10 is mainly used.
A step of applying a solder paste composed of solder particles and flux of ˜20 μm on the board-side pad, and a step of melting the applied solder paste by heating and then cooling to form a board-side solder bump on the board-side pad And have.

That is, as described above, in order to prevent the substrate-side solder material from reaching the element-side pads during fusion bonding, the height of the substrate-side solder bumps, that is, the volume of the substrate-side solder bumps must be small. However, in practice, it is not easy to efficiently form such small solder bumps on the substrate side.

Therefore, in the present invention, the plate thickness is 20 to 30 μm.
With a method of applying a solder paste composed mainly of solder particles having a solder particle size of 10 to 20 μm and a flux onto a board side pad using a metal mask having a hole size of 100 μm or less, a small board side solder bump It was possible to efficiently form

That is, a small solder bump on the substrate side should be able to be formed by reducing the diameter of the through hole of the metal mask. However, with the diameter of the solder particles (15 to 38 μm) conventionally used for forming a solder bump. It is too big to print using a metal mask. Therefore, the solder grain size is 1
0 to 20 μm, and the metal mask plate thickness is 20 to
By making the thickness as thin as 30 μm, it is possible to suitably print even a small through hole, and thus it is possible to easily form a small solder bump on the substrate side.

That is, when the solder grain size is 10 μm or more,
There is little oxide film on the surface of the solder particles, meltability can be secured, the solder particle size is 20 μm or less, and the plate thickness of the metal mask is 20 to 3
When it is set to 0 μm, even if the diameter of the through hole of the metal mask is small, it is possible to fill a stable amount of the solder paste with excellent plate-removing property (printability in which the solder paste passes without being blocked by the through hole of the metal mask). is there.

In particular, in the present invention, since the solder paste is filled by the printing method, the solder paste filling work for forming a large number of board-side solder bumps can be easily performed at one time, resulting in high work efficiency. It has the advantage of low cost. Here, a method of calculating a printing volume (a volume of the solder paste filled in the through hole of the metal mask or an opening such as the opening of the solder resist) by the solder paste printing method will be described. Since a solder resist (for insulation) is usually formed around the substrate pads on the surface of the substrate, the case of having the solder resist will be described as an example.

As shown in FIG. 3, when the solder paste is printed, a solder resist is formed in advance around the board pads on the wiring board, and a metal mask is placed on the solder resist. At this time, the metal mask is arranged so that the opening of the solder resist and the through hole of the metal mask communicate with each other in the vertical direction in the drawing.

That is, since the solder paste is filled in the opening portion composed of the opening portion and the through hole, the volume of the opening portion is formed by the volume of the filled solder paste, and by extension, the solder particles in the solder paste. Determine the volume of board side solder bumps. That is, since the proportion of solder in the solder paste is determined, by determining the volume of the opening,
The volume of the board-side solder bumps and thus the height of the board-side solder bumps determined by the volume can be set.

For example, when the dimensions of each part are set as shown in FIG. 3 and the following, the volume V of the solder paste to be filled is set.
S is calculated by the following equation (8). Through hole diameter of metal mask; thickness of DMMO metal mask; opening diameter of TMM solder resist; thickness of DSRO solder resist; TSR pad diameter; thickness of DP pad; TP VS = π (DSRO / 2) ² × TSR + π (DMMO / 2 ) ² x TM
M-π (DP / 2) ² × TP (8) In the method of manufacturing a wiring board according to claim 6 , an opening portion in which a peripheral portion of the board-side pad is covered with a solder resist, and a substantially central portion of the board-side pad is exposed. A step of applying a solder paste to at least the opening portion using a metal mask, a step of melting the applied solder paste by heating, and then cooling to form a board-side solder bump on the board-side pad Have and.

Like the fifth aspect of the present invention, the present invention is a method of filling a solder paste by printing using a metal mask, but is different in that the peripheral edge of the pad is covered with a solder resist. That is, in the present invention, since the peripheral portion is covered with the solder resist while leaving the substantially central opening of the board-side pad, the board-side solder bump is formed in this opening.

According to the present invention as well, similar to the fifth aspect , it is possible to efficiently form a large number of substrate-side solder bumps at a low cost. According to a seventh aspect of the present invention, in the method of manufacturing a wiring board, a step of covering a peripheral portion of the board-side pad with a solder resist to form an opening exposing a substantially central portion of the board-side pad, and directly squeezing the solder resist. A step of filling a solder paste in the opening of the solder resist, and a step of heating the filled solder paste to melt the solder and then cooling it to form a board-side solder bump.

The present invention does not require the metal mask having through holes corresponding to the individual substrate-side pads as in the inventions of claims 5 and 6 , and directly squeezes the solder resist. Therefore, it is not necessary to consider the through hole diameter and the thickness of the metal mask as the one that defines the volume of the solder paste to be filled.

Therefore, in the present invention, it is not necessary to use a metal mask having a precise through hole diameter, and precise alignment of the metal mask (corresponding to each pad) is not required, so that the manufacturing is easy and the cost is reduced. can do.
In the method for manufacturing a wiring board according to Claim 8 , in the step of filling the solder paste, the wiring board having the board-side pad and the solder resist is a recess corresponding to the outer dimensions of the wiring board, and the wiring board is fitted. Sometimes the process of fitting into the intaglio having a recess with a depth where the height of the surface of the solder resist and the peripheral surface of the recess are even, and squeezing is performed with the wiring board fitted into this intaglio to solder the opening. The method includes the steps of filling the paste and moving the excess solder paste to the peripheral surface of the concave portion of the intaglio plate, and removing the wiring board from the intaglio plate.

That is, according to the present invention, the wiring board is fitted into the concave portion of the intaglio plate, and the height of the surface of the solder resist and the peripheral surface of the concave portion are aligned with each other. Can be respectively filled in a plurality of openings of the solder resist, that is, the positions where the board-side solder bumps are formed.

Therefore, in the present invention, since it is not necessary to use a metal mask, it is not necessary to manufacture a precise metal mask, and the cost can be reduced. Further, in order to perform squeezing, it suffices to fit the wiring substrate into the concave portion, and there is an advantage that precise alignment such as alignment of the metal mask is unnecessary.

In the method for manufacturing a wiring board according to Claim 9 , the step of filling the solder paste includes the step of filling the solder resist of the wiring board having the board-side pad and the solder resist,
A step of placing a metal mask having through holes that allow the openings of a plurality of solder resists in one through hole, and squeezing the solder mask while the metal masks are placed to solder paste into the openings of the solder resist. And moving excess solder paste to the surface around the through hole of the metal mask, and removing the metal mask.

That is, in the present invention, a metal mask having a large through hole for opening a plurality of solder resists is placed on the solder resist, and squeegeeing is performed, so that the solder paste is spread over a plurality of solder resists. Can be filled in each of the openings.

Therefore, in the present invention, similarly to the seventh aspect , it is not necessary to manufacture a metal mask having a through hole with a precise through hole diameter, so that the manufacturing process and cost can be reduced. Further, there is an advantage that precise alignment of the metal mask is unnecessary. The method for manufacturing a wiring board according to claim 10 , wherein a solder bump forming sheet is formed by detachably fixing the solder material to a position corresponding to the board-side pad on the surface of the base material made of a material having low wettability with respect to solder. In the step of arranging the solder material so that the solder material is close to or in contact with the board-side pad, and with the solder bump forming sheet arranged, the solder material is heated to melt the solder and transfer the solder to the board-side pad. And then cooling to form substrate-side solder bumps on the substrate-side pads.

A sheet for forming solder bumps according to the present invention,
Regarding the method for forming the board-side solder bumps using the solder bump forming sheet, Japanese Patent Application No. 8-3
No. 25473. That is, in the present invention, the base material used for the solder bump forming sheet is made of a material having low wettability with respect to the solder (that is, it is difficult to react and adhere to the solder), so that the solder material is heated. After melting and forming the solder bumps on the board-side pads, the base material can be easily separated from the solder bumps (without the solder bumps sticking to the base material and dropping off from the board).

Therefore, the solder material on the solder bump forming sheet is arranged in accordance with the position of the board-side pad (for example, the solder material is brought into contact with or close to the board-side pad),
By heating and melting, a substrate-side solder bump having a small volume can be easily formed on the substrate-side pad.

In particular, when a large number of board-side solder bumps are formed on the wiring board in a predetermined pattern, the solder material is arranged on the solder bump forming sheet in accordance with the pattern so that the solder bumps are heated and melted once. This makes it possible to form a large number of board-side solder bumps in a pattern.

In the case of forming a board-side solder bump having a small volume, it is necessary to dispose a solder material having a small volume on the solder bump forming sheet. As the disposing method, the following method is adopted. it can. A method in which a thin solder plate is pressure-bonded to the surface of a base material, and then unnecessary portions are removed by etching or the like.

On the surface of the base material, a through hole diameter (for example, 100 μm)
a metal mask having a small size of m or less and a solder particle size (for example, 1
A method of arranging a solder material by a solder paste printing method using a solder paste containing small solder particles (0 to 30 μm).

[0065]

BEST MODE FOR CARRYING OUT THE INVENTION Next, an example (embodiment) of an embodiment of the present invention will be described. Here, an integrated circuit chip (hereinafter referred to as a flip chip), which is a semiconductor element, is
An example is a resin laminated board (flip chip mounting wiring board, hereinafter simply referred to as wiring board) mounted face down. (Embodiment 1) In this embodiment, a wiring board on which board-side solder bumps are formed by a solder paste printing method using a metal mask having a large number of through holes corresponding to individual solder bumps, and a flip chip is mounted on the wiring board. A mounted wiring board with a flip chip and a method for manufacturing the wiring board will be described.

A) First, the flip chip and the wiring board in this embodiment will be described. As shown in FIG. 4 (a), the flip chip 1 is a Si LSI element having an outer diameter of 12.5 × 18 mm and a plate thickness of 0.4 mm, and the plate-shaped substrate 2 (on the bonding side). On one side, the element side solder bump 3
However, many are provided in a predetermined arrangement pattern.

That is, as shown enlarged in FIG.
On the base material 2 (lower side in the figure), the pad diameter (= 2r) 14
A large number of 0 μm × 1 μm-thick pads (device-side pads) 4 are provided in a predetermined layout pattern, and 95 Pb-5Sn (melting point 314 having a height of 70 μm is formed on the device-side pads 4).
Element-side solder bump 4 made of high-temperature solder (° C)
Are formed. The solder volume a of the element-side solder bump 3 is a = (2/3) · πr ³ = 7.2 according to the equation (1).
It is × 10 ^-4 mm ³ . The element side pad 4 has a Cu vapor deposition film 4b formed on a Cr vapor deposition film 4a.

On the other hand, as shown in FIG. 5 (a), the wiring board 6 on which the flip chip 1 is mounted is disclosed in Japanese Patent Application No. 8-76960.
No. 2 is the same as that shown in Example 1 of No.
A large number of board-side solder bumps 8 are provided in a predetermined arrangement pattern on one surface (on the bonding side) of a plate-shaped substrate 7 having a size of 5 × 25 mm and a plate thickness of about 1 mm.

That is, as shown enlarged in FIG.
On the base material 7 (upper side in the figure), the pad diameter DP = 100 μ
m × thickness TP = 15 μm pad (board side pad) 9
Are provided in a predetermined arrangement pattern, and 37Pb-63Sn having a height T = 40 μm is provided on the substrate side pad 9.
Substrate-side solder bumps 8 having a shape obtained by cutting spheres made of eutectic solder having a melting point of 183 ° C. are formed.

The substrate side pad 9 has a Cu surface coated with Ni.
A solder resist 11 having a thickness TSR = 25 μm is formed around the substrate-side pad 9 by plating. The solder resist 11 is provided as an insulating layer that prevents the eutectic solder from adhering to another place when the eutectic solder is melted, and surrounds the board-side pad 9 with a predetermined space. , Diameter DSRO = 200 μm
The opening 12 is provided.

B) Next, a method of forming the board-side solder bumps 8, which is an essential part of this embodiment, will be described. Since the chip-side bumps 3 can be formed by the same solder sputtering method or solder plating method as in the conventional case, they will not be described here. The method for forming the board-side solder bumps 8 in the present embodiment uses a solder paste that uses solder particles having a smaller particle diameter than in the past, and reduces the through hole diameter of the metal mask 13 to thereby reduce the solder volume on the board side. The feature is that the solder bumps 8 are formed.

First, as shown in FIG. 6A, the wiring board 6 before the formation of the board-side solder bumps 8 is formed on the surface of the base material 7 which is a resin laminated board having a conductive portion (not shown) therein. The substrate side pad 9 and the solder resist 11 are provided. The solder resist 11 is formed by a general photolithography technique on the substrate-side pad 9 and its surroundings. Specifically, a negative type UV-curable epoxy dry film is attached to the surface of the base material 7, ultraviolet rays are irradiated to the place where the solder resist 11 is to be formed, and the dry film is cured, and thereafter, it is unnecessary with a sodium carbonate solution. The part of the dry film is dissolved and removed to form the solder resist 11.

Next, as shown in FIG. 6B, the metal mask 13 is placed on the solder resist 11. At this time, the through holes 14 of the metal mask 13 are placed on the respective openings 12 of the solder resist 11 so as to be positioned. The thickness TMM of the metal mask 13 is as thin as 0.03 mm, and the through hole diameter DMMO is set to be 0.074 mm, which is considerably smaller than the conventional one, in order to form the substrate-side solder bump 8 having a low height. . As the metal mask 13, any of an electroformed mask, a laser hole mask, and an etching mask can be used.

Here, the dimensions of the substrate-side pad 9, the dimensions of the opening 12 of the solder resist 11, and the metal mask 1
The filling amount of the solder paste defined by the size of the through hole 14 of No. 3 will be described. As already explained in FIG. 3,
The opening 12 of the solder resist 11 and the metal mask 13
Since the volume VS of the solder paste filled in the opening portion 16 formed by the through holes 14 and the like can be calculated by the formula (8), the formula (8) is used to calculate the volume VS in the present embodiment. The volume VS of the solder paste is calculated.

VS = π (DSRO / 2) ² × TSR + π (DMMO / 2) ² × TMM −π (DP / 2) ² × TP = π (0.20 / 2) ² × 0.025 + π (0.074 / 2) ² × 0.03 −π (0.14 / 2) ² × 0.015 = 2.18 × 10 ⁻⁴ π = 6.84 × 10 ⁻⁴ [mm ³ ] That is, this volume VS is obtained. Similarly, the dimensions (plate thickness, diameter of the through hole) of the through hole 14 of the metal mask 13 are set in accordance with the given size of the opening 12 of the solder resist 11.
By filling the solder paste with this volume VS, the substrate-side solder bumps 8 having a desired volume and height can be obtained, as described later.

Next, as shown in FIG. 6C, as the solder paste 17, a solder paste 17 composed of eutectic solder particles 17a having a solder particle diameter of 10 to 20 μm and a flux 17b is used, and the metal mask 13 is used. Use to perform squeegee printing. This allows the opening portion 16 to have a predetermined volume V
The solder paste 17 corresponding to S is filled.

Here, the reason that the eutectic solder particles 7a having a particle diameter much smaller than that of the conventional one is used is to secure the plate-removing property when the opening diameter of the metal mask 13 is set small.
In the case of the present embodiment, the solder particle size is small, the surface area per volume is large, and therefore the solder surface has a large amount of oxide film, and therefore the meltability (reflow property) is poor. Use the type.

Next, as shown in FIG. 6D, the metal mask 13 is removed. Next, as shown in FIG. 6E, this solder paste 17
In a far infrared reflow furnace having a maximum temperature of 210 ° C. to melt the eutectic solder particles 17a, and then cooling to form the substrate-side solder bumps 8.

Next, as shown in FIG. 6F, the flux 17b is removed to complete the wiring board 6 having the board-side solder bumps 8 on its surface. The volume V of the board-side solder bump 8 is about 3.4 × 10 ⁻⁴ mm ³ . This is because the proportion of the eutectic solder particles 17a in the solder paste 17 is usually half that of the solder paste 17, so that the volume V of the board-side solder bumps 8 is also the volume VS (=
It is half of 6.84 × 10 ⁻⁴ ).

On the other hand, the height T of the solder bumps 8 on the substrate side is 4
It became 0 μm. Already the above-mentioned FIG. 2 (a) and Formula (4)-
Since the solder bump height T is determined by the volume V of the board-side solder bump 8 and the pad radius r (= 1/2 DP) as described in the derivation of (6) (repeated below). Is.

[0081] ^{L = (r 2 / T +} T) / 2 ... (4) t = (r 2 / T-T) / 2 ... (5) V = π (L 3 × 2/3-L 2 t + t 3/3 (6) Specifically, in the case of the present embodiment, r = 0.07 mm and T = 0.04 mm, and these are expressed by the above formulas (4) to (4).
Substituting into (6), it becomes L = 0.081 t = 0.041 V = 3.414 × 10 ⁻⁴ [mm ³ ], which is the volume V (=
It can be confirmed from the fact that it substantially agrees with 3.4 × 10 ⁻⁴ mm ³ ).

That is, according to the above-described method, the board-side solder bumps 8 having a smaller solder volume than the conventional ones, that is, the height (70 μm) of the element-side solder bumps 3 which is 60% or less of the height of the low board-side solder bumps (high). 40 μm) 8 can be formed. c) Next, a method of joining the flip chip 1 and the wiring board 6 (having the board-side solder bumps 8) will be described.

First, as shown in FIG. 7A, the flux 18 is applied onto the board-side solder bumps 8 of the wiring board 6. Next, as shown in FIG. 7B, the board-side solder bumps 8 and the element-side solder bumps 3 are aligned so as to face each other,
The flip chip 1 is placed on the wiring board 6.

Next, in this state, the wiring board 6 and the flip chip 1 are put into a far infrared reflow furnace having a maximum temperature of 210 ° C. to melt only the eutectic solder of the board-side solder bumps 8 and then, as shown in FIG. As shown in, the eutectic solder 8a is fused to the element-side solder bumps 3. At this time, the eutectic solder 8a is completely melted, but the element-side solder bumps 3 made of high-temperature solder are not melted. Therefore, the flip-chip 1 is until the element-side solder bumps 3 come into contact with the upper surfaces of the board-side pads 9. It descends due to its own weight. The eutectic solder 8a has a height of 70 μm.
Climb the side surface of the element side solder bump 3, but its volume V
Is small, that is, specifically, for the volume a of the element-side solder bump a = 7.2 × 10 ⁻⁴ mm ³ , the volume V is half or less of V = 3.4 × 10 ⁻⁴ mm ^3. Therefore, the element side pad 4 is not reached.

As described above, in the present embodiment, the squeegee printing is performed using the eutectic solder particles 7a having a small particle diameter and the metal mask 13 having a small opening diameter. Can be formed.
The height of the board-side solder bumps 8 is equal to that of the board-side solder bumps 8.
Of 60% or less of the height of the element-side solder bumps 3, which is the allowable limit for the eutectic solder 8a to reach the element-side pads 4 when melted
Since the thickness is μm, the eutectic solder 8a does not climb up to the element side pad 4 during melting. Therefore, eutectic solder 8a
Sn inside does not react with Cu in the element side pad 4 to form a brittle intermetallic compound. Therefore, even if the stress due to the difference in thermal expansion between the flip chip 1 and the wiring board 6 is applied to the joint portion by the solder, the crack is hardly generated in the joint portion, the fracture is unlikely to occur, and the durability is excellent.

In this embodiment, the solder paste 17 can be filled in a large number of openings 16 at a time by squeegee printing, which is excellent in productivity and is advantageous in terms of quality and cost. <Experimental example> Next, an experimental example performed for confirming the effect of the present embodiment will be described.

The present experimental example is a temperature cycle test for investigating the durability of the joint portion of the solder bump. As a sample to be used in the experiment, a flip-chip wiring board manufactured by the same method as the above-described example was manufactured, and as a comparative example, a solder paste printing method similar to the conventional one was used.
A wiring board with a flip chip was manufactured.

The experimental conditions are as follows. The results are shown in Table 1 below. <Experimental Conditions> (1) A flip chip having a device-side solder bump height of 70 μm was used. (2) Six wiring boards were manufactured, one wiring board having solder bumps with heights of 38, 40, 39 μm and one wiring board having 55, 52, 54 μm in height.

(3) The flip chip is bonded to the wiring board to form the wiring board with the flip chip, and the bonding state of the solder bumps on the outer peripheral portion is observed to increase the height at which the eutectic solder (board side solder material) creeps up. It was measured with a mirror. Here, if it is less than 70 μm, it is not in contact with the element side pad. On the other hand, when the eutectic solder has reached the element side pad, the thickness is 70 μm.

(4) The joined flip-chip mounted wiring board was put into a MIL STD heat cycle tester Cord B (−55 to 120 ° C.), and the presence or absence of cracks at the solder bump joints on the outer peripheral portion was examined with a magnifying glass. Checked. In (3) and (4) above, only the solder bumps located on the outer periphery were observed because the bumps located on the inside cannot be observed, and cracks are most likely to occur on the bumps located on the outer periphery. Because it is considered.

Further, so-called underfill (injection of resin) is not performed between the flip chip and the wiring board.

[0092]

[Table 1]

As is clear from Table 1, the durability of the example is excellent, but the durability of the comparative example is low because cracks are generated in a small number of cycles. This is because the brittle intermetallic compound was generated due to the creep of the eutectic solder. (Embodiment 2) Next, Embodiment 2 will be described, but the description of the same portions as those in Embodiment 1 will be omitted or simplified.

In particular, this embodiment is characterized in that the opening diameter of the solder resist is made smaller (or the same) than the pad diameter of the substrate side pad. In the wiring board before the formation of the board-side solder bumps in this embodiment, as shown in FIG.
On the base material 31, a pad diameter of 200 μm and a thickness of 15 μ
m substrate side pad 32 and pad 3 with an opening diameter of 140 μm
25 μm with an opening 33 exposing the central part of 2
A solder resist 34 having a thickness of 10 μm covering the pad 32 is provided.

At this time, since the opening diameter of the solder resist 34 is smaller than the pad diameter of the board-side pad 32, as shown in the figure, the inner peripheral edge portion of the opening portion 33 of the solder resist 34 is the outer peripheral edge portion of the board-side pad 32. It will be placed to cover the upper part of. Then, during squeegee printing with the solder paste 42, a metal mask 38 having a thickness of 30 μm and having a through hole 37 having a through hole diameter of 140 μm is placed on the solder resist 34. As a result, on the substrate-side pad 32, a downward convex opening portion 39 formed of the opening portion 33 of the solder resist 34 and the through hole 37 of the metal mask 38 is formed.

Next, squeegee printing was performed in the same manner as in Example 1 using the solder paste 42 having the eutectic solder grains 41 having a solder grain size of 15 to 38 μm, and the opening portion 39 was formed.
Fill with solder paste. As the flux 43 in the solder paste 42, R, RA
Any of M type, RA type, and water-soluble flux can be used. The flux 4 in the solder paste 42
The content of 3 is about half.

In the present embodiment, the volume of the opening portion 39 is about 6.2 × 10 ⁻⁴ mm by setting the above-mentioned dimensions.
³ since, by subsequent similar heating as in Example 1, a eutectic solder volume of about 3.1 × 10 ^-4 mm ^3, the height 3
Substrate side solder bumps 40 of 7 μm (see FIG. 8B) are formed. This height is 53% of the height of the element-side solder bump (see FIG. 4) described in the first embodiment.

In practice, the position of the substrate-side pad 32 and the position of the opening 33 of the solder resist 34 may be displaced (for example, ± 30 μm). The diameter may be larger than the diameter of the opening 33 (for example, +60 μm as in the present embodiment).

The present embodiment has the same effects as the first embodiment, and in particular, in the case of the present embodiment, the solder paste is filled only above the pad 32, so that it is equivalent to the first embodiment. In order to form the solder bumps 40 of various sizes, the opening diameter of the metal mask 38 can be increased as compared with the first embodiment, so that the plate removal property is good,
Therefore, there is an advantage that the grain size of the eutectic solder grains 41 of the solder paste 42 used can be increased. That is, if the grain size of the eutectic solder grains 41 can be increased, the influence of the oxide film on the surface of the eutectic solder grains 41 is reduced, the meltability is improved, and the cost is reduced. (Third Embodiment) Next, a third embodiment will be described, but the description of the same parts as those in the second embodiment will be omitted or simplified.

In particular, in this embodiment, the solder paste printing is performed directly on the solder resist, and at the same time,
It is characterized in that the base material of the wiring board is fitted into the lower jig. In the wiring substrate before the formation of the solder bumps on the substrate side in the present embodiment, as shown in FIG. 9A, a pad diameter of 140 μm × a thickness of 1 is formed on a base material 51 having an outer diameter of 25 × 25 mm and a thickness of 1 mm.
The substrate-side pad 52 having a thickness of 5 μm and the solder resist 54 having a thickness of 25 μm having an opening 53 having an opening diameter of 200 μm are provided.

In this embodiment, the solder resist 54 is directly squeezed as described below. First, as shown in FIG. 10A, the base material 51 having the board-side pad 52 and the solder resist 54 on the surface is fitted into the recess 57 of the lower jig 56. The inner dimensions of the recess 57 are substantially the same as the outer dimensions of the base material 51, and the depth of the recess 57 when the base material 51 is fitted is the solder resist 54.
So that the surface of the lower jig 56 and the surface of the lower jig 56 have substantially the same height.
It is set to 1 mm.

Next, as shown in FIG. 10B, the base material 5
1 is fitted into the lower jig 56, the solder particle size is 15 to 3
Squeezing is directly performed on the surface of the solder resist 54 using a solder paste 58 having 8 μm eutectic solder particles. As a result, as shown in FIG. 10C, the solder paste 58 is filled in the openings 53 of the solder resist 54.

Squeezing is performed from the upper left surface of the lower jig 56 in the figure to the upper right surface of the lower jig 56 via the surface of the solder resist 54. This is because the excess solder paste 58 not filled in the opening 53 is retracted onto the lower jig 56 so as not to remain on the solder resist 54 or the like.

Thereafter, as shown in FIG. 10D, the base material 51 having the filled solder paste 58 is taken out from the lower jig 56. In the present embodiment, the volume of the opening portion 39 is about 5.5 × 10 ⁻⁴ mm ³ due to the above-mentioned setting of dimensions,
Thereafter, by heating in the same manner as in Example 2, substrate-side solder bumps 50 (see FIG. 9B) having a eutectic solder volume of about 2.8 × 10 ⁻⁴ mm ³ and a height of 34 μm are formed.

If there is a pad (alignment mark or the like) on which the solder bumps are not formed on the surface of the base material 51, heat-resistant material such as polyimide should be formed on the pad on which the solder bumps are not formed before squeezing. Apply masking tape and then squeegee.

The present embodiment has the same effects as those of the third embodiment, and particularly, in the case of the present embodiment, since the squeegee is directly performed without using the metal mask, the substrate side solder bump 50 There is an advantage that the solder volume can be further reduced. (Fourth Embodiment) Next, a fourth embodiment will be described, but the description of the same parts as those in the third embodiment will be omitted or simplified.

In particular, in this embodiment, the solder paste printing is performed directly on the solder resist, and at the same time,
The feature is that a frame-shaped metal mask is used. In the wiring board before the formation of the solder bumps on the board in this embodiment, as shown in FIG. 11A, the outer diameter is 25 × 25 mm and the thickness is 1 m.
m base material 61, pad diameter 140 μm × thickness 15 μ
m substrate side pad 62 and the opening 6 with an opening diameter of 200 μm
3 and a solder resist 64 having a thickness of 20 μm.

In this embodiment, the solder resist 64 is directly squeezed as described below. First, as shown in FIG. 12A, the solder resist 6
A frame-shaped metal mask 66 having a thickness of 30 μm is arranged on the surface 4.

As shown in FIG. 13, the metal mask 66 is a substantially square frame-shaped metal mask 66 having a substantially square through hole 67. That is, the through holes 67 of the metal mask 66 will be formed later in the substrate-side solder bump 60 (see FIG. 11C).
Is formed so that all the substrate-side pads 62 formed thereon are expected to be in the through holes 67. In this embodiment, the pads (non-bump forming pads) 68 on which the bumps are not formed are arranged at the four corners of the base material 61, so that the pads 68 are covered with the mask 66.
A through hole 67 is formed.

As shown in FIG. 11B, when squeezing is performed using a rubber spatula, the spatula does not reach the inner edge of the opening 67 of the metal mask 66 and the solder paste remains. It is desirable that the inner edge of the opening 67 of the metal mask 66 is separated from the outer peripheral end of the substrate side pad 62 by a predetermined distance (about 2 mm in this embodiment). It should be noted that the solder paste remaining in the part where the spatula does not reach can be easily removed because it becomes a ball shape when heated and melted.

Next, as shown in FIG. 12B, with the metal mask 66 placed on the solder resist 64, a solder paste 69 having eutectic solder particles with a solder particle size of 15 to 35 μm is used. , The surface of the solder resist 64 is directly squeezed.

As a result, as shown in FIG.
The solder paste 6 is applied to the opening 63 of the solder resist 64.
9 is filled. In the through hole 67 of the metal mask 66, the squeegee is deformed and directly contacts the solder resist 64, so that the solder paste does not remain on the solder resist 64 other than the inner edge portion of the through hole 67.

Thereafter, as shown in FIG. 12D, the metal mask 66 is removed from the solder resist 64. In this embodiment, the volume of the opening portion 63 of the solder resist 64 (excluding the portion of the board-side pad 62) is about 5.5 × 10 ⁻⁴ mm ³ due to the above-described setting of dimensions, so By heating in the same manner as in Example 4, substrate-side solder bumps 60 having a eutectic solder volume of about 2.8 × 10 ⁻⁴ mm ³ and a height of 34 μm are formed. This height is the same as in the first embodiment.
49 of the height of the element side solder bumps (see FIG. 4) described in
%.

The present embodiment has the same effects as those of the fourth embodiment, and particularly, in the present embodiment, a metal frame having a large number of through holes as in the conventional case is not used, but a simple frame shape is used. Since the squeegee is directly performed by using the metal mask 66, the work is extremely easy.

Further, when mounting the metal mask 66, it is not necessary to perform precise alignment such as aligning the positions of the individual substrate-side pads 62 and the individual through holes of the metal mask as in the conventional case. From that point, the work is simplified.
Further, when the metal mask 66 is used, the solder paste 69 is not applied on the non-bump forming pads 68 such as the alignment marks, so that the masking using the tape described in the third embodiment is not necessary. is there. (Fifth Embodiment) Next, a fifth embodiment will be described, but the description of the same parts as those in the fourth embodiment will be omitted or simplified.

In particular, this embodiment is characterized in that the board-side solder bumps are formed using the solder bump forming sheet. a) First, the solder bump forming sheet will be described.
The solder bump forming sheet used in this example is the same as that described in Japanese Patent Application No. 8-325473 filed already.

Specifically, as shown in FIG. 14A, the solder bump forming sheet 72 used for forming the substrate-side solder bumps 71 (see FIG. 14B) is made of polytetrafluoroethylene ( A eutectic solder (37Pb) is formed on one surface of the heat-resistant sheet base material 73 made of Teflon (trademark).
A large number of disc-shaped solder preforms 74 made of −63Sn) are fixed.

The sheet base material 73 has an outer diameter of 12.
A wiring board 76 having a size of 5 × 18 mm and a thickness of 100 μm and provided with board-side solder bumps 71 as shown in FIG.
The outer diameter of the flip chip 77 to be mounted on the board is the same. On the other hand, each solder preform 74 has a diameter of 100
It is made of a solder foil having a thickness of 30 μm and a thickness of 30 μm, and is arranged at a position corresponding to the position of the board-side solder bump 71 to be formed. That is, the solder bump forming sheet 72 is attached to the wiring board 7.
6 to face the board-side solder bump 71
Therefore, the arrangement pattern of the solder preforms 74 is symmetrical to the arrangement pattern of the board-side solder bumps 71.

Further, each solder preform 74 having the above dimensions
Is approximately 2.4 × 10 ⁻⁴ mm ³ in order to secure the volume necessary for forming the board-side solder bumps 71. b) In order to manufacture the above-mentioned solder bump forming sheet 72, the same method as that described in Japanese Patent Application No. 8-325473 can be adopted. For example, a solder foil having a thickness of 30 μm is pressure bonded onto the sheet base material 73.

On the solder foil, an etching resist is formed on the solder preform 74 forming portion by applying a photosensitive etching resist and exposing and developing. The solder foil is etched to remove unnecessary portions and form the solder preform 74.

The etching resist is removed. By the above steps, on the sheet base material 73 made of Teflon,
A solder bump forming sheet 72 is manufactured in which a solder preform 74 of eutectic solder is pressure-bonded in a predetermined arrangement pattern.

With respect to the solder bump forming sheet 72 and the manufacturing method thereof, in addition to the contents described above, various members described in Japanese Patent Application No. 8-325473 and the manufacturing method thereof can be adopted. c) Next, a method of forming the board-side solder bumps 71 using the solder bump forming sheet 72 will be described.

First, as shown in FIG. 15A, in the solder bump forming sheet 72, the solder preform 74 on the sheet base material 73 is on the wiring board 76 side (that is, the board side pad 78).
Side). At this time, the board-side pad 7
Flux (not shown) is applied so as to cover 8.

Then, as shown in FIG. 15B, the solder bump forming sheet 72 and the wiring board are aligned by aligning the positions of the solder preforms 74 with the positions of the board-side pads 78. Overlap with 76. In particular, in this embodiment, the plane dimension of the sheet base material 73 is the same as that of the flip chip 77. Therefore, the position of the solder bump forming sheet 72 is determined by using a well-known chip mounter used for mounting the flip chip 77. You can make adjustments.

Next, the solder bump forming sheet 72 and the wiring substrate 76 are put on each other and passed through a far infrared ray solder reflow furnace (not shown) to set the solder preform 74 at about 21.
Melt by heating at 0 ° C. As a result, as shown in FIG. 15C, the melted solder falls from the sheet base material 73 side having low solder wettability and is transferred onto the board-side pad 78 having high solder wettability.

Then, as shown in FIG. 15D, after cooling to complete the substrate-side solder bumps 71, the sheet base material 73 is peeled off, and finally the flux is removed with a solvent. Since the board-side solder bumps 71 formed in this way are solidified after the solder preform 74 has been melted,
Although its volume does not change to about 2.4 × 10 ⁻⁴ mm ³ , its height becomes about 30 μm. This height is the same as in the first embodiment.
43 of the height of the element side solder bump (see FIG. 4) described in
%.

The present embodiment has the same effects as the fourth embodiment, and the board-side solder bumps 71 are formed by using the solder preform 74 formed by etching instead of using the solder paste. The board-side solder bumps 71 having a small solder volume can be easily formed.

Further, since the etching resist used for etching is formed by exposure and development, there is an advantage that the diameter and the solder volume of the solder preform 74 can be precisely set. Needless to say, the present invention is not limited to the above-mentioned embodiments, and can be carried out in various modes without departing from the scope of the present invention.

(1) For example, by combining the first embodiment and the second embodiment, that is, by reducing the solder particle diameter of the solder paste and the opening diameter of the metal mask, and opening the solder resist. By combining with a method of making the diameter equal to or smaller than the pad diameter, it is possible to form a board-side solder bump having a smaller solder volume.

(2) Furthermore, by combining the second embodiment and the third embodiment (or the fourth embodiment), that is, a method of making the opening diameter of the solder resist equal to or smaller than the pad diameter, and a metal mask. By combining with a method of squeezing the solder paste directly on the solder resist instead of above (or using a frame-shaped metal mask), it is possible to form a board-side solder bump with a smaller solder volume.

[0131]

As described above in detail, in the invention of the wiring board of claim 1, since the board-side solder material is separated from the element-side pad, it is caused by the reaction between Cu and Sn contained in the element-side pad. No brittle intermetallic compounds are formed.
Therefore, even if stress is applied to the bonding portion due to the difference in thermal expansion between the semiconductor element and the wiring board, cracks are less likely to occur,
It is possible to effectively prevent breakage of the joint portion over a long period of time. Further, in the present invention, the height of the element-side solder bump is 70
If the height is not less than μm, the height of the board-side solder bump is set to a height at which the board-side solder material is separated from the element-side pad during the fusion bonding, and is set to a height of 10 to 40 μm. ing. Therefore, even if sufficient bonding force can be secured and Sn, which easily forms an intermetallic compound, is used as the solder material on the substrate side, a brittle intermetallic compound is not generated even with the component of the element side pad, so that the bonding portion is not formed. Even if stress is applied, cracks are less likely to occur, and breakage of the joint portion can be effectively prevented for a long period of time.

In the invention of the wiring board with a semiconductor element of claim 2, the melting temperature of the element-side solder material is set higher than the melting temperature of the board-side solder material, so that by melting only the board-side solder material, The semiconductor element can be bonded to the wiring board by fusing the board-side solder material to the element-side solder bump.

In the invention of the wiring board according to claim 3, the element side
When the height of the solder bumps is 70 μm or more, the height of the board-side solder bumps is set to a height at which the board-side solder material forming the board-side solder bumps is separated from the element-side pads during the fusion bonding. The height is set to 10 to 40 μm. Therefore, even if sufficient bonding force can be secured and Sn, which easily forms an intermetallic compound, is used as the solder material on the substrate side, a brittle intermetallic compound is not generated even with the component of the element side pad, so that the bonding portion is not formed. Even if stress is applied, cracks are less likely to occur, and breakage of the joint portion can be effectively prevented for a long period of time.

[0134]

In the wiring board invention of claim 4 , the height of the board-side solder bumps is 60% of the height of the element-side solder bumps.
It is the following. Therefore, since the board-side solder material does not reach the element-side pad during fusion bonding, a brittle intermetallic compound is not formed, and thus cracks are less likely to occur and breakage of the joint portion can be effectively prevented.

[0136]

In the invention of the method for manufacturing a wiring board according to claim 5 , a metal mask having a through hole having a plate thickness of 20 to 30 μm and a through hole diameter of 100 μm or less is used, and a solder grain size of 10 is mainly used.
Small solder bumps on the substrate side can be efficiently formed by applying a solder paste composed of solder particles and flux of about 20 μm to the pads on the substrate side.

In particular, in the present invention, since the solder paste printing method can be adopted, the solder paste filling work for forming a large number of board-side solder bumps can be easily performed at one time, and the work efficiency is high and low. It has the advantage of cost. In the method for manufacturing a wiring board according to the sixth aspect , since the peripheral edge of the board-side pad is covered with the solder resist to form the opening in which the substantially central portion of the board-side pad is exposed, the diameter and thickness of the opening are set. As a result, similarly to the fifth aspect , a large number of board-side solder bumps can be formed at once with high efficiency and low cost.

In the method of manufacturing a wiring board according to the seventh aspect , since the squeegee is directly performed, the solder paste can be filled more easily than in the past. That is, since an expensive metal mask having a precise through hole diameter is not used, it is easy to manufacture and the cost can be reduced.

In the method for manufacturing a wiring board according to Claim 8 , the wiring board is fitted in the recess of the intaglio plate, the height of the surface of the solder resist and the peripheral surface of the recess are aligned, and squeegee is performed in this state. No need to use a metal mask. Therefore, it is not necessary to manufacture a precise metal mask, and the cost can be reduced. Further, in order to perform squeezing, it suffices to fit the wiring substrate into the concave portion, and there is an advantage that precise alignment such as alignment of the metal mask is unnecessary.

In the method for manufacturing a wiring board according to Claim 9 , a metal mask having a large through hole for allowing openings of a plurality of solder resists is placed on the solder resist,
Squeeze. Therefore, similarly to the seventh aspect , it is not necessary to use an expensive metal mask having a through hole with a precise through hole diameter, so that the manufacturing is easy and the cost can be reduced. Further, there is an advantage that precise alignment of the metal mask is unnecessary.

According to the wiring board manufacturing method of the tenth aspect ,
Since the board-side solder bumps are formed using the solder-bump forming sheet, the board-side solder bumps having a small volume can be easily formed on the board-side pads. In particular, when a large number of board-side solder bumps are formed on a wiring board in a predetermined pattern, by arranging the solder material on the solder bump forming sheet according to the pattern, the pattern can be formed by heating and melting once. It is possible to form a large number of substrate-side solder bumps.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a method for setting a height of a board-side solder bump.

FIG. 2 is an explanatory diagram showing a dimensional relationship of each part of a board-side solder bump.

FIG. 3 is an explanatory diagram showing a method of setting a volume of a solder paste to be filled.

FIG. 4 shows a flip chip according to Example 1,
(A) is the top view, (b) is sectional drawing which expands and shows the element side solder bump vicinity.

5A and 5B show a wiring board according to Example 1, FIG. 5A is a plan view of the wiring board, and FIG.

FIG. 6 is an explanatory diagram showing a method for forming substrate-side solder bumps according to the first embodiment. FIG.

FIG. 7 is an explanatory diagram showing a method of joining the flip chip and the wiring board according to the first embodiment.

8A and 8B are explanatory views showing a method for forming a board-side solder bump and FIG. 8B is an enlarged cross-sectional view showing the vicinity of the board-side solder bump according to the second embodiment.

9A and 9B are explanatory views showing a method of forming a board-side solder bump and FIG. 9B is an enlarged cross-sectional view showing the vicinity of the board-side solder bump according to Example 3;

FIG. 10 is an explanatory diagram showing a procedure of forming board-side solder bumps according to a third embodiment together with a lower jig.

FIG. 11 is a cross-sectional view showing a wiring substrate before forming solder bumps on the substrate side according to the fourth embodiment, (b) an explanatory view showing a main part at the time of squeezing, and (c) a substrate side. It is sectional drawing which expands and shows the solder bump vicinity.

FIG. 12 is an explanatory diagram showing a procedure of forming a board-side solder bump according to a fourth embodiment together with a metal mask.

FIG. 13 is an explanatory diagram showing a metal mask and the like used for forming substrate-side solder bumps according to the fourth embodiment.

FIG. 14 is a perspective view showing a solder bump forming sheet used for forming board-side solder bumps according to the fifth embodiment, and FIG. 14 (b) is an explanatory view showing a wiring board and a flip chip.

FIG. 15 is an explanatory diagram showing a method for forming board-side solder bumps according to a fifth embodiment.

FIG. 16 is an explanatory diagram showing a conventional technique.

[Explanation of symbols]

1 ... Flip chip (integrated circuit chip, semiconductor element) 2, 7, 31, 51, 61 ... Base material 3 ... Element side solder bump 4 element side pad 6, 76 ... Wiring board (flip chip mounting wiring board) 8, 40, 50, 60, 71 ... Solder bumps on the substrate side 9, 32, 52, 62, 78 ... Pads on the substrate side 11, 34, 54, 64 ... Solder resist 12, 33, 53, 63 ... Opening 13, 38, 66 ... Metal mask 14, 37, 67 ... Through hole 17, 39, 42, 58, 69 ... Solder paste 17a, 41 ... Eutectic solder grains 17b ... Flux 72 ... Solder bump forming sheet 74 ... Solder preform 56 ... Lower jig

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-63-187638 (JP, A) JP-A-8-203953 (JP, A) JP-A-3-229422 (JP, A) JP-A-8- 204322 (JP, A) JP-A-6-252152 (JP, A) JP-A-7-273439 (JP, A) JP-A-8-264932 (JP, A) JP-A-7-321113 (JP, A) JP-A-6-112212 (JP, A) JP-A-6-204230 (JP, A) JP-A-6-267963 (JP, A) JP-A-9-92685 (JP, A) JP-A-10-41351 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/60 311 H01L 21/60

Claims (10)

(57) [Claims] 1. A semiconductor element having an element-side solder bump made of an element-side solder material containing no or at most 20 wt% or less of Sn on an element-side pad containing Cu, and having a melting point higher than that of the element-side solder bump. Low and 20 wt%
A wiring board having a board-side solder bump made of the board-side solder material containing Sn as described above, and the board-side solder melted on the side surface of the element-side solder bump that is not melted (excluding a semi-molten state) Material crawling
Raise and fuse to solder bumps on the element side and half on the substrate side.
A wiring board used for a wiring board with a semiconductor element, in which the semiconductor element and the wiring board are joined to each other by joining with a bump and the board-side solder material is separated from the element-side pad. And the height of the element-side solder bump is 70 μm or more
The height of the substrate-side solder bumps, the height of the substrate-side solder material during the fusing is separated from the element-side pad
The wiring board is characterized by having a height of 10 to 40 μm. 2. The element-side solder material is high-temperature solder containing Pb as a main component, and the board-side solder material is Pb-
The wiring board according to claim 1, wherein the wiring board is made of Sn eutectic solder. 3. A semiconductor element having a substrate-side solder bump made of a substrate-side solder material containing 20 wt% or more of Sn and having an element-side solder bump on an element-side pad is not melted (however, semi-melted). (Excluding the condition) Solder bump on the element side
The solder material on the board side that has melted on the side surface of the
A wiring board for joining by wearing, if the height of the element-side solder bump is 70μm or more
The height of the substrate-side solder bumps, the height of the substrate-side solder material during the fusing is separated from the element-side pad
The wiring board is characterized by having a height of 10 to 40 μm. 4. The wiring board according to claim 1, wherein the height of the board-side solder bumps is 60% or less of the height of the element-side solder bumps. 5. The method for manufacturing a wiring board according to claim 1, wherein a metal mask having a plate thickness of 20 to 30 μm and a through hole diameter of 100 μm or less is mainly used for soldering. Particle size 10
A step of applying a solder paste composed of 20 μm solder particles and flux onto the board-side pad, and melting the applied solder paste by heating and then cooling to form the board-side solder bump on the board-side pad. A method of manufacturing a wiring board, comprising: 6. The method of manufacturing a wiring board according to claim 1, wherein the peripheral edge portion of the board-side pad is covered with a solder resist, and the substantially central portion of the board-side pad is exposed. A step of forming a portion, a step of applying a solder paste to at least the opening using a metal mask, and a step of melting the applied solder paste by heating and then cooling the board-side solder on the board-side pad. A method of manufacturing a wiring board, comprising: a step of forming a bump. 7. The method of manufacturing a wiring board according to claim 1, wherein the peripheral edge of the board-side pad is covered with a solder resist, and the substantially central portion of the board-side pad is exposed. A step of forming a portion, a step of directly squeezing on the solder resist, and a step of filling a solder paste into the opening of the solder resist, and heating the filled solder paste to melt the solder,
And then cooling to form the board-side solder bumps. 8. The step of filling the solder paste, wherein the wiring board having the board-side pads and the solder resist is a recess corresponding to the outer dimensions of the wiring board, and the wiring board is fitted. And a step of fitting into the intaglio having a recess having a depth where the height of the surface of the solder resist and the peripheral surface of the recess are aligned, The wiring according to claim 7, further comprising: a step of filling an opening with a solder paste and moving excess solder paste to a peripheral surface of a recess of the intaglio plate; and a step of removing a wiring substrate from the intaglio plate. Substrate manufacturing method. 9. The step of filling the solder paste includes forming a plurality of openings of the solder resist in one through hole on the solder resist of the wiring board having the board side pad and the solder resist. A step of placing a metal mask having a through hole, and squeezing is performed in a state where the metal mask is arranged to fill an opening of the solder resist with a solder paste, and an excess solder paste is passed through the hole of the metal mask. The method of manufacturing a wiring board according to claim 7, further comprising: a step of moving the wiring board to a peripheral surface; and a step of removing the metal mask. 10. The method of manufacturing a wiring board according to claim 1, wherein the substrate surface of a base material made of a material having low wettability with respect to solder is provided at a position corresponding to the board-side pad. A step of arranging a solder bump forming sheet in which a solder material is separably fixed so that the solder material is close to or in contact with the board-side pad; and in a state where the solder bump forming sheet is arranged, A step of heating the solder material to melt the solder, transferring the solder to the board-side pad, and then cooling to form the board-side solder bump on the board-side pad. Wiring board manufacturing method.