JP3471685B2 - Semiconductor substrate and manufacturing method thereof - Google Patents

Semiconductor substrate and manufacturing method thereof

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Publication number
JP3471685B2
JP3471685B2 JP33559199A JP33559199A JP3471685B2 JP 3471685 B2 JP3471685 B2 JP 3471685B2 JP 33559199 A JP33559199 A JP 33559199A JP 33559199 A JP33559199 A JP 33559199A JP 3471685 B2 JP3471685 B2 JP 3471685B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
crystal
growth
uneven surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP33559199A
Other languages
Japanese (ja)
Other versions
JP2000331947A (en
Inventor
広明 岡川
一行 只友
洋一郎 大内
雅弘 湖東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Cable Industries Ltd
Original Assignee
Mitsubishi Cable Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP33559199A priority Critical patent/JP3471685B2/en
Application filed by Mitsubishi Cable Industries Ltd filed Critical Mitsubishi Cable Industries Ltd
Priority to PCT/JP2000/001588 priority patent/WO2000055893A1/en
Priority to US09/936,683 priority patent/US6940098B1/en
Priority to EP00909660A priority patent/EP1184897B8/en
Priority to EP04022766A priority patent/EP1501118B1/en
Priority to DE60043122T priority patent/DE60043122D1/en
Priority to KR1020017011785A priority patent/KR100677683B1/en
Priority to DE60030279T priority patent/DE60030279T2/en
Publication of JP2000331947A publication Critical patent/JP2000331947A/en
Application granted granted Critical
Publication of JP3471685B2 publication Critical patent/JP3471685B2/en
Priority to US10/842,777 priority patent/US7115486B2/en
Priority to US11/529,905 priority patent/US7504324B2/en
Priority to US11/541,201 priority patent/US7589001B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明が属する技術分野】本発明は、半導体基材及びそ
の作製方法に関し、特に転位欠陥が生じ易い半導体材料
を用いる場合に有用な構造及び方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method for manufacturing the same, and more particularly to a structure and method useful when a semiconductor material that is prone to dislocation defects is used.

【0002】[0002]

【従来の技術】GaN系材料を結晶成長する場合、Ga
N系材料は格子整合する基板がないためにサファイア、
SiC、スピネル、最近ではSiなどの格子整合しない
基板を用いている。しかしながら、格子整合しないこと
に起因し作製したGaNの膜中には1010個/cm
もの転位が存在している。近年高輝度の発光ダイオー
ド、半導体レーザーなどが実現されているが、特性向上
を図るためには転位密度の低減が望まれている。
2. Description of the Related Art Ga is used for crystal growth of GaN-based materials.
Sapphire, because N-based materials do not have a lattice-matched substrate,
Substrates that are not lattice-matched, such as SiC, spinel, and recently Si, are used. However, in the GaN film produced due to the lack of lattice matching, 10 10 pieces / cm 2
There are dislocations. In recent years, high-luminance light-emitting diodes, semiconductor lasers, etc. have been realized, but it is desired to reduce the dislocation density in order to improve the characteristics.

【0003】[0003]

【発明が解決しようとする課題】この転位密度低減を図
る方法としては、例えばGaN系半導体結晶等を、サフ
ァイア基板上にバッファ層、GaN層を成長しこれを下
地基板とし、前記基板上に部分的なマスクを設けて選択
成長する事でラテラル方向の結晶成長を行わせ、転位密
度を低減した高品質な結晶を得る方法が提案されている
(例えば特開平10−312971号公報)。
As a method for reducing the dislocation density, for example, a GaN-based semiconductor crystal or the like is grown on a sapphire substrate to form a buffer layer and a GaN layer, which is used as an underlying substrate, and is partially formed on the substrate. A method has been proposed in which a high-quality crystal with a reduced dislocation density is obtained by performing crystal growth in the lateral direction by providing a selective mask and performing selective growth (for example, JP-A-10-312971).

【0004】しかしながら上記の方法によれば、マスク
層上にラテラル方向成長された部分において、ラテラル
成長方向にc軸が微小量ながら傾斜するといった問題が
生じ、これにより結晶品質が低下するという新たな問題
が有ることが判明した(MRS1998 Fall、Meeting
予稿集G3・1)。これは、X線ロッキングカーブ測
定(XRC)の入射方位依存性を測定(¢スキャン)す
ることでも確認できる。即ち、ラテラル成長方向からの
入射X線によるX線ロッキングカーブの半値全幅(FW
HM)は、マスク層のストライプ方向からのX線による
FWHM値より大きくなっており、C軸の微小傾斜(チ
ルティング)に方位依存性がある事を示している。この
事は、マスク上のラテラル成長の合体部分に新たな欠陥
を多数誘起する可能性を示唆している。
However, according to the above method, there is a problem that the c-axis is tilted in the lateral growth direction with a small amount in the portion laterally grown on the mask layer, which causes deterioration of crystal quality. It turned out to be a problem (MRS 1998 Fall, Meeting
Proceedings G3.1). This can also be confirmed by measuring the incident azimuth dependency of the X-ray rocking curve measurement (XRC). That is, the full width at half maximum (FW) of the X-ray rocking curve due to incident X-rays from the lateral growth direction
HM) is larger than the FWHM value of X-rays from the stripe direction of the mask layer, indicating that the minute tilt (tilting) of the C axis has azimuth dependence. This suggests that many new defects may be induced in the merged portion of the lateral growth on the mask.

【0005】また、マスク層材料として汎用されている
ものはSiOなのであるが、その上に結晶成長層が積
重されるとSi成分がこの結晶成長層中に移行するとい
う、いわゆるオートドーピング汚染の問題があることも
判明した。さらに、Alを含む半導体材料、例えばAl
GaNをSiOマスク層付き基板上に成長させた場
合、マスク層上にも結晶成長し、選択成長自体が効果的
に行えないという問題もあった。
Although SiO 2 is commonly used as a mask layer material, when a crystal growth layer is stacked on it, Si component migrates into this crystal growth layer, so-called auto-doping contamination. It turned out that there is a problem. Furthermore, a semiconductor material containing Al, for example, Al
When GaN is grown on the substrate with the SiO 2 mask layer, there is also a problem that the crystal growth also occurs on the mask layer and the selective growth itself cannot be effectively performed.

【0006】このような問題を解消する試みとして、S
iCのベース基板上にバッファ層及びGaN層を設けた
基板に対して、SiC層にまで至るストライプ溝加工を
施して凸部を形成し、この凸部の上方部に位置すること
になるGaN層から結晶成長させる方法が提案されてい
る(MRS 1998 Fall Meeting予稿集G3.38)。この方
法によればSiOマスク層無しで選択成長させる事も
出来、上述のSiOマスクを用いることに起因する各
種の問題を解消することが可能となる。
As an attempt to solve such a problem, S
A substrate in which a buffer layer and a GaN layer are provided on an iC base substrate is subjected to stripe groove processing up to the SiC layer to form a convex portion, and the GaN layer to be located above the convex portion. Has proposed a method for crystal growth (MRS 1998 Fall Meeting Proceedings G3.38). According to this method, selective growth can be performed without using the SiO 2 mask layer, and various problems caused by using the SiO 2 mask described above can be solved.

【0007】上記方法は、ベース基板としてサファイア
基板を使用する事ができその方法も開示されている(例
えば、特開平11−191659号公報)。しかしなが
ら上記方法では、サファイアベース基板上にバッファ層
材料ならびにGaN系材料を結晶成長させ、一旦成長炉
から取り出し溝加工を施し、その後再び結晶成長を行う
というステップが必要となることから、製造プロセスが
複雑化するという新たな不都合が発生し、作業工程が多
くなりコストがかかるなどの問題を有していた。
In the above method, a sapphire substrate can be used as a base substrate, and a method therefor is also disclosed (for example, Japanese Patent Laid-Open No. 11-191659). However, the above method requires the steps of crystal growth of the buffer layer material and the GaN-based material on the sapphire base substrate, once taking out from the growth furnace, performing groove processing, and then performing crystal growth again. There is a problem that a new inconvenience occurs, the number of working steps increases, and the cost increases.

【0008】またSi基板上にGaN系材料を結晶成長
する試みもなされているが、GaN系結晶を成長すると
熱膨張係数差に起因した反りやクラックが発生し良質の
結晶成長を行えない問題があった。
Attempts have also been made to grow a GaN-based material on a Si substrate, but when a GaN-based crystal is grown, there arises a problem that warpage or cracks are generated due to a difference in thermal expansion coefficient, and good quality crystal growth cannot be performed. there were.

【0009】従って本発明は上記問題に鑑み、マスク層
を用いる事に起因する種々の問題を回避し、かつ製造工
程の簡略化を図ることを目的としている。また従来困難
であったAlGaNの選択成長ができない問題を解決す
る事を目的としている。さらにSi基板等を用いた場合
の反りやクラックの発生を押さえることを目的としてい
る。
Therefore, in view of the above problems, it is an object of the present invention to avoid various problems caused by using a mask layer and to simplify the manufacturing process. Another object is to solve the problem that AlGaN cannot be selectively grown, which has been difficult in the past. Furthermore, it is intended to suppress the occurrence of warpage and cracks when using a Si substrate or the like.

【0010】[0010]

【課題を解決するための手段】本発明の半導体基材は、
基板と該基板上に気相成長された半導体結晶とからな
る半導体基材であって、半導体結晶は、Al x Ga 1-x-y
In y N(0≦x≦1、0≦y≦1)によって決定され
る半導体からなる結晶である。基板は、前記半導体結晶
層を成長させるためのベースとなる基板であって、サフ
ァイア(C面、A面、R面)、SiC(6H、4H、3
C)、Si、スピネル、ZnO、GaAs、またはNG
Oからなり、前記基板の結晶成長面は凹凸面とされ、前
記半導体結晶は、基板の凹凸面における凸部の上方部と
凹部の表面とから結晶が成長し、凹部に空洞を形成する
ことなく基板の凹凸面を覆っているものである。また
は、基板は、前記半導体結晶層を成長させるためのベー
スとなる基板であって、GaN、AlGaN、AlNを
除く材料からなり、前記基板の結晶成長面は凹凸面とさ
れ、前記半導体結晶は、基板の凹凸面における凸部の上
方部と凹部の表面とから結晶が成長し、凸部の上方部を
起点とし横方向に成長した膜と、凹部の表面から成長し
た膜とが互いにつながって、基板の凹凸面を覆っている
ものである。
The semiconductor substrate of the present invention comprises:
A semiconductor substrate comprising a substrate and a semiconductor crystal vapor-deposited on the substrate, wherein the semiconductor crystal is Al x Ga 1-xy.
Determined by In y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1)
It is a crystal made of a semiconductor. The substrate is the semiconductor crystal
A base substrate for growing layers, which is
Air (C surface, A surface, R surface), SiC (6H, 4H, 3
C), Si, spinel, ZnO, GaAs, or NG
O, and the crystal growth surface of the substrate is an uneven surface.
The semiconductor crystal is formed on the uneven surface of the substrate and above the convex portion.
Crystals grow from the surface of the recess and form a cavity in the recess.
Without covering the uneven surface of the substrate. Also
Is a substrate for growing the semiconductor crystal layer.
Substrate, which consists of GaN, AlGaN, and AlN
Excluding materials, and the crystal growth surface of the substrate is an uneven surface.
The semiconductor crystal is formed on the convex portion of the uneven surface of the substrate.
Crystals grow from the surface of the concave part and the surface of the concave part,
Starting from the laterally grown film and from the surface of the recess,
Film is connected to each other and covers the uneven surface of the substrate.
It is a thing.

【0011】上記基板の結晶成長面の凸部を、平行なス
トライプ形状からなる凸部とすることが好ましい。さら
、ストライプの長手方向が半導体結晶の<1−100
>方向であるストライプとすることがより好ましい。
It is preferable that the projections on the crystal growth surface of the substrate are projections having parallel stripe shapes. Furthermore <br/>, the stripe longitudinal direction of the semiconductor crystal <1-100
More preferably, the stripes are in the > direction .

【0012】本発明にかかるより具体的な半導体基材
は、基板と該基板上に気相成長された半導体結晶とから
なる半導体基材であって、前記基板の結晶成長面が凹凸
面とされ、前記半導体結晶は該凹凸面における凸部の上
方部から専ら結晶成長された半導体基材において、前記
凹凸面が成長された半導体結晶で覆われており、この半
導体結晶層と前記凹凸面における凹部との間には空洞部
が形成されていることを特徴とするものである。
A more specific semiconductor base material according to the present invention is a semiconductor base material comprising a substrate and a semiconductor crystal vapor-grown on the substrate, wherein the crystal growth surface of the substrate is an uneven surface. In the semiconductor substrate in which the semiconductor crystal is exclusively crystal-grown from above the convex portion on the uneven surface, the uneven surface is covered with the grown semiconductor crystal, and the semiconductor crystal layer and the concave portion on the uneven surface are formed. A hollow portion is formed between and.

【0013】また、当該半導体基材を、基板の結晶成長
面を凹凸面とし、半導体結晶を、〔基板の凹凸面におけ
る凸部の上方部と凹部の表面から結晶が成長し、凸部の
上方部を起点とし横方向に成長した膜と、凹部の表面か
ら成長した膜とが互いにつながって、基板の凹凸面を覆
って形成された第一の半導体結晶〕と、この第一の半導
体結晶の表面を凹凸面とし、〔その凹凸面における凸部
の上方部と凹部の表面から結晶が成長し、凸部の上方部
を起点とし横方向に成長した膜と、凹部の表面から成長
した膜とが互いにつながって、基板の凹凸面を覆って形
成された第二の半導体結晶〕と、とからなる構成とする
こともできる。さらに、前記半導体基材における第二の
半導体結晶の表面を凹凸面とし、その上に同様に気相成
長法により形成された第3の半導体層乃至は同様の工程
を繰り返すことで多重的に形成された複数の半導体層を
具備させるようにしても良い。
In the semiconductor base material, the crystal growth surface of the substrate is an uneven surface, and the semiconductor crystal is
Crystal grows from the upper part of the convex part and the surface of the concave part.
The film grown laterally from the upper part and the surface of the recess
And the grown film are connected to each other to cover the uneven surface of the substrate.
The first semiconductor crystal formed by
The surface of the body crystal is an uneven surface, and [the convex portion on the uneven surface is
Crystals grow from the upper part of the and the surface of the concave part,
From the surface of the recess and the film grown in the lateral direction.
The film is connected to each other and covers the uneven surface of the substrate.
And a second semiconductor crystal formed] . Further, the surface of the second semiconductor crystal in the semiconductor base material is formed into an uneven surface, and a third semiconductor layer formed on the surface of the second semiconductor crystal by the vapor phase epitaxy method or a similar process is repeated to form multiple layers. A plurality of semiconductor layers may be provided.

【0014】本発明の半導体基材の製造方法は、上記の
基板上に上記の半導体結晶を気相成長させるにあたり、
予め基板表面に凹凸面加工を施し、次いで該基板に対し
て原料ガスを供給し、前記凹凸面における凸部の上方部
と凹部の表面とから結晶を成長させ、凸部の上方部を起
点とし横方向に成長させた膜と、凹部の表面から成長さ
せた膜とを互いにつなげて基板の凹凸面を覆う半導体結
晶、または、凸部の上方部と凹部の表面とから結晶を成
長させて凹部に空洞を形成することなく基板の凹凸面を
覆う半導体結晶とすることを特徴とする。
In the method for producing a semiconductor substrate of the present invention, the above- mentioned semiconductor crystal is vapor-phase grown on the above-mentioned substrate.
The surface of the substrate is previously processed to have an uneven surface, and then a raw material gas is supplied to the substrate so that the upper surface of the convex portion on the uneven surface is
Crystal grows from the surface of the concave part and the surface of the concave part to raise the upper part of the convex part.
A film grown laterally as a point and a film grown from the surface of the recess.
The semiconductor film that covers the uneven surface of the substrate by connecting the
Crystal or a crystal composed of the upper part of the convex part and the surface of the concave part.
The uneven surface of the substrate can be extended without forming a cavity in the recess.
It is characterized in that it is a semiconductor crystal that covers .

【0015】[0015]

【作用】本発明は、バッファ層等すら形成していない状
態の基板に対して凹凸面を設けることで、結晶成長当初
から実質的に低転位領域を形成可能なラテラル成長を起
こす素地面を予め提供しておく点に特徴を有する。即
ち、気相成長させた場合、成長初期には基板表面全体で
結晶成長が起こり得るが、やがて凸部の上方部での成長
が優位となり、この結果凹部に原材料が拡散しにくくな
り、ひいては凸部の上方部から専ら成長された層にて上
記の凹凸面が覆われるというものである。この凸部の成
長ではC軸と垂直方向のいわゆるラテラル成長が起き、
実質的に低転位領域の形成がマスク層レス(従来のよう
にマスク層を用いることなしに)で達成されることにな
る。そして成長が、基板直上に位置する層(例えばバッ
ファ層)の結晶成長から行い得ることになるので、その
後の成長工程を連続して行うことができるものである。
According to the present invention, by providing an uneven surface on a substrate in which no buffer layer or the like has been formed, it is possible to preliminarily prepare a ground plane which causes lateral growth capable of forming a low dislocation region from the beginning of crystal growth. It is characterized in that it is provided. That is, in the case of vapor phase growth, crystal growth may occur on the entire surface of the substrate in the initial stage of growth, but eventually the growth above the convex portion becomes dominant, and as a result, the raw material is less likely to diffuse into the concave portion, and eventually the convex portion. The uneven surface is covered with a layer grown exclusively from the upper part of the part. In the growth of this convex portion, so-called lateral growth in the direction perpendicular to the C axis occurs,
The formation of the low dislocation regions is substantially achieved without a mask layer (without using a mask layer as in the conventional case). Since the growth can be performed from the crystal growth of the layer (for example, the buffer layer) located directly on the substrate, the subsequent growth process can be continuously performed.

【0016】[0016]

【発明の実施の態様】以下図面に基いて、本発明の実施
態様につき詳細に説明する。図1(a)乃至(c)は本
発明に係る半導体基材の結晶成長状態を説明するための
断面図である。図において、1は基板であり、2は該基
板1上に気相成長された半導体結晶をそれぞれ示してい
る。基板1の結晶成長面には凸部11及び凹部12が形
成されており、前記凸部11の上方部から専ら結晶成長
が行われるよう構成されている。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings. 1A to 1C are cross-sectional views for explaining a crystal growth state of a semiconductor substrate according to the present invention. In the figure, 1 is a substrate, and 2 is a semiconductor crystal vapor-deposited on the substrate 1, respectively. A convex portion 11 and a concave portion 12 are formed on the crystal growth surface of the substrate 1, and the crystal growth is performed exclusively from above the convex portion 11.

【0017】本発明でいう基板とは、各種の半導体結晶
層を成長させるためのベースとなる基板であって、格子
整合のためのバッファ層等も未だ形成されていない状態
のものを言う。このような基板としては、サファイア
(C面、A面、R面)、SiC(6H、4H、3C)、
GaN、Si、スピネル、ZnO,GaAs,NGOな
どを用いることができるが、発明の目的に対応するなら
ばこのほかの材料を用いてもよい。またこれら基板から
offしたものを用いてもよい。
The substrate referred to in the present invention is a substrate that serves as a base for growing various semiconductor crystal layers, and is in a state where a buffer layer for lattice matching has not yet been formed. Examples of such a substrate include sapphire (C surface, A surface, R surface), SiC (6H, 4H, 3C),
GaN, Si, spinel, ZnO, GaAs, NGO, etc. can be used, but other materials may be used as long as they meet the purpose of the invention. Moreover, you may use what turned off from these substrates.

【0018】基板1上に成長される半導体結晶としては
種々の半導体材料を用いることができ、Al x Ga1-x-y
In y N(0≦x≦1,0≦y≦1)ではx、yの組成
比を変化させたGaN、AlGaNInGaNなどが
例示できる。
As the semiconductor crystal grown on the substrate 1, various semiconductor materials can be used, and Al x Ga 1- x -y can be used.
For In y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1), GaN, AlGaN , InGaN, and the like having different composition ratios of x and y can be exemplified.

【0019】中でも、AlGaN等のAlを含有する半
導体材料の場合、従来のマスク方式ではSiOマスク
層上に成長するという問題があったが、本発明によると
マスクレス化によりかかる問題が解消されるため、従来
できなかったAlGaNのラテラル成長が可能となり低
転位で高品質な膜の成長が基板直上から可能となる。こ
のため紫外線発光素子等で問題となるGaN層による光
吸収がなくなり応用上特に好適である。
In particular, in the case of a semiconductor material containing Al such as AlGaN, the conventional mask method has a problem that it grows on the SiO 2 mask layer. However, according to the present invention, such a problem is solved by the maskless method. Therefore, lateral growth of AlGaN, which was not possible conventionally, can be performed, and a high-quality film with low dislocations can be grown directly on the substrate. For this reason, light absorption by the GaN layer, which is a problem in the ultraviolet light emitting element, etc. is eliminated, and it is particularly suitable for application.

【0020】基板1の結晶成長面に形成される凸部11
は、その上方部から専ら結晶成長が行われるような形状
とすると有効である。「上方部から専ら結晶成長が行わ
れる」とは、凸部11の頂点ないし頂面及びその近傍で
の結晶成長が優勢に行い得る状態をいい、成長初期には
凹部での成長が生じてもよいが最終的には凸部11の結
晶成長が優勢となることを指す。つまり上方部を起点と
したラテラル成長により低転位領域が形成されれば、従
来のマスクを要するELOと同様の効果がある。これが
本発明ではマスクレスで成長可能である事が特徴であ
る。以下、この点についての説明を、図1〜図3に基づ
いて行う。
Protrusions 11 formed on the crystal growth surface of the substrate 1
Is effective when the crystal is grown exclusively from the upper part. "The crystal growth is performed exclusively from the upper part" means a state in which the crystal growth can be predominantly performed at the apex or top surface of the convex portion 11 and in the vicinity thereof, even if the growth in the concave portion occurs at the initial stage of the growth. Good, but finally indicates that the crystal growth of the convex portion 11 becomes dominant. That is, if the low dislocation region is formed by the lateral growth starting from the upper part, the same effect as that of the conventional ELO requiring a mask can be obtained. This is a feature of the present invention that maskless growth is possible. Hereinafter, this point will be described with reference to FIGS. 1 to 3.

【0021】図1〜3は凸部11をストライプ状に形成
したものの横断面図である。先ず、図1では、(a)図に
示すように溝幅Bに対し溝深さ(凸部高さ)hが深い基
板1を用いる場合を例示している。この場合原料ガスが
凹部12及びその近傍に十分至らず、凸部11の上方部
からしか結晶成長が起こらない。図1(b)において、2
0はこの結晶成長開始時の結晶単位を示している。この
ような状況下、結晶成長が続くと凸部11の上方部を起
点とし横方向に成長した膜がつながって、やがて図1
(c)のように凹部に空洞部13を残したまま、基板1の
凹凸面を覆うことになる。この場合、横方向に成長した
部分、つまり凹部12上部には低転位領域が形成され、
作製した膜の高品質化が図れている。
1 to 3 are cross-sectional views of the projection 11 formed in a stripe shape. First, FIG. 1 illustrates a case where a substrate 1 having a deep groove depth (height of convex portion) h with respect to a groove width B is used as shown in FIG. In this case, the raw material gas does not sufficiently reach the concave portion 12 and its vicinity, and crystal growth occurs only from the upper portion of the convex portion 11. In FIG. 1 (b), 2
0 indicates the crystal unit at the start of this crystal growth. Under such a circumstance, when the crystal growth continues, the films grown in the lateral direction from the upper portion of the convex portion 11 as a starting point are connected to each other, and eventually the film shown in FIG.
As shown in (c), the concave-convex surface of the substrate 1 is covered while leaving the hollow portion 13 in the concave portion. In this case, a low dislocation region is formed in the laterally grown portion, that is, in the upper portion of the recess 12.
The quality of the produced film is improved.

【0022】図2は、溝幅Bに対し溝深さ(凸部高さ)
hが浅い場合、もしくは凸部11の幅Aに対し溝幅Bが
広い基板1を用いる場合を例示している(図2(a)参
照)。この場合、原料ガスは凹部12及びその近傍にま
で到達し得るため凹部12での成長も生じる。また、凸
部11の上方部からも結晶成長が生じ、図2(b)に示す
ように、凸部11の上方部と凹部12表面に、それぞれ
結晶単位20、21が生成される状態となる。このよう
な状況下、結晶成長が続くと凸部11の上方部を起点と
し横方向に成長した膜がつながって、やがて図2(c)の
ように基板1の凹凸面を覆うことになる。この場合も凹
部12上部には低転位領域が形成され、作製した膜の高
品質化が図れている。
FIG. 2 shows the groove depth (height of the protrusion) with respect to the groove width B.
The case where h is shallow, or the case where the substrate 1 whose groove width B is wider than the width A of the convex portion 11 is used is illustrated (see FIG. 2A). In this case, since the source gas can reach the recess 12 and its vicinity, growth in the recess 12 also occurs. Further, crystal growth also occurs from the upper portion of the convex portion 11, and as shown in FIG. 2B, the crystal units 20 and 21 are generated on the upper portion of the convex portion 11 and the surface of the concave portion 12, respectively. . Under such a circumstance, if the crystal growth continues, the films grown in the lateral direction from the upper portion of the convex portion 11 as a starting point are connected, and eventually the uneven surface of the substrate 1 is covered as shown in FIG. 2C. In this case as well, a low dislocation region is formed on the upper part of the recess 12 to improve the quality of the manufactured film.

【0023】図3は、溝幅Bに対し溝深さ(凸部高さ)
hが非常に浅い場合、もしくは凸部11の幅Aに対し溝
幅Bが非常に広い基板1を用いる場合を例示している
(図3(a)参照)。この場合も原料ガスは凹部12及び
その近傍にまで到達し得るため凹部12での成長も生じ
る。また、凸部11の上方部からも結晶成長が生じ、図
3(b) に示すように、凸部11の上方部と凹部12表
面に、それぞれ結晶単位20、21が生成される状態と
なる。このような状況下、結晶成長が続くと上方部を起
点とし横方向に成長した膜及び凹部から成長した膜がつ
ながって、やがて図3(c)のように基板1の凹凸面を覆
うことになる。この場合も凹部12を起点とした部分に
は低転位領域は形成され難いが、凸部11を起点とし横
方向成長した部分には低転位領域が形成され、作製した
膜全体でみるとの高品質化が図り得る。
FIG. 3 shows the groove depth (height of the protrusion) with respect to the groove width B.
The case where h is very shallow, or the case where the substrate 1 whose groove width B is much wider than the width A of the convex portion 11 is used is illustrated (see FIG. 3A). Also in this case, the source gas can reach the recess 12 and its vicinity, so that the growth in the recess 12 also occurs. Further, crystal growth also occurs from the upper portion of the convex portion 11, and as shown in FIG. 3B, the crystal units 20 and 21 are generated on the upper portion of the convex portion 11 and the surface of the concave portion 12, respectively. . Under such a circumstance, if crystal growth continues, the film grown laterally from the upper part and the film grown from the recess are connected to each other, and eventually the uneven surface of the substrate 1 is covered as shown in FIG. 3C. Become. In this case as well, it is difficult to form a low dislocation region in the portion starting from the concave portion 12, but a low dislocation region is formed in the portion laterally grown starting from the convex portion 11, which is higher than that of the entire fabricated film. Quality can be improved.

【0024】本発明にあっては、このような凸部11で
あれば特に制限はなく各種の形状を採用することができ
る。具体的には、上述したような溝幅Bに対し溝深さ
(凸部高さ)hが深い場合、溝幅Bに対し溝深さ(凸部
高さ)hが浅い場合、さらに溝幅Bに対し溝深さ(凸部
高さ)hが非常に浅い場合、もしくは凸部11の幅Aに
対し溝幅Bが非常に広い場合など種々の組み合わせを行
う事ができる。特に溝幅Bに対し溝深さ(凸部高さ)h
が深い場合、気相成長時に原料ガスが実質的に底部まで
拡散できないため原料が効率良く凸部11上部の成長に
寄与する点で好ましい。また凸部11の幅Aに対し溝幅
Bが広い場合、横方向成長の領域が多くなり低転位領域
が広く形成される点で好ましい。
In the present invention, as long as such a convex portion 11 is not particularly limited, various shapes can be adopted. Specifically, when the groove depth (height of protrusion) h is deeper than the groove width B as described above, and when the groove depth (height of protrusion) h is shallower than the groove width B, the groove width is further increased. Various combinations can be performed, such as when the groove depth (height of the convex portion) h is extremely shallow with respect to B, or when the groove width B is very large relative to the width A of the convex portion 11. Especially for groove width B, groove depth (height of protrusion) h
Is deep, the raw material gas cannot substantially diffuse to the bottom during vapor phase growth, and the raw material contributes to the growth of the upper portion of the convex portion 11 efficiently, which is preferable. Further, it is preferable that the groove width B is wider than the width A of the convex portion 11 in that the region of lateral growth is increased and the low dislocation region is widened.

【0025】このような凹凸面の形成の態様としては、
島状の点在型の凸部、ストライプ型の凸条からなる凸
部、格子状の凸部、これらを形成する線が曲線である凸
部などが例示できる。これら凸部の態様の中でも、スト
ライプ型の凸条を設ける態様のものは、その作製工程を
簡略化できると共に、規則的なパターンが作製容易であ
る点で好ましい。ストライプの長手方向は任意であって
よいが、基板上に成長させる材料をGaNとしたとき、
GaN系材料の<11−20>方向や、<1−100>
方向が好ましい。特に<1−100>方向にした場合、
{1−101}面などの斜めファセットが形成され難い
ため横方向成長(ラテラル成長)が早くなる。この結果
凹凸面を覆うのが速くなる点で特に好ましい。
As a mode of forming such an uneven surface,
Examples thereof include island-shaped scattered convex portions, convex portions formed of stripe-shaped convex stripes, lattice-shaped convex portions, and convex portions in which the lines forming these are curved lines. Among these aspects of the protrusions, the aspect in which the stripe-shaped protrusions are provided is preferable because the production process can be simplified and a regular pattern can be easily produced. The longitudinal direction of the stripe may be arbitrary, but when the material to be grown on the substrate is GaN,
<11-20> direction of GaN-based material and <1-100>
Direction is preferred. Especially in the <1-100> direction,
Since it is difficult to form oblique facets such as {1-101} planes, lateral growth (lateral growth) is accelerated. As a result, it is particularly preferable in that the uneven surface can be covered more quickly.

【0026】図1に示す実施例のように、空洞部13を
残したまま基板1の凹凸面を埋め込み、続いてその上に
発光部を成長して発光素子を作製した場合、空洞部と半
導体界面の屈折率差が大きく取れる。この結果発光部下
方に向かった光がこの界面で反射される割合が増える。
例えばLEDを、サファイア基板面を下側にしてダイボ
ンドを行った場合は、上方に取り出せる光量が増えるた
め好ましい。
As in the embodiment shown in FIG. 1, when the concave-convex surface of the substrate 1 is buried with the cavity 13 left, and then the light-emitting portion is grown thereon to manufacture a light-emitting element, the cavity and the semiconductor are formed. A large difference in refractive index at the interface can be obtained. As a result, the proportion of light traveling downward from the light emitting portion is reflected at this interface.
For example, when the LED is die-bonded with the sapphire substrate surface facing downward, it is preferable because the amount of light that can be extracted upward increases.

【0027】また空洞部13を残したまま埋め込む事
は、基板1とその上に成長する半導体層との接触面積を
小さくできるという事であるため、半導体中に格子定数
差や熱膨張係数差に起因する歪を低減できる面で好まし
い。この歪の低減は、サファイア上にGaN系材料を厚
く成長した時に発生する反りを低減させる効果がある。
特に従来法ではSi基板上にGaN系材料を結晶成長す
る際に熱膨張係数差に起因した反りやクラックが発生し
良質の結晶成長を行えない問題があったが、本発明によ
る歪低減によりこの問題を解消できる。
Further, since it is possible to reduce the contact area between the substrate 1 and the semiconductor layer grown on the substrate 1 by leaving the cavity portion 13 left, it is possible to reduce the difference in lattice constant and difference in thermal expansion coefficient in the semiconductor. It is preferable in that the distortion caused can be reduced. This reduction in strain has the effect of reducing the warpage that occurs when a GaN-based material is grown thick on sapphire.
In particular, in the conventional method, there was a problem that warpage or cracks occurred due to the difference in thermal expansion coefficient during crystal growth of a GaN-based material on a Si substrate, and high quality crystal growth could not be performed. You can solve the problem.

【0028】さらに基板1とその上に成長する半導体層
2との接触面積を小さくできる事を利用すると、半導体
層2を厚く成長していった場合、この小さい接触部に応
力が集中し、この部分から基板1と半導体層2の分離が
可能となる。これを応用する事でGaNなどの基板が作
製可能となる。
Further, by utilizing the fact that the contact area between the substrate 1 and the semiconductor layer 2 grown thereon can be made small, when the semiconductor layer 2 is grown thick, stress concentrates on this small contact portion, The substrate 1 and the semiconductor layer 2 can be separated from the portion. By applying this, a substrate such as GaN can be manufactured.

【0029】以上、基板1の上に半導体層2を一層だけ
成長する場合について説明したが、転位欠陥をより少な
くするために、同様な工程を2回繰り返すようにしても
よい。即ち図5に示すように、上記と同様な手法にて基
板1の凹凸面を覆うように第一の半導体層2aの結晶成
長を行った後に、該第一の半導体層2aの表面を凹凸面
とする加工を施し、その上に気相成長により第一半導体
層2aの凸部の上方部から専ら結晶成長するようにして
第二の半導体結晶2bを形成することもできる。この場
合、特に基板1の凸部11と上記第一の半導体層2aに
形成する凸部11aの位置とを、垂直方向にずらす態様
にすれば、第二の半導体層2bには第一の半導体層2a
の凸部11a上部にある多くの転位が伝播しないことに
なる。つまり、かかる構成とすれば、第二の半導体層2
b全域を低転位領域とすることができ、より高品質の半
導体層が得られるものである。
Although the case where only one semiconductor layer 2 is grown on the substrate 1 has been described above, the same steps may be repeated twice in order to reduce dislocation defects. That is, as shown in FIG. 5, after crystal growth of the first semiconductor layer 2a is performed so as to cover the uneven surface of the substrate 1 by the same method as described above, the surface of the first semiconductor layer 2a is roughened. It is also possible to form the second semiconductor crystal 2b on which the second semiconductor crystal 2b is exclusively grown by crystal growth from above the convex portion of the first semiconductor layer 2a by vapor phase growth. In this case, in particular, if the protrusion 11 of the substrate 1 and the position of the protrusion 11a formed on the first semiconductor layer 2a are vertically displaced, the second semiconductor layer 2b has the first semiconductor layer 2b. Layer 2a
Many dislocations on the upper part of the convex portion 11a do not propagate. That is, with such a configuration, the second semiconductor layer 2
The entire dislocation region b can be a low dislocation region, and a higher quality semiconductor layer can be obtained.

【0030】また、第二の半導体結晶2bの表面をさら
に凹凸面とし、その上に同様に気相成長法により形成さ
れる第3の半導体層を形成するようにしても良い。或い
は、さらに同様の工程を繰り返して、複数の半導体層を
多重的に形成するようにしても良い。このような構成と
すれば、上述したような上下間の凸部の位置調整を意図
的に行わずとも、層を重ねる毎に伝播する転位を漸減さ
せることができる。
Further, the surface of the second semiconductor crystal 2b may be further made into a concavo-convex surface, and a third semiconductor layer similarly formed by the vapor phase growth method may be formed thereon. Alternatively, the same steps may be repeated to form a plurality of semiconductor layers in multiple layers. With such a configuration, it is possible to gradually reduce the dislocation propagating each time the layers are stacked, without intentionally adjusting the positions of the upper and lower convex portions as described above.

【0031】凸部の形成は、例えば通常のフォトリソグ
ラフイ技術を使って凸部形状に応じてパターン化し、R
IE技術等を使ってエッチング加工を行うことで作製で
きる。
The protrusions are formed by patterning according to the shape of the protrusions using, for example, a normal photolithography technique, and R
It can be manufactured by etching using IE technology or the like.

【0032】基板上に半導体層の結晶成長を行う方法は
HVPE、MOCVD、MBE法などがよい。厚膜を作
製する場合はHVPE法が好ましいが、薄膜を形成する
場合はMOCVD法が好ましい。
As a method of growing a crystal of a semiconductor layer on a substrate, HVPE, MOCVD, MBE method or the like is preferable. The HVPE method is preferable when forming a thick film, but the MOCVD method is preferable when forming a thin film.

【0033】基板上に半導体層の結晶成長を行う時の成
長条件(ガス種、成長圧力、成長温度、など)は、本発
明の効果が出る範囲内であれば、目的に応じ使い分けれ
ばよい。
The growth conditions (gas species, growth pressure, growth temperature, etc.) for crystal growth of the semiconductor layer on the substrate may be selected according to the purpose as long as the effects of the present invention can be obtained. .

【0034】[0034]

【実施例】[実施例1]c面サファイア基板上にフォト
レジストのパターニング(幅:2μm、周期:4μm、
ストライプ方位:ストライプ延伸方向がサファイア基板
の<11−20>方向)を行い、RIE(Reactive Ion
Etching)装置で5μmの深さまで断面方形型にエッチ
ングした。この時のアスペクト比は2.5であった。フ
ォトレジストを除去後、MOVPE装置に基板を装着し
た。その後、水素雰囲気下で1100℃まで昇温し、サ
ーマルエッチングを行った。その後温度を500℃まで
下げ、3族原料としてトリメチルガリウム(以下TM
G)を、N原料としてアンモニアを流し、GaN低温バ
ッファー層を成長した。つづいて温度を1000℃に昇
温し原料としてTMG・アンモニアを、ドーパントとし
てシランを流しn型GaN層を成長した。その時の成長
時間は、通常の凹凸の施していない場合のGaN成長に
おける4μmに相当する時間とした。
EXAMPLES Example 1 Photoresist patterning on a c-plane sapphire substrate (width: 2 μm, period: 4 μm,
Stripe azimuth: Stripe stretching direction is <11-20> direction of sapphire substrate, and RIE (Reactive Ion)
Etching) device was used to etch a rectangular cross-section to a depth of 5 μm. The aspect ratio at this time was 2.5. After removing the photoresist, the substrate was mounted on the MOVPE device. Then, the temperature was raised to 1100 ° C. in a hydrogen atmosphere to perform thermal etching. After that, the temperature is lowered to 500 ° C., and trimethylgallium (hereinafter TM
G) was used as N raw material and ammonia was caused to flow to grow a GaN low temperature buffer layer. Subsequently, the temperature was raised to 1000 ° C. and TMG / ammonia as a raw material and silane as a dopant were flown to grow an n-type GaN layer. The growth time at that time was set to a time corresponding to 4 μm in the GaN growth in the case where the usual unevenness is not applied.

【0035】成長後の断面を観察すると基板凹部に若干
の成長の痕跡は見られるものの、図1(c)に示すように
凹部に空洞部13を残したまま凹凸部を覆い、平坦にな
ったGaN膜が得られた。
When the cross section after the growth is observed, a slight trace of the growth can be seen in the concave portion of the substrate, but as shown in FIG. 1 (c), the concave and convex portions are covered while leaving the hollow portion 13 in the concave portion to become flat. A GaN film was obtained.

【0036】比較のために、通常のc面サファイア基板
上に同じ成長条件で成膜したGaN層と、同じパターン
のSiOマスクを使ってELO成長したGaN膜を用
意した。評価は、InGaN(InN混晶比=0.2、
100nm厚)を続けて成長して現れるピット(転位に
対応している)をカウントして転位密度とした。キヤリ
ヤ密度はホール効果測定で評価し、結晶軸のゆらぎはX
RCの¢スキャンで評価した。評価結果を表1、図4に
示す。
For comparison, a GaN layer formed on a normal c-plane sapphire substrate under the same growth conditions and a GaN film grown by ELO using a SiO 2 mask of the same pattern were prepared. The evaluation was InGaN (InN mixed crystal ratio = 0.2,
The pits (corresponding to dislocations) appearing after continuous growth of 100 nm thickness were counted to obtain the dislocation density. The carrier density is evaluated by Hall effect measurement, and the fluctuation of the crystal axis is X.
Evaluation was made by RC scan. The evaluation results are shown in Table 1 and FIG.

【0037】[0037]

【表1】 【table 1】

【0038】実施例のサンプルでは、転位密度の低減が
従来ELOと同程度に図れている事が判る。その一方、
キャリア濃度は通常GaN成長と同程度であった。また
XRCのFWHMは107secと一番小さく、総合的
にみて高品質の膜であるといえる。図4のXRCの¢ス
キャンデータからも、またSiOマスクを使ったEL
O成長によるGaN膜のように、ラテラル成長方向付近
で強まる結晶軸のゆらぎも無い、高品質な結晶であるこ
とが確認された。
It can be seen that the sample of the embodiment can reduce the dislocation density to the same level as the conventional ELO. On the other hand,
The carrier concentration was almost the same as that of GaN growth. The FWHM of XRC is 107 sec, which is the smallest, and it can be said that it is a high-quality film as a whole. From the XRC scan data of Fig. 4, the EL using the SiO 2 mask is also used.
It was confirmed that it is a high-quality crystal without the fluctuation of the crystal axis that strengthens in the vicinity of the lateral growth direction like a GaN film formed by O growth.

【0039】[実施例2]実施例1の内、凹凸部の形状
を以下の様に変更した以外は同じとした。(幅:2μ
m、周期:4μm、ストライプ方位:サファイア基板の
<11−20>)を行い、RIE(Reactive Ion Etchi
ng)装置で0.5μmの深さまで断面方形型にエッチン
グした。この時のアスペクト比は0.25であった。
[Example 2] The same as Example 1 except that the shape of the uneven portion was changed as follows. (Width: 2μ
m, period: 4 μm, stripe orientation: <11-20> of sapphire substrate, and RIE (Reactive Ion Etchi)
ng) device to a rectangular cross section to a depth of 0.5 μm. The aspect ratio at this time was 0.25.

【0040】成長後の断面を観察すると、図2(c)に示
すように、凹凸部が埋め込まれると共に、凹部12に相
当していた部分が空洞部13及びその底部のGaN膜2
1に代替された成長となっている事が判明した。この膜
を評価するためにInGaN(InN混晶比=0.2、
100nm厚)を続けて成長し、上述と同じく現れるピ
ットの観察を行った。凸部上部には転位に対応したピッ
トが多数見られたが、凸部の上方部を起点とし横方向に
成長した部分にみられるピットは少なかった。一方凹部
中央にはピットが多数見られた。この膜の転位密度を数
えると9×10cm−3と実施例1に比較しては多く
なっていたものの、通常のGaN成長に比べると低減し
ていた。これは凸部の上方部を起点とし横方向に成長し
た部分及び凹部から成長した膜がつながった状態で凹凸
部が覆われた結果、凹部中央部には転位の多い領域が残
留したものと考えられる。
When the cross section after the growth is observed, as shown in FIG. 2C, the concave and convex portions are buried, and the portion corresponding to the concave portion 12 is the cavity portion 13 and the GaN film 2 at the bottom thereof.
It turned out that the growth was replaced by 1. In order to evaluate this film, InGaN (InN mixed crystal ratio = 0.2,
100 nm thick) was continuously grown, and the pits appearing as above were observed. Although many pits corresponding to dislocations were found in the upper part of the convex part, few pits were observed in the laterally grown part starting from the upper part of the convex part. On the other hand, many pits were seen in the center of the recess. When the dislocation density of this film was counted, it was 9 × 10 7 cm −3, which was higher than that in Example 1, but was lower than that in normal GaN growth. It is thought that this is because a region with many dislocations remained in the central part of the recess as a result of covering the uneven part with the part grown in the lateral direction starting from the upper part of the projection and the film grown from the recess connected to each other. To be

【0041】[実施例3]実施例1で得られた膜に連続
してn型AlGaNクラッド層、InGaN発光層、p
型AlGaNクラッド層、p型GaNコンタクト層を順
に形成し、発光波長370nmの紫外LEDウエハーを
作製した。その後、電極形成、素子分離を行い、LED
素子とした。ウェハ全体で採取されたLEDチップの出
力の平均値と逆電流特性を評価した。比較対象として
は、従来のELO技術を使って上記構造を作製した紫外
LEDチップと通常のサファイア基板を使って上記構造
を作製した紫外LEDチップである。これらの評価結果
を表2に示す。
[Embodiment 3] An n-type AlGaN cladding layer, an InGaN light emitting layer, p
-Type AlGaN clad layer and p-type GaN contact layer were sequentially formed to produce an ultraviolet LED wafer having an emission wavelength of 370 nm. After that, electrodes are formed and elements are separated, and the LED
The element. The average value of the output of the LED chips collected on the entire wafer and the reverse current characteristic were evaluated. For comparison, an ultraviolet LED chip having the above structure manufactured by using the conventional ELO technique and an ultraviolet LED chip having the above structure manufactured using a normal sapphire substrate are used. The results of these evaluations are shown in Table 2.

【0042】[0042]

【表2】 [Table 2]

【0043】表2に示すように本発明を用い作製したサ
ンプルでは従来例に比べ出力が高く、リーク電流の少な
い高品質のLEDが作製できる事がわかった。
As shown in Table 2, it has been found that the samples produced by using the present invention can produce high-quality LEDs with higher output and less leakage current than those of the conventional example.

【0044】[実施例4]実施例1の内、半導体層成長
時にトリメチルアルミニウム(TMA)を追加した以外
は同じとした。結果、AlGaN(Al組成0.2)の
膜が凹部に空洞を残し、凹凸部を覆うように平坦な膜が
成長できていた。凹部上部の、凸部の上方部を起点とし
横方向に成長した部分にみられるピットは少なかった。
これにより従来のELO技術では成し得なかったAlG
aN膜の高品質化(低転位密度化)が本発明を用いてで
きた事を確認した。
[Example 4] The same as Example 1 except that trimethylaluminum (TMA) was added during the growth of the semiconductor layer. As a result, a film of AlGaN (Al composition 0.2) left a cavity in the recess, and a flat film could be grown so as to cover the uneven portion. There were few pits seen in the laterally grown portion above the concave portion as the starting point above the convex portion.
As a result, AlG that could not be achieved by conventional ELO technology
It was confirmed that high quality (low dislocation density) of the aN film was achieved by using the present invention.

【0045】[実施例5]次にGaNを基板として用い
た例を示す。GaN基板上にフォトレジストのパターニ
ング(幅:2μm、周期:4μm、ストライプ方位:G
aN基板の<1−100>)を行い、RIE装置で5μ
mの深さまで断面方形型にエッチングした。この時のア
スペクト比は2.5であった。フォトレジストを除去
後、MOVPE装置に基板を装着した。その後、窒素、水
素、アンモニア混合雰囲気下で1000℃まで昇温し
た。その後、原料としてTMG・アンモニアを、ドーパ
ントとしてシランを流しn型GaN層を成長した。その
時の成長時間は、通常の凹凸の施していない場合のGa
N成長における4μmに相当する時間とした。
Example 5 Next, an example using GaN as a substrate will be shown. Photoresist patterning on GaN substrate (width: 2 μm, period: 4 μm, stripe orientation: G
<1-100>) of aN substrate and perform 5μ with RIE device.
Etching was performed in a rectangular cross section to a depth of m. The aspect ratio at this time was 2.5. After removing the photoresist, the substrate was mounted on a MOVPE device. Then, the temperature was raised to 1000 ° C. in a mixed atmosphere of nitrogen, hydrogen and ammonia. After that, TMG / ammonia as a raw material and silane as a dopant were flown to grow an n-type GaN layer. At that time, the growth time is Ga when the normal unevenness is not applied.
The time corresponding to 4 μm in N growth was set.

【0046】成長後の断面を観察すると基板凹部への成
長、凸部側面への成長が見られるものの、図5(a)〜
(c)に示すように空洞部を残したまま凹凸部を覆い、平
坦になったGaN膜が得られた。続いて得られた膜のピ
ットの評価を行った。基板としてもちいたGaNのピッ
ト密度は2×10cm−3であったが、本実施例の成
長を行うと凸部上部で1×10cm−3、凹部上部で
5×10cm−3にピットが減少している事がわかっ
た。このように既に転位の少ない基板に対しても更なる
転位密度低減効果があることが確認できた。
When the cross section after the growth is observed, the growth on the concave portion of the substrate and the growth on the side surface of the convex portion are observed.
As shown in (c), a flat GaN film was obtained by covering the irregularities while leaving the cavity. Subsequently, the pits of the obtained film were evaluated. The pit density of GaN used as the substrate was 2 × 10 5 cm −3 , but when the growth of this example was carried out, it was 1 × 10 5 cm −3 at the upper portion of the convex portion and 5 × 10 3 cm − at the upper portion of the concave portion. It turned out that the number of pits was reduced to 3 . Thus, it was confirmed that the dislocation density can be further reduced even on a substrate having few dislocations.

【0047】[実施例6]実施例1で作製したGaN結
晶を第一結晶とし、その上に第二結晶を成長させた。ま
ずGaN第一結晶にフォトレジストのパターニング
(幅:2μm、周期:4μm、ストライプ方位:GaN
基板の<1−100>)を行い、RIE装置で2μmの
深さまで断面方形型にエッチングした。この時のパター
ニングは基板凸部の上に第一結晶の凹部がくるような配
置とした。この時のアスペクト比は1であった。フォト
レジストを除去後、MOVPE装置に基板を装着した。その
後、窒素、水素、アンモニア混合雰囲気下で1000℃
まで昇温した。その後、原料としてTMG・アンモニア
を、ドーパントとしてシランを流しn型GaN層を成長
した。その時の成長時間は、通常の凹凸の施していない
場合のGaN成長における4μmに相当する時間とし
た。
[Example 6] The GaN crystal produced in Example 1 was used as a first crystal, and a second crystal was grown thereon. First, patterning a photoresist on the GaN first crystal (width: 2 μm, period: 4 μm, stripe orientation: GaN
<1-100>) of the substrate was performed, and the substrate was etched in a rectangular cross-section to a depth of 2 μm with an RIE apparatus. The patterning at this time was arranged so that the concave portion of the first crystal was located on the convex portion of the substrate. The aspect ratio at this time was 1. After removing the photoresist, the substrate was mounted on a MOVPE device. After that, 1000 ° C in a mixed atmosphere of nitrogen, hydrogen and ammonia
The temperature was raised to. After that, TMG / ammonia as a raw material and silane as a dopant were flown to grow an n-type GaN layer. The growth time at that time was set to a time corresponding to 4 μm in the GaN growth in the case where the usual unevenness is not applied.

【0048】成長後の断面を観察すると基板凹部への成
長、凸部側面への成長が見られるものの、図5に示すよ
うに空洞部を残したまま凹凸部を覆い、平坦になったG
aN膜が得られた。続いて得られた膜のピットの評価を
行ったところ8×10cm −3にピットが減少してい
る事がわかった。このように本実施例を繰り返す事によ
り更なる転位密度低減効果があることが確認できた。
When the cross section after growth is observed, the growth on the concave portion of the substrate is
Although long and growth is seen on the side surface of the convex part, as shown in FIG.
As shown in the figure, G
An aN film was obtained. Then, evaluate the pits of the obtained film.
8x10 when I went5cm -3The pits are decreasing
I found out that By repeating this example,
It was confirmed that there was a further dislocation density reduction effect.

【0049】[0049]

【発明の効果】以上説明した通りの本発明の半導体基材
及びその作製方法によれば、基板に対して凸部を設けて
おくことで、マスク層を使用することなく低転位領域を
形成可能なラテラル成長を行わせることができる。従っ
てマスク層を形成することに起因する問題点である軸の
微小チルティングによるラテラル成長部の合体部分の新
たな欠陥の発生の問題やオートドーピングの問題、Al含
有半導体材料が選択成長不可という問題を解消できる。
また、基板に凹凸面を設けた後に、一回の成長でバッ
ファ層成長から発光部等の半導体結晶層の成長を連続し
て行えるので、製造プロセスの簡略化が図れるという利
点がある。さらに空洞部の利用による反射率向上や、残
留歪の現象などの効果もあり特性向上、低コスト化の面
から非常に価値のある発明である。
As described above, according to the semiconductor substrate and the method of manufacturing the same of the present invention, the low dislocation region can be formed without using the mask layer by providing the convex portion on the substrate. Lateral growth can be performed. Therefore, the problem caused by the formation of the mask layer is the problem of the generation of new defects in the merged portion of the lateral growth portion due to the minute tilting of the axis, the problem of autodoping, and the problem that the Al-containing semiconductor material cannot be selectively grown. Can be resolved.
Further, after providing the uneven surface on the substrate, the growth of the buffer layer and the growth of the semiconductor crystal layer such as the light emitting portion can be continuously performed by one growth, which is advantageous in that the manufacturing process can be simplified. Further, it is an extremely valuable invention from the viewpoints of improving the characteristics and reducing the cost due to the effect of improving the reflectance and the phenomenon of residual strain by utilizing the cavity.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係わる半導体基材の結晶成長状態を説
明するための断面図である。
FIG. 1 is a cross-sectional view for explaining a crystal growth state of a semiconductor substrate according to the present invention.

【図2】本発明に係わる半導体基材の結晶成長状態を説
明するための断面図である。
FIG. 2 is a cross-sectional view for explaining a crystal growth state of a semiconductor substrate according to the present invention.

【図3】本発明に係わる半導体基材の結晶成長状態を説
明するための断面図である。
FIG. 3 is a cross-sectional view for explaining a crystal growth state of a semiconductor substrate according to the present invention.

【図4】XRCのθスキャンデータ−を示すグラフ図で
ある。
FIG. 4 is a graph showing θ-scan data of XRC.

【図5】本発明に係わる半導体基材の結晶成長状態を説
明するための断面図である。
FIG. 5 is a cross-sectional view for explaining a crystal growth state of a semiconductor substrate according to the present invention.

【符号の説明】[Explanation of symbols]

1 基板 11 凸部 12 凹部 13 空洞部 2 半導体層 1 substrate 11 convex 12 recess 13 Cavity 2 semiconductor layers

───────────────────────────────────────────────────── フロントページの続き (72)発明者 湖東 雅弘 兵庫県伊丹市池尻4丁目3番地 三菱電 線工業株式会社伊丹製作所内 (56)参考文献 特開2000−106455(JP,A) 特開2000−156524(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/205 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masahiro Koto, Masahiro Koto, 4-3 Ikejiri, Itami City, Hyogo Prefecture, Mitsubishi Electric Wire & Cable Co., Ltd. (56) Reference JP 2000-106455 (JP, A) JP 2000 −156524 (JP, A) (58) Fields investigated (Int.Cl. 7 , DB name) H01L 21/205

Claims (14)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 基板と該基板上に気相成長された半導
体結晶とからなる半導体基材であって、半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、サファイア(C面、A面、R
面)、SiC(6H、4H、3C)、Si、スピネル、
ZnO、GaAs、またはNGOからなり、 前記基板の結晶成長面凹凸面とされ、 前記半導体結晶は、基板の凹凸面における凸部の上方部
と凹部の表面とら結成長し、凹部に空洞を形成す
ることなく基板の凹凸面を覆っているものである、 半導体基材。
1. A semiconductor substrate comprising a substrate and a semiconductor crystal vapor-deposited on the substrate, wherein the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is sapphire (C surface, A surface, R
Surface), SiC (6H, 4H, 3C), Si, spinel,
It is made of ZnO, GaAs, or NGO, and the crystal growth surface of the substrate is an uneven surface, and the semiconductor crystal is a portion above the convex portion on the uneven surface of the substrate.
And surface whether we crystal growth of the recess to form a cavity in the recess
A semiconductor base material that covers the uneven surface of the substrate without causing any damage .
【請求項2】 上記基板の結晶成長面の凸部が、平行な
ストライプ形状からなる凸部であることを特徴とする請
求項1記載の半導体基材。
2. The semiconductor substrate according to claim 1, wherein the projections on the crystal growth surface of the substrate are projections each having a parallel stripe shape.
【請求項3】 上記ストライプの長手方向が上記半導体
結晶<1−100>方向であることを特徴とする請求
記載の半導体基材。
Wherein the longitudinal direction of the stripe is the semiconductor
The semiconductor substrate according to claim 2 , wherein the crystal has a <1-100> direction .
【請求項4】 基板と、該基板上に気相成長された半導
体結晶とからなる半導体基材であって、 半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、GaN、AlGaN、AlN
を除く材料からなり、 前記基板の結晶成長面は凹凸面とされ、 前記半導体結晶は、基板の凹凸面における凸部の上方部
と凹部の表面とから結晶が成長し、凸部の上方部を起点
とし横方向に成長した膜と、凹部の表面から成長した膜
とが互いにつながって、基板の凹凸面を覆っているもの
である、 半導体基材。
4. A substrate and a semiconductor device vapor-deposited on the substrate.
A semiconductor substrate comprising a body crystal, wherein the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is a substrate, such as GaN, AlGaN, AlN
Other than the above, the crystal growth surface of the substrate is an uneven surface, and the semiconductor crystal is an upper portion of the projection on the uneven surface of the substrate.
The crystal grows from the surface of the
And a film grown laterally and a film grown from the surface of the recess
Connected to each other to cover the uneven surface of the substrate
Which is a semiconductor substrate.
【請求項5】 上記凹部において、半導体結晶と基板と
の間に空洞が存在し ないものである、請求項4記載の半
導体基材。
5. A semiconductor crystal and a substrate in the recess.
5. The semi-mold according to claim 4, wherein there is no cavity between them.
Conductor base material.
【請求項6】 上記基板の結晶成長面の凸部が、平行な
ストライプ形状からなる凸部であることを特徴とする請
求項4記載の半導体基材。
6. The projections on the crystal growth surface of the substrate are parallel to each other.
A contract characterized by being a stripe-shaped convex portion
The semiconductor substrate according to claim 4.
【請求項7】 上記ストライプの長手方向が上記半導体
結晶の<1−100>方向であることを特徴とする請求
項6記載の半導体基材。
7. The semiconductor is formed in the longitudinal direction of the stripe.
<1-100> direction of the crystal
Item 7. A semiconductor substrate according to item 6.
【請求項8】 基板と、該基板上に気相成長された半導
体結晶とからなる半導体基材であって、 半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、サファイア(C面、A面、R
面)、SiC(6H、4H、3C)、Si、スピネル、
ZnO、GaAs、またはNGOからなり、 前記 基板の結晶成長面凹凸面とされ前記半導体結晶は、 基板の凹凸面における凸部の上方部と凹部の表面とから
結晶が成長し、凹部に空洞を形成することなく基板の凹
凸面を覆って 形成された第一の半導体結晶と、 この第一の半導体結晶の表面を凹凸面とし、その凹凸面
における凸部の上方部と凹部の表面とから結晶が成長
し、凹部に空洞を形成することなく該凹凸面を覆って
成された第二の半導体結晶と からなることを特徴とする半導体基材。
8. A substrate and a vapor-deposited semiconductor on the substrate.
A semiconductor substrate comprising a body crystal, wherein the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is sapphire (C surface, A surface, R
Surface), SiC (6H, 4H, 3C), Si, spinel,
ZnO, composed of GaAs or NGOs,, crystal growth surface of the substrate is an irregular surface, the semiconductor crystal from the upper portion and the concave portion of the surface of the convex portion of the concavo-convex surface of the substrate
The crystal grows and the substrate is recessed without forming a cavity in the recess.
The first semiconductor crystal formed so as to cover the convex surface, and the surface of the first semiconductor crystal is an uneven surface.
Crystal grows from the upper part of the convex part and the surface of the concave part in
And the semiconductor substrate, wherein the second semiconductor crystal made form <br/> covering the concavo convex without forming a cavity in the recess, in that it consists of.
【請求項9】 基板と、該基板上に気相成長された半導
体結晶とからなる半導体基材であって、 半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、GaN、AlGaN、AlN
を除く材料からなり、 前記基板の結晶成長面は凹凸面とされ、 前記半導体結晶は、 基板の凹凸面における凸部の上方部と凹部の表面とから
結晶が成長し、凸部の 上方部を起点とし横方向に成長し
た膜と、凹部の表面から成長した膜とが互いにつながっ
て、基板の凹凸面を覆って形成された第一の半導体結晶
と、 この第一の半導体結晶の表面を凹凸面とし、その凹凸面
における凸部の上方部と凹部の表面とから結晶が成長
し、凸部の上方部を起点とし横方向に成長した膜と、凹
部の表面から成長した膜とが互いにつながって、該凹凸
面を覆って形成された第二の半導体結晶と、 からなることを特徴とする半導体基材。
9. A substrate and a vapor-deposited semiconductor on the substrate.
A semiconductor substrate comprising a body crystal, wherein the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is a substrate, such as GaN, AlGaN, AlN
Except that the crystal growth surface of the substrate is an uneven surface, and the semiconductor crystal is composed of the upper surface of the convex portion and the surface of the concave portion of the uneven surface of the substrate.
The crystal grows and grows laterally starting from the upper part of the protrusion.
Film and the film grown from the surface of the recess are connected to each other.
The first semiconductor crystal formed to cover the uneven surface of the substrate.
And the surface of this first semiconductor crystal as an uneven surface, and the uneven surface
Crystal grows from the upper part of the convex part and the surface of the concave part in
The film grown laterally from the upper part of the convex part and the concave part
The film grown from the surface of the part is connected to each other,
A second semiconductor crystal formed so as to cover the surface, and a semiconductor substrate.
【請求項10】 上記基板の凹部において、半導体結晶
と基板との間に空洞が存在しないものである、請求項9
記載の半導体基材。
10. A semiconductor crystal in the recess of the substrate.
10. There is no cavity between the substrate and the substrate.
The semiconductor substrate described.
【請求項11】 請求項8〜10のいずれかに記載の半
導体基材における第二の半導体結晶の表面を凹凸面と
し、その上に同様に気相成長法により形成された第3の
半導体層乃至は同様の工程を繰り返すことで多重的に形
成された複数の半導体層を有することを特徴とする半導
体基材。
11. A third semiconductor layer formed on the surface of the second semiconductor crystal in the semiconductor substrate according to claim 8 as an uneven surface and similarly formed thereon by a vapor phase growth method. And / or a semiconductor substrate having a plurality of semiconductor layers formed by repeating the same process.
【請求項12】 基板と、該基板上に気相成長された半
導体結晶とからなる半導体基材を製造する方法であっ
て、 半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、サファイア(C面、A面、R
面)、SiC(6H、4H、3C)、Si、スピネル、
ZnO、GaAs、またはNGOからなり、 基板上に半導体結晶を気相成長させるにあたり、予め基
板表面に凹凸面加工を施し、次いで該基板に対して原料
ガスを供給し、前記凹凸面における凸部の上方部と凹部
の表面とから結晶を成長させ、凹部に空洞を形成するこ
となく基板の凹凸面を覆わせることを特徴とする半導
体基材の製造方法。
12. A substrate and a half vapor-deposited on the substrate.
It is a method of manufacturing a semiconductor substrate composed of a conductor crystal.
Then, the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is sapphire (C surface, A surface, R
Surface), SiC (6H, 4H, 3C), Si, spinel,
When vapor-depositing a semiconductor crystal on a substrate, which is made of ZnO, GaAs, or NGO , the substrate surface is preliminarily processed to have an uneven surface, and then a raw material gas is supplied to the substrate to form a convex portion on the uneven surface. Upper part and recess
It is possible to grow a crystal from the surface of the
Characterized Rukoto not cover the uneven surface of the substrate without a method of manufacturing a semiconductor substrate.
【請求項13】 基板と、該基板上に気相成長された半
導体結晶とからなる半導体基材を製造する方法であっ
て、 半導体結晶は、Al x Ga 1-x-y In y N(0≦x≦1、
0≦y≦1)によって決定される半導体からなる結晶で
あり、基板は、前記半導体結晶層を成長させるためのベ
ースとなる基板であって、GaN、AlGaN、AlN
を除く材料から なり、 基板上に半導体結晶を気相成長させるにあたり、予め基
板表面に凹凸面加工を施し、次いで該基板に対して原料
ガスを供給し、前記凹凸面における凸部の上方部と凹部
の表面とから結晶を成長させ、凸部の上方部を起点とし
横方向に成長させた膜と、凹部の表面から成長させた膜
とを互いにつなげて基板の凹凸面を覆う半導体結晶とす
ることを特徴とする、半導体基材の製造方法。
13. A substrate and a half vapor-deposited on the substrate.
It is a method of manufacturing a semiconductor substrate composed of a conductor crystal.
Then, the semiconductor crystal is Al x Ga 1-xy In y N (0 ≦ x ≦ 1,
A crystal made of a semiconductor determined by 0 ≦ y ≦ 1)
And the substrate is a base for growing the semiconductor crystal layer.
Substrate, which is a substrate, such as GaN, AlGaN, AlN
, Which is used for the vapor phase growth of semiconductor crystals on the substrate.
Uneven surface processing is applied to the plate surface, and then the raw material is applied to the substrate.
Gas is supplied, and the upper part of the convex part and the concave part on the uneven surface
The crystal grows from the surface of the
Films grown laterally and films grown from the surface of the recess
Are connected to each other to form a semiconductor crystal that covers the uneven surface of the substrate.
A method of manufacturing a semiconductor substrate, comprising:
【請求項14】 上記凹部において、半導体結晶と基板
との間に空洞が存在しないものである、請求項13記載
の半導体基材の製造方法。
14. A semiconductor crystal and a substrate in the recess.
14. There is no cavity between and,
The method for manufacturing a semiconductor substrate.
JP33559199A 1999-03-17 1999-11-26 Semiconductor substrate and manufacturing method thereof Expired - Fee Related JP3471685B2 (en)

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