WO2000055893A1 - Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method - Google Patents

Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method Download PDF

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Publication number
WO2000055893A1
WO2000055893A1 PCT/JP2000/001588 JP0001588W WO0055893A1 WO 2000055893 A1 WO2000055893 A1 WO 2000055893A1 JP 0001588 W JP0001588 W JP 0001588W WO 0055893 A1 WO0055893 A1 WO 0055893A1
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Prior art keywords
substrate
crystal
semiconductor
layer
growth
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PCT/JP2000/001588
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French (fr)
Japanese (ja)
Inventor
Kazuyuki Tadatomo
Hiroaki Okagawa
Yoichiro Ouchi
Masahiro Koto
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Mitsubishi Cable Industries, Ltd.
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Publication date
Priority to JP7213399 priority Critical
Priority to JP11/72133 priority
Priority to JP33642199A priority patent/JP3471687B2/en
Priority to JP33559199A priority patent/JP3471685B2/en
Priority to JP11/335591 priority
Priority to JP11/336421 priority
Priority to JP35304499A priority patent/JP3441415B2/en
Priority to JP11/353044 priority
Application filed by Mitsubishi Cable Industries, Ltd. filed Critical Mitsubishi Cable Industries, Ltd.
Publication of WO2000055893A1 publication Critical patent/WO2000055893A1/en

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    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
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    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
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    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
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    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • C30B29/406Gallium nitride
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    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
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    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Abstract

The growth surface of a substrate (1) is processed to have projections and recesses. The bottoms of the recesses may be covered with a mask. When a crystal is grown by vapor deposition by using this substrate, the material gas does not enter sufficiently into the recesses (12), and the crystal growth occurs only from the tops of the projections (11). As shown in Figure 1(b), crystal units (20) are produced at the initial stage of the crystal growth. As the crystal growth progresses, the crystal units grow laterally from the tops of the projections (11) and join one another to form a film. In due course, a crystal layer (2) covering the projections and recesses of the substrate (1) is formed leaving cavities (13) of the recesses, as shown in Figure 1(c). Thus a semiconductor substrate of the invention is produced. A low-dislocation region is formed at the portions grown laterally, that is, at the upper parts of the recesses (12), and the produced crystal layer has a high quality. A method of producing a semiconductor crystal comprises separating a semiconductor base into a substrate (1) and a crystal layer (2) at its cavity portion.

Description

Specification

And manufacturing method thereof semiconductor substrate, and a manufacturing method of the semiconductor crystal

Technical field

The present invention relates to a semiconductor substrate, the semiconductor crystal, and to a manufacturing method thereof, Ru der relates useful structures and methods particularly when using easily semiconductor material cause dislocation defects.

BACKGROUND

If crystals grow to G a N-based materials, G a N-based material is sapphire in order was not a substrate which is lattice-matched, S i C, spinel, a recently using a substrate which is not lattice-matched, such as S i. However, in the film of G a N was prepared due to not lattice-matched, 1 0 1 Q pieces Z cm 2 things dislocations are present. Recently high brightness light-emitting diodes, although a semiconductor laser is realized, in order to improve the characteristics are desirable to reduce the dislocation density.

In order not to cause defects such as dislocation due to differences such as lattice constant, it may be used the same crystal as the material for crystal growth. For example may the crystal growth of G a N-based semiconductor using a G a N substrate, but circumstances that still using a sapphire not obtain a large size as the substrate. Recently, upon vapor phase growth on a G a N base layer grown on sapphire, it was carried out the crystal growth of the lateral direction of growth selected to provide a partial mask the underlying layer, reduce dislocation density high quality method of obtaining crystals has been proposed (e.g., JP-a-1 0 3 1 2 9 7 1 No.). This film can be obtained G a N crystals thicker growth possible to separate and remove the substrate, a crack may be generated due to the difference of the differences and the thermal expansion coefficient of the lattice constants, have such problems as substrate cracking occurs substrate having a large area has not been obtained.

In the above JP-A 1 0 3 1 2 9 7 1 discloses, a method of obtaining a film having a reduced dislocation density is disclosed in the lateral direction grown portion on the mask layer, C in the lateral growth direction axis is a problem when was and is inclined while a small amount is produced, the crystal quality This ensures that it has been found that there is a new problem of lowering (MRS 1998 Fall Meeting Proceedings G3. 1). This also can be confirmed by the incident side position dependence of the X-ray rocking curve measurement (XRC) measured scan). That is, the full width at half maximum of the X-ray rocking curve by incident X-rays from the lateral growth Direction (FWHM) is larger than the F WHM by X-ray from a stripe direction of the mask layer, a minute inclination of C-axis ( It shows that there is orientation dependent on tilting). This suggests the possibility of a large number induced a new defect to the union part of the lateral growth on the mask.

Moreover, as what is commonly used as the mask layer material but is of a S i O 2, that when the crystal growth layer product is weight on S i component is transferred into the crystal growth layer, so-called auto-doping pollution it was also found that there is a problem.

Furthermore, the semiconductor material containing A 1, for example, when the A 1 G a N grown S i O 2 mask layer with board on, even crystal growth on the mask layer, effectively row Introduction selective growth itself there is also a problem that it is not.

In an attempt to solve this problem, the substrate provided with the buffer layer 及 beauty G a N layer on a base substrate of S i C, subjected to a stripe groove force 卩E leading up to the S i C layer projecting part is formed, a method of crystal growth have been proposed G a N layer which is to be located in the upper part of the convex portion (MRS 1998 Fall Meeting Proceedings G3. 3 8). According to this method S i 0 can also 2 be selectively growing without mask layer, it is possible to solve the various problems caused by the use of S io 2 mask described above.

The method also the method it is possible to use a sapphire substrate as the base substrate is disclosed (e.g., JP-A-1 1 one 1 9 1 6 5 9 JP). However, in the above SL method, a G a N-based material is grown on the buffer layer material Rapi a sapphire base substrate, once grooving removed from the growth reactor is required then line Utoyuu step crystal growth again since, a new disadvantage has occurred that the manufacturing process is complicated, also the cost increases work processes had problems such as such (Society of applied physics 9 9 fall Proceedings 2 P-W- 8) in an attempt to obtain a low dislocation density region by the attached burying growth a step on G a N substrate it is also disclosed. Here low dislocation density region is formed in a part of the layer embedded in.

However, in the above method, in order to obtain a low dislocation density region, the spacing of the protrusions necessary widen, or it is necessary to increase the depth of the recess. Thus it is necessary to the thickly grown over time included padded to the occurrence of cracks due to the thickened, have inherent various problems such as it takes, the cost since it takes time.

Although have been made attempts to crystal growth of G a N-based material on S i substrate, G a N type warp or crack due to thermal expansion coefficient difference to grow a crystal can not perform the crystal growth of good quality occurs there was a problem.

Accordingly, the present invention has been made in view of the above problems, to avoid various problems that attributable to ELO growth using a conventional mask layer, and is intended to simplify the manufacturing process. In addition, the present invention is intended to solve the problem caused by the embedded growth of the stepped structure that does not have a mask. Further, the present invention aims at solving the selective growth can not problems of the prior which was difficult A 1 G a N. Further, the present invention is intended to suppress the generation of anti if Re cracks in the case of using the S i substrate. In view of the above problems, and the purpose of obtaining a G a N crystal having a large area. To avoid various problems caused by ELO growth using a conventional mask layer was or, and is aimed at simplifying the manufacturing process.

Disclosure of the Invention

The semiconductor substrate of the present invention is a semiconductor substrate ing from a vapor growth semiconductor crystal substrate and the substrate on the crystal growth surface of the substrate is an irregular surface, the semiconductor crystal is uneven it is characterized in that the upper portion of the protrusion in a plane in which exclusively are grown.

In this case, it is desirable the semiconductor crystal is I n G a A 1 N.

The convex portion of the crystal growth surface of the substrate, and is preferably child and the convex portion composed of a parallel stripes.

Furthermore, the semiconductor crystal is a I n G a A 1 N, longitudinal Direction of Katsusu stripe is the stripe is parallel to said I n G a A 1 N (1- 1 0 0) crystal plane and this is more preferable.

Specific semiconductor substrate from the present invention is a semiconductor substrate made of a vapor growth semiconductor crystal substrate and the substrate on the crystal growth surface of the substrate is an irregular surface, the in semiconductor crystal semi conductor substrate which is exclusively crystal growth from the upper part of the convex portion in the concavo convex, the concave-convex surface is covered with grown semiconductor crystal, in the layer with the four convex surface of the semi-conductor crystals between the recess and is characterized in that the cavity is formed.

The recess of the uneven surface of the substrate, the from layer covered with masks that can not substantially crystal growth, the semiconductor crystal is exclusively crystal growth from the upper part of the convex portion of the uneven surface of the substrate it may be the one that was.

Also, the semiconductor substrate, and uneven surface of the crystal growth surface of the substrate, the first layer of semiconductor crystal formed by exclusively by crystal growth from the upper part of the convex portion in the concave-convex surface by vapor deposition If, to the surface of the layer of the first semiconductor crystal with uneven surface, the structure comprising a second layer of semiconductor crystal formed by exclusively by crystal growth from the upper part of the convex portion of the same Niso it is also possible.

Also, the semiconductor substrate, and uneven surface of the crystal growth surface of the substrate, the recess from the layer covered with a mask that can not be substantially crystalline growth, by vapor phase deposition of put that convex portions on the uneven surface a first layer of semiconductor crystal formed by being exclusively crystal growth from the upper part, the uneven surface of the surface layer of the first semiconductor crystal, substantially crystalline growth from the layer similarly recess It was covered with a mask not, of the convex portion from the upper portion further exclusively can be configured comprising a second layer of semiconductor crystal formed by being grown, the second in the semiconductor substrate the surface of the layer of semiconductor crystals and uneven surface, a plurality of semiconductor crystals that have been multiplexed formed by repeating the layers to the same process of the third semiconductor crystal formed by the same vapor phase growth method on the even if it is provided with a layer of Unishi There. Further formed, the surface of the layer of the second semiconductor crystal in the semiconductor substrate by an uneven surface, covered with a mask that can not be substantially crystalline growth recesses from the layer, the same as vapor deposition thereon the layers or the third semiconductor crystal was may be made to include a layer of multiple-formed a plurality of semiconductor crystal and this repeating the same process. The method of manufacturing a semiconductor substrate of the present invention, a semiconductor crystal or near to vapor phase growth, subjected to uneven surface processing in advance the substrate surface and then the raw material gas was supplied to the substrate on the substrate, wherein the uneven surface wherein the cover an uneven surface before the serial board at solely crystal grown by the semiconductor crystal from the upper portion of the convex portion in.

Further, in the manufacturing method, from the layer of the concave portions of the concavo-convex surface of the substrate covered with a mask that can not be substantially crystal growth, then the raw material gas was supplied to the substrate, the convex portion in the concave convex at semiconductor crystal exclusively by crystal growth from the upper part may cover the concave convex surface of the substrate.

The method of manufacturing a semiconductor crystal of the present invention, the uneven surface of the crystal growth surface of the substrate, wherein the uneven surface is covered with a semiconductor crystal exclusively by crystal growth from the upper part of the convex portion in the concavo convex surface facing the vapor deposition together, it is characterized in that the manufactured laminate comprising a cavity between the concave portion in the layer and the uneven surface of a semiconductor crystal, separating the semiconductor crystal and the substrate in said cavity portion. In this case, it is desirable the semiconductor crystal is I n G a A 1 N.

In the manufacturing method of the semiconductor crystal according to the present invention, the manufacturing method the same way of the semiconductor substrate of the present invention, the step of forming a semiconductor crystal may be repeated a plurality of times. Also, it may be covered with a mask not substantially crystal growth concave portion from the layer.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a sectional view for explaining a crystal growth condition of the semiconductor substrate according to the present invention. In the figure, 1 is a substrate, 1 1 protrusion, 1 2 recess 1 3 cavity, 2 is a semiconductor crystal layer.

Figure 2 is a sectional view for explaining a crystal growth condition of the semiconductor substrate according to the present invention. Figure 3 is a sectional view for explaining a crystal growth condition of the semiconductor substrate according to the present invention.

Figure 4 is a graph showing the 0 scan data one XRC.

Figure 5 is a sectional view for explaining a crystal growth condition of the semiconductor substrate according to the present invention.

Figure 6 is a sectional view for explaining a manufacturing method of a semiconductor crystal according to the crystal growth conditions of the semiconductor substrate according to the present invention, and the present invention. In the figure, 3 is a mask. Figure 7 is a sectional view for explaining a manufacturing method of a semiconductor crystal according to the crystal growth conditions of the semiconductor substrate according to the present invention, and the present invention.

Figure 8 is Ru sectional view der for explaining a crystal growth condition of the semiconductor substrate according to the present invention.

9, Ru sectional view der for explaining a crystal growth condition of the semiconductor substrate according to the present invention.

Figure 1 0 is a sectional view for explaining another embodiment of a method for producing a semiconductor crystal according to the present invention.

Detailed Description of the Invention

The present invention provides in Rukoto provided an uneven surface to the substrate in a state where not formed even buffer layer or the like, substantially raising cost-containing ground capable of forming lateral growth of low dislocation region from the crystal growth beginning advance characterized in that the keep. The substrate with such configuration, if allowed by vapor phase growth of crystals, but the initial growth may occur the crystal growth across the substrate surface, becomes dominant before long growth at the upper portion of the convex portion, the result recess raw materials becomes difficult to diffuse, is that dividing covering uneven surfaces described above in exclusively grown layer from the upper portion of the thus protruding portion. In the growth starting from the convex portion, occurs C-axis and vertical the so-called lateral growth, in substantially form a low dislocation region mask layer less (without using the mask layer as in the prior art) It will be achieved. Thus, it is possible to perform only form an uneven surface on the board, continuously grown to such perform G a N layer growth and subsequently subjected to buffer layer growth. Further, if the aspect of providing a mask on the bottom surface of the recessed portion, it is possible to suppress the growth in the concave portion, the better the efficiency of lateral growth, there is an advantage that by rather thin thickness required to cover the recess.

The method of manufacturing a semiconductor crystal of the present invention, the point of growing semiconductor crystals by the same process as the manufacturing method of the semiconductor base, having a first feature. As described above, the results can be suppressed crystal growth in the concave portion of the substrate, so that the cavity is formed between the substrate and the semiconductor crystal. Therefore, that Do is possible to greatly reduce the distortion resulting from less able because the lattice constant difference and a thermal expansion coefficient difference the contact area between the substrate and the semiconductor crystal. This point is the second aspect of the manufacturing method of the semiconductor crystal of the present invention. For this reason it is possible to suppress the generation of dark-click and cracking, I it is possible to obtain a semiconductor crystal of large area Uninaru. In addition, the strain is to focus on the contact portion of the substrate and the semiconductor crystal, the separation of the substrate and the semiconductor crystal is one that has also characterized performed efficiently.

Hereinafter will be described with reference to the drawings in detail embodiments of the present invention.

Figure l (a) ~ (c) , FIG. 6 (a) ~ (C) are sectional views for explaining a crystal growth condition of the semiconductor substrate according to the present invention. Also, FIG. 6 (a) ~ (d) are cross-sectional views for explaining a manufacturing method of engaging Ru semiconductor crystal of the present invention.

In FIG, 1 is a substrate, 2 denotes a semiconductor crystal which is vapor phase grown on the substrate 1, respectively. The crystal growth surface of the substrate 1 and the convex portions 1 1 and the recess 1 2 is formed, it is configured to exclusively crystal growth is performed from the protrusion 1 1 of the upper portion. Further, in the embodiment of FIG. 6, the recess 1 2 is covered with a mask 3 which can not substantially grow from the layer.

Substrate The referred to in the present invention, there is provided a the underlying substrate for growing a variety of semiconductor crystal layer, it refers to the state buffer layer or the like also is not formed yet for lattice matching also to. Such substrate, a sapphire (C plane, A-plane, R-plane), S i C (6H, 4H, 3 C), G a N, S i, spinel, Ζ ηΟ, G a A s, a NGO Although etc. can be used, it may be used the other materials, if corresponding to the object of the present invention. Or it may be used after off from these substrates. The semiconductor crystal is grown on the substrate 1 Ki out using a variety of semiconductor materials, A 1 X G a! _ Χ _ γ I n y N (0≤ x≤ 1, 0≤ y≤ 1) the , x, G was varied composition ratio of y a n, a 1 5 G a 0. 5 n, etc. I n 0. 5 G a 0 . 5 n leaves illustration.

Above all, the case of a semiconductor material containing A 1 such as A 1 G a N, but a problem that grows with the conventional mask method in S i 0 2 mask layer has been made, according Mass Crested reduction according to the present invention a problem is solved, it is possible to La literal growth could not be conventionally a 1 G a N high-quality film growth at low dislocation is possible from just above the substrate. Is particularly preferred on the light absorption is eliminated applications due Thus G a N layer which is a problem with the ultraviolet light-emitting element or the like.

ώ portion 1 1 which is formed on the crystal growth surface of the substrate 1 is effective when shaped as exclusively crystal growth is carried out from the upper portion. The "exclusively crystal growth is carried out from the upper part" means a state in which crystal growth at the apex or top surface and its vicinity of the convex portion 1 1 may perform dominant, the initial growth occurs growth in Part IV may also refers to the crystal growth of the convex portion 1 1 predominates eventually. That is, if a low dislocation region Ri by the lateral growth starting from the upper part is formed, the effect is as ELO that requires conventional mask. This it is a feature that can be grown in a mask-less in the present invention.

Further, in the embodiment shown in FIGS. 6 to 1 0, the mask 3 is fabricated on the recess 1 2 only needs to fulfill the function of not substantially crystal growth from the layer. "The layer or we can not substantially grow" is a good to a state hardly occurs crystal growth may occur grown in growth Initial On recess mask but eventually protrusion It refers to the fact that 1 of the crystal growth becomes dominant.

That is, if the low dislocation density region is formed by lateral growth starting from the upper part, the effect is as ELO that requires conventional mask. This is the pressure Enomi substrate in the present invention is characterized in that it can form a low dislocation density region in the crystal growth once.

1-3, 6-8 is a cross-sectional view though the formation of the convex portion 1 1 in stripes. First, FIG. 1, FIG. 6, as shown in FIG. 1 (a), FIG. 6 (a), the example where Shi pair groove width B groove depth (convex height) h is used deep substrate 1 are doing. In this case the raw material gas is not enough sufficient 1 2 and near the recess, also in the embodiment shown in FIG. 6, it is further added that the masked 3 concave portions 1 2, from the upper portion of the convex portion 1 1 crystal growth does not occur or teeth. Figure l (b), in FIG. 6 (b), 2 0 indicates a crystal unit at the time of crystal growth start. Under such circumstances, the grown film is led in the lateral direction when the crystal growth continues starting from the upper portion of the convex portion 1 1, eventually FIG l (c), the cavity in the recess, as shown in FIG. 6 (c) leaving the 1 3, it will cover the uneven surface of the substrate 1. In this case, a portion grown in the lateral direction, that is, the recess 1 2 upper low dislocation region is formed, and Hakare high quality of the film produced.

The method of manufacturing a semiconductor crystal of the present invention, FIG. 1 (c), the FIG. 2 (c), the FIG. 6 (c), the semiconductor substrate of the present invention as shown in FIG. 7 (c) (i.e., the substrate 1 and the semiconductor made from the crystal 2 which, after preparing the laminate) comprising a cavity 1 3 therebetween, as shown in FIG. 6 (d), FIG. 7 (d), the portion where there is the cavity 1 3, namely the convex portion 1 1 of the portion of the substrate 1, to separate the substrate 1 and the semiconductor crystal 2, thereby obtaining a semiconductor crystal 2 which is a low dislocation density in need. As a method for this separation, a method such as polishing typically be mentioned up is not particularly limited as Toridasere the semiconductor crystal.

Figure 2 illustrates a case where the groove depth (convex height) if h is shallow, or groove width B is wider substrate 1 to the width A of the convex portion 1 1 to the groove width B (FIG. 2 (a) see). In this case, the raw material gas also occurs growth in recess 1 2 order to be able to reach the recess 1 2 and its vicinity. The crystal growth occurs also from the upper portion of the convex portion 1 1, as shown in FIG. 2 (b), the upper portion and the recess 1 2 surfaces of the projections 1 1, respectively crystal units 20, 2 1 generate a state that is. Under such circumstances, the grown film is led in the lateral direction when the crystal growth continues starting from the upper portion of the convex portion 1 1, thus covering the concave convex surface of the substrate 1 as shown in eventually FIG 2 (c) . In this case the low dislocation region is formed in the recess 1 2 top also, quality of work made membrane is Hakare.

3, FIG. 7 (a) ~ (c) is, the groove depth to groove width B (convex height) if h is very shallow, or the groove width B to the width A of the convex portion 1 1 It illustrates a case of using a very broad substrate 1 (see FIG. 3 (a), FIG. 7 (a)).

In the embodiment of FIG. 3, the raw material gas also occurs growth in recess 1 2 order to be able to reach the recess 1 2 and its vicinity. In the embodiment of FIG. 7, the raw material gas is likely to growth occurs in recess 1 2 order to be able to reach the top and near the mask 3 of the concave portion 1 2. However, the growth rate than the growth of the convex portion upper is very slow. This is because often the rate which the raw material that has reached on the mask 3 is desorbed again gas.

Then, FIG. 3 (b), the as shown in FIG. 7 (b), crystal growth occurs also from the upper portion of the convex portion 1 1, the upper portion and the recess 1 2 surfaces of the projections 1 1, respectively crystal units 2 0, 2 1 is state produced. Substrate as in FIG. 7 (c); Under such circumstances, the crystal growth is related by film grown from the membrane and the recess was grown in the lateral direction starting from the connection tool and the upper part, eventually FIG 3 (c) It will cover the first concave ώ surface.

For the embodiment of FIG. 3, the portion starting from the recess 1 2 low dislocation region is laterally grown portion as a starting point the hard power protrusions 1 1 are formed low dislocation region is formed, a film was prepared overall view and high quality can aim. Further, in the case of the embodiment of FIG. 7, since the convex portion 1 1 a as a starting point laterally grown portion is larger than in the example of FIG. 1, the proportion of low dislocation region is often seen in the whole film produced 1 so that the high quality is Hakare than in the case of.

Wider recess, when the form of dislocations extending in the C-axis direction, the low dislocation region that is formed in the recess upper widens. Alignment and the light emitting portion of such a case the light-emitting element, it is advantageous facilitate alignment between the light-receiving portion of the light receiving element.

While broadening the conventional ELO even low dislocation region is possible, it must be thicker layers, in which case the order of the warping of the generator, for example, a process photolithography process is difficult for.

In the present invention, in particular, take the form of forming a mask on the recess, forming a wide, low dislocation region becomes possible in a thin film. As a result, it is possible to suppress the occurrence of warpage, the semiconductor device of a large area (e.g., a light receiving element) When creating, it is possible to suppress the occurrence of problems caused by camber in a photolithography step, conventional compared, such that fast low-response speed 喑電 flow, it is possible to obtain improved device characteristics.

In the manufacturing method of the semiconductor crystal according to the present invention, et al produced a laminate as described above, as shown in FIG. 7 (d), the portion is present cavity 1 3, i.e. the substrate 1 convex portion 1 1 of in part, by separating the substrate 1 and the semiconductor crystal 2, a low dislocation semiconductor crystal 2 can be obtained in need.

In the present invention, with such a protrusion 1 1 can particularly limited to adopt various shapes instead.

Specifically, if the relative groove width B described above groove depth (convex height) h is deep, the groove depth to groove width B (convex height) if h is shallow, further groove width If the groove depth (convex height) h is very shallow to B, or with respect to the width a of the convex portion 1 1 can perform various combinations such as when very it has wide groove width B. In particular depth to groove width B (convex height) if h is deep, the raw material for even without a mask on the concave surface as shown in FIG. 1, the raw material gas during vapor deposition can not diffuse substantially to the bottom There preferable in that contribute to growth of 1 1 upper efficiently protrusion. Also when the wide groove width B to the width A of the convex portion 1 1, preferably in that the region of the lateral Direction growth number becomes low dislocation region is wider.

For growth mode the dislocation from the sapphire substrate straight stretches, less proportion of the convex portion, the width by reducing the number of dislocations enough to thin, it is convenient. Protrusions which accounts area may be at 50% or less, but preferably 4 0% or less, more desirably to 3 0% or less. Up as effective as narrow as the width of the convex portion may be less 5 ^ πι, preferably less, further, it is desirable to 0 <protrusions <1 um.

If the width of the protrusion is thin, covering the recess, there is an advantage that requires only a small thickness until flat. In this case the warp of the problems thickness of growing was generated by thermal expansion coefficient difference thinner can be solved. The width of the convex portion is thinner, if less the area occupied by the convex portion, even better results added effect of dislocation is reduced to the effect is obtained. Incidentally groove depth (convex height) may be suitably selected within a range leaving the effect of the present invention.

As aspect of the formation of such uneven surfaces, the convex portion of the island-like dotted type, protrusions consisting of convex stripe type, lattice-shaped convex portions, lines forming these convex portions is curved like There can be exemplified.

Among aspects of these protrusions, one aspect of providing a stripe-type ridges, it is possible simplify the manufacturing process, not preferred from the viewpoint that a regular pattern is easy manufacturing. Longitudinal stripes may be any, but the material grown on the substrate as a G a N, if you Ku 1 1 0 0> direction of G a N-based materials, {1- 1 0 1} lateral growth for surface of which an oblique facet bets is hard to be formed (lateral growth) is advanced. Particularly preferred in that the covering results uneven surface is increased.

{1 - 1 0 1} growth conditions inclined facet, such surface is formed (e.g., if and growth temperature is low, if such as H 2 concentration is high) when subjected to growth, in the convex portion, of the substrate Although threading dislocations initially extend straight (in the case of sapphire C-plane substrate, C-axis direction), bent at facet up surface, which may coalesce in the recess center, in this case, the low dislocation region is a convex portion upper Become. Thereafter, gas atmosphere, the growth temperature, etc. The varying puff and to promote lateral growth, it is possible to obtain a flat film C faces is covered. Therefore, when the 1 1 one 2 0> directions rather a stripe direction, it is clear that the growth conditions selected will the same way as described above.

The mask 3 to be formed on the recess 1 2, its a layer need only be as not substantially grow, S I_〇 2, S i N x, T i 0 2, Z R_〇 2 etc. There Ru available. It is also possible to a laminated structure of these materials. In the manufacturing method of the semiconductor crystal according to the present invention has been described an example in which a mask 3 in the recess 1 2, may be used a substrate of irregularities only without forming a mask 3.

1, as in the embodiment shown in FIG. 6, embedding the uneven surface of the left substrate 1 leaving a cavity 1 3, followed by the case of manufacturing a light-emitting device by growing the light emitting portion thereon, and the cavity portion refractive index difference between the semiconductor interface is made large. Percentage result emitting portion light downward is reflected by the interface increases. For example a LED, the case of performing die bonding the sapphire substrate side down side, preferably the amount of light that can be extracted upward increases. Also be embedded leaving the cavity 1 3, since the fact that the contact area between the semiconductor layer grown thereon and the substrate 1 can be reduced, due to lattice constant difference and a thermal expansion coefficient difference in the semiconductor It preferred from the viewpoint of reducing the distortion. This reduction in distortion has the effect of reducing the warp generated when grown thick G a N-based material on Safuai §. Particularly in the conventional method but cracks reaction if Re was attributable to the difference in thermal expansion coefficient has been made is a problem not perform the crystal growth of good quality to occur when the crystal growth of G a N-based material on S i substrate, the onset Ming by the distortion reduction by it can solve this problem.

Further utilizing the ability to reduce the contact area between the semiconductor layer 2 to the growth substrate 1 and on it, if began to grow thick semiconductor layer 2, the stress is concentrated on the small contact portion, the substrate from this portion 1 of the semiconductor layer 2 separation becomes possible. This substrate such G a N allows prepared by applying.

According to the manufacturing method of the semiconductor crystal according to the present invention, FIG. 6 (c), the FIG. 7 (c), the as shown in FIG. 1 0, there is the cavity 1 3 between the substrate 1 and the semiconductor crystal 2, because it can reduce the contact touch area therebetween can be reduced distortion due to lattice constant difference and a thermal expansion coefficient difference in the semiconductor crystal 2. This reduction in strain employs the sapphire substrate 1 is effective in reducing warpage significantly occurs when grown thick G a N-based material as a semiconductor crystal 2 thereon. In particular, warpage or crack due to thermal expansion coefficient difference has been made is a problem not perform the crystal growth of good quality occurs in growing crystal to G a N-based material on a substrate in the conventional method, the cavity 1 3 strain reduction effect by intervening makes it possible to reduce this problem.

In the manufacturing method of the semiconductor crystal according to the present invention, utilizing the fact that can reduce the contact area between the semiconductor crystal 2 grown on the substrate 1 as described above, the thickness 1 0 m or more, preferably 1 0 0 / If you grow to more than m, the result of the stress is concentrated on the small contact portion, that Do facilitates separation of the substrate 1 and the semiconductor crystal 2 from this portion. Thus the substrate, such as G a N becomes possible to manufacture.

While there has been described the case of growing only one layer of the semiconductor layer 2 on the substrate 1, in order to further reduce the dislocation defect, a similar process may be repeated 2 times. That 5, 8, 9, a layer of the and to cover the uneven surface of the substrate 1 by the same technique the first semiconductor crystal (first semiconductor layer) subjected crystal growth of 2 a after the, giving the process to an uneven surface of the surface of the first semiconductor layer 2 a, so as solely to crystal growth from the upper part of the convex portion of the first semiconductor layer 2 a Ri by the vapor growth thereon second layer of semiconductive substance crystals (second semiconductor layer) can be formed a 2 b. In this case, particularly if the state like shifting the position of the convex portion 1 1 a which forms the convex portion 1 1 and the first semiconductor layer 2 a of the substrate 1 (i.e., the concave portion of the first semiconductor layer 2 a, be formed on a region displaced from the substrate is propagated), the second semiconductor layer 2 b so that the dislocation does not propagate. That is, if such a configuration, the second semiconductor layer 2 b whole be a low dislocation region, in which the semiconductor substrate is obtained with a layer of good Ri quality semiconductor crystal. Further, after that, from such laminates (a semiconductor substrate), as shown in FIG. 1 0, semiconductor crystal 2 (the second semiconductor layer 2 b), by separating in the presence portion of the cavity 1 3, require it is possible to take out the semiconductor crystal 2 shall be the.

Note that setting a mask such as S I_〇 2 dislocations propagated portion of the first semiconductor layer only can be used a method of preventing transmission. In other words, the growth of the second semiconductor layer, may be used ELO technique has been previously reported. Again, due to the use of the present invention the formation of the first semiconductor layer, compared with a case of constituting only ELO, requires only a thin film, it is clear that such an effect requires only a process rather low.

Further, the surface of the second semiconductor layer 2 b further an uneven surface may be a layer of a third semiconductor crystal which is likewise formed by the vapor deposition thereon (third semiconductor layer) . Alternatively, further by repeating the same process, it may be a plurality of semiconductor layers to be multiplexed manner. With such a configuration, without intentionally perform the position adjustment of the convex portion between the above-mentioned upper and lower, can Rukoto is gradually decreased dislocations propagating in each layering and finally grow semiconductor substrate may be a higher quality of the semiconductor crystal separated therefrom.

Formation of the projections, for example, patterned in accordance with a convex shape using conventional photolithography technique, can be prepared by performing an etching process using RIE techniques such as CT / JP00 / 01588

Method of performing the crystal growth of semiconductor layers on the substrate HV PE, MOCVD, MBE method that Dogayoi. Although preferred HVPE method case of manufacturing a thick film, when forming a thin film MOC VD method is preferable.

Growth conditions for crystal growth of the semiconductor layer on a substrate (gas species, the growth pressure, the degree of growth temperature, etc.), as long as it is within the range that the effect of the present invention comes out, yo if used properly according to the purpose les, .

Example

[Example 1]

C-plane sapphire substrate to the photoresist pattern Jung (width: 2 m, period: 4 / m, stripe direction: stripe extending direction of the sapphire substrate Ku 1 1 one 20> direction) is performed, RIE (Reactive Ion etching) was etched into a square cross section type to a depth of 5 m in the apparatus. Width 2 Myupaiiota of the putter Jung is than also corresponds to the width of the protrusion, thus (width = period over protrusion) the width of the recess is 2 / m, an aspect ratio (depth Z concave recess cross section when this of width) 2. 5. After removing the photoresist, the substrate was mounted on the M OVPE device. Then, 1 1 the temperature was raised to 00 ° C under an atmosphere of hydrogen, it was carried out thermal etching. Thereafter the temperature was lowered to 500 ° C, the TMG (hereinafter TMG) ​​as a ΠΙ group raw material, flowing ammonia as an N raw material were grown G a N low-temperature buffer layer. The TMG · § Nmoyua temperature as heated feed to 1 000 ° C followed, the growth of the n-type G a N layer flowing silane as a dopant. Growth time at that time was a time corresponding to 4 beta m in G a N growth when not subjected to the usual unevenness.

Although Observing the cross-section after growth trace of slight growth substrate recess seen, covering the remains uneven portion leaving a cavity portion 1 3 in the recess as shown in FIG. 1 (c), G a, which is flat N film was obtained.

For comparison, the G a layer formed in the same growth conditions to the normal C-plane sapphire substrate, a conventional ELO by E LO grown G a N film (mask method using S i O 2 mask having the same pattern sample) was prepared. Evaluation was a I nG a N (I nN mixed crystal ratio = 0. 2, 100 nm thick) continues to grow counts pits (corresponding to dislocation) appearing in dislocation density. Kiyari catcher density was evaluated by Hall effect measurement, the fluctuation of the crystal axis was evaluated by ø scan XRC. The evaluation results are shown in Table 1, Fig.

In the sample embodiment, it is seen that the reduction in dislocation density is Hakare to the same degree as conventional ELO. On the other hand, the carrier concentration was usually GaN growth and the same degree. Also FWHM of the XR C 1 70 sec and the smallest, be said to be a high-quality films Overall.

From 0 scan data of XRC of Figure 4, and as the G a N film by E LO growth using S i O 2 masks, no fluctuation of the crystal axis intensified near the lateral growth direction, a high quality crystal it was confirmed that there is.

[Example 2]

Of Example 1, except that the shape of the concave-convex portion was changed as follows were the same.

(Width: 2 / zm, period: 4 / zm, stripe direction: sapphire substrate Ku 1 1 20>) was performed to etch the square section type to RIE (Reactive Ion Etching) depth of 1 m in the apparatus. The aspect ratio of at this time was 0.25.

Observation of the cross section after growth, FIG. 2 (c), the both the concave-convex portion is embedded, G a N film of the bottom of the recess 1 2 corresponds to have a portion in the cavity 1 3 及 Piso 21 it has been found that has become a substitute has been grown in.

I n G a N in order to evaluate the film (1 11? ^ Mixed crystal ratio = 0. 2, 1 00 nm thick) continues to grow, was subjected to observation of the same appears pit and above, the convex portion Although the upper were observed many pits corresponding to the dislocation pits seen in the upper portion starting point and laterally formed poured was part of the convex portion smaller, dislocation density as in example 1 4 X 10 7 c m_ was 2. [Example 3]

Of Example 1, except that the thickness of the shape of the concave-convex portion Ru grown on it and uneven portion was changed as follows and 1 im were the same.

(Width: 0. 5 / πι, period: 1 / Zetapaiiota, stripe direction: sapphire substrate Ku 1 1 one 20>) performed, etched into a square cross section type to 1. 0 mu depth m at 1¾ 1 £ device It was.

Observation of the cross section after the growth has been embedded uneven portion, the surface was flat. By thus shortening the width 'period, it is possible to obtain a film which is already flattened at the point of 1 Myupaiiota thickness. To assess this film, similarly to the above embodiment, where I n G a N (I nN mixed crystal ratio = 0. 2, 1 00 nm thick) continues to grow, was observed in the pit, convex Although the part upper observed many pits corresponding to the dislocation pits rarely seen in a portion grown in the lateral direction starting from the upper portion of the convex portion, the dislocation density in example 1 and similar 4 X 1 0 7 was cm- 2.

[Example 4]

Of Example 1, it was the same except that the shape of the concave-convex portion was changed as follows.

(Width: 0. 3 / m, the period: 3 / m, stripe direction: a sapphire substrate Ku 1 1 20>) was performed to etch the square section type to a depth of 3. 0 / X m by RIE device .

Observation of the cross section after the growth has been embedded uneven portion, the outermost surface was flat summer. The film continues to I n G a N (I n N mixed crystal ratio = 0. 2, 10 O nm thick) grown to evaluate the, was observed in the same appears pit and above.

The protrusion upper number of those found pits corresponding to dislocation was greatly reduced. Pit seen in the upper part as a starting point the grown portion in the lateral direction of the convex portion was small. On the other hand, in times part central pit was seen part. Counting the dislocation density of the film 2 X 1 0 6 cm- 2 in Example 1, 2 and compared to normal G a N growth was significantly reduced. This is the dislocation reduces the area in which the convex portion is occupied considered you are attributable to the fact that decreased the number of propagation. [Example 5]

N-type A 1 GaN clad layer sequentially on the membrane obtained in Example 1, I n G a N-emitting layer to form p-type A 1 GaN cladding layer, a p-type GaN contact layer in this order, the light emitting wave length 370 a nm ultraviolet LED wafer was produced.

Then, the electrode film is subjected to isolation and an LED element. It was evaluated average reverse current characteristics of the output of the LED chip taken across the wafer. The comparison is a UV LED chip prepared the structure using an ultraviolet LED chip and normal Safa I § substrate formed with the structure using conventional ELO technique. These evaluation results are shown in Table 2.

Table 2

Table The samples prepared using the present invention as shown in 2 high output compared with the conventional example, less high quality LED leakage current it has been found that can be produced.

[Example 6]

Of Example 1, except that added the trimethylaluminum (TMA) to the semiconductor layer during the growth were the same.

The result of the film of A l GaN (A 1 Composition 0.2) is left a cavity in the recess, the flat film to cover the uneven portion is not able to grow. Recess upper pit seen growing portion of the upper portion in the horizontal direction and the starting point of the convex portion was small. Thereby quality of the A 1 GaN film not been achieved by the conventional ELO technique (low dislocation density) it was confirmed that've been using the present invention.

[Example Ί 1

Next an example of using a G a N as substrate. G a N on the substrate of the photoresist patterning (width: 2 / zm, period: 4 m, stripe direction: Ga N perform substrate ku 1-100 », 5 RIE apparatus; square section type to a depth of m and etching. aspect ratio at this time is later removed 2. was 5. photo registry, the substrate was mounted on the MO VPE apparatus. Thereafter, nitrogen, hydrogen, 1 0 0 0 ° under an ammonia mixed atmosphere and the temperature was raised to C. Thereafter, the T MG · ammonia as raw materials, the growth of the n-type G a n layer flowing silane as a dopant. growth time at that time, when not subjected to the usual unevenness G a was time corresponding to 4 mu m in N growth.

Sectional growth to observe the substrate recess to after growth, of anything growth into the convex portion side is seen, covering the remains uneven portion leaving a cavity portion as shown in FIG. 5, G a N became flattened film was obtained. Followed by evaluation of the pit of the resulting film was. Pit density of G a N which was used as a substrate was the 2 X 1 0 5 cm- 2, to grow the present embodiment when the convex portion upper in 1 X 1 0 5 cm- 2, at recess upper 5 X pits was found that you are reduced to 1 0 3 cm- 2. Thus already confirmed that there is little further dislocation density low reduction effect on the substrate dislocation.

[Example 8]

The G a N crystal prepared in Example 1 as the first semiconductor layer and on the grown second semiconductor layer thereof. First G a N crystal photoresist (first semiconductor layer) putter Jung

(Width: 2 nm, period: 4 / m, the stripe orientation: G a N Ku 1 one 1 0 0 substrate>) was performed to etch the square section type to a depth of 2 // m in RIE apparatus. In this case the putter Jung was arranged as a recess in the first semiconductor layer overlies the substrate protrusion. Aspect ratio when this was 1. After removing the photoresist, the substrate was mounted on the MOVPE apparatus. Thereafter, nitrogen, hydrogen, and 1 0 0 0 ° C until in raising the temperature at an ammonia mixed atmosphere. Thereafter, the TM G · ammonia as raw materials, the growth of the n-type G a N layer flowing Sila in as a dopant. Growth time at that time was a time corresponding to 4 Ai m in G a N growth when not subjected to the usual unevenness.

Sectional growth to observe the substrate recess to after growth, of anything growth into the convex portion side is seen, covering the remains uneven portion leaving the cavity, G a N film flattened is obtained. Were evaluated in the pit of a film obtained by have continued, the pit has been found that a little bit reduced to 8 X 1 0 5 cm- 2. Thus further dislocations densely By repeating this Example / JP00 / 01588

It was confirmed that there is a degree reduction effect.

[Example 9]

Follower Torejisu bets patterning the C-plane sapphire substrate (width: 2 // m, period: 6 / zm, stripe direction: stripe extending direction of the sapphire substrate Ku 1 1 one 20> direction) is performed, an RIE apparatus to a depth of 2 Atm it was etched into a rectangular cross section shape. Following the S i 0 2 film was 0. 1 / m deposited on the entire surface of the substrate to remove the S i 0 2 film deposited in the photo registry and thereon by the subsequent lift-off process. It was masked layer to the substrate recessed portion in this manner. Thereafter, the substrate was mounted in MOVP E device, 1 1 the temperature was raised to 00 ° C under a hydrogen atmosphere was carried out thermal etching. Thereafter the temperature was lowered to 5 00 ° C, and TMG as ΠΙ group material, flowing ammonia as an N raw material were grown G a N low-temperature buffer one layer. The temperature was raised to 1000 ° C followed, the TMG · ammonia as a raw material, and the n-type G a N layer flowing silane as a dopant grown on the substrate. Growth time at that time was a time corresponding to 4 Aim of G a N growth when not subjected to the usual unevenness.

The cross-section also when observing the trace of some grown on the substrate recess mask is viewed after growth, covering the remains uneven portion leaving a cavity portion 1 3 in the recess as shown in FIG. 7 (c), flat since G a N film was obtained.

It was repeated except consider the conventional E LO method for comparison. S i 0 2 mask corresponding to the width-cycle of the irregularities was carried out in this example (i.e., mask width 4 mu m, the period 6 m) is formed, the thickness of 4 m growth in a normal G a N Growth It was carried out growth in the time corresponding to. Observation of the obtained samples of the cross-section, the growth in the lateral direction on S i 〇 2 mask occurs, although coalescence is observed, it was found that not yet flat. Therefore, when the surface was examined growth time for a flat, time corresponding to the growth of the thickness of 1 0 / m in G a N growth normal has been found to be necessary. The case, the surface of the crystal layer had become flattened, but due to its thickening connexion, the resultant wafer is large warpage has occurred.

Comparative As is apparent from the present embodiment, by using the present invention, even when the width of the recess performing Laterra Le growth is wide, flat surface is obtained in the thin film.

[Example 1 0]

Next an example of using a G a N as substrate. G a N on the substrate of the photo registry path data one Jung (width: 2 111, period: 6 // πκ stripe orientation: G a N Ku 1 one 1 00> substrate) is performed, the 2 m by RIE device depth was etched in the square section type. Following the S I_〇 2 film is deposited on the 0. 1 / im thick on the entire surface of the substrate to remove the photoresist and S i 0 2 film deposited thereon by more then Rifutofue. The good urchin processed G a N substrate mounted on MO VP E device, nitrogen, hydrogen, and the temperature was raised to 1 000 ° C under an ammonia mixed-atmosphere. Thereafter, the TMG ■ ammonia as a raw material, and growing an n-type G a N layer flowing silane as a dopant. Growth time at that time was G a N time corresponding to 4 Myupaiiota in growth when not subjected to the usual unevenness.

Traces of some growth when cross observing on a substrate recess mask after growth, although the growth of the convex side surface is observed, covering the remains uneven portion leaving a cavity portion as shown in FIG. 8, was flattened G a New film was obtained. Followed by evaluation of the pit of the resulting film was. Pit density of G a N used as a substrate was was the 2 X 1 0 5 cm- 2, to grow the present embodiment when the convex portion upper in 1 X 1 0 5 cm- 2, at recess upper 5 X 1 0 3 cm- 2 to pin Tsu door was found to have decreased. Thus already confirmed to be effective also further dislocation density reduction relative small substrate dislocation.

[Example 1]

The G a N crystal prepared in Example 9 as the first semiconductor layer and on the grown second semiconductor layer thereof. First, G a N crystal (first semiconductor layer) follower Torejisu bets putter Jung

(Width: 2 μπι, period: 6 / m, the stripe orientation: G a N substrate of Ku 1 one 1 00>) was performed to etch the square section type to a depth of 2 / m in RIE apparatus. Patterning at this time was arranged as a recess in the first semiconductor layer overlies the substrate protrusion. The S I_〇 2 film is deposited on the 0. 1 / zm thick on the entire surface of the substrate had continued, and then removing the more photoresists and S i O 2 film deposited thereon to lift-off process. After such processing, the substrate is mounted to the MOV PE device, nitrogen, hydrogen, and the temperature was raised to 1 000 ° C in an ammonia mixed atmosphere. Thereafter, the TMG ■ ammonia as a raw material, and growing an n-type G a N layer flowing silane as dopa cement. Growth time at that time was time corresponding to 4 Myupaiiota in G a N growth when not subjected normal concave convex. Traces of some growth when cross observing on a substrate portion mask after growth, although the growth of the convex side surface is observed, covering the remains uneven portion leaving a cavity portion as shown in FIG. 4, a flat G a New film was obtained. Subsequently, the resulting film of the estimation of the 8 X 1 0 5 cm_ 2 to pit early and went pit was found to have decreased. In this way there is a further dislocation density reduction effect by repeating the present example was confirmed.

In the present embodiment has formed the S i O 2 film in a recess of the first semiconductor layer, S i even when the O 2 film is not formed, similar by the thickness of the second semiconductor layer and 6 Myupaiiota results were obtained.

Example 1 2]

In exactly the same procedure as in Example 9, subjecting the mask layer to the substrate recess, after growing a G a N cold bar Ffa layer, the TMG · en Monia temperature as heated feed to 1 000 ° C, silane as a dopant sink 1 0 h, and the n-type G a n layer was grown 30 m.

When obtained by observing the G a N crystals, slightly those of the mirror without cracking or cracking of occurrence it is intended warpage were obtained. Now observing a cross section after growth, although traces of some grown on the substrate recess mask seen, the uneven surface of the left substrate 1 leaving a cavity 1 3 in the recess as shown in FIG. 7 (c) cover, been made in the G a N crystal became flat.

[Comparative Example 1, 2]

For comparison, G a N layer was deposited to a normal C-plane sapphire substrate under the same growth conditions (Comparative Example 1), G a N film ELO grown using S i 0 2 mask having the same pattern ( Comparative example 2) was prepared.

Was taken out from the post-growth device, samples grown without applying anything had entered a large number of cracks and cracks in small or kicked. Also those E LO growth was observed that it contains a large warpage and a large number of cracks though split Re no. The G a N crystal obtained in G a N crystal and ELO growth in Comparative Example 2 obtained in Example 1 2 was carried out the task of separating from the substrate. Down to G a N crystal plane was first fixed with wax. Then removing the sapphire substrate by polishing.

G a N crystals ELO growth in Comparative Example 2 could not polished uniform sapphire for large warpage. After polishing, as a result of peeling off the G a N crystals from waxes, sample sample prepared in which the ELO growth in Comparative Example 2 but has been extracted is G a N crystal in Example 1 G a N crystal cracking into small pieces and I had.

Example 1 3]

As shown in FIG. 1 0, of Example 1 2 The G a N crystal that has not been separated sapphire substrate as the first semiconductor layer 2 a, is grown second semiconductor layer 2 thereon. Also not a, G a N first semiconductor layer follower Torejisu preparative putter Jung (width: 2; um, period: 6 mu m, stripe direction: G a N substrate Ku 1 1 00>) performs, RIE It was etched into a square cross section type to a depth of 2 m in the apparatus. In this case the putter Jung was arranged such that the recess of the portion of a large dislocation of the first semi-conductor layer. Following the S i O 2 film was 0. l / im deposited on the entire surface of the substrate to remove the S I_〇 2 film deposited on the follower Torejisu bets and its Subsequent lift-off process. After such processing, the substrate is mounted to the MOVPE apparatus, nitrogen, hydrogen, and the temperature was raised to 1 000 ° C in an ammonia mixed atmosphere. Thereafter, the TMG · ammonia as raw materials, the growth of the n-type G a N layer flowing silane as a dopant. Growth time at that time was a G a N time corresponding to 4 Myupaiiota thickness growth in growth when not subjected to the usual unevenness. Then the samples subjected to growth were transferred to an HVPE apparatus and a G a N crystal total thickness 200 μιη. Then Example 1 2 Similarly polishing the sapphire substrate is removed to give a G a N crystals. Beep me 8 X 1 0 5 cm 2 were evaluated in the pit of adult Chogo surface has been found that you are reduced. Thus it low dislocation density high quality G a N crystals are obtained by repeating the present example was confirmed. Industrial Applicability

According to the semiconductor substrate and a manufacturing method of the present invention as described above, by providing the protrusions in pairs to the substrate, capable of forming the lateral growth of low dislocation region on a portion not on the mask layer it can be carried out. Thus by micro tilting of the axis is a problem caused by forming a mask layer of occurrence of new defects coalescence portion of the lateral growth part problem Ya O over preparative doping problem, a problem that A 1 containing semiconductor material is selectively grown not the can be eliminated. Further, after providing an uneven surface to the substrate, so enabling continuous growth of the semiconductor crystal layer such as a light-emitting portion from the buffer layer grown in a single growth, there is an advantage that the manufacturing process can be simplified.

Further improved reflectance and by the use of the cavity, the effect of such phenomena residual strain also has properties improve, which is an invention very valuable from the viewpoint of low-cost reduction. In particular, in the manner to cover the bottom surface of the recess in the mask, it is possible to suppress the growth in the concave portion, there is an advantage that the efficiency of lateral growth is improved.

According to the manufacturing method of the semiconductor crystal of the present invention, for manufacturing a semiconductor crystal layer having a large area by the effect of such suppression of the residual strain because of its small contact area between the substrate and the crystal growth layer can be realized. Thus a large area growth has failed to give no satisfactory for normal growth and ELO thick film growth for forming the mask layer, the generation of new defects coalescence portion of the lateral growth part by micro tilting of the axis problems and autodoping problems can be eliminated, a large area of ​​the semiconductor crystal, improve characteristics, it exhibits the extremely useful effects in terms of low-cost reduction. This application is a 0 7 2 1 3 3 No. 1999 year patent application filed in Japan Heisei 1 year Patent Application No. 3 3 5 5 9 1 No. Heisei 1 year Patent Application No. 3 3 6 4 2 No. 1, and Heisei 1 year Patent Application No. 3 5 3 0 4 No. 4 is the basis, the contents of which are incorporated in full herein.

Claims

The scope of the claims
1. Substrate and made of a vapor growth semiconductor crystal on a substrate a semiconductor substrate der connexion facets of the substrate is an irregular surface, the semiconductor crystal of the projections that put the concave convex semiconductor substrate, characterized in that the upper portion is intended exclusively been grown
2. The semiconductor crystal I n G a A semiconductor substrate ranging first claim of claim, which is a N.
3. Convex portion of the crystal growth surface of the substrate, a semiconductor substrate in the range first claim of claim, which is a convex portion formed of parallel stripes.
4. The semiconductor crystal is an I n G a A 1 N, and wherein the longitudinal direction of the stripe is parallel to said I n G a A 1 N (1 one 1 0 0) crystal plane the semiconductor substrate ranging third claim of claim.
5. Substrate and made of a vapor growth semiconductor crystal on a substrate a semiconductor substrate der connexion facets of the substrate is an irregular surface, the semiconductor crystal of the projections that put the concave convex in the semiconductor substrate which is exclusively crystal growth from the upper part, the and uneven surface is covered with a grown semiconductor crystal, a cavity portion is formed between the concave portion in the layer and the irregular surface of the semiconductor crystal the semiconductor substrate ranging first claim of claim, characterized in that is.
6. Recess of the uneven surface of the substrate, its a layer covered with a mask that can not be substantially crystalline growth, the semiconductor crystal is exclusively crystal growth from the upper part of the convex portion of the uneven surface of the substrate the semiconductor substrate ranging first claim of the claimed is intended.
7. The uneven surface of the crystal growth surface of the substrate, a layer of the first semiconductor crystal exclusively formed by being grown from the upper part of the convex portion in the concave-convex surface by vapor deposition, the first and the surface an irregular surface of the layer of semiconductor crystal, as well as the second semiconductor semiconductor substrate to feature in that it consists of a layer of crystals exclusively formed by being grown from the upper part of the convex portion.
8. Part IV of the uneven surface of the substrate, its a layer covered with a mask that can not be substantially crystalline growth layer of the first semiconductor crystal, the upper part of the convex portion of the uneven surface of the substrate from there which was exclusively crystal growth, above the first semiconductor recess force the layer of the uneven surface layer of the crystal is covered with a mask not substantially crystal growth, the second semiconductor crystal, the the first semiconductor crystal layer irregular surface semiconductor substrate ranging seventh claim of claim from the upper portion of the convex portion is obtained exclusively crystal growth of the.
9. The front surface of the layer of the second semiconductor crystal and uneven surface in the claimed semiconductor substrate ranging seventh claim of the layer or similarly a third semiconductor crystal formed by vapor deposition thereon the semiconductor substrate characterized by having a layer of a multi-formed a plurality of semiconductor crystals by repeating the same process.
1 0. The second concave-convex surface of the surface layer of the semiconductor crystal in the appended semiconductor substrate ranging eighth claim of, covered with a mask that can not be substantially crystalline growth recesses from the layer, on which the third through the layer of semiconductor crystal semiconductor substrate and having a plurality of layers of semiconductor crystals that have been multiplexed formed by repeating the same steps that are formed by the same vapor phase growth method.
1 1. Upon causing the semiconductor crystal on a substrate by vapor phase growth, subjected to uneven surface processing in advance the substrate surface and then the raw material gas was supplied to the substrate solely crystal growth from the upper part of the convex portion in the uneven surface the method of manufacturing a semiconductor substrate, characterized in that covering the uneven surface of the substrate at the semiconductor crystal to be.
1 2. Covered with mask that can not grow substantially crystals recesses of the uneven surface of the substrate from the layer and then the raw material gas was supplied to the substrate, the upper portion of the convex portion in the uneven surface method for producing a range first one of claims claims, characterized in that covering the uneven surface of the substrate at exclusively crystals grown is a semiconductor crystal.
1 3. The uneven surface of the crystal growth surface of the substrate, the co-when the uneven surface by solely crystal growth from the upper part of the convex portion in the concavo convex surface facing the vapor deposition to cover the semiconductor crystal, the semiconductor crystal the method of manufacturing a semiconductor crystal, characterized in that to prepare a product layer body having a hollow portion between the recess in the layer the irregular surface, separating the semiconductor crystal and the substrate in said cavity portion.
1 4. The recesses of the uneven surface of the substrate from the layer covered with mask incapable substantially crystalline growth, which then exclusively crystal is grown from the upper part of the convex portion in the concavo convex surface facing the vapor deposition the method according ranging first 3 claim of it.
1 5. Manufacturing method of the semiconductor crystal I n G a A 1 Claims first item 3, wherein it is a N.
1 6 protrusion of the crystal growth surface of the substrate, method of manufacturing the range first 3 Claims claims, characterized in that a convex portion formed of parallel stripes.
1 7. Claims the semiconductor crystal is a I n G a A 1 N, and the longitudinal Direction stripe, characterized in that it is perpendicular to the I n G a AIN of (1 1 0 0) plane method for producing a ranging first 6 Claims.
1 8. The crystal growth surface of the substrate an uneven surface, a layer of vapor deposition the uneven surface covering the first semiconductor crystal exclusively by crystal growth from the upper part of the convex portion in the concavo convex surface, the surface of the first semiconductor crystal layer a concavo-convex surface, the layer of the uneven surface solely by the crystal growth from the upper part of the convex portion of the concavo-convex surface of the layer of the first semiconductor crystal second semiconductor crystal characterized in that together with the the laminate comprising a cavity between the four parts of the layer and the uneven surface of the second semiconductor crystal, separating the semiconductor crystal from the laminate Te the hollow portion smell covered with a method of manufacturing a semiconductor crystal to
1 9. The recesses of the uneven surface of the layer of the first semiconductor crystal, from the layer covered with a mask that can not be substantially crystalline growth, then, the upper portion of the convex portion in the concavo convex surface facing the vapor deposition exclusively manufacturing method of the second semiconductor crystal layer of the crystal growth is thereby intended in is described range 囲第 1 8 of claims from.
2 0. The second concave-convex surface of the surface layer of the semiconductor crystal in the manufacturing method in the range first 8 claim of claim, the layer of the same vapor phase growth method on the third semiconductor crystal, 乃 Itaru is multiple manner to form a plurality of layers of semiconductor crystals by repeating the same process, to produce a laminate comprising a cavity between the concave portion in the layer and the uneven surface of the semiconductor body crystals, before Symbol cavity portion method of manufacturing semiconductors crystal and separating the semiconductor crystal from the laminate at.
2 1. The front surface of the layer of the second semiconductor crystal and uneven surface in the manufacturing method of the range first 9 claim of claim, not grow substantially crystals recesses of the uneven surface of the layer masks covered with a layer of a third semiconductor crystal by the same vapor phase growth method thereon, to form a layer of the multiple to a plurality of semiconductor crystals by repeating the same as steps, layers and irregularities of the semiconductor crystal the method of manufacturing a semiconductor crystal, characterized in that to produce a laminate comprising a cavity between the concave portion in the surface, separating the semiconductor crystal from the laminate at the cavity part.
PCT/JP2000/001588 1999-03-17 2000-03-15 Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method WO2000055893A1 (en)

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JP7213399 1999-03-17
JP11/72133 1999-03-17
JP33559199A JP3471685B2 (en) 1999-03-17 1999-11-26 Semiconductor substrate and manufacturing method thereof
JP11/335591 1999-11-26
JP11/336421 1999-11-26
JP33642199A JP3471687B2 (en) 1999-11-26 1999-11-26 Semiconductor substrate and manufacturing method thereof
JP35304499A JP3441415B2 (en) 1999-12-13 1999-12-13 A method of manufacturing a semiconductor crystal
JP11/353044 1999-12-13

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DE2000630279 DE60030279T2 (en) 1999-03-17 2000-03-15 Semiconductor basis, its manufacturing method and semiconductor crystal manufacturing method
US10/842,777 US7115486B2 (en) 1999-03-17 2004-05-11 Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method
US11/541,201 US7589001B2 (en) 1999-03-17 2006-09-29 Semiconductor base and its manufacturing method, and semiconductor crystal manufacturing method
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EP1501118A1 (en) 2005-01-26
US7504324B2 (en) 2009-03-17
DE60030279D1 (en) 2006-10-05
DE60043122D1 (en) 2009-11-19
EP1184897B1 (en) 2006-08-23
US20040206299A1 (en) 2004-10-21
EP1501118B1 (en) 2009-10-07
DE60030279T2 (en) 2007-08-30
EP1184897A1 (en) 2002-03-06
US20070026644A1 (en) 2007-02-01
EP1184897B8 (en) 2006-10-11
US7115486B2 (en) 2006-10-03
EP1184897A4 (en) 2003-07-30
US6940098B1 (en) 2005-09-06
US7589001B2 (en) 2009-09-15
US20070026643A1 (en) 2007-02-01

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