JP3452324B2 - Multi-computer device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-computer system, and more particularly to a multi-computer system in which at least two computers commonly access a memory means, in particular for controlling the process of a motor vehicle.

[0002]

BACKGROUND OF THE INVENTION When controlling a vehicle in closed or open loop, the various closed and open loop tasks are usually divided among multiple computers. In that case, at least two computers can commonly access the same memory. Problems arise with such devices when both computers access the memory cells at the same time. To prevent this, complex means are needed to ensure that multiple computers do not access the same memory cell at the same time.

[0003]

SUMMARY OF THE INVENTION It is an object of the present invention to ensure the reliability of data transmission in a device having a plurality of computers, minimize the delay due to the data exchange between the computers and the individual computer as well as the entire system. Is to optimize the calculation time burden of.

[0004]

According to the present invention, in order to solve this problem, at least two computers commonly access a memory means, and the memory means has at least two memory means.
In a multi-computer device for controlling a process of a motor vehicle, which is subdivided into two areas , one memory area is accessed only by a first computer for reading and the second computer is only accessible for writing, and the other memory area is accessed. the only the second computer read, also the first computer to access only the writing, these computers, read each computer respectively
The function is executed at the same time, and the writing function is also executed
Each computer is synchronized to run.
Both the writing and reading functions of the data are
We adopted a configuration that is separated by a calculation function that performs calculations based on data .

[0005]

With the multi-computer system having such a structure, there is an advantage that access control is not required.
No means of controlling the access of individual computers to the memory means is required. Synchronizing the computers allows each computer to know what functions other computers are performing.
Furthermore, the advantage is obtained that the individual calculations can be performed by any respective computers. All data is available to all computers at about the same time. Therefore, there is no need for the computer connected to the sensor to process the signal. This processing can be handled by another computer. This ensures that the work burden on all computers is similar.

[0006]

1 is a block diagram of a multi-computer system having two computers. The first computer 100 receives signals from various sensors 120 and outputs signals to various actuators 130. The second computer 110 likewise receives signals from the various sensors 140 and the various actuators 15
The operation signal is output to 0. Both computers 100, 11
0s are connected to each other via the memory means 160.
This memory is divided into two areas. The first area 161 serves to transfer data from the first computer 100 to the second computer 110. The second area 162 serves to transfer data from the second computer 110 to the first computer 100.

The first computer 100 is called a master computer. In that case, the second computer becomes a slave computer. In the case of a self-igniting internal combustion engine, the master computer calculates in particular a signal representing the amount of fuel to be injected. In that case, the master computer outputs a corresponding control signal (fuel amount signal) to the actuator that determines the fuel amount. The calculation of the amount of fuel to be injected is carried out according to the output signals from the speed sensor and other sensors.

In this case, the second computer 110 calculates the injection start. In this regard, the computer outputs an injection start signal to the corresponding actuator 150. In this case, the second computer 110 also processes at least the output signal of the rotation speed sensor.

The invention is not limited to the control of diesel internal combustion engines, but can be applied to other open loop and closed loop processes. In the case of an external ignition internal combustion engine, one computer is used, for example, to determine the signal that drives the throttle valve actuator, and the other computer is used to determine the ignition timing or injection quantity.
More preferably, it is also conceivable that the computer performs functions such as transmission control, anti-skid control, exhaust gas recirculation control or supercharging pressure control.

When the second computer 110 fails, the first computer 100 partially takes over the function. In this case, the functional range of the calculation of fuel quantity and injection start is limited. This makes emergency driving possible, although not comfortable. The range is similarly limited when the first computer 100 fails, but the second computer 1
10 substitutes the function of the first computer 100. This requires that both computers have access to both actuators, respectively.

The invention is not limited to such an embodiment. It is also possible that only one computer is connected to the sensor and this computer is arranged to process the signals obtained from this sensor. The other computer is then connected to the actuator and calculates a signal for driving the actuator based on the value of the first computer.

Both computers are connected to a memory means 160 for data transmission. DPRAM (Dual Port RAM) is particularly preferably used for this purpose. Such a DPRAM has two terminals or bus wiring. Therefore, this DPRAM can be connected to two computers. This allows two computers to access the DPRAM.

In the present invention, the memory 160 has two areas 1.
It is divided into 61 and 162. The first computer only accesses the first area 161 for writing. Therefore, the first computer 100 only writes values in this area. On the other hand, the second computer 1
10 accesses this area only for reading. Therefore, the second computer 110 only reads values from this area. Accordingly, the area 161 serves to transfer data from the first computer 100 to the second computer 110. On the other hand, the second area 1
Reference numeral 62 serves to perform data transmission from the second computer 110 to the first computer 100. Thus, the first computer 100 has read-only access to the second area and the second computer 110 has write-only access.

In that case, it must be ensured that the memory cells are not simultaneously accessed by both computers. In conventional devices, this is done by circuit-technically complex means or methods.

The multicomputer device of the present invention solves this problem as follows. Both computers operate in synchronization. That is, both computers perform corresponding functions simultaneously. This means that both computers access the memory 160 for reading at the same time, for example. Since the first computer only reads the value from the second area 162, and the second computer 110 only reads the value from the first area 161, the access problem does not occur. The same applies for write access.

The flow of each function will be described with reference to FIG. Usually one computer is called a master computer and the other is called a slave computer. In this embodiment, the master computer is the first computer R1.
Is. When the first computer R1 is interrupted from the outside, a predetermined series of functions is started. At the same time, the interrupt DPI is output to the second computer R2. In response to this interrupt, the second computer R2 also starts a predetermined series of functions. The interrupt for starting the computer R1 is performed, for example, according to time or event. Therefore, interrupts are always fired at the same time interval at the given clock frequency. Alternatively, the interrupt can be triggered on an event basis. This means that an interrupt is triggered when a certain event occurs. Such an event is, for example, the generation of a rotational speed pulse.

After the interrupt occurs, both computers begin a predetermined similar series of functions. In the first period E, data is read from the memory 160 into each computer (read function E). In the second period R, the computer calculates a value based on these data (calculation function R). In the subsequent period S, the sensor signal is detected. Subsequently, in period A, the calculated value and the detected sensor signal are read into the memory 160 (readout function A).

A new interrupt is issued to the computer R1 at a predetermined time interval, and this computer then sends an interrupt DPI to the second computer R1.
Output to 2. Then both computers again perform their respective functions.

As shown, both computers R1 and R
2 accesses the memory 160 only for reading in the first period E. Only in later period A will both computers access the memory for writing. Both read and read functions are separated by the calculation function. This prevents writing and reading from accessing the memory at the same time.

By detecting the sensor values just before they are output to the memory, these values are available to both computers. Thereby, the values of the sensors that are not directly connected to the computer are also utilized by this computer. Therefore, the value of the sensor 140 is also obtained in the first computer 100.

After reading the contents of the memory at each interrupt, the same value is obtained for all computers. This allows the individual calculations to be evenly divided among the computers. Therefore, the computer R1 which originally calculates only the fuel amount can also perform the work of the computer R2. This ensures a uniform work load on both computers. The individual calculations can be performed on each arbitrary computer. For example, the computer R1 outputs a signal for driving the actuator 150 originally assigned to the second computer to the sensor 140.
Can be done based on the value of. This has the advantage that a computer with excellent mathematical characteristics can be combined with a computer with excellent input / output characteristics.

FIG. 2 shows a block diagram of a three computer system. The first computer 200 detects input signals from various sensors 202 and outputs control signals to various actuators 204. The second computer 300 detects a sensor signal from the sensor 302 and outputs an operation signal to the actuator 304. The third computer 400 detects a signal from the sensor 402 and outputs an operation signal to the actuator 404.

The first and second computers are each connected to the memory 350. This memory is preferably divided into three areas. First area 351 and second area 35
2, the second computer has read-only access. On the other hand, in the third memory area 353, the second memory
Computers have write access only. The first computer has first and second memory areas 351, 352.
Is accessed only for writing, and the third memory area 353 is accessed only for reading.

The first and third computers are each connected to the memory 450. This memory is preferably divided into three areas. The first memory area 451 of the memory 450 is accessed by the third computer for writing only and the first computer for reading only. In the second and third memory areas 452 and 453, the first
Computer for access only for writing, and the third computer 400 for reading only.

In the figure, the dotted line indicates that the data obtained by the third computer 400 is the first computer 20.
It indicates that the data is read from 0 to the first memory area 351 of the memory 350. Furthermore, the dotted lines indicate that the data obtained by the second computer 300 is read from the first computer 200 into the third memory area 453 of the memory 450.

The three computer system of the present invention is a particularly preferred embodiment when the first computer 200 only calculates the signals that drive the actuators. At that time, the second computer 300 calculates basic data (fuel amount signal, injection start signal) for the first computer 200. The third computer 400 is responsible for inputting and outputting various values from various sensors.

FIG. 4 illustrates the flow of various series of functions. In this embodiment, the first computer 200
Becomes the master computer. When an event or a trigger pulse based on time is input to the computer from the outside, the computer outputs an interrupt signal to the second computer 300 and the third computer 400. After interruption all 3 computers are DPR
A function E for reading data from the AM memory is started. After the data is read, various values are calculated based on these data. This is indicated by R in the figure. Subsequently, in the next step S, values are read in from the various sensors. Each computer reads the signal from the sensor directly connected to it. In that case, not all computers need to be connected to the sensor. It is also conceivable to connect only one computer, eg a third computer 400, to the sensor. In this case, this function is omitted in other computers. Subsequently, these data are read out to the memory DPRAM (function A). This means that the data will be written to the DPRAM.

The first computer 200 has a memory 350.
Memory area 353 and memory area 4 of memory 450
Data is read from 51 (function E). The second computer 300 reads data from the memory areas 351 and 352, and the third computer 400 reads the data from the memory area 45.
Data is read from 3, 452. Therefore, during read function E, all computers access different memory areas. Each memory area can only be accessed by one computer. During the function A (writing to memory) written in each memory area, the first computer 200 writes to the memory area 352 and the memory area 452. In addition, the third computer is in the memory area 451 and the second computer 300 is in the memory area 35.
Write to 3.

These series of functions are followed by yet another series of functions. Here, only the master computer (first computer 200) is active. Here, the data read into the memory by the second computer is obtained only by the second and first computers. The third computer cannot access the data of the second computer and vice versa. Therefore, it is necessary for the first computer to write the data of the second computer to the memory 450 and the data of the third computer to the memory 350 in another function.

The first computer 200 has a memory 353.
And read data from the memory 451. That is, DP
After the read access to the RAM and the calculation step, the first computer reads the data read from the memory 350 into the memory area 453. Further, the first computer reads the value read from the memory area 451 into the memory area 351. Therefore, the memory DPRAM
Write access is made to 351. By such a method, all the data will be available to all computers after the data is next read into the computer.

The method described above is not limited to two or three computer systems. Particularly preferably 3
It can be applied to more computer devices than computers. This is not necessarily the set of functions by which the computer first accesses the memory for reading and then for writing. It is also possible to access the memory first for writing and then for reading.

Normally, 2k is used as a memory element of DPRAM.
A memory having a memory capacity of bytes or more is used. For the above-mentioned work relating to data exchange, only 1/2 Kbyte of memory capacity is required. Therefore, the present invention proposes to use the memory area of the DPRAM which is not necessary for data exchange as the external RAM of the microcomputer. This method has the advantage of saving external RAM elements. This saves cost and conductor circuitry. Further, since the number of elements and the number of wiring points are reduced, the reliability is increased and the possibility of failure is reduced.

FIG. 5 illustrates in detail such a device of the invention. The device of FIG. 5 substantially corresponds to the device of FIG. Therefore, corresponding parts are provided with similar reference numerals. The sensors 402, 202, 302 and actuators 304, 204, 404 are omitted to avoid complications.

The first computer 200 has a memory 350.
And is connected to the second computer 300 via. In addition, the first computer 200 is connected to the third computer via the memory 450.
Connected to the computer 400. Memory 350 is 3
It is divided into two areas. The first area is the areas 351 and 3 described in FIG. 2 which are necessary for data exchange between computers.
52, 353. The memory area not required for data exchange is further divided into two parts 525, 530. The memory area 530 is accessed only by the second computer 300. For this reason, the corresponding drive signal is formed by the first decoder 535. Other memory element 55
0 is also accessed by the first decoder 535. Data is read or read from the memory area 530 and the memory device 550 according to the output signal of the decoder 535.

The second portion 525 of the memory 350 is driven by the second decoder 520. A corresponding signal is input to the decoder 520 by the first computer 200. Further, the decoder 520 also drives the memory area 520 of the memory 450. Further, the second decoder 520 drives the external memory 545. The computer 200 reads or reads data from the memory area 525, the memory area 510 and the memory element 550 according to the output signal of the decoder 520.

The third decoder 515 to which a signal is input from the third computer 400 drives the memory area 505 of the memory 450 and the external memory 540. Data is read or read from the memory area 505 and the memory device 540 through the computer 400 according to the output signal of the decoder 515.

As is apparent from this embodiment, each computer is provided with external memories 540, 545 and 550. Further, the second computer 300 has a memory 350.
The memory area 530 of the first computer 200 can access the memory area 525 of the memory 350 and the memory area 510 of the memory 450. The third computer 400 can access the memory area 505 of the memory 450.

In a particularly preferred embodiment, the external memories 540, 545, 550 may optionally be omitted altogether. Furthermore, it is possible to allow only one computer in each to access one memory. Therefore, for example, the second computer 3
It is also conceivable that 00 will access unnecessary memory portions of memory 350. In this case, the first computer has memory areas 510 of the memory 545 to the memory 450.
Access only. In this case, the memory device 550
Can be omitted altogether.

[0039]

As described above, the present invention (claims)
In 1), when each computer reads,
Access different memory areas when writing or writing
So the same memory area is read from each computer
Simultaneously accessed for writing, or writing
For the sake of convenience, they are not accessed at the same time. Also, each
The computers perform the reading function at the same time,
In addition, the writing function is performed at the same time.
Noh is executed separately, so one side executes writing.
When the other does not perform the read, the same
Memory area can be written to and read from each computer
It is possible to prevent simultaneous access by different functions of
Wear. Thus, each computer for the same memory area
Simultaneous access for reading from data, or writing
Simultaneous access for imprinting can be prevented and
Write from each computer to the same memory area
Simultaneous access due to different loading functions can be prevented
Because, each computer, and wait state, without having to generate a concurrent access problem, read data, write
Can be executed, it becomes possible to construct an efficient and fast multicomputer system, excellent effect can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a multi-computer device having two computers.

FIG. 2 is a block diagram showing a configuration of a multi-computer device having three computers.

FIG. 3 is an explanatory diagram showing a time flow of individual functions in an embodiment having two computers.

FIG. 4 is an explanatory diagram showing a time flow of individual functions in an embodiment having three computers.

FIG. 5 shows an external RA for a memory area not required for data exchange.
It is a block diagram which shows the example utilized as M.

[Explanation of symbols]

100 First Computer 110 second computer 120, 140 sensor 130,150 Actuator 160 memory

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Herbert Graf Germany 7295 Dornstetten Halwangen Heinrich Scheffstraße 20 (72) Inventor Jürgen Bauer Germany 7250 Leonberg Torffstraße 15 (72) Invention Franz Idler Germany 7143 Faijingen / Enzeppelinstrasse 67 (72) Inventor Gerhard Wagner Germany 7123 Sachsenheim / Hohenhaslach Buchenstraße 12 (72) Inventor Frank Hirskorun Germany 7140 Ludwig Hisbrück Knecker Weiching Boyzlen 8 (72) Inventor Thomas Liu Germany Germany 7318 Renningen 1 Eschlestraße 3 (72) Inventor Thomas Beren Germany 7148 Remsek 2 Ginsterweg 16 (56) Reference JP-A-2-199572 (JP, A) JP-A-57- 13565 (JP, A) JP 57-89169 (JP, A) JP 63-181068 (JP, A) JP 59-83235 (JP, A) Actual Kaihei 2-80855 (JP, U) (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06F 15/16-15/177 G06F 12/00-12/06 G06F 13/00 G06F 13/38-13/42 B60R 16/02

Claims (9)

(57) [Claims] 1. At least two computers commonly access a memory means, said memory means comprising at least two.
In a multi-computer device for controlling a process of an automobile, which is subdivided into two areas , one memory area is accessed by a first computer for reading only and the second computer is accessed only for writing, and the other memory area is accessed. the only the second computer read, also the first computer to access only the writing, these computers, read each computer respectively
Simultaneous execution of read function and write function
They are synchronized to run at the same time, and both write and read functions of each computer are
A multi-computer device characterized by being separated by a calculation function that performs calculation based on the read data . 2. A multi-computer system as claimed in claim 1, characterized in that all computers carry out the same series of functions. 3. Multicomputer device according to claim 1 or 2, characterized in that an interrupt is output by the master computer to at least one slave computer, on which all computers initiate a series of identical functions. 4. A multi-computer device according to any one of claims 1 to 3, characterized in that, following the interrupt, the computer first accesses the memory means for reading and then for writing. 5. The slave computer according to claim 1, wherein when the master computer fails, the slave computer partially performs the function of the slave computer to enable emergency operation. Multi-computer device. 6. The master computer according to any one of claims 1 to 4, wherein when the slave computer fails, a part of the functions of the master computer is substituted to enable emergency operation. Multi-computer device. 7. A multicomputer device according to claim 1, wherein the master computer calculates the fuel amount signal and the slave computer calculates the injection start signal. 8. A master computer calculates a drive signal, a slave computer calculates a fuel amount signal and an injection start signal, and another slave computer inputs and outputs data.
8. The multi-computer device according to any one of 1 to 7. 9. The multi according to claim 1, wherein the memory area of the memory means not required for data exchange is used as an external memory of each computer constituting the multi-computer device. Computer equipment.