JPH04304550A - Multiple computer apparatus - Google Patents

Abstract

PURPOSE: To guarantee the certaintity of data transmission by A system which has plural computers, minimize a delay due to data exchanging between the computers, and optimize the calculation time load on the individual computers and the whole system. CONSTITUTION: A memory means is divided into at least two areas 161 and 162; and one memory area 162 is accessed by a 1st computer 100 only for reading and by a 2nd computer 110 only for writing and the other memory area 161 is accessed by the 2nd computer only for reading and by the 1st computer 100 only for writing. Those computers are synchronized so as to access the memory means for reading or writing at the same time, so the need for access control is eliminated.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multicomputer system, and more particularly to a multicomputer system for controlling processes in a motor vehicle, in particular in which at least two computers have common access to memory means.

0002

BACKGROUND OF THE INVENTION In closed-loop or open-loop control of motor vehicles, the various closed-loop and open-loop tasks are typically divided among multiple computers. In that case, at least two computers can commonly access the same memory. Problems arise in such devices when both computers access the memory cells at the same time. To prevent this, complex means are required to ensure that multiple computers do not access the same memory cell at the same time.

0003

SUMMARY OF THE INVENTION It is an object of the present invention to ensure reliability of data transmission in an apparatus having a plurality of computers, to minimize delays due to data exchange between computers, and to minimize delays between individual computers as well as the entire system. The objective is to optimize the computational time burden.

0004

SUMMARY OF THE INVENTION In order to solve this problem, the present invention provides a multi-computer system, in particular for controlling processes in an automobile, in which at least two computers have common access to the memory means. It is subdivided into two areas, one memory area to which the first computer has read-only access and the second computer to write only, and the other memory area to which the second computer has read-only access. , also adopted an arrangement in which the first computer only has write access and these computers are synchronized to access the memory means in a similar manner at the same time.

[0005]

[Operation] A multi-computer system having such a configuration has the advantage that access control is not necessary. No means of controlling access to the memory means by individual computers is required. By synchronizing computers, each computer knows what functions the other computers are performing. A further advantage is that individual calculations can be performed on any computer. All data is available to all computers almost simultaneously. Therefore, there is no need for a computer connected to the sensor to process its signals. This processing can be assigned to another computer. This ensures that the workload of all computers is similar.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a block diagram of a multicomputer system with two computers. First computer 100 receives signals from various sensors 120 and outputs signals to various actuators 130. The second computer 110 similarly receives signals from various sensors 140 and controls various actuators 15.
Outputs the operation signal to 0. Both computers 100, 11
0 are connected to each other via memory means 160. This memory is divided into two areas. The first area 161 serves to transfer data from the first computer 100 to the second computer 110. The second area 162 serves to transfer data from the second computer 110 to the first computer 100.

[0007] The first computer 100 is called a master computer. In that case, the second computer becomes a slave computer. In the case of self-igniting internal combustion engines, the master computer calculates in particular a signal representing the amount of fuel to be injected. In that case, the master computer outputs a corresponding control signal (fuel quantity signal) to the actuator that determines the fuel quantity. The calculation of the amount of fuel to be injected takes place according to the output signals from the rotational speed sensor and other sensors.

In this case, the second computer 110 calculates the start of injection. In this regard, the computer outputs an injection start signal to the corresponding actuator 150. In this case, this second computer 110 also processes at least the output signal of the rotational speed sensor.

The invention is not limited to the control of diesel internal combustion engines, but can also be applied to other open-loop and closed-loop processes. In the case of internal combustion engines with external ignition, one computer is used, for example, to determine the signal for driving the throttle valve actuator, and the other computer to determine the ignition point or the injection quantity. More preferably, it is also conceivable that the computer performs functions such as transmission control, anti-skid control, exhaust gas recirculation control or boost pressure control.

[0010] When the second computer 110 fails, the first computer 100 takes over some of its functions. In this case, the functional scope of the calculation of fuel quantity and injection start is limited. This allows for emergency driving, although it is not comfortable. If the first computer 100 fails, the range is similarly limited, but the second computer 100
10 performs the functions of the first computer 100. This requires that both computers can access both actuators, respectively.

[0011] The present invention is not limited to these embodiments. It is also possible to configure only one computer to be connected to the sensor and to process the signals obtained from this sensor. Another computer is then connected to the actuator and calculates a signal to drive the actuator based on the values of the first computer.

Both computers are connected to memory means 160 for data transmission. Particular preference is given to using DPRAM (Dual Port RAM) for this purpose. Such a DPRAM has two terminals or bus lines. Therefore, this DPRAM can be connected to two computers. This allows two computers to access the DPRAM.

In the present invention, memory 160 has two areas 1
It is divided into 61 and 162. The first computer accesses the first area 161 for writing only. Therefore, the first computer 100 only writes values in this area. In contrast, the second computer 1
10 accesses this area only for reading. Therefore, the second computer 110 only reads values from this area. Area 161 therefore serves to provide data transmission from first computer 100 to second computer 110. On the other hand, the second area 1
62 serves to transmit data from the second computer 110 to the first computer 100. In this way, the first computer 100 accesses the second area only for reading, and the second computer 110 accesses only for writing.

[0014] In that case, it must be ensured that the memory cells are not accessed by both computers simultaneously. In conventional devices, this is achieved by circuit-technically complex means or methods.

The multicomputer device of the present invention solves this problem as follows. Both computers operate synchronously. That is, both computers execute corresponding functions simultaneously. This means that both computers access memory 160, for example for reading, at the same time. Since the first computer only reads values from the second area 162 and the second computer 110 only reads values from the first area 161, no access problems occur. The same applies to write accesses.

The flow of each function will be explained with reference to FIG. Usually one computer is called the master computer and the others are called slave computers. In this embodiment, the master computer is the first computer R1
It is. When the first computer R1 is interrupted from the outside, a predetermined series of functions is started. At the same time, an interrupt DPI is output to the second computer R2. In response to this interrupt, the second computer R2 also begins a predetermined series of functions. The interrupts that start the computer R1 occur, for example, according to time or events. Therefore, interrupts are always triggered at the same time interval with a predetermined clock frequency. Alternatively, interrupts can be triggered based on events. This means that an interrupt is triggered when a predetermined event occurs. Such an event is, for example, the occurrence of a rotational speed pulse.

After an interrupt occurs, both computers begin a similar set of predetermined functions. In a first period E, data is read from the memory 160 into the respective computer (reading function E). In a second period R, the computer calculates a value based on these data (calculation function R). In the period S that follows, a sensor signal is detected. Subsequently, in period A, the calculated values as well as the detected sensor signals are read into the memory 160 (read function A).

A new interrupt is issued to the computer R1 at a predetermined time interval, and based on this, this computer transmits the interrupt DPI to the second computer R1.
Output to 2. Both computers then perform their respective functions again.

As shown, both computers R1 and R
2 accesses memory 160 only for reading during the first period E. Only later, during period A, both computers access memory for writing. Both read and read functions are separated by a calculation function. This prevents memory from being accessed simultaneously by writing and reading.

[0020] These values are available to both computers by detecting the sensor values immediately before they are output to memory. Thereby, the values of sensors that are not directly connected to the computer are also used by this computer. Therefore, the value of the sensor 140 is also obtained in the first computer 100.

After reading the contents of the memory at each interrupt, all computers obtain similar values. This makes it possible to divide individual calculations evenly among the computers. Therefore, the computer R1, which originally only calculates the fuel quantity, can also perform the work of the computer R2. This ensures that the workload of both computers is equalized. Each individual calculation can be performed on any computer. For example, the computer R1 sends a signal to the sensor 140 to drive the actuator 150 originally assigned to the second computer.
This can be done based on the value of This provides the advantage that a computer with excellent mathematical characteristics can be combined with a computer with excellent input/output characteristics.

FIG. 2 shows a block diagram of a three-computer system. The first computer 200 detects input signals from various sensors 202 and outputs control signals to various actuators 204. The second computer 300 detects a sensor signal from the sensor 302 and outputs an operation signal to the actuator 304. The third computer 400 detects the signal from the sensor 402 and outputs an operation signal to the actuator 404.

[0023] The first and second computers are each connected to a memory 350. This memory is preferably divided into three areas. First area 351 and second area 35
2, the second computer has read-only access. On the other hand, the third memory area 353 has a second
computers have write-only access. The first computer has first and second memory areas 351 and 352.
The third memory area 353 is accessed only for writing, and the third memory area 353 is accessed only for reading.

The first and third computers are each connected to a memory 450. This memory is preferably divided into three areas. A first memory area 451 of memory 450 is accessed only for writing by the third computer and only for reading by the first computer. The second and third memory areas 452 and 453 have a first
The third computer 400 has only write access and the third computer 400 only has read access.

In the figure, the dotted line indicates that data obtained by the third computer 400 is transferred to the first computer 20.
0 to the first memory area 351 of the memory 350. Furthermore, it is illustrated by dotted lines that data obtained by the second computer 300 is read from the first computer 200 into a third memory area 453 of the memory 450.

The three-computer arrangement of the present invention is a particularly preferred embodiment when the first computer 200 only performs the calculation of the signals that drive the actuators. At this time, the second computer 300 calculates basic data (fuel amount signal, injection start signal) for the first computer 200. The third computer 400 has the task of inputting and outputting various values from various sensors.

FIG. 4 illustrates the flow of various functions. In this embodiment, the first computer 200
becomes the master computer. When an event or time-based trigger pulse is externally input to this computer, this computer outputs an interrupt signal to the second computer 300 and the third computer 400. After interrupt all three computers are DPR
Start function E for reading data from AM memory. After the data is read, various values are calculated based on these data. This is indicated by R in the figure. Following this, in the next step S, values are read from the various sensors. Each computer reads signals from sensors directly connected to it. In that case, it is not necessary to connect all computers to the sensor. It is also conceivable to connect only one computer, for example the third computer 400, to the sensor. In this case, this function is omitted on other computers. These data are subsequently read into the memory DPRAM (function A). This means that data is written to DPRAM.

The first computer 200 has a memory 350
memory area 353 of and memory area 4 of memory 450
51 (function E). The second computer 300 reads data from memory areas 351 and 352, and the third computer 400 reads data from memory area 453.
, 452. Therefore, during the reading function E, all computers access different memory areas. Each memory area can only be accessed by one computer. During function A (writing to memory) in which individual memory areas are written, the first computer 200 writes to memory area 352 and memory area 452 . Also, the third computer has memory area 4.
51, the second computer 300 has a memory area 353
Write to.

These series of functions are followed by yet another series of functions. Here, only the master computer (first computer 200) is active. Here, the data read into the memory by the second computer is available only to the second and first computers. Third
computer cannot access the data of the second computer, and vice versa. Therefore, it is necessary for the first computer to write the second computer's data to memory 450 and the third computer's data to memory 350 in other functions.

The first computer 200 has a memory 353
and reads data from the memory 451. That is, D.P.
After a read access to the RAM and a calculation step, the first computer reads the data read from memory 350 into memory area 453 . Further, the first computer reads the value read from the memory area 451 to the memory area 351. Therefore, the memory DPRAM
Write access is made to 351. This method ensures that all data will be available to all computers the next time the data is loaded into the computer.

The method described above is not limited to two or three computer systems. Particularly preferably 3
It can be applied to more computer devices than computers. This is not necessarily the sequence of functions in which a computer accesses memory first for reading and then for writing. It is also possible to access memory first for writing and then for reading.

Usually, the memory element of DPRAM is 2k.
A device having a memory capacity of bytes or more is used. For the above-mentioned task of data exchange, only 1/2 kbyte of memory capacity is required. Therefore, the present invention proposes to use the memory area of the DPRAM that is not necessary for data exchange as the external RAM of the microcomputer. This method has the advantage of saving external RAM elements. This saves costs and conductor circuits. Furthermore, the number of components and wiring locations are reduced, thereby increasing reliability and reducing the chance of failure.

FIG. 5 shows such a device according to the invention in detail. The device of FIG. 5 corresponds approximately to the device of FIG. Corresponding parts are therefore provided with similar reference numerals. Sensors 402, 202, 302 and actuators 304, 204, 404 have been omitted to avoid clutter.

The first computer 200 has a memory 350
It is connected to the second computer 300 via. Further, the first computer 200 is connected to a third computer via the memory 450.
computer 400. Memory 350 is 3
It is divided into two areas. The first area is the area 351, 3 explained in FIG. 2, which is necessary for data exchange between computers.
52, 353. The memory area not required for data exchange is further divided into two parts 525, 530. Memory area 530 is accessed only by second computer 300. For this purpose, a corresponding drive signal is generated by the first decoder 535. Other memory elements 55
0 is similarly accessed by first decoder 535. Data is read or not read from the memory area 530 and the memory element 550 according to the output signal of the decoder 535.

A second portion 525 of memory 350 is driven by second decoder 520 . A corresponding signal is inputted to the decoder 520 by the first computer 200 . Furthermore, decoder 520 also drives memory area 520 of memory 450. Additionally, second decoder 520 drives external memory 545. Computer 200 reads or reads data from memory area 525, memory area 510, and memory element 550 according to the output signal of decoder 520.

A third decoder 515 to which a signal is input from the third computer 400 drives the memory area 505 of the memory 450 and the external memory 540. Data is read or read from memory area 505 and memory element 540 via computer 400 according to the output signal of decoder 515 .

As is clear from this embodiment, each computer is provided with external memories 540, 545 and 550. Further, the second computer 300 has a memory 350
The first computer 200 can access the memory area 530 of the memory 350 , the memory area 525 of the memory 350 , and the memory area 510 of the memory 450 . Third computer 400 can access memory area 505 of memory 450.

In particularly preferred embodiments, external memories 540, 545, 550 may optionally be omitted altogether. Furthermore, it is also possible to allow only one computer each to access one memory. Therefore, for example, the second computer 3
It is also possible that 00 accesses an unnecessary portion of memory 350. In this case, the first computer uses memory area 510 of memory 545 or memory 450.
Access only. In this case, memory element 550
can be omitted completely.

[0039]

As explained above, in the present invention, the memory means is subdivided into at least two areas, and one memory area is used only for reading by the first computer, and for writing by the second computer. the other memory areas are accessed by the second computer only for reading and the first computer only for writing, and these computers access the memory means in similar ways at the same time. The synchronized configuration eliminates the need for access control, guarantees data transmission reliability, minimizes delays due to data exchange between computers, and reduces the computation time of individual computers as well as the entire system. It is possible to optimize the burden of

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a multi-computer device having two computers.

FIG. 2 is a block diagram showing the configuration of a multi-computer device having three computers.

FIG. 3 is an explanatory diagram showing the time flow of individual functions in an embodiment having two computers.

FIG. 4 is an explanatory diagram showing the time flow of individual functions in an embodiment having three computers.

[Figure 5] Memory areas not required for data exchange are transferred to external RA
It is a block diagram showing an example used as M.

[Explanation of symbols]

100 First computer 110 Second computer 120, 140 sensor 130, 150 Actuator 160 memory

Claims (9)

[Claims] 1. In a multicomputer arrangement, in particular for controlling processes in a motor vehicle, in which at least two computers have common access to the memory means, the memory means are subdivided into at least two areas, one of the memory areas having a One computer has read-only access, a second computer has write-only access, and the second computer has read-only access to other memory areas.
Also, the first computer has write access only,
Multi-computer arrangement, characterized in that these computers are synchronized so that they access the memory means in a similar way at the same time. 2. A multi-computer system according to claim 1, wherein all the computers each perform the same set of functions. 3. A multi-computer system according to claim 1, characterized in that an interrupt is output by the master computer to at least one slave computer, on the basis of which all computers start the same series of functions. 4. Multicomputer arrangement according to claim 1, characterized in that following an interrupt the computer first accesses the memory means for reading and then for writing. 5. Claim 1, wherein the slave computer enables emergency operation by taking over some of the functions of the master computer when the master computer fails.
4. The multicomputer device according to any one of 4 to 4. 6. Claim 1, wherein the master computer enables emergency operation by taking over some of the functions of the slave computer when the slave computer fails.
4. The multicomputer device according to any one of 4 to 4. 7. The multi-computer system according to claim 1, wherein the master computer calculates the fuel quantity signal and the slave computer calculates the injection start signal. 8. The master computer calculates the drive signal, the slave computer calculates the fuel amount signal and the injection start signal, and the other slave computers input and output data. The multi-computer device according to any one of the preceding items. 9. The multicomputer device according to claim 1, wherein a memory area of the memory means not required for data exchange is used as an external memory of the microcomputer.