JP3403061B2 - Solid-state imaging device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOS type solid-state image pickup device, and more particularly to improvement of the structure of a read transistor portion of a unit cell portion.

[0002]

BACKGROUND OF THE INVENTION MOS type solid-state image pickup device (MOS image sensor) is capable of miniaturization, and it can be driven by a single power source, and including an imaging unit and the peripheral circuits, making everything MOS process In recent years, it has attracted attention because of its advantages such as the ability to form a chip as one integrated circuit.

Various techniques have been proposed for an amplification type MOS solid-state image pickup device (amplification type MOS image sensor) having an amplification function inside a pixel, and such an amplification type MOS sensor is used for the pursuit of high image quality. It is expected to be suitable for reducing the pixel size by increasing the number of pixels for responding and reducing the image size.

Furthermore, the amplification type MOS image sensor consumes less power than the CCD image sensor, and can be easily integrated with other peripheral circuits that use the same CMOS process as the sensor part, thereby reducing the cost. There is also a decisive advantage.

Here, the outline of the amplification type MOS image sensor will be described. That is, in the amplification type MOS image sensor, the cells constituting each pixel are the same semiconductor substrate Su.
On b, a photodiode as a photoelectric conversion element and a plurality of MOS transistors are arranged in parallel. Then, a potential is applied to the MOS transistor forming the signal charge storage / readout portion by the signal charge generated by photoelectric conversion by the photodiode, the MOS transistor is turned on, and the potential is provided for signal amplification inside the pixel. The amplification function is provided inside the pixel by providing the MOS transistor (amplification transistor) to modulate the amplification transistor.

Then, the signal amplified by the amplification transistor is read out via the horizontal address line to become an image signal in the pixel. A plurality of such unit cells are arranged in a matrix (two-dimensional matrix) in an orderly manner.

By the way, although the MOS type solid-state image pickup device is driven by a single power source and consumes less power, on the other hand, for example,
Since a low voltage drive of 5 [V] or 3.3 [V] is used, it is difficult to read out signal charges from the photodiode when a fully depleted photodiode is used as the photoelectric conversion unit. , It is difficult to perform complete transfer read.

In the MOS type solid-state image pickup device, the photodiode portion constituting the unit cell is formed in the well of the first conductivity type and the second portion.
A conductive type impurity region is formed and configured. Then, a surface shield region of the first conductivity type impurity is formed on the second conductivity type impurity region, and the impurity concentration of the second conductivity type region of the photodiode portion is the same as the impurity concentration of the well region and the surface shield region. It is at an intermediate level of impurity concentration in the region. Further, since the second conductivity type impurity region of the photodiode needs to accumulate the electronic charge generated by the photodiode in correspondence with the amount of received light, the potential of the photodiode is 3.3 [V] or 5 [V].
It is necessary to set a positive voltage such as.

However, in this case, the depletion layer necessarily extends to the surface of the second conductivity type impurity region, but when the depletion layer reaches the surface of the second conductivity type impurity region, the leak current increases and dark Since this leads to an increase in unevenness in time, it is necessary to design the impurity concentration in the surface shield region formed on the upper surface of the second conductivity type impurity region to be the highest.

Therefore, such a surface shield structure is formed by completely depleting the second-conductivity-type impurity region of the photodiode, so that the second-conductivity-type impurity region of the photodiode corresponds to the amount of light received. The signal charges generated by the photoelectric conversion are accumulated inside the semiconductor substrate 1 without leaking. Then, the accumulated signal charges are read by a MOS type read transistor that shares the second conductivity type impurity region of the photodiode as a source region.

The MOS type read transistor which shares the second conductivity type impurity region of the photodiode as the source region has a gate electrode extending over the second conductivity type impurity region and the drain region. By applying a signal to turn on the read transistor, the signal charge accumulated in the second conductivity type impurity region of the photodiode is read.

However, in the case of the MOS type solid-state image pickup device having the above-mentioned structure, the above-mentioned high-concentration surface shield region always extends below the gate of the read transistor due to the heat treatment after the ion implantation formation in the semiconductor manufacturing process. Once in such a state, even if the gate of the read transistor is turned on, the high-concentration first conductivity type surface shield layer makes it impossible to set the potential under the gate to a high voltage.

Therefore, the read transistor cannot read the signal charge generated in the second conductivity type impurity region of the photodiode. Signal reading can be easily performed with an np type photodiode, which is not perfect reading. Therefore, it is conceivable to use such a photodiode as the photoelectric conversion element of the unit cell, but this time, since the photodiode is not completely transferred, dark current etc. increases due to the residual charge. The problem occurs.

Further, if the signal of the photodiode cannot be completely transferred and read out, a capacitive afterimage is generated in each pixel, which causes deterioration of image quality. Therefore, MOS
As a solid-state imaging device of the type, it is unavoidable to adopt a configuration in which the photodiode is completely depleted in the unit cell.

Therefore, the development of a technique for completely reading out all the generated signal charges from a fully depleted photodiode is desired in the MOS type solid-state image pickup device.

Further, not only in the MOS type, but also in the CCD type solid-state image pickup device, the current read voltage is 15 [V].
The problem is the difficulty of complete transfer and reading due to the lower voltage and smaller cell size.

Therefore, although the object is the technology relating to the CCD type solid-state image pickup device, for example, "Document Nobuhiko Muto"
h, et al., “A 1 / 4‐inch 38OkPixel IT ・ CCD Image S
ensorEmploying Gate-Assisted Punchthrough Read-
out Mode ”, IEEE TRANSACTIONS ON ELECTRON DEVICES, V
OL.42, NO.10, OCTOBER 1995. ”,
In the CD-type solid-state imaging device, a technique has been proposed in which the signal of the photodiode portion formed in the deep portion of the semiconductor substrate is improved by devising a reading method.

In this example, the amount of decrease in the saturation signal of the photodiode is improved by forming the photodiode in the deep portion of the semiconductor substrate, and the photodiode is formed in the deep portion of the semiconductor substrate. To increase the saturation signal of the photodiode, and improve the signal charge in the deep portion of the substrate by improving the read gate.

In this example, the structure under the read gate adjacent to the photodiode is formed in the order of "p layer" / "p- layer" / "p layer" from the silicon oxide film interface side. The mode is such that punch-through reading is performed by the voltage applied to the reading gate section.

As described above, by reducing the saturation signal of the photodiode, the saturation signal of the photodiode is increased by forming the photodiode in the deep portion of the semiconductor substrate, and the signal charge in the deep portion of the substrate is read out through the gate. The concept is to compensate by providing a structure in which the photodiode section surface is covered with a p-type shield layer. However, in such a structure in which the signal charge of the photodiode formed inside the substrate is actually read out. Would be extremely difficult to do.

The reason is that the surface shield layer formed at the read gate end by self-alignment suppresses the fluctuation of the channel on the photodiode side even when a voltage is applied to the gate, and the signal of the photodiode is suppressed. This is because it becomes a barrier for electric charges.

The above problems due to the surface shield are
In the MOS type solid-state image pickup device and the CCD type solid-state image pickup device, there arises a problem that reading becomes impossible, and
This is a major obstacle in promoting lowering of the read voltage.

[0023]

The MOS type solid-state image pickup device can be driven by a single power supply and consumes less power, and is an economically advantageous element compared with the CCD type. However, if a part of the photodiode is also used as the source of the reading MOS transistor, the impurity concentration in the second conductivity type impurity region of the photodiode is reduced due to the surface shield layer formed on the photodiode portion. Is at an intermediate level between the impurity concentration of the surface shield region and the impurity concentration of the surface shield region, and the second conductivity type impurity region of the photodiode needs to accumulate the electronic charges generated by the photodiode in correspondence with the amount of received light. , The potential of the photodiode is 3.3 [V] or
It must be set to a positive voltage such as 5 [V].

However, in this case, the depletion layer always extends to the surface of the second conductivity type impurity region, but when the depletion layer reaches the surface of the second conductivity type impurity region, the leakage current increases and dark Since this leads to an increase in unevenness in time, it is necessary to design the impurity concentration in the surface shield region formed on the upper surface of the second conductivity type impurity region to be the highest.

Since such a surface shield structure is formed by completely depleting the second-conductivity-type impurity region of the photodiode, photoelectric conversion is performed on the second-conductivity-type impurity region of the photodiode in correspondence with the amount of light received. The signal charges generated by the conversion are accumulated inside the semiconductor substrate 1 without leaking.

The MOS type read transistor which shares the second conductivity type impurity region of the photodiode as the source region has a gate electrode extending over the second conductivity type impurity region and the drain region. By applying a signal to the electrode to turn on the read transistor, the signal charge accumulated in the second conductivity type impurity region of the photodiode is read.

However, in the case of the MOS type solid-state image pickup device having the above-mentioned structure, the above-mentioned high-concentration surface shield region always extends below the gate of the read transistor due to the heat treatment after the ion implantation formation in the semiconductor manufacturing process. Once in such a state, even if the gate of the read transistor is turned on, the high-concentration first conductivity type surface shield layer makes it impossible to set the potential under the gate to a high voltage.

Therefore, the read transistor cannot read the signal charge generated in the second conductivity type impurity region of the photodiode. Therefore, the object of the present invention is to improve this point, and even in the case of the surface shield structure, 3.3 [V] or 5.0
It is an object of the present invention to provide a solid-state imaging device having a read transistor structure capable of completely transferring the signal charge of the photodiode with a low power supply voltage such as [V].

[0029]

In order to achieve the above object, the present invention is configured as follows. That is, a photodiode section including a first-conductivity-type well region formed on a semiconductor substrate and a second-conductivity-type area formed on the well region, and a photodiode section above the second-conductivity-type area. The formed first-conductivity-type surface layer and the second part of the photodiode section in the first-conductivity-type well region.
A second conductivity type drain region formed in the vicinity of the conductivity type region, and the drain region and the second region of the photodiode section.
In a solid-state imaging device having a gate portion of a read transistor provided above the well region between a conductivity type region, firstly, a second conductivity type region and a second conductivity type drain of the photodiode unit. A first-conductivity-type barrier layer that connects the region with a deep layer portion is formed, and a region between the first-conductivity-type barrier layer and the bottom of the gate portion is pushed out from the second-conductivity-type region of the photodiode portion. A high-concentration second conductivity type channel constituent layer is provided.

Alternatively, the second part of the photodiode section
A first conductivity type barrier layer is formed to connect the conductivity type region and the second conductivity type drain region in a deep layer portion, and the photodiode is provided between the first conductivity type barrier layer and the gate portion. The second conductive type channel forming layer extending from the second conductive type region to the drain region is provided.

Alternatively, the first conductivity type barrier layer formed adjacent to both the second conductivity type photodiode part and the second conductivity type drain region is provided under the gate part of the read transistor, and the first conductivity type barrier layer is formed. A structure having a second conductivity type through channel layer formed adjacent to both the second conductivity type photodiode section and the second conductivity type drain region on the conductivity type barrier layer, or 1
In place of the conductivity type barrier layer, a structure is provided in which a second conductivity type barrier well having a higher concentration than that of the first conductivity type well layer is provided.

Alternatively, the first formed on the semiconductor substrate
A photodiode portion including a well region of a conductivity type and a second conductivity type region formed on the well region, and a first portion formed on the second conductivity type region of the photodiode portion.
A conductive type surface layer, a second conductive type drain region formed in the first conductive type well region in the vicinity of a second conductive type region of the photodiode part, and a drain region and a second part of the photodiode part. In a solid-state imaging device having a gate portion of a read transistor provided above the well region between the two conductivity type regions, a part of the second conductivity type region of the photodiode is below the gate portion of the read transistor. The structure reaches the interface with the oxide film.

With such a structure, even if the photodiode portion has a surface shield structure, the readout transistor can be operated normally and the signal of the photodiode can be completely read out, and the surface shielded photodiode can be read. Signal charge of
A read transistor structure capable of reading with a low power supply voltage of 5 [V] or 3.3 [V] can be obtained.

Therefore, according to the present invention, in the structure having the photodiode portion in which the unit cell portion is fully depleted and the transistor for reading out the signal charge of the photodiode, the signal in the fully depleted photodiode portion can be completely read out. It is possible to provide a solid-state imaging device having a readout transistor capable of performing the above.

[0035]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows a first embodiment of the present invention.

In this structure, a well region 2 of the first conductivity type in which, for example, p-type impurities are diffused is formed on a Si (silicon) semiconductor substrate 1. The impurity concentration of the well region 2 is as low as a few E15 (E15 is the 15th power of 10).

In a part of the well region 2, a region (PD-n) 7 for forming the photodiode 3 is formed inside the well region 2 by implanting an impurity of the second conductivity type. is there.

In addition, in the well region 2, a detection node portion made of a second conductivity type impurity is provided at a predetermined distance near the second conductivity type region (PD-n) 7 for forming the photodiode 3. (SD-n) 10 is formed, and signal storage is performed on the semiconductor substrate 1 between the detection node section (SD-n) 10 and the second conductivity type region (PD-n) 7 of the photodiode 3. A gate electrode 4 for forming a reading transistor for reading is formed. Since the gate electrode 4 is arranged so as to extend between the detection node (SD-n) 10 and the second conductivity type region (PD-n) 7 forming the photodiode 3, the detection node (SD-n)
Thus, a MOS transistor having the drain region 5 as the drain region 5 and the second conductivity type region (PD-n) 7 forming the photodiode 3 as the source region is formed, and the second conductivity type region (PD -N) The signal charge 16 generated in 7 can be made to flow to SD-n 10 on the drain region 5 side by controlling the voltage of the gate electrode 4, and S
If the gate electrode of the amplifying MOS transistor is connected to the Dn 10, for example, the charge of the photodiode 3 can be given by controlling the gate electrode 4. Therefore, the SD-n 10 has a meaning such as a detection node of the photodiode 3 with respect to the amplification MOS transistor. Therefore, the SD-n 10 forming the drain region 5 is called a detection node here. In the same sense, the gate electrode 4 is a transfer gate for the signal generated by the photodiode 3, and will be referred to as the gate electrode 4 hereinafter.
Will be referred to as a transfer gate (TG) 4.

A channel stop region 11 for element isolation is formed on the semiconductor substrate 1 so as to surround the photodiode 3 and the read transistor, and the second region in the photodiode 3 formation region of the semiconductor substrate 1 is formed.
A surface shield region (PD-p +) 6 for protecting the surface is formed on the upper surface of the conductivity type region (PD-n) 7, and a detection node portion (under the transfer gate (TG) 4 and a read destination) ( On the upper surface of SD-n) 10, a channel implant (CH-) for setting the thresholds of the detection node unit (SD-n) 10 and the transfer gate (TG) 4 is provided.
I / I) 9 is formed.

The element isolation region 11 is used as a channel stop (high-concentration first conductivity type layer), but this element isolation region 11 is a thick oxide film LOCOS (Local Oxidation of S).
It may be either separated by an (ilicon) area or both. It is represented by a channel stop in the drawing.

The impurity concentration of the second conductivity type region (PD-n) 7 in the photodiode portion 3 is at an intermediate level between the impurity concentration of the well region 2 and the impurity concentration of the surface shield region (PD-p +) 6. is there. Further, the second conductivity type region (PD-n) 7 of the photodiode 3 needs to store a positive electric potential because it is necessary to accumulate the electronic charges generated by the photodiode in correspondence with the amount of received light.

However, in this case, the depletion layer always extends to the surface (upper surface) of the second conductivity type region (PD-n) 7, but the depletion layer is the second conductivity type region (PD-n) 7. 7
When reaching the surface (upper surface) of the second conductivity type, the leakage current increases, which causes unevenness in darkness. Therefore, the surface shield region (PD-n) formed on the surface (upper surface) of the second conductivity type region (PD-n) 7 is The impurity concentration in the p +) 6 portion must be designed to be the highest.

In such a surface shield structure, the second conductivity type region (PD-n) of the photodiode 3 is used.
7 is completely depleted and formed, the signal charge 16 generated by photoelectric conversion corresponding to the amount of received light in the second conductivity type region (PD-n) 7 of the photodiode 3 is not leaked to the semiconductor. It is accumulated inside the substrate 1.

However, since the high-concentration surface shield region (PD-p +) 6 always extends below the transfer gate (TG) 4 by the heat treatment after the ion implantation formation in the semiconductor manufacturing process, In such a state, even if the transfer gate (TG) 4 is turned on due to the high-concentration p region, the potential under the transfer gate 4 cannot be set to a high voltage.

Therefore, the photodiode (PD-n)
The signal charge 16 of 7 cannot be read. Furthermore, when the channel length L of the transfer gate (TG) 4 is shortened by the low-concentration p-well region 2, the second conductivity type region (P) of the photodiode 3 corresponding to the source region is formed.
Dn) 7 and the detection node portion S corresponding to the drain region
A depletion layer extends from Dn 10, causing punchthrough.

When punch-through occurs in the gate (TG) 4 portion of the transfer transistor, the potential of the drain region modulates the channel potential, which is a "channel length modulation effect".
(Drain modulation effect) ”occurs, which causes problems such as deterioration of linearity of signal light quantity-output charge characteristics.

Therefore, in the first embodiment, the well region 2 of the first conductivity type formed on the semiconductor substrate 1, the well region of the first conductivity type and the well region 2 formed on the well region 2 are formed. 1 conductivity type surface shield area (PD-p +
) 6 and a first conductivity type surface layer (surface shield region (PD-p +) 6 formed on the second conductivity type region (PD-n) 7 of the photodiode 3). ) And the second in the photodiode 3
The conductivity type region (PD-n) 7 and the read gate (TG) 4 formed in the vicinity of the photodiode 3 portion
And a second conductivity type drain region 5 (detection node unit (SD-n) 10) formed adjacent to the other of the read gate (TG) 4 unit, the unit cell unit of the solid-state imaging device, A first conductivity type barrier layer (BA-P) 8 having a higher concentration than that of the first conductivity type well region 2 is formed inside the semiconductor substrate 1 below the read gate (TG) 4, and the photodiode is further provided. Second conductivity type region 7 of
Adjacent to the second conductivity type region 7, the read gate (T
G) A structure having a second conductivity type through channel layer 9 formed underneath.

That is, in order to prevent problems such as the channel length modulation effect (drain modulation effect) and punch through, the transfer gate (T
G) A barrier layer (BA-P layer) 8 of the same type as the p-well layer 2 and having a higher concentration (p-type and higher concentration) than that of the p-well layer 2 is provided under 4 and this barrier layer (BA-P layer) 8 is provided so as to be connected to both the second conductivity type region (PD-n) 7 of the photodiode 3 and the detection node (SD-n) 10.

As a result, the depletion layer extending from both the second conductivity type region (PD-n) 7 forming the photodiode 3 and the detection node (SD-n) 10 on the drain side of the transistor can be suppressed.

Furthermore, a high concentration barrier layer (BA-P layer)
Since there is a possibility that the signal charge of the second conductivity type region (PD-n) 7 in the photodiode 3 may not be read due to the influence of 8, the barrier layer (BA-P
A channel forming layer (TG-N) 15 is provided on the upper side of the layer 8. The channel forming layer (TG-N) 15 is located on the upper side of the barrier layer (BA-P layer) 8, and the second conductivity type region (PD-n) 7 of the photodiode 3 is transferred to the transfer gate of the transistor. (TG) 4 Form so as to partly extend downward.

The formation range of the channel formation layer (TG-N) 15 is narrow, and the second conductivity type region (PD
-N) transfer gate (TG) 4 of transistor in 7
It only occupies a part of the area underneath and the transfer gate 4.

With this structure, the channel forming layer (TG-N) 15 plays a part of the signal read path 13, and the signal read path can be secured.

(Second Embodiment) FIG. 2 shows a second embodiment as another example. The structure of FIG. 2 is almost the same as that of FIG. 1 except that the barrier region (BA-P) 8 is not connected to the second conductivity type region (PD-n) 7 of the photodiode 3. There is.

However, since it is necessary to suppress the extension of the depletion layer from the detection node portion (SD-n) 10 which constitutes the drain region 5, the barrier region (BA-P) 8 is the detection node which constitutes the drain region 5. It is connected to the lower part of the section (SD-n) 10.

For the same reason as in the first embodiment, the channel forming layer (TG-) is formed on the upper side of the barrier layer (BA-P layer) 8.
N) 15 is provided. This channel formation layer (TG-N) 1
5 is located on the upper side of the barrier layer (BA-P layer) 8, except that the second conductivity type region (PD-n) 7 of the photodiode 3 is provided as in the first embodiment. The transistor is not formed so as to partially protrude below the transfer gate (TG) 4 but is kept within the second conductivity type region (PD-n) 7.

The formation range of the channel forming layer (TG-N) 15 is narrow, and the second conductivity type region (PD
-N) transfer gate (TG) 4 of transistor in 7
It only occupies a partial area in the vicinity.

With this structure, the channel forming layer (TG-N) 15 plays a part of the signal read path 13 and the signal read path can be secured.

Since the n-type ion implantation region (channel formation layer (TG-N) 15) for reading is formed by the self-alignment process after the formation of the transfer gate (TG) 4, the MOS of this structure is formed. In the solid-state imaging device, it is possible to suppress variations in the manufacturing process.

(Third Embodiment) FIG. 3 shows a third embodiment. This example basically follows the structure of the first embodiment. However, the channel forming layer (TG-N) 15 is removed from the structure of the first embodiment, and the transfer gate (T
G) 4 and below the barrier layer (BA-P) 8 in the region above the second conductivity type region (PD-n) 7 and the detection node portion (SD-n) 10 across the channel formation layer ( CH-A)
Twelve are provided.

That is, as shown in FIG. 3, in this example, a low-concentration well region (P-well region) 2 is formed on a semiconductor substrate 1. In this case as well, since reading is very problematic, the second conductivity type region (PD-n) 7 of the photodiode 3 and the drain part 5 of the transistor are formed under the read gate (TG) 4 (SD-n). ) 10
To form a barrier layer (BA-P) 8
This makes the channel length modulation effect (drain modulation effect)
The second conductivity type region (PD-n) from the second conductivity type region (PD-n) 7 of the photodiode 3 which is completely depleted by applying a low voltage to suppress the occurrence of punch-through and punch-through. The barrier layer (BA-P) in the channel region in order to be able to read out the signal charge 16 generated in 7 to the detection node unit (SD-n) 10.
8 Ion implantation is performed on the upper side region to form a channel formation layer (CH-
A) 12 is formed.

Ion implantation is performed by using the second conductivity type region (PD-
n) 7 and a part of the detection node unit (SD-n) 10 so that the second conductivity type region (PD
-N) 7 and the detection node unit (SD-n) 10 may be connected to each other, a channel forming layer (CH-A) 12 may be formed in a region above the barrier layer (BA-P) 8 in the channel region.

Such a channel forming layer (CH-A) 1
2 is provided, the signal charge 16 generated in the second conductivity type region (PD-n) 7 of the photodiode 3 follows this channel forming layer (CH-A) 12 as a current path 13 The data will be read to the (SD-n) 10 of the drain region 5.

In the case of the third embodiment, the barrier layer (B
The AP) 8 and the channel forming layer (CH-A) 12 can be formed by the same mask, and the process can be simplified. However, it is not always necessary to form with the same mask, and the invention disclosed herein adopts a structure in which the barrier layer (BA-P) 8 is formed under the channel forming layer (CH-A) 12. It has a characteristic.

(Fourth Embodiment) FIG. 4 shows a fourth embodiment. This example corresponds to a modification of the third embodiment shown in FIG. In the configuration of FIG. 4, instead of the barrier layer (BA-P) 8 in FIG. 3, a barrier well (BA-we) is used.
11) 14 is formed.

This barrier well (BA-well) 14
Is formed over the region including below the transfer gate (TG) 4 and its vicinity, and is used for the second conductivity type region (PD-n) 7 of the photodiode 3 and (SD-n) for the drain region 5 of the transistor. ) 10 is connected. In the barrier well (BA-well) 14 region, the channel ion implantation region (CH-A) is formed so as to extend between the second conductivity type region (PD-n) 7 and the detection node unit (SD-n) 10. 12 is formed.

With this structure, the same effect as that of the third embodiment can be expected. (Fifth Embodiment) FIG. 5 shows a fifth embodiment.

In this embodiment, as shown in FIG. 5, a low concentration p-well layer 2 is formed on a semiconductor substrate 1, and a second photodiode 3 is formed on the p-well layer 2. A detection node unit (SD-n) 10 for forming the conductivity type region (PD-n) 7 and the drain region 5 is formed.

Further, on the p-well layer 2, between the formation regions of the detection node portion (SD-n) 10 for forming the second conductivity type region (PD-n) 7 and the drain region 5 of the photodiode 3. The transfer gate (TG) 4 is formed so as to cover the second conductive type region (PD), and a detection node for forming the drain region 5 so that a part of the second conductive type region (PD-n) 7 is exposed. The part (SD-n) 10 is formed so as not to enter the area.

Then, a p-type surface shield part (PD-p +) region 6 is formed on the second conductivity type region (PD-n) 7 of the photodiode 3, and this surface shield part (PD-n) is formed. The p + region 6 is a transfer gate (T
G) 4 is formed by self-alignment, while the second conductivity type region (P
The transfer gate (TG) 4 prevents the Dn) 7 from being self-aligned. Therefore, the second conductivity type region (PD-n) 7 portion of the photodiode 3 extends to below the transfer gate (TG) 4.

By adopting such a structure that the second conductivity type region (PD-n) 7 portion of the photodiode 3 extends below the transfer gate (TG) 4, the second conductivity type of the photodiode 3 is adopted. The signal charge 16 generated in the region (PD-n) 7 can be read out to the (SD-n) 10 in the drain region 5.

That is, in the structure of the fifth embodiment, the second conductivity type region (PD-
Since n) 7 penetrates below the transfer gate (TG) 4 in the transistor, the potential of the read channel can be modulated by the transfer gate (TG) 4.

In this case, the barrier layer (BA-P) 8 is
It is not a mandatory configuration requirement. Therefore, the configuration shown in FIG. 6 may be used. Figure 6 shows the LD of a MOS transistor
The D structure is used, and 17 is a side wall spacer having an LDD structure. This side wall spacer 1
7 is used to offset the second conductivity type region (PD-n) 7, and the second conductivity type region (P-n) 7 is offset therethrough.
The signal charge 16 from the Dn 7 is (SD) in the drain region 5
-N) 10 is read out.

(Sixth Embodiment) FIG. 7 shows a sixth embodiment. As shown in FIG. 7, in this example, on the semiconductor substrate 1,
A low concentration well layer 2 is formed. The second conductivity type region (PD-n) 7 forming the photodiode 3 and the drain region 5 of the transistor are formed on the low concentration well layer 2.
To form a detection node unit (SD-n) 10 that constitutes

A transfer gate (TG) 4 is formed in a region between the second conductivity type region (PD-n) 7 and the detection node unit (SD-n) 10 in the low concentration well layer 2 via an insulating layer. It

Below this transfer gate (TG) 4, a channel forming layer (TG-N) of the same impurity type as that of the second conductivity type region (PD-n) 7 of the photodiode 3 is provided in order to improve reading. 15 is a second conductivity type region (PD-n)
It is formed from a part of 7 to a partial region under the transfer gate (TG).

In this embodiment, the channel forming layer (TG-N) 15 is not formed in self alignment with the transfer gate (TG) 4. The channel formation layer (TG-N) 15 is formed by the transfer gate (TG) 4
Partial lower area and surface shield layer (PD-P +) 6
It is characterized in that it is formed by connecting to a part of.

The various embodiments have been described above. In short, the present invention is, in short, a unit cell and a photodiode for photoelectric conversion, and an MO for reading signal charges from the photodiode.
In the MOS type solid-state image pickup device which is taken out through the S-transistor, even if the surface shield structure is adopted, the drive voltage can be 3.3 [V] or 5.0 [V] by devising the structure of the gate of the read-out MOS transistor. ] To provide a structure of a read transistor capable of complete transfer even at a low voltage of [1], the first conductivity type well region formed on a semiconductor substrate and the well region formed on the well region. A second conductivity type photodiode section,
A first conductive type surface layer formed on the second conductive type photodiode section, a read gate section formed adjacent to the second conductive type photodiode section, and a first read gate section lower part A conductive type barrier layer is formed, and further, a second conductive type photodiode portion and a second conductive type through channel layer formed under the read gate portion and adjacent to the second conductive type photodiode layer. It has a structure with.

With such a structure, even if the photodiode portion has a surface shield structure, the signal of the photodiode can be completely read out. According to the present invention, 5 [V] or 3.
It is possible to provide a readout transistor structure capable of reading out the signal charge of the surface-shielded photodiode even with a low power supply voltage of 3 [V].

The power supply voltage of the MOS type solid-state image pickup device of the present invention is as small as one power supply, but the read gate (TG) is used.
The voltage applied to 4 may be increased by a circuit technology such as a booster circuit.

The present invention relates to a MOS type solid-state image pickup device, and more particularly to an improvement in the structure of the read transistor portion of the unit cell portion, which is capable of reading the signal of the fully depleted photodiode portion. 2. Even if the surface shield structure has a transistor structure, by devising the structure of the read gate, 3.
With a low power supply voltage of 3 [V] or 5.0 [V], a read transistor capable of complete transfer can be realized.

[0081]

As described above in detail, according to the present invention, the photodiode has the surface shield structure, and even if the photodiode is completely depleted, the structure of the read gate is devised so that It is possible to provide a MOS type solid-state imaging device having a read transistor structure capable of completely transferring the signal charge of the photodiode with a low power supply voltage of 0.3 [V] or 5.0 [V].

[Brief description of drawings]

FIG. 1 is a diagram for explaining the present invention and is a cross-sectional view of an element showing a first embodiment of the present invention.

FIG. 2 is a diagram for explaining the present invention and is a cross-sectional view of an element showing a second embodiment of the present invention.

FIG. 3 is a diagram for explaining the present invention and is a cross-sectional view of an element showing a third embodiment of the present invention.

FIG. 4 is a diagram for explaining the present invention, which is an element sectional view showing a fourth embodiment of the present invention.

FIG. 5 is a view for explaining the present invention and is an element cross-sectional view showing a fifth embodiment of the present invention.

FIG. 6 is a diagram for explaining the present invention and is a cross-sectional view of an element showing a sixth embodiment of the present invention.

FIG. 7 is a diagram for explaining the present invention and is an element cross-sectional view showing a seventh embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Low concentration well layer 3 ... Photodiode 5 ... Transistor drain region 4 ... Transfer gate (TG) 6 ... Surface shield layer (PD-P +) 7 ... 2nd conductivity which comprises the photodiode 3 Mold area (P
Dn) 8 ... Barrier layer (BA-P) 9 ... Second conductivity type through channel layer 10 ... Configure drain region 5 of transistor (SD
-N) 11 ... Channel stop region for device isolation 12 ... Channel formation layer (CH-A) 13 ... Current path 14 ... Barrier well (BA-well) 15 ... Channel formation layer (Channel implant layer (PD)
-N)) 16 ... Signal charge

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hidetoshi Nozaki Hideki Nozaki 1 Komukai Toshiba Town, Saiwai-ku, Kawasaki City, Kanagawa Prefecture Toshiba Research & Development Center (72) Inventor Hiroshi Yamashita Komukai Toshiba Town, Kawasaki City, Kanagawa Prefecture No. 1 Toshiba Research & Development Center Co., Ltd. (72) Inventor Ikuko Inoue Komukai Toshiba Town, Komukai-shi, Kawasaki City, Kanagawa No. 1 Toshiba Research & Development Center Co., Ltd. (56) Reference JP 4-98878 (JP, A) ) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 27/146 H04N 5/335

Claims (7)

(57) [Claims] 1. A photodiode section comprising a first conductivity type well region formed on a semiconductor substrate and a second conductivity type region formed on this well region, and a second conductivity type of the photodiode section. A surface layer of the first conductivity type formed on the upper part of the region, and a second layer formed near the second conductivity type region of the photodiode part in the well region of the first conductivity type.
A solid-state imaging device comprising: a conductivity type drain region; and a gate part of a read transistor provided above the well region between the drain region and the second conductivity type region of the photodiode part. A first-conductivity-type barrier layer connecting the second-conductivity-type region and the second-conductivity-type drain region in a deep layer portion, and between the first-conductivity-type barrier layer and the gate portion, A solid-state imaging device comprising a high-concentration second-conductivity-type channel constituting layer protruding from a second-conductivity-type region of the photodiode section. 2. A photodiode section comprising a first conductivity type well region formed on a semiconductor substrate and a second conductivity type region formed on the well region, and a second conductivity type of the photodiode section. A surface layer of the first conductivity type formed on the upper part of the region, and a second layer formed near the second conductivity type region of the photodiode part in the well region of the first conductivity type.
A solid-state imaging device comprising: a drain region of conductivity type; and a gate part of a read transistor provided above the well region between the drain region and the second conductivity type region of the photodiode part. A barrier layer of the first conductivity type formed with an offset protruding from the deep layer portion of the drain region toward the second conductivity type region side of the photodiode portion, and the second conductivity type region of the photodiode portion is provided in the second conductivity type region of the photodiode portion. A solid-state imaging device, wherein the high-concentration second-conductivity-type channel constituting layer is provided on the surface side of the barrier layer and toward the end of the gate portion. 3. A first-conductivity-type well region formed on a semiconductor substrate, a second-conductivity-type photodiode part formed on the well region, and a second-conductivity-type photodiode part above the second-conductivity-type photodiode part. The formed first conductivity type surface layer, the read gate portion formed adjacent to the second conductivity type photodiode portion, and the second conductivity type drain formed adjacent to the other of the read gate portions. A unit cell portion of the solid-state imaging device having a region, the first cell formed under the gate portion of the read transistor and adjacent to both the second conductivity type photodiode portion and the second conductivity type drain region. A channel of the second conductivity type having a conductivity type barrier layer and formed on the first conductivity type barrier layer adjacent to both the second conductivity type photodiode section and the second conductivity type drain region. A solid-state imaging apparatus characterized by having a stratification. 4. The solid-state imaging device according to claim 3,
A solid-state imaging device comprising a barrier layer of the second conductivity type having a higher concentration than that of the well layer of the first conductivity type, instead of the barrier layer of the first conductivity type. 5. A photodiode section having a first conductivity type well region formed on a semiconductor substrate and a second conductivity type region formed on the well region, and a second conductivity type of the photodiode section. A surface layer of the first conductivity type formed on the upper part of the region, and a second layer formed near the second conductivity type region of the photodiode part in the well region of the first conductivity type.
A solid-state imaging device comprising: a drain region of conductivity type; and a gate portion of a read transistor provided above the well region between the drain region and a second conductivity type region of the photodiode portion. A part of the second conductivity type region reaches the interface with the oxide film under the gate part of the read transistor, and the second conductivity type region and the drain of the photodiode part are under the gate part of the read transistor. A barrier layer of the first conductivity type that is located between the first and second drain regions and is in contact with at least the drain region, and the surface layer of the first conductivity type formed on the second conductivity type region of the photodiode section is A solid-state imaging device, wherein the solid-state imaging device is formed by the gate portion in self-alignment. 6. A photodiode section comprising a first conductivity type well region formed on a semiconductor substrate and a second conductivity type region formed on the well region, and a second conductivity type of the photodiode section. A surface layer of the first conductivity type formed on the upper part of the region, and a second layer formed near the second conductivity type region of the photodiode part in the well region of the first conductivity type.
A drain region of conductivity type, a gate portion of the read transistor provided in the upper portion of the well region between the drain region and the second conductivity type region of the photodiode portion, and a side formed on a sidewall of the gate portion. War
And a structure in which a part of the second-conductivity-type region of the photodiode reaches an interface with an oxide film below the gate portion of the read transistor, and below the gate portion of the read transistor. A barrier layer of the first conductivity type, which is located between the second conductivity type region of the photodiode part and the drain region and is in contact with at least the drain region, is provided, and an upper part of the second conductivity type region of the photodiode part. wherein the first conductivity type surface layer of the gate portion and the support formed
A solid-state imaging device, which is formed by self-alignment with an id wall spacer . 7. A photodiode section having a first conductivity type well region formed on a semiconductor substrate and a second conductivity type region formed on the well region, and a second conductivity type of the photodiode section. A surface layer of the first conductivity type formed on the upper part of the region, and a second layer formed near the second conductivity type region of the photodiode part in the well region of the first conductivity type.
In the solid-state imaging device, the solid-state imaging device includes: a conductivity type drain region; and a gate part of a read transistor provided on the well region between the drain region and the second conductivity type region of the photodiode part. Formed on the second conductivity type region of
The surface layer of the first conductivity type formed by the
It is formed of a far line, and
High-concentration second conductivity type channel protruding from second conductivity type region
A channel constituent layer is provided, and the channel constituent layer is
The structure that reaches the interface with the oxide film under the gate of the transistor.
A solid-state imaging device characterized by being constructed .