JP6799739B2 - Photodetector and solid-state image sensor - Google Patents

Description

The present invention relates to a photodetector and a photodetector, and more particularly to a photodetector suitable for use as a CMOS image sensor (CIS) and a pixel of a CIS.

Conventionally, CCD image sensors have been the mainstream of solid-state image sensors, but CIS is now the mainstream. The working voltage of the CIS is usually 5V or 3.3V, which is lower than the working voltage of the CCD image sensor of 12 to 15V. Therefore, the problem that an afterimage that cannot be read out from the photodiode, which has been almost solved by the CCD image sensor, is likely to occur in the CIS occurs because the working voltage is low. In particular, this problem becomes apparent in large-area pixel CIS, ultra-high-speed drive CIS, and the like.

Therefore, a method has been used in which an impurity density gradient is formed by forming a photodiode using a plurality of masks, thereby creating a potential gradient and reducing afterimages (see Patent Document 1). However, the method described in Patent Document 1 has a problem that the number of masks increases and the number of steps such as photolithography and ion implantation increases accordingly, resulting in high device manufacturing cost.

Further, although a structure in which the center of the charge transfer unit is hollowed out in a circle on the plane pattern of the pixels of the image pickup apparatus (see FIG. 21 of Patent Document 2) is disclosed, it does not relate to the layout of the photoelectric conversion unit. Further, FIG. 24 of Patent Document 2 discloses a structure in which an n ^- type electron exclusion region is provided in the center of the n ^- type photoelectric conversion unit, but man-hours are required to provide the n ^- type electron exclusion region. Increases.

Japanese Unexamined Patent Publication No. 11-284166 International Publication No. 2010/018677

In view of the above problems, the present invention provides a photodetector with smooth charge transfer, which facilitates the manufacturing process, does not deteriorate performance, and does not easily cause afterimages, and a solid-state imaging device using this photodetector as a pixel. The purpose is to do.

In the first aspect of the present invention, (a) a first conductive type base portion that defines a photoelectric conversion unit, and (b) a potential hill whose potential depth is locally shallower than the periphery in a part of the photoelectric conversion unit. A second conductive type charge generation embedded region embedded in the upper part of the base portion and (c) a charge generation embedded region embedded in the upper part of the base portion in a plane pattern surrounding the position of the potential hill so as to be constructed. A second conductive type charge reading region having a higher impurity density than the charge generation embedded region, and a charge transfer means for controlling the transfer of signal charge from the charge generation embedded region to the charge reading region. A photodiode is composed of a substrate and a charge generation embedded region, and the signal charge generated by the photodiode is passed through a potential valley deeper than the potential hill around the potential hill, and the charge transfer means charges the electric charge. The gist is that it is an optical detection element that transfers a signal charge to the read area.

A second aspect of the present invention is a solid-state image pickup device in which a photodetector element defined in the first aspect of the present invention is used as a pixel and a plurality of the pixels are arranged to form a pixel array.

According to the present invention, it is possible to provide a photodetector having a smooth charge transfer, which has a simple manufacturing process and is less likely to cause afterimages without degrading performance, and a solid-state imaging device using the photodetector as a pixel. ..

FIG. 1 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a first embodiment of the present invention, and FIG. 1 (b) is a plan view showing AA of FIG. 1 (a). It is a cross-sectional view seen from a direction. FIG. 2A is a plan view schematically showing an outline of a main part of the photodetector according to the first comparative example, and FIG. 2B is viewed from the direction AA of FIG. 2A. It is a cross-sectional view. FIG. 3A is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the first comparative example, and FIG. 3B is a cross-sectional view at the time of charge accumulation corresponding to FIG. 3A. It is a figure which shows the potential profile. FIG. 4A is a diagram showing the potential profile of the photodetector element according to the first comparative example at the time of charge accumulation in a plane, and FIG. 4B is a diagram showing the potential profile of the photodetector element according to the first comparative example in a plane. It is a figure which shows the potential profile at the time of charge accumulation three-dimensionally. FIG. 5 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the first comparative example, and FIG. 5 (b) is a cross-sectional view at the time of charge reading corresponding to FIG. 5 (a). It is a figure which shows the potential profile. FIG. 6A is a plan view showing the potential profile of the photodetector element according to the first comparative example at the time of charge reading, and FIG. 6B is a diagram showing the potential profile of the photodetector element according to the first comparative example in a plane. It is a figure which shows the potential profile at the time of charge reading 3D. FIG. 7 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the first embodiment, and FIG. 7 (b) shows the time of charge accumulation corresponding to FIG. 7 (a). It is a figure which shows the potential profile. FIG. 8A is a plan view showing the potential profile of the photodetector element according to the first embodiment at the time of charge accumulation, and FIG. 8B is a diagram showing the potential profile of the photodetector element according to the first embodiment in a plane. It is a figure which shows the potential profile at the time of charge accumulation three-dimensionally. 9 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the first embodiment, and FIG. 9 (b) is a cross-sectional view at the time of charge reading corresponding to FIG. 9 (a). It is a figure which shows the potential profile. FIG. 10A is a plan view showing the potential profile of the photodetector element according to the first embodiment at the time of charge reading, and FIG. 10B is a diagram showing the potential profile of the photodetector element according to the first embodiment in a plane. It is a figure which shows the potential profile at the time of charge reading 3D. It is a schematic plan view explaining the outline of the main part of the whole structure of the solid-state image pickup apparatus which has the photodetector element which concerns on 1st Embodiment shown in FIG. 1 as a unit pixel. 12 (a) to 12 (c) are process cross-sectional views for explaining an example of a method for manufacturing a photodetector according to the first embodiment shown in FIG. 13 (a) to 13 (c) are shown in FIGS. 12 (a) to 12 (c) for explaining an example of a method for manufacturing a photodetector according to the first embodiment shown in FIG. It is a subsequent process sectional view. 14 (a) and 14 (b) are cross-sectional views schematically showing an outline of a main part of a photodetector according to a first modification of the first embodiment. 15 (a) and 15 (b) are cross-sectional views schematically showing an outline of a main part of a photodetector according to a first modification of the first embodiment. 16 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a second modification of the first embodiment, and FIG. 16 (b) is a plan view of FIG. 16 (a). It is sectional drawing seen from the AA direction. FIG. 17A is a plan view schematically showing an outline of a main part of the photodetector according to the second comparative example, and FIG. 17B is viewed from the direction AA of FIG. 17A. It is a cross-sectional view. FIG. 18A is a diagram showing the potential profile of the photodetector element according to the second comparative example in a plane, and FIG. 18B is a diagram showing the potential profile of the photodetector element according to the second comparative example. It is a figure which shows three-dimensionally. FIG. 19 (a) is a diagram showing the potential profile of the photodetector element according to the second modification of the first embodiment in a plane, and FIG. 19 (b) is a diagram showing a second embodiment of the first embodiment. It is a figure which shows 3D the potential profile of the photodetector element which concerns on the modification of. FIG. 20 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a second embodiment of the present invention, and FIG. 20 (b) is a plan view showing AA of FIG. 20 (a). It is a cross-sectional view seen from a direction. 21 (a) is a plan view schematically showing the outline of the main part of the photodetector element according to the third comparative example, and FIG. 21 (b) is seen from the direction AA of FIG. 21 (a). It is a cross-sectional view. FIG. 22 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector element according to the third comparative example, and FIG. 22 (b) shows the time of charge accumulation corresponding to FIG. 22 (a). It is a figure which shows the potential profile. FIG. 23A is a plan view showing the potential profile of the photodetector element according to the third comparative example at the time of charge accumulation, and FIG. 23B is a diagram showing the potential profile of the photodetector element according to the third comparative example in a plane. It is a figure which shows the potential profile at the time of charge accumulation three-dimensionally. FIG. 24A is a cross-sectional view illustrating an outline of a main part of the photodetector element according to the third comparative example, and FIG. 24B is a cross-sectional view at the time of charging reading corresponding to FIG. 24A. It is a figure which shows the potential profile. FIG. 25 (a) is a plan view showing the potential profile of the photodetector element according to the third comparative example at the time of charge reading, and FIG. 25 (b) is a diagram showing the potential profile of the photodetector element according to the third comparative example in a plane. It is a figure which shows the potential profile at the time of charge reading 3D. FIG. 26 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the second embodiment, and FIG. 26 (b) shows the time of charge accumulation corresponding to FIG. 26 (a). It is a figure which shows the potential profile. FIG. 27 (a) is a plan view showing the potential profile of the photodetector element according to the second embodiment at the time of charge accumulation, and FIG. 27 (b) is a diagram showing the potential profile of the photodetector element according to the second embodiment in a plan view. It is a figure which shows the potential profile at the time of charge accumulation three-dimensionally. FIG. 28 (a) is a cross-sectional view schematically showing an outline of a main part of the photodetector according to the second embodiment, and FIG. 28 (b) shows a charge reading time corresponding to FIG. 28 (a). It is a figure which shows the potential profile. FIG. 29 (a) is a plan view showing the potential profile of the photodetector element according to the second embodiment at the time of charge reading, and FIG. 29 (b) is a diagram showing the potential profile of the photodetector element according to the second embodiment in a plane. It is a figure which shows the potential profile at the time of charge reading 3D. FIG. 30A is a plan view showing an example of the photodetector element according to the second embodiment, and FIG. 30B is a plan view showing an example of the photodetector element according to the fourth comparative example. is there. It is a graph which shows the characteristic of the light detection element which concerns on the 2nd Embodiment shown in FIG. 30A, and the light detection element which concerns on the 4th comparative example shown in FIG. 30B. 32 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a first modification of the second embodiment, and FIG. 32 (b) is a plan view of FIG. 32 (a). It is sectional drawing seen from the AA direction. FIG. 33 (a) is a plan view illustrating an outline of a main part of the photodetector element according to the fifth comparative example, and FIG. 33 (b) is viewed from the direction AA of FIG. 33 (a). It is a cross-sectional view. FIG. 34 (a) is a diagram showing the potential profile of the photodetector element according to the fifth comparative example in a plane, and FIG. 34 (b) is a diagram showing the charge reading of the photodetector element according to the fifth comparative example. It is a figure which shows the potential profile of a three-dimensionally. FIG. 35 (a) is a diagram showing the potential profile of the photodetector element according to the first modification of the second embodiment in a plane, and FIG. 35 (b) is a diagram showing the potential profile of the photodetector element according to the first modification of the second embodiment. It is a figure which shows three-dimensionally the potential profile at the time of charge reading of the photodetector element which concerns on the modification of. 36 (a) and 36 (b) are cross-sectional views schematically showing an outline of a main part of a photodetector according to a second modification of the second embodiment. 37 (a) and 37 (b) are cross-sectional views schematically showing an outline of a main part of a photodetector according to a second modification of the second embodiment. FIG. 38 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a third embodiment of the present invention, and FIG. 38 (b) is a plan view showing AA of FIG. 38 (a). It is a cross-sectional view seen from a direction. 39 (a) is a plan view schematically showing an outline of a main part of a photodetector according to a fourth embodiment of the present invention, and FIG. 39 (b) is a plan view showing AA of FIG. 39 (a). It is a cross-sectional view seen from a direction.

Next, the first to fourth embodiments of the present invention will be described with reference to the drawings. In the description of the drawings below, the same or similar parts are designated by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the plane dimension, the ratio of the thickness of each layer, etc. are different from the actual ones. Therefore, the specific thickness and dimensions should be determined in consideration of the following explanation. In addition, it goes without saying that the drawings include parts having different dimensional relationships and ratios from each other.

As is well known to those skilled in the art, the "first conductive type" in a semiconductor means either a p-type or an n-type, and the "second conductive type" means an opposite conductive type of the first conductive type. .. That is, if the "first conductive type" is p-type, the "second conductive type" is n-type, and if the "first conductive type" is n-type, the "second conductive type" is p-type. In the following description, for convenience of explanation, the case where the "first conductive type" is the p-type, the "second conductive type" is the n-type, and the signal charge is an electron will be discussed, but it is merely a matter of selection. The present invention is not limited to the selection for convenience of such explanation, and the polarity of the voltage applied to each part is reversed by defining the "first conductive type" as the n type and the "second conductive type" as the p type. It goes without saying that even when the signal charge is a hole, the technical idea of the present invention is applied and the same discussion is possible. Further, in the following description, the member or region to which the "first conductive type" and the "second conductive type" are limited means a member or region made of a semiconductor material without any particular limitation. Is technically and logically self-evident.

Further, the directions of "left and right" and "up and down" in the following description are merely definitions for convenience of explanation, and do not limit the technical idea of the present invention. Therefore, for example, if the paper surface is rotated 90 degrees, "left and right" and "up and down" are exchanged and read, and if the paper surface is rotated 180 degrees, "left" becomes "right" and "right" becomes "left". Of course.

Further, the first to fourth embodiments shown below exemplify devices and methods for embodying the technical idea of the present invention, and use various photodetectors and the photodetectors. It can be applied to various solid-state imaging devices such as a high-speed moving image image sensor and a still image image sensor for capturing a high-speed phenomenon without blurring. Further, the technical idea of the present invention does not specify the material, shape, structure, arrangement, etc. of the component parts to the following, and the technical idea of the present invention is the technical idea described in the claims. Within the scope, various changes can be made.

(First Embodiment)
As shown in FIGS. 1 (a) and 1 (b), the light detection element according to the first embodiment of the present invention is a first conductive type (p ^{− −} type) base unit that defines a photoelectric conversion unit. 1 and a second conductive type (n-type) charge generation embedded region 3 embedded in the upper part of the base portion 1 in a selective plane pattern in which a part of the upper portion of the base portion 1 is an occupied region, and a substrate. A second conductive type (n ⁺ type) charge reading region 5 provided above the charge generation embedded region 3 at a distance from the charge generation embedded region 3, and a signal charge from the charge generation embedded region 3 to the charge reading region 5 ( It is provided with charge transfer means (6, 7, 8) for controlling the transfer of electrons).

In the photodetector element according to the first embodiment of the present invention, the photodiode is configured by a pn junction between the base portion 1 and the charge generation embedded region 3 provided on the upper portion of the base portion 1 in a predetermined plane pattern. Then, the photodiode performs photoelectric conversion to generate a signal charge, and the signal charge (electrons) is accumulated in the charge generation embedded region 3.

As shown by the planar pattern of FIG. 1A, a first conductive type (p ⁺ ) type shield having a higher impurity density than the base part 1 so as to cover the upper surface of the photoelectric conversion part including the charge generation embedded region 3. The layer 4 is provided in a rectangular shape. As shown in FIG. 1B, the shield layer 4 is arranged at a position covering the upper surface of the charge generation embedding region 3 on the surface layer side of the substrate portion 1.

Although not shown in FIG. 1A, the upper part of the base portion 1 is higher than the base portion 1 so as to surround the periphery of the active region in which the charge generation embedded region 3 and the like are embedded on the plane pattern. In terms of impurity density, p-type or p ^- type tab regions 2 are further provided as shown in FIG. 1 (b). Although not shown, the tab region 2 is formed with an n ⁺ type source region, an n ⁺ type drain region, a p ⁺ type contact region, and the like, respectively, of a plurality of transistors required for a read buffer amplifier and the like. Further, when the photodetector element according to the first embodiment is adopted as the pixel of the solid-state image sensor, the tab region 2 is used as an element separation region from other pixels.

The charge transfer means (6, 7, 8) are provided above the substrate portion 1 adjacent to the charge generation embedding region 3 and the shield layer 4. The charge transfer means (6, 7, 8) include a first conductive type (p type) embedded channel region 6 embedded in the upper part of the base portion 1 adjacent to the charge generation embedded region 3 and the shield layer 4. The transfer gate signal TX _{(i) is provided} to the transfer gate electrode 8 by an insulated gate structure including a gate insulating film 7 arranged on the embedded channel region 6 and a transfer gate electrode 8 arranged on the gate insulating film 7. ₎ Is transmitted to control the transfer of carriers.

As the gate insulating film 7, if the substrate portion 1 is Si, the silicon oxide film (SiO ₂ film) used in the gate structure of the MOS transistor is suitable, but the gate insulating film 7 is not limited to the silicon oxide film. , Various insulating films such as a silicon nitride film (Si ₃ N ₄ film) other than the silicon oxide film can be used. For example, an insulating film having a multilayer structure such as an ONO film composed of a three-layer laminated film of silicon oxide film / silicon nitride film / silicon oxide film may be used. Furthermore, strontium oxide (SrO) film, aluminum oxide (Al ₂ O ₃ ) film, magnesium oxide (MgO) film, yttrium oxide (Y ₂ O ₃ ) film, hafnium oxide (HfO ₂ ) film, Strontium (Sr), aluminum (Al), magnesium (Mg), yttrium (Y) such as zirconium oxide (ZrO ₂ ) film, tantalum oxide (Ta ₂ O ₅ ) film, bismuth oxide (Bi ₂ O ₃ ) film, etc. ), Hafnium (Hf), Zirconium (Zr), Tantal (Ta), Bismus (Bi), an oxide containing at least one element, or a single-layer film or multilayer film such as silicon nitride containing these elements. Can be used as an insulating film. Further, the present invention is not limited to the case where the substrate portion 1 is Si, and other semiconductor materials such as germanium (Ge), gallium arsenide (GaAs), gallium nitride (GaN), and silicon carbide (SiC) may be used.

Adjacent to the transfer gate electrode 8, a charge reading region 5 composed of a second conductive type (n ⁺ type) semiconductor region having a higher impurity density than the charge generation embedded region 3 is provided so as to be in a floating state. .. When a high level voltage is applied to the transfer gate electrode 8, the potential in the embedded channel region 6 changes and an inverted channel is formed in the embedded channel region 6. Therefore, the signal charge generated by the charge generation embedded region 3 is transferred to the charge reading region 5 via the embedded channel region 6.

As shown in FIG. 1B, the cross section of the element separation insulating film 9 thicker than the gate insulating film 7 is exposed on the right side of the charge reading region 5 and the left side of the charge generation embedded region 3. The element separation insulating film 9 may also be composed of a silicon oxide film, or may be composed of an insulating film other than the silicon oxide film. As shown in FIG. 1 (a), since the inner end of the element separation insulating film 9 has a closed polygonal topology, it is exposed in two places in FIG. 1 (b). The element separation insulating film 9 is continuous on the back side of the paper surface of FIG. 1 (b). That is, as shown in FIG. 1 (a), the element separation insulating film 9 is arranged so as to surround the charge reading region 5 and the charge generation embedding region 3 on the plane pattern, and therefore, FIG. 1 (a). The window portion defined by the inner edge of the element separation insulating film 9 in the portion shown in) defines the space occupied by the photoelectric conversion portion in the active region and the charge transfer region continuous to the photoelectric conversion portion. ..

As shown in FIG. 1 (b), the gate electrode of the amplification transistor TA _ij constituting the read buffer amplifier is connected to the charge reading region 5 of the photodetector. The drain electrode of the amplification transistor TA _ij is connected to the power supply VDD, and the source electrode is connected to the drain electrode of the selection transistor TS _ij for pixel selection. The source electrode of the selection transistor TS _ij is connected to the read signal line B _j , and the gate electrode is given the control signal S _(i) for selecting the horizontal line. By setting the selection control signal S _(i) to a high level, the selection transistor TS _ij becomes conductive. Then, when a current flows through the read signal line B _j connected to the power supply VDD shown on the upper side of FIG. 11, the read signal line B has a voltage corresponding to the potential of the charge read region 5 amplified by the amplification transistor TA _ij. The voltage of _j is determined. Further, the source electrode of the reset transistor TR _ij constituting the read buffer amplifier is connected to the charge read area 5. The drain electrode of the reset transistor TR _ij is connected to the power supply VDD, and the reset signal R _(i) is given to the gate electrode. The reset signal R _{(i) is set} to a high level, the charge accumulated in the charge read area 5 is discharged, and the charge read area 5 is reset.

In FIG. 1B, the amplification transistor TA _ij , the selection transistor TS _ij, and the reset transistor TR _ij constituting the read buffer amplifier are shown by an equivalent circuit, and the structural illustration is omitted, but in reality, p ^−. A source region and a drain region of the amplification transistor TA _ij , the selection transistor TS _ij, and the reset transistor TR _ij are provided in the vicinity of the charge reading region 5 above the tab region 2 of the mold. With the arrangement of the source region and the drain region, the corresponding gate wiring is wired so as to pass between the source region and the drain region so that each constitutes a MOS transistor. Further, wiring such as a read signal line _Bj is also provided by the multi-layer wiring technology.

As shown in FIG. 1A, the charge generation embedded region 3 is a potential hill whose potential depth is locally shallower than that of the periphery in a part of the photoelectric conversion portion defined by the base portion 1. Has a planar pattern surrounding the position of the potential hill so that On the plane pattern, the outer edge of the charge generation embedding region 3 is substantially rectangular, but two corners of the rectangle are cut out. That is, the outer edge of the charge generation embedded region 3 has a hexagonal shape. Then, the central portion of the charge generation embedded region 3 is hollowed out to provide a rectangular opening 3a, and a potential hill having a potential depth shallower than the periphery is locally generated in the rectangular opening 3a. .. A part of the base portion 1 is provided inside the opening 3a so as to form a protruding portion.

In FIG. 1, the width W2 along the left-right direction of the paper surface of FIG. 1 (a) on the transfer gate electrode 8 side of the annular charge generation embedded region 3 and FIG. 1 (a) on the side opposite to the transfer gate electrode 8 side. ), The width W4 along the left-right direction of the paper surface and the widths W1 and W3 of the paired portions along the vertical direction of the paper surface of FIG. 1A are set to be equal to each other. W1 to W4 may be different from each other. The widths W1, W3, and W4 are not particularly limited and can be set as appropriate, but the width W2 can be set within a range in which a potential barrier cannot be formed in the signal charge transfer path when the transfer gate electrode 8 is in the ON state. The width W2 is set to, for example, about 1 μm to 2 μm, although it depends on the impurity density of the charge generation embedded region 3.

On the plane pattern of FIG. 1A, the ratio of the area occupied by the opening 3a to the total area including the opening 3a of the charge generation embedded region 3 is set to, for example, about 15% to 25%. .. Although the width W6 of the portion of the opening 3a in which the potential hills are formed along the left-right direction of the paper surface of FIG. 1A is set to be equal to the widths W1 to W4, the potential hills are formed. The width W6 of the portion may be different from the widths W1 to W4. Further, the case where the width W5 of the portion formed by the potential hills along the vertical direction of the paper surface in FIG. 1A is set to twice the width W6 is illustrated, but the present invention is not limited to this.

However, the maximum value of the width W5 of the portion formed by the potential hill is from the depletion layer extending in a built-in state from the charge generation embedded region 3 on the width W1 side and the charge generation embedded region 3 on the width W3 side. It is preferable to improve the signal charge capture efficiency so that the size is not so large that the depletion layer spreading in the built-in state comes into contact with each other and pinches off. Similarly, the maximum value of the width W6 of the portion formed by the potential hill is built in by the depletion layer extending from the charge generation embedded region 3 on the width W2 side and the depletion layer extending from the charge generation embedded region 3 on the width W4 side. Considering the signal charge capture efficiency, it is preferable to set the pinch-off in the state of.

Here, as shown in FIGS. 2 (a) and 2 (b), the light detection element according to the first embodiment shown in FIGS. 1 (a) and 1 (b) is charged and embedded. Let us compare the photodetector according to the first comparative example, in which the opening is not hollowed out in the embedded region 3 and the charge generation embedded region 3 has a rectangular planar pattern. The results of calculating the potential distribution for the structure of the photodetector according to the first comparative example shown in FIGS. 2 (a) and 2 (b) by the device simulator are shown in FIGS. 3 (a) to 6 (b). Shown. FIG. 3 (a) reprints FIG. 2 (b), and FIG. 3 (b) shows the potential distribution at the time of charge accumulation of the cut surface corresponding to FIG. 3 (a). That is, FIG. 3B is a potential diagram for electrons in which the lower direction of the figure is represented as the positive direction of the potential. If the first conductive type is n-type and the second conductive type is p-type and the signal charge is a hole, in FIG. 3B, the upper direction in the figure is the positive direction of the potential. Expressed as. Potentials of FIGS. 5 (b), 7 (b), 9 (b), 22 (b), 24 (b), 26 (b), and 28 (b) after FIG. 3 (b). The same applies to the profile. FIG. 4 (a) shows the potential distribution at the time of charge accumulation on the plane corresponding to FIG. 2 (a), and FIG. 4 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 4 (a). Is shown three-dimensionally. As shown in FIGS. 3 (b) to 4 (b), the transfer gate signal TX (i) applied to the transfer gate electrode 8 configured by the charge transfer means (6, 7, 8) is low during charge accumulation. In the case of the (low) level, the potential of the central portion of the photodiode PD formed by the substrate portion 1 and the charge generation embedded region 3 becomes the deepest.

On the other hand, FIG. 5 (a) reprints FIG. 2 (b), and FIG. 5 (b) shows the potential distribution at the time of charge reading of the cut surface corresponding to FIG. 5 (a). In FIG. 5B and the like, the positions of the charge transfer means (6, 7, 8) are indicated by TX. FIG. 6 (a) shows the potential distribution at the time of charge reading on the plane corresponding to FIG. 2 (a), and FIG. 6 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 6 (a). Is shown three-dimensionally. When a high level voltage is applied to the transfer gate electrode 8 when reading the charge, the charge transfer means (6, 7, 8) are turned on. As shown in FIGS. 5 (b) to 6 (b), even if the charge transfer means (6,7,8) is turned on, the potential of the position of the charge transfer means (6,7,8) becomes deep. However, while the potential at the center of the photodiode PD remains deep, a small shoulder-shaped or bump-shaped potential barrier remains between the photodiode PD and the charge transfer means (6, 7, 8). Although the signal charge moves to the deeper potential, this potential barrier hinders the transfer of a part of the signal charge flowing from the photodiode PD to the charge reading region 5 (FD) via the embedded channel region 6. Read characteristics deteriorate and afterimages are likely to occur.

On the other hand, with respect to the structure of the photodetector element according to the first embodiment shown in FIGS. 1A and 1B, the results of calculating the potential distribution with the device simulator are shown in FIGS. 7A to 7B. It is shown in 10 (b). FIG. 7 (a) reprints FIG. 1 (b), and FIG. 7 (b) shows the potential distribution at the time of charge accumulation of the cut surface corresponding to FIG. 7 (a). FIG. 8 (a) shows the potential distribution at the time of charge accumulation on the plane corresponding to FIG. 1 (a), and FIG. 8 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 8 (a). Is shown three-dimensionally. When the transfer gate signal TX (i) is set to a low level and the charge transfer means (6, 7, 8) is turned off, as shown in FIGS. 7 (b) to 8 (b), the base portion 1 and the charge are charged. The potential corresponding to the position of the opening 3a at the center of the photodiode PD formed by the generated embedded region 3 is raised to form a “potential hill φ _h ”, and the deepest part of the potential in the first comparative example is eliminated. There is. Then, the bottom of the potential hill φ potential is deep potential valley than the depth of _h (potential-to-valley) φ _v is, leads in the form of a ring around the potential hill φ _h. The deepest part of the potential of the photodiode PD is located at the bottom of the potential valley φ _v , and the potential of the deepest part is also shallower than the deepest part of the potential of the first comparative example. In this specification, "deep" and "shallow" of potential are defined toward the positive direction of potential.

Further, FIG. 9A reprints FIG. 1B, and FIG. 9B shows the potential distribution at the time of charge reading of the cut surface corresponding to FIG. 9A. FIG. 10 (a) shows the potential distribution at the time of charge reading of the plane corresponding to FIG. 1 (a), and FIG. 10 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 10 (a). Is shown three-dimensionally. When the transfer gate signal TX (i) is set to a high level and the charge transfer means (6, 7, 8) is turned on, the photodiode PD and the charge are as shown in FIGS. 9 (b) to 10 (b). A three-dimensional potential distribution is obtained in which a potential barrier is not formed between the transfer means (6, 7, 8). The signal charges by the photodiode PD generates, via a deep potential trough phi _v of potential than the potential hill phi _h around the potential hill phi _h, potential deeper charge transfer means (6, 7, 8) side The charge transfer means (6, 7, 8) transfers the signal charge to the charge read region 5 (FD). Therefore, the transfer of the signal charge flowing from the photodiode PD to the charge read region 5 (FD) via the embedded channel region 6 along the path of the potential valley φ _v of the three-dimensional potential distribution is not hindered, so that it is smooth. It becomes possible to read out easily, and afterimages are less likely to occur.

As described above, according to the photodetector element according to the first embodiment, a semiconductor element suitable as a CIS pixel, which has a low voltage, ultra-high speed drive, less afterimage even in a large area, and smooth charge transfer. Can be provided.

--Solid image sensor according to the first embodiment ---
In the solid-state image sensor (two-dimensional image sensor) according to the first embodiment of the present invention, as shown in FIG. 11, the pixel array unit 20 and the peripheral circuit unit (21, 22, 25) are mounted on the same semiconductor chip. It is monolithically integrated. In the pixel array unit 20, a photodetector element whose main part is outlined in FIG. 1A is a pixel X _ij (i = 1 to n; j = 1 to m: n, m are integers, respectively). A large number of these pixels X _ij are arranged in a two-dimensional matrix.

The array of pixels X _{ij in} a two-dimensional matrix may be monolithically integrated with the base portion 1 as a common semiconductor region. Each pixel X _ij having a common substrate portion 1 has a photoelectric conversion unit, a charge transfer region continuous with the photoelectric conversion unit, and an intrapixel circuit region adjacent to the charge transfer region in each active region. A read buffer amplifier or the like as shown in FIG. 1B is integrated in the in-pixel circuit area. When Si is used for CIS as the material of the substrate portion 1, the amplification transistor TA _ij , the selection transistor TS _{ij, the} reset transistor TR _ij, etc. constituting the read buffer amplifier may be composed of MOS transistors or the like, respectively. It is possible. In order to form a two-dimensional image sensor, the photoelectric conversion unit is suitable for a dense arrangement, for example, in a rectangular shape, and the photoelectric conversion unit is defined as a part of the active region. In this case, the rectangular photoelectric conversion units are arranged in a two-dimensional matrix on one chip.

On the lower side of the pixel array unit 20, the first pixel row X ₁₁ , X ₁₂ , X ₁₃ , ..., X _{1 m} direction; the second pixel row X ₂₁ , X ₂₂ , X ₂₃ , ..., X _{2 m} direction; ……; Pixel row X _i1 , X _i2 , X _i3 , ……, X _im direction ；……; Pixel row X _{(n-1) 1} , X _{(n-1) 2} , X _{(n-1) 3} , ..., X _{(n-1) m} direction; column decoder circuit 25 is provided along the nth pixel row X _n1 , X _n2 , X _n3 , ..., X _nm direction. There is. Further, on the left side of the pixel array portion, the first pixel row X ₁₁ , X ₂₁ , ..., X _i1 , ..., X _{(n-1) 1} , X _n1 direction; the second pixel row X ₁₂ , X _22. , ..., X _i2 , ..., X _{(n-1) 2} , X _n2 directions; 3rd pixel sequence X ₁₃ , X ₂₃ , ..., X _i3 , ..., X _{(n-1) 3} , X _n3 direction; ……; ……; ……; mth pixel sequence X _{1 m} , X _{2 m} , ……, X _im , ……, X _{(n-1) m} , row along the X _nm direction Decoder circuit 21, A row drive circuit 22 is provided.

The first pixel row _{X 11, X 21, ......,} X i1, ......, X (n1) 1, column power supply line _{P 1} is provided in the _{X n1,} the second pixel column _{X 12, X 22,} ..., X _i2 , ..., X _{(n-1) 2} , X _n2 are provided with a column power line P ₂ , and the third pixel sequence X ₁₃ , X ₂₃ , ..., X _i3 , ..., X. _{(N-1) 3} , X _n3 is provided with a column power line P ₃ , and ...;......;......; mth pixel train X _{1 m} , X _{2 m} , ..., X _im , ..., X ₍ Column power lines P _m are provided at _{n-1) m} and X _nm, and the power lines VDD of the entire pixel array unit 20 via the power lines P ₁ , P ₂ , P ₃ , ..., P _m for each column. It is connected to the.

The unit pixel X _ij in the pixel array unit 20 is sequentially scanned by the column decoder circuit 25, the row decoder circuit 21, and the row drive circuit 22, and the pixel signal is read out and the electronic shutter operation is executed. Row drive lines W ₁ , W ₂ , ..., Wi _i , ..., W _(n-) , W _n are the first pixel rows X ₁₁ , X ₁₂ , X ₁₃ , ..., X _{1 m} ; second pixel. Rows X ₂₁ , X ₂₂ , X ₂₃ , ……, X _2m ; ……; Pixel row X _i1 , X _i2 , X _i3 , ……, X _im ； …… ； (n-1) Pixel row X _{(N-1) 1} , X _{(n-1) 2} , X _{(n-1) 3} , ..., X _{(n-1) m} ; nth pixel row X _n1 , X _n2 , X _n3 , ..., A transfer gate signal TX _(i) is applied to the transfer gate electrode 8 wired line by line for each of the pixels X _ij (i = 1 to n; j = 1 to m) arranged in each of X _nm. Drive line (first drive line), drive line (second drive line) R _(i) that applies the reset signal R _(i) to the reset transistor TR _ij , and selection control signal S ₍ selection control signal S _{) to the} selection transistor TS _ij. The three drive lines of the drive line (third drive line ₎ to which _i) is applied are represented by one drive line, respectively.

By the row decoder circuit 21, the first pixel row X ₁₁ , X ₁₂ , X ₁₃ , ..., X _{1 m} ; the second pixel row X ₂₁ , X ₂₂ , X ₂₃ , ..., X _{2 m} ; ...; Rows X _i1 , X _i2 , X _i3 , ..., X _im ; ...; th (n-1) pixel row X _{(n-1) 1} , X _{(n-1) 2} , X _{(n-1) 3} , ..., X _{(n-1) m} ; nth pixel row X _n1 , X _n2 , X _n3 , ..., A specific pixel row of X _nm is selected and selected via the row drive circuit 22. For the selected pixel row, transfer gate from any of the row drive lines W ₁ , W ₂ , ..., _Wi , ..., W _(n−) , W _n corresponding to the selected pixel row. The signal TX _(i) , the reset signal R _(i) , and the selection control signal S _(i) are given, respectively.

The first pixel row _{X 11, X 21, ......,} X i1, ......, X (n1) 1, the pixel signal _{V sig1} by the read signal line _{B 1} provided _{X n1} is the second pixel column _{X 12, X 22, ......,} X i2, ......, X (n-1) 2, the pixel signal _{V sig2} by the read signal line _{B 2} provided in the _{X n2} is the third pixel column _X 13, X _{23, ......, X i3, ......} , X (n-1) 3, X n3 pixel signal _{V sig3} by the read signal line _{B 3} provided in the, ..., m-th pixel column _X 1 _{m, X 2m, ......, X im, ......, X} (n-1) m, the pixel signal _{V sigm} by the read signal line _{B m} provided _{X nm} is has a configuration to be read, respectively. The pixel signals V _sig1 , V _sig2 , V _sig3 , ..., V _sigm read from each read signal line B ₁ , B ₂ , B ₃ , ..., B _m are the signal processing circuits SP ₁ , SP ₂ , At SP ₃ , ..., SP _m , analog or analog and digital signal processing is performed. After that, the signal for each column processed by the signal processing circuits SP ₁ , SP ₂ , SP ₃ , ..., SP _m is read out to the output signal line 26 by the column decoder circuit 25, and the output signal line 26 Finally, it is output to an external circuit outside the semiconductor chip.

As described above, according to the solid-state image sensor according to the first embodiment, low voltage, ultra-high-speed drive, afterimages are unlikely to occur even if the pixel size is large, and CIS with smooth charge transfer within each pixel is provided. it can.

--Manufacturing method of photodetector element according to the first embodiment ---
Next, an example of the method for manufacturing the photodetector according to the first embodiment will be described with reference to FIGS. 12 (a) to 13 (c).

First, a p ⁻⁻ type Si substrate (wafer) is prepared as a base material for the “base portion 1”. Then, a photoresist film is applied to the upper surface of the Si substrate, and a U groove is dug by reactive ion etching (RIE) or the like using photolithography technology. Then, the photoresist film is removed, an insulating film such as an oxide film is embedded in the U groove by a vacuum chemical vapor deposition (CVD) method or the like, and shallow trench isolation (STI) as shown in FIG. 12 (a) is performed. ) Realize the structure. By this STI structure, the element separation insulating film 9 is formed on the upper part of the Si substrate so as to define the space occupied by the active region. After embedding the insulating film in the U-groove, a flattening step by chemical mechanical polishing (CMP) or the like may be added if necessary.

When the element separation insulating film 9 is embedded in the U groove, the surface layer of the Si substrate may be thermally oxidized, but in this case, it is preferable to add a flattening step after the thermal oxidation step to realize the STI structure. Alternatively, after forming a via a buffer oxide film on the surface of the Si substrate _{the Si} 3 _{N 4} film, a CVD method, or the like, LOCOS method for selective oxidation to leave _{the Si} 3 _{N 4} film by a photolithography technique and dry etching the active region The element separation insulating film 9 may be formed with. The same applies to the STI structure.

A photoresist film is applied to the upper surface of the Si substrate, and the photoresist film is patterned using a photolithography technique. Using the patterned photoresist film as a mask, impurity ions exhibiting p-type such as boron (B ⁺ ) are projected in the region forming the tab region 2 so that the projection range is deeper than the depth of the device separation insulating film 9. inject. After removing the photoresist film by wet treatment or the like, heat treatment is performed to activate the injected impurity ions and thermally diffuse the activated impurity elements. As a result, as shown in FIG. 12B, a p ^- type tab region having a higher impurity density than the Si substrate is formed around the element separating insulating film 9 including the lower part of the element separating insulating film 9 above the Si substrate. 2 is formed to a predetermined diffusion depth.

Further, in order to form the embedded channel region 6, impurity ions exhibiting p-type such as B ⁺ are injected onto the entire surface of the Si substrate as shown in FIG. 12 (c) (however, the impurity ions are still activated. Therefore, the embedded channel area 6 in FIG. 12 (c) is a virtual area).

Next, a photoresist film is applied to the upper surface of the Si substrate, and the photoresist film is patterned using a photolithography technique. Using the patterned photoresist film as a mask, impurity ions exhibiting n-type such as arsenic (As ⁺ ) and phosphorus (P ⁺ ) are injected so as to have a deeper projection range than the embedded channel region 6. Then, the photoresist film is removed by a wet treatment or the like. Subsequent heat treatment activates the injected impurity ions and thermally diffuses the activated impurity elements. As a result, as shown in FIG. 13A, the embedded channel region 6 is formed, and below the embedded channel region 6 so as to have an opening 3a surrounding a part of the Si substrate on the plane pattern. The n-type charge generation embedded region 3 is formed shallower than the tab region 2.

Next, the surface of the Si substrate is thermally oxidized to form the gate insulating film 7 on the surface of the Si substrate. Further, a polysilicon layer is deposited on the gate insulating film 7 by a CVD method or the like, and impurity ions exhibiting an n-type are injected. Then, as shown in FIG. 13B, a part of the polysilicon layer and the gate insulating film 7 is selectively removed to form a pattern of the transfer gate electrode 8 by photolithography technology and dry etching such as RIE. To do.

Next, a photoresist film is applied to the upper surface of the Si substrate, and the photoresist film is patterned using a photolithography technique. Using the patterned photoresist film and the transfer gate electrode 8 as a part of the mask, impurity ions exhibiting p-type such as B ⁺ are injected into the region forming the shield layer 4 as shown in FIG. 13 (c). (However, since the impurity ions have not been activated yet, the shield layer 4 in FIG. 13 (c) is a virtual region).

Next, a photoresist film is applied to the upper surface of the Si substrate, and the photoresist film is patterned using a photolithography technique. Using the patterned photoresist film and the transfer gate electrode 8 as masks, impurity ions exhibiting n-type such as As ⁺ and P ⁺ are self-consistently injected into the region forming the charge reading region 5. Then, the photoresist film is removed by a wet treatment or the like. Then, by the subsequent heat treatment, the injected impurity ions are activated and the activated impurity elements are thermally diffused to form the p ⁺ type shield layer 4, and the n ⁺ type charge reading region 5 is formed. It is formed by a self-alignment process (gate self-alignment process). As a result, a part of the structure centered on the photodiode portion of the photodetector according to the first embodiment shown in FIGS. 1 (a) and 1 (b) is completed.

Actually, the amplification transistor TA _ij , the selection transistor TS _ij, and the reset transistor TR _ij constituting the read buffer amplifier shown in FIG. 1B are formed in the upper part of the tab region 2. Therefore, the steps of forming the source region, drain region, and gate wiring of the amplification transistor TA _ij , the selection transistor TS _ij, and the reset transistor TR _ij include the step of forming the n-type region of the photodiode portion and the step of forming the transfer gate electrode 8. It is a process that proceeds at the same time as the above. Therefore, the pattern of the photomask used in the photolithography technique is a more complicated pattern than that can be predicted from the explanations of FIGS. 12 (a) to 13 (c). For example, the ion implantation shown in FIG. 12 (c) can be a selective ion implantation using a photolithography technique rather than a full-scale ion implantation. Further, it is obvious to those skilled in the art that a step of forming an interlayer insulating film and a step of forming a passivation film necessary for the multilayer wiring technique for wiring the read signal line _{Bj and the} like are also added.

In an example of the method for manufacturing an optical detection element according to the first embodiment described above, the electric charge is shown in FIG. 13 (a) before the transfer gate electrode 8 is formed as shown in FIG. 13 (b). An example of forming the generation-embedded region 3 has been illustrated. However, after the transfer gate electrode 8 is formed as shown in FIG. 13B, the transfer gate electrode 8 is used as a part of the mask to form the charge generation-embedded region. 3 may be formed in a self-consistent manner.

Further, in the method for manufacturing a photodetector according to the first comparative example shown in FIGS. 2 (a) and 2 (b), a charge generation embedded region 3 is formed by a rectangular plane pattern having no opening. The method is the same as that of the method for manufacturing the photodetector according to the first embodiment.

As described above, according to the method for manufacturing a photodetector according to the first embodiment, afterimages are eliminated or reduced without increasing the number of steps or the number of photomasks, and sensitivity, linearity, saturation, etc. An optical detection element capable of suppressing deterioration of the characteristics of the above can be realized. Therefore, if pixels are realized by the method for manufacturing an optical detection element according to the first embodiment and adopted in a manufacturing technique for a semiconductor integrated circuit in which a plurality of pixels are arranged, a solid-state image sensor that is in harmony with the manufacturing process of peripheral circuits can be manufactured. It is also self-evident to those skilled in the art that the method can be provided.

<First modification of the first embodiment>
As a first modification of the first embodiment, a modification of the structure of the photodetector will be described. For example, in FIGS. 1 (a) and 1 (b), the case where the shield layer 4 is p ⁺ type is illustrated, but as shown in FIG. 14 (a), even if the shield layer 4 is n ⁺ type. Good. Further, in FIGS. 1 (a) and 1 (b), a structure in which the charge generation embedded region 3 and the tab region 2 are in contact with each other is illustrated, but as shown in FIG. 14 (b), the charge generation embedded region 3 and The tab regions 2 may be separated from each other.

Further, in FIGS. 1A and 1B, a case where a semiconductor substrate such as a first conductive type (p ⁻⁻ type) silicon (Si) wafer is used as the “base portion 1” is illustrated. As shown in FIG. 15A, instead of the bulk semiconductor substrate, a first conductive type epitaxial growth layer having a lower impurity density than the semiconductor substrate is formed on the first conductive type semiconductor substrate 1 _sub-1. The two-layer structure may be realized and the epitaxial growth layer side may be adopted as the “first conductive type substrate portion 2 _b ”. Alternatively, as shown in FIG. 15 (b), the first conductive type (p type) epitaxial growth layer provided on the second conductive type (n type) semiconductor substrate 1 _sub-2 is referred to as a “first conductive type substrate”. It may be adopted as "Part 2 _b ".

If the first conductive type (p type) epitaxial growth layer is formed on the second conductive type (n type) semiconductor substrate so as to form a pn junction, the input light is the second conductive type (p type) in the case of a long wavelength. However, the carriers generated by the light generated in the second conductive type semiconductor substrate cannot enter into the first conductive type epitaxial growth layer due to the potential barrier due to the built-in potential of the pn junction. 2 Carriers generated deep in the conductive semiconductor substrate can be positively discarded. This makes it possible to prevent carriers generated at a deep position from returning by diffusion and leaking to adjacent pixels. This has the effect of preventing color mixing, especially in the case of a single-plate color image sensor equipped with an RGB color filter.

Incidentally, FIG. 15 ^{(a), p -} type a semiconductor layer epitaxially grown on the semiconductor substrate 1 _sub-1 is "base portion 2 _b", FIG. 15 ^{(b), n -} -type semiconductor The semiconductor layer epitaxially grown on the substrate 1 _sub-2 was defined as the "base portion 2 _b ". However, the "base portion 2 _b" in FIG. 15 (a) p ^- -type semiconductor substrate 1 p formed by thermal diffusion or the like on top of the _sub-1 ^- may be defined by the type well region, 15 The “base portion 2 _b ” of (b) may be defined by a p ^- type well region formed on the upper part of the n ^{− −} type semiconductor substrate 1 _sub-2 by thermal diffusion or the like.

Even with the structures shown in FIGS. 14 (a) to 15 (b) illustrated as the first modification of the first embodiment, charge generation and embedding are performed on the plane pattern as in the first embodiment. Since the opening 3a is provided so as to hollow out the central portion of the inclusion region 3, a potential barrier is not formed between the photodiode PD provided in the photoelectric conversion portion and the charge transfer means (6, 7, 8), which is smooth. Reading becomes possible.

<Second variant of the first embodiment>
In the first embodiment, a structure in which the central portion of the polygonal charge generation embedding region 3 is hollowed out in a rectangular shape is illustrated on the plane pattern, but the plane pattern shape of the charge generation embedding region 3 is not limited to this. For example, as shown in FIGS. 16A and 16B, circular openings 3a are concentrically provided in the central portion of the charge generation embedding region 3 having a circular outer edge on a planar pattern. The charge generation embedded region 3 may have a donut-shaped annular structure.

Here, as shown in FIGS. 17 (a) and 17 (b), only the point where the center of the charge generation embedded region 3 is not hollowed out is the photodetector element according to the second modification of the first embodiment. Let's compare with the second comparative example which is different from. 18 (a) and 18 (b) show the results of calculating the potential distribution of the structure of the photodetector according to the second comparative example shown in FIGS. 17 (a) and 17 (b) with a device simulator. Shown. FIG. 18 (a) shows the potential distribution of the plane corresponding to FIG. 17 (a), and FIG. 18 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 17 (a) in three dimensions. Shown in. As shown in FIGS. 18A and 18B, the potential distribution of the photodetector according to the second comparative example is such that the potential of the photodiode PD formed by the base portion 1 and the charge generation embedded region 3 is a bowl. It becomes a shape and the potential at the center of the photodiode PD is the deepest.

On the other hand, the result of calculating the potential distribution about the structure of the photodetector element according to the second modification of the first embodiment shown in FIGS. 16A and 16B by the device simulator is shown in FIG. It is shown in 19 (a) and FIG. 19 (b). FIG. 19 (a) shows the potential distribution of the plane corresponding to FIG. 16 (a), and FIG. 19 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 19 (a) in three dimensions. Shown in. Since the optical detection element according to the second modification of the first embodiment has a structure in which the center of the circular charge generation embedded region 3 is hollowed out concentrically, FIGS. 19 (a) and 19 (b) are shown. As shown in the above, the potential of the central portion of the photodiode PD formed by the base portion 1 and the charge generation embedded region 3 is relatively raised to form a “potential hill”, and the bottom of the potential valley having a deeper potential than the potential hill. However, they are connected in a ring shape around the potential hill. Therefore, according to the photodetector according to the second modification of the first embodiment, even when the circular opening 3a is provided in the center of the circular charge generation embedding region 3 on the plane pattern. If the charge transfer means (6, 7, 8) or the like is provided as in the first embodiment, the signal charge can be transferred via the potential valley at the time of signal reading, so that smooth reading becomes possible.

(Second Embodiment)
As shown in FIGS. 20A and 20B, the photodetector according to the second embodiment of the present invention has a charge transfer means (a charge transfer means () from the central portion of the opening 3a of the charge generation embedded region 3 as shown in FIGS. The structure hollowed out so as to be opposite to 6, 7, 8) is different from the configuration of the first embodiment having a structure hollowed out in the central portion.

On the plane pattern, the width W2 on the charge transfer means (6,7,8) side of the annular charge generation embedded region 3 is set wider than the width W4 on the side opposite to the charge transfer means (6,7,8). Has been done. Similar to the first embodiment, the width W2 can be set within a range in which a potential barrier cannot be formed in the signal charge transfer path when the transfer gate electrode 8 is in the ON state, and is set to, for example, about 1 μm to 2 μm. The width W4 can be appropriately set, but the plane pattern of the charge generation embedded region 3 may be configured as a U-shape (U-shape) with the width W4 = 0. Similar to the first embodiment, on the plane pattern of FIG. 20A, the ratio of the area occupied by the opening 3a to the total area including the opening 3a of the charge generation embedded region 3 is, for example, 15%. It is set to about 25%.

Other configurations of the photodetector element according to the second embodiment are the same as the configurations of the photodetector element according to the first embodiment. The method for manufacturing the photodetector according to the second embodiment is the same as the method for manufacturing the photodetector according to the first embodiment, except that the position where the opening 3a of the charge generation embedded region 3 is formed is different. The same is true.

Here, the photodetector element according to the second embodiment will be compared with the third comparative example. As shown in FIGS. 21 (a) and 21 (b), the light detection element according to the third comparative example is provided on the charge generation embedded region 3 and the charge transfer means (6, 7, 8) side. It is provided with a potential pond generation embedding region 3x that has a higher impurity density than the charge generation embedding region 3 and generates a potential pond (potential pound) having a potential deeper than the potential depth of the charge generation embedding region 3. The point is different from the structure of the light detection element according to the second embodiment. On the plane pattern, the potential pond generation embedding region 3x is rectangular, and as a finished plane pattern, the charge generation embedding region 3 is a U-shape (U-shaped) that surrounds a part of the potential pond generation embedding region 3x with deep potential. It is expressed as a character shape).

Regarding the structure of the photodetector element according to the third comparative example shown in FIGS. 21 (a) and 21 (b), the results of calculating the potential distribution at the time of charge accumulation by the device simulator are shown in FIGS. 22 (a) to 25. Shown in (b). FIG. 22 (a) reprints FIG. 21 (b), and FIG. 22 (b) shows the potential distribution at the time of charge accumulation of the cut surface corresponding to FIG. 22 (a). FIG. 23 (a) shows the potential distribution at the time of charge accumulation on the plane corresponding to FIG. 21 (a), and FIG. 23 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line in FIG. 23 (a). Is shown three-dimensionally. According to the photodetector element according to the third comparative example, by adding the potential pond generation embedded region 3x in the vicinity of the transfer gate electrode 8, as shown in FIGS. 22 (b) to 23 (b), during the charge accumulation, the bottom of the potential pond phi _p generated by the potential battery generates buried region 3x the deepest part of the potential of the photodiode PD. That is, the deepest part of the potential of the photodiode PD moves from the center of the photodiode PD to the vicinity of the charge transfer means (6, 7, 8) whose position is indicated by TX.

In addition, FIG. 24 (a) reprints FIG. 21 (b), and FIG. 24 (b) shows the potential distribution at the time of charge reading of the cut surface corresponding to FIG. 24 (a). FIG. 25 (a) shows the potential distribution at the time of charge reading of the plane corresponding to FIG. 21 (a), and FIG. 25 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 25 (a). Is shown three-dimensionally. As shown in FIGS. 24 (b) to 25 (b), when the transfer gate signal TX (i) is set to a high level, the charge transfer means (6, 7, 8) whose position is displayed by the photodiode PD and TX A potential barrier is not formed between them, and smooth charge reading is possible.

That is, according to the photodetector element according to the third comparative example, the potential gradient is formed and the afterimage is reduced by forming the impurity density gradient by the charge generation embedded region 3 and the potential pond generation embedded region 3x. Can be done. However, when manufacturing the photodetector element according to the third comparative example, the procedure other than forming the potential pond generation embedded region 3x is the same as that of the first comparative example, but the potential pond generation embedded region There is a problem that the number of masks increases in order to form 3x, the number of steps such as photolithography and ion implantation increases, and the device manufacturing cost increases.

On the other hand, the results of calculating the potential distribution for the structure of the photodetector according to the second embodiment shown in FIGS. 20 (a) and 20 (b) by the device simulator are shown in FIGS. 26 (a) to 26 (a). 29 (b) shows. FIG. 26 (a) reprints FIG. 20 (b), and FIG. 26 (b) shows the potential distribution at the time of charge accumulation of the cut surface corresponding to FIG. 26 (a). 27 (a) shows the potential distribution at the time of charge accumulation on the plane corresponding to FIG. 20 (a), and FIG. 27 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 27 (a). Is shown three-dimensionally. According to the optical detection element according to the second embodiment, the opening 3a is provided at a position shifted to the opposite side of the charge generation embedded region 3 from the charge transfer means (6, 7, 8), whereby FIG. 26 As shown in (b) to 27 (b), the charge transfer means (6, 7, 8) whose position is indicated by TX from the center of the photodiode PD formed by the base portion 1 and the charge generation embedded region 3 consists lifts the potential of a position shifted to the opposite side "potential hill phi _h ', the bottom of the potential hill phi potential potential lower valleys than _h phi _v, lead in a ring around the potential hill phi _h. Then, since the potential hill φ _h is generated at a position shifted from the center of the photodiode PD to the side opposite to the charge transfer means (6, 7, 8) whose position is indicated by TX, the potential of the photodiode PD The deepest part moves from the center of the photodiode PD to the vicinity of the charge transfer means (6, 7, 8) whose position is indicated by TX. Further, the potential gradient of the potential valley φ _v along the cut surface of FIG. 26A is larger than that in the case where the opening 3a is provided in the central portion of the charge generation embedding region 3.

In addition, FIG. 28 (a) reprints FIG. 20 (b), and FIG. 28 (b) shows the potential distribution at the time of charge reading of the cut surface corresponding to FIG. 28 (a). FIG. 29 (a) shows the potential distribution when the charge is read out from the plane corresponding to FIG. 20 (a), and FIG. 29 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 29 (a). Is shown three-dimensionally. As shown in FIGS. 28 (b) to 29 (b), when the transfer gate signal TX (i) is set to a high level, a potential barrier is formed between the photodiode PD and the charge transfer means (6, 7, 8). It becomes a three-dimensional potential distribution that is not done. Therefore, it moves to the charge transfer means (6, 7, 8) side along the path of the potential valley φ _v around the potential hill φ _h of the three-dimensional potential distribution, and passes from the photodiode PD via the embedded channel region 6. Since the transfer of the signal charge flowing to the charge reading region 5 (FD) is not hindered, smooth charge reading becomes possible and afterimages are less likely to occur.

Here, the photodetector according to the second embodiment shown in FIG. 30 (a) and the photodetector according to the fourth comparative example shown in FIG. 30 (b) are subjected to the same process and the same from the same wafer. It was made in pixel size. In the photodetector element according to the second embodiment shown in FIG. 30A, the opening 3a is provided so as to be offset from the center of the charge generation embedded region 3, whereas the third embodiment shown in FIG. 30B is provided. The photodetector element according to the comparative example of No. 4 differs only in that the charge generation embedded region 3 is not provided with an opening.

The actual measurement results of the incident light amount vs. signal output characteristics of the photodetector element according to the second embodiment shown in FIG. 30A and the photodetector element according to the fourth comparative example shown in FIG. 30B are shown. It is shown in 31. The linear region slope of this characteristic is the sensitivity, and the region where the signal output is constant is saturated. According to the photodetector element according to the second embodiment, the afterimage characteristics can be improved without increasing the number of steps by hollowing out the charge generation embedding region 3 to provide the opening 3a, but the charge generation embedding. Since the area of the region 3 becomes small, there is generally a concern about trade-offs such as a decrease in sensitivity and a decrease in saturation. However, from FIG. 31, in the photodetector element according to the second embodiment shown in FIG. 30 (a), the charge generation embedded region 3 is hollowed out, but the light according to the fourth comparative example shown in FIG. 30 (b). It can be seen that the characteristics of the sensitivity and saturation are not deteriorated at all as compared with the detection element. The data shown in FIG. 31 shows that in the photodetector element according to the second embodiment, the opening 3a in which the potential hill is set also substantially functions as a photoelectric conversion unit.

This is because when the light that enters the hollowed out region is photoelectrically converted into an electron (a hole if it is made of a reverse conductive type), the electron has the closest potential due to diffusion and electric field drift. Because it moves to a deep place. That is, it moves to the deep potential portion of the photodiode region remaining after being hollowed out. That is, since the light entering the hollowed out region also becomes a signal, the sensitivity does not decrease.

When ions are implanted with the same dose amount, the number of saturated electrons in the structure of the photodetector according to the second embodiment having a small area is smaller than that of the structure of the photodetector according to the fourth comparative example. However, it can be increased to some extent by increasing the dose amount. Further, saturation may be achieved if the number of electrons is equal to or greater than the input range of the AD converter in the subsequent stage. The input range of an AD converter usually used is 1 V. For example, if the conversion gain is 50 uV / e, the full range is reached at 20000 electrons, and if it is 100 uV / e, the full range is reached at 10000 electrons. That is, the number of saturated electrons may be equal to or greater than the full range of the AD converter. As described above, the saturation region of FIG. 20 is limited by the full range of the AD converter, so that it is a comparison result between the devices ion-implanted with the same dose amount, but no difference in saturation is observed.

As described above, according to the photodetector element according to the second embodiment, as with the photodetector element according to the first embodiment, low voltage, ultra-high speed drive, afterimages are unlikely to occur even in a large area, and electric charge. A semiconductor element having smooth transfer and suitable as a CIS pixel can be provided.

<First modification of the second embodiment>
In the second embodiment, a rectangular photodiode layout is used, but the photodiode layout does not necessarily have to be rectangular and can be of any shape. For example, as shown in FIGS. 32 (a) and 32 (b), a non-concentric, circular W7 diameter offset from the center of the charge generation embedding region 3 having a circular outer edge in the direction opposite to that of FIG. It may have an eccentric donut-shaped charge generation embedding region 3 hollowed out at the opening 3a. On the plane pattern, the width W8a of the charge generation embedded region 3 is set wider than the width W8b on the opposite side. The charge generation embedded region 3 may be formed in a U shape (U shape) with the width W8b = 0.

Here, let us compare with the fifth comparative example in which the potential pond generation embedded region 3x eccentric in a certain direction is added as shown in FIGS. 33 (a) and 33 (b). The results of calculating the potential of the structure of the fifth comparative example by the device simulator are shown in FIGS. 34 (a) and 34 (b). FIG. 34 (a) shows the potential distribution of the plane corresponding to FIG. 33 (a), and FIG. 34 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 34 (a) in three dimensions. Shown in. The deepest part of the potential of the photodiode PD is formed in the potential pond generation embedded region 3x. That is, the deepest part of the potential of the photodiode PD moves in a direction deviated from the center of the photodiode PD. Therefore, if the charge transfer means is arranged near the deepest part of the potential of the photodiode PD, smooth reading becomes possible.

On the other hand, the results of calculating the potential of the structure of the first modification of the second embodiment shown in FIGS. 32 (a) and 32 (b) by the device simulator are shown in FIGS. 35 (a) and 35 (b). Shown in b). FIG. 35 (a) shows the potential distribution of the plane corresponding to FIG. 32 (a), and FIG. 35 (b) shows the potential distribution corresponding to the region B surrounded by the alternate long and short dash line of FIG. 35 (a) in three dimensions. Shown in. As shown in FIGS. 35 (a) and 35 (b), the deepest potential of the photodiode PD is on the opposite side of the eccentric and hollowed out charge generation embedding region 3. That is, the deepest part of the potential of the photodiode PD moves in a direction deviated from the center of the photodiode PD. Therefore, if the charge transfer means is arranged near the deepest part of the potential of the photodiode PD, smooth reading becomes possible.

<Second variant of the second embodiment>
As a second modification of the second embodiment, for example, as shown in FIG. 36A, the charge generation embedding region 3 is rectangular on the plane pattern, and a rectangular opening 3a is provided. May be good. Further, as shown in FIG. 36B, the charge generation embedding region 3 may be rectangular on the plane pattern, and a circular opening 3a may be provided. Further, as shown in FIG. 37A, the charge generation embedding region 3 may be rectangular on the plane pattern, and an octagonal opening 3a may be provided. Further, as shown in FIG. 37 (b), a plurality of openings 3a to 3c may be provided in the charge generation embedded region 3 on the plane pattern.

In any of the structures of the second modification of the second embodiment, the deepest potential of the photodiode is formed by hollowing out the opening 3a of the charge generation embedded region 3 so as to deviate from the center of the photodiode. Can be moved to the vicinity of the transfer gate electrode 8 by shifting from the center of the photodiode.

(Third Embodiment)
As shown in FIGS. 38 (a) and 38 (b), the photodetector according to the third embodiment of the present invention has a locally deeper potential than the region where the charge generation embedded region 3 is arranged. The configuration of the photodetector according to the second embodiment shown in FIGS. 20 (a) and 20 (b) further includes a potential pond generation embedded region 3x that generates a potential pond (potential pound). Different from.

An opening 3a is provided in the charge generation embedded region 3. The potential pond generation embedding region 3x is a semiconductor region provided adjacent to the charge generation embedding region 3 and having a higher impurity density than the charge generation embedding region 3. The potential pond generation embedded region 3x is locally provided near the transfer gate electrode 8. The potential pond generation embedded region 3x has a rectangular planar pattern, and the potential pond generation embedded region 3x is not provided with an opening.

Other configurations of the photodetector element according to the third embodiment are the same as the configurations of the photodetector element according to the second embodiment shown in FIGS. 20 (a) and 20 (b). The method for manufacturing the photodetector according to the third embodiment is different except that a step of forming the potential pond generation embedded region 3x is added in addition to the step of forming the charge generation embedded region 3. It is the same as the manufacturing method of the photodetector element which concerns on 2nd Embodiment.

According to the photodetector according to the third embodiment, the charge generation embedded region 3 is hollowed out to provide the opening 3a, so that the number of steps is the same as that of the conventional structure in which the charge generation embedded region has no opening. Smoother charge reading becomes possible, and afterimages are less likely to occur. Further, since the concentration gradient is formed by the charge generation embedded region 3 and the potential pond generation embedded region 3x, the afterimage can be further reduced.

In the third embodiment, a structure in which one potential pond generation embedded region 3x is added is illustrated, but a plurality of steps are taken so that the potential gradually becomes deeper as the transfer gate electrode 8 approaches. The structure may be such that a potential pond generation embedded region 3x having a different impurity density is added to the structure. Further, instead of the potential pond generation embedded region 3x, the shield layer 4 on the surface of the photodiode may be a plurality of regions, and the impurity density difference in the photodiode may be made by counter-doping. Further, the charge generation embedded region and the shield layer may be made into a plurality of regions to give a difference in the density of impurities in the photodiode.

As described above, according to the photodetector element according to the third embodiment, a semiconductor element suitable as a CIS pixel, which has a low voltage, ultra-high speed drive, less afterimages even in a large area, and smooth charge transfer. What can be provided is the same as described for the photodetector elements according to the first and second embodiments.

(Fourth Embodiment)
As shown in FIGS. 39 (a) and 39 (b), the photodetector according to the fourth embodiment of the present invention has a charge generation embedded region 3 and a potential pond generation embedded region 3x as a third embodiment. It is provided in the same manner as the embodiment, but the point that the opening 3a is provided over the charge generation embedding region 3 and the potential pond generation embedding region 3x is that the opening 3a is provided only in the charge generation embedding region 3. It is different from the third embodiment.

The potential pond generation embedded region 3x is locally provided in the vicinity of the transfer gate electrode 8 and has a rectangular planar pattern. A part of the potential pond generation embedded region 3x opposite to the transfer gate electrode 8 reaches the opening 3a, and the opening 3a surrounds a part of the potential pond generation embedded region 3x on the plane pattern. It has a U-shape (U-shape).

Other configurations of the photodetector element according to the fourth embodiment are the same as the configurations of the photodetector element according to the third embodiment. In the method for manufacturing a photodetector element according to a fourth embodiment, the point that an opening 3a is formed over the charge generation embedded region 3 and the potential pond generation embedded region 3x is the point that the photodetector element according to the third embodiment is formed. The other procedure is the same as the configuration of the photodetector according to the third embodiment.

According to the photodetector element according to the fourth embodiment of the present invention, similarly to the photodetector element according to the third embodiment, the conventional charge generation embedded region 3 is hollowed out to provide the opening 3a. With the same number of steps as the structure without an opening in the charge generation embedded region, smoother charge reading becomes possible and afterimages are less likely to occur. Further, since the concentration gradient is formed by the charge generation embedded region 3 and the potential pond generation embedded region 3x, the afterimage can be further reduced.

In the structure of the light detection element according to the fourth embodiment, as in the third embodiment, a potential pond having a potential deeper than the potential of the region where the charge generation embedded region 3 is arranged is generated. In order to achieve this, a structure in which one potential pond generation embedded region 3x is added has been illustrated, but the impurity densities are different in a plurality of steps so that the potential gradually becomes deeper as the potential approaches the transfer gate electrode 8. The structure may be such that the potential pond generation embedded region 3x is added. Further, instead of the potential pond generation embedded region 3x that generates the potential pond, the shield layer 4 on the surface of the photodiode may be a plurality of regions, and the impurity density difference in the photodiode may be added by counter-doping. Further, the charge generation embedded region and the shield layer may be made into a plurality of regions to give a difference in the density of impurities in the photodiode.

As described above, according to the photodetector element according to the fourth embodiment, a semiconductor element suitable as a CIS pixel, which has a low voltage, ultra-high speed drive, less afterimages even in a large area, and smooth charge transfer. What can be provided has already been described for the photodetector elements according to the first to third embodiments.

(Other embodiments)
As mentioned above, the present invention has been described by the first to fourth embodiments, but the statements and drawings that form part of this disclosure should not be understood to limit the invention. Various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art from this disclosure.

In the description of the first to fourth embodiments described above, the first conductive type is defined as p type and the second conductive type is defined as n type, but the first conductive type is n type and the second conductive type is p type. However, it is easy to understand that the same effect can be obtained by reversing the electrical polarity. In the description of the first to fourth embodiments, the signal charge to be processed such as transfer and storage is an electron, and in the potential diagram, the lower direction (depth direction) of the figure is the positive direction of the potential (potential). However, when the electrical polarity is reversed, the electric charge to be processed becomes holes, so the potential shape indicating the potential barrier, potential valley, potential well, etc. in the light detection element is shown below the figure. The direction (depth direction) is expressed as the negative direction of the potential.

Further, in the description of the first to fourth embodiments already described, the two-dimensional solid-state image sensor (area sensor) has been exemplified, but the photodetector of the present invention is the pixel X of the two-dimensional solid-state image sensor. _It should not be construed as limited to use only for _ij . For example, in the two-dimensional matrix shown in FIG. 1, a plurality of light detection elements may be arranged one-dimensionally as pixels X _ij of a one-dimensional solid-state image sensor (line sensor) with j = m = 1. It should be easy to understand from the contents of the above disclosure.

As described above, it goes without saying that the present invention includes various embodiments not described here. Therefore, the technical scope of the present invention is defined only by the matters specifying the invention relating to the reasonable claims from the above description.

1, 2 _b ... Base portion 1 _sub-1 , 1 _sub-2 ... Semiconductor substrate 2 ... Tab region 3 ... Charge generation embedded region 3a, 3b, 3c ... Opening 3x ... Potential pond generation embedded region 4 ... Shield layer 5 ... Charge reading region 6 ... Embedded channel region 7 ... Gate insulating film 8 ... Transfer gate electrode 9 ... Element separation insulating film 20 ... Pixel array unit 21 ... Row decoder circuit 22 ... Row drive circuit 25 ... Column decoder circuit 26 ... Output Signal line

Claims (8)

The first conductive type shield layer and
A second conductive type charge generation embedded region having an opening and having an upper surface surrounding the opening in contact with the shield layer .
The upper surface of the protruding portion exposed from the opening has a stepped shape in contact with the shield layer, and the charge generation embedded region is embedded so as to surround the protruding protrusion portion by the stepped shape, which is lower than the shield layer. The first conductive type substrate portion selected for the impurity density and the impurity density at which the depletion layer due to the pn junction with the charge generation embedding region is pinched off at the central portion of the protrusion .
A second conductive type charge reading region, which is arranged on the upper part of the substrate portion so as to be separated from the charge generation embedded region and has a higher impurity density than the charge generation embedded region.
A charge transfer means for controlling the transfer of a signal charge from the charge generation embedded region to the charge reading region is provided, and a photodiode is formed by the base portion and the charge generation embedded region, and the protrusion portion. A potential hill with a potential depth set in the center shallower than the periphery, a potential valley with a deeper potential than the potential hill that surrounds the potential hill in a ring shape, and the potential that surrounds the potential valley during charge accumulation. A W-shaped potential profile is formed by a potential barrier whose potential depth is shallower than the valley, and the charge transfer means deepens the potential depth of a part of the potential barrier, whereby the signal charge generated by the photodiode is generated. Is transferred to the charge reading region via the potential valley . The plane pattern, said openings provided in the center of the charge generation buried region, the light detecting element according to claim 1, characterized in that to generate the potential hill in the opening. The first aspect of the present invention, wherein the potential hill is generated in the opening by providing an opening shifted from the center of the charge generation embedded region to the opposite side of the charge transfer means on the plane pattern. Light detection element. On the plane pattern, a second conductive type potential pond generation embedding region which is provided on the charge transfer means side inside the charge generation embedding region and has a higher impurity density than the charge generation embedding region is further provided. The optical detection element according to claim 3. The photodetector according to claim 4, wherein the opening is provided only in the charge generation embedded region. The photodetector according to claim 4, wherein the opening is provided over the charge generation embedded region and the potential pond generation embedded region. The photodetector according to claim 2 or 3, wherein the charge generation embedded region has a plurality of the openings. The first conductive type shield layer and
A second conductive type charge generation embedded region having an opening and having an upper surface surrounding the opening in contact with the shield layer .
The upper surface of the protruding portion exposed from the opening has a stepped shape in contact with the shield layer, and the charge generation embedded region is embedded so as to surround the protruding protrusion portion by the stepped shape, which is lower than the shield layer. The first conductive type substrate portion selected for the impurity density and the impurity density at which the depletion layer due to the pn junction with the charge generation embedding region is pinched off at the central portion of the protrusion .
A second conductive type charge reading region, which is arranged on the upper part of the substrate portion so as to be separated from the charge generation embedded region and has a higher impurity density than the charge generation embedded region.
A pixel array is formed by arranging a plurality of the pixels, using an optical detection element provided with a charge transfer means for controlling the transfer of signal charges from the charge generation embedded region to the charge reading region as pixels, and each of the pixels. In the above, a photodiode is formed by the base portion and the charge generation embedded region, and a potential hill having a potential depth set in the center of the protruding portion is shallower than the periphery and a ring shape around the potential hill. A W-shaped potential profile is formed by a potential valley having a deeper potential than the potential hill surrounded by the electric charge and a potential barrier having a shallower potential than the electric potential valley surrounding the electric charge valley when the charge is accumulated. A solid-state imaging device, characterized in that a signal charge generated by the photodiode is transferred to the charge reading region via the potential valley by increasing the depth of the potential of a part of the potential barrier .

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