JP3281044B2 - Method for manufacturing thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor (hereinafter, referred to as TFT).

A TFT is used as a driving element of an active matrix LCD.
The CD is used as a display device for a terminal such as an information processing device together with a simple matrix display device.

[0003] Comparing the two, the active matrix type can perform the same operation as driving a large number of pixels independently, and therefore, even if the number of lines increases with an increase in display capacity. Unlike the simple matrix type, the driving duty ratio is reduced, and the problems such as a decrease in contrast and a decrease in viewing angle are not caused. For this reason, the active matrix type LCD is a cathode ray tube (CR)
T) A color display comparable to that of the conventional color display can be obtained, and its use as a thin flat display is expanding.

[0004]

2. Description of the Related Art In an active matrix type having the above advantages, it is necessary to form a TFT for driving a pixel electrode, and a staggered or inverted staggered TFT is required.
Is used.

FIGS. 9 (a) to 9 (c), 10 (d),
10E is a cross-sectional view for explaining a method of manufacturing a conventional staggered TFT used for the TFT active matrix LCD, FIG. 10F is a plan view, and FIG. 10E is a plan view of FIG. FIG. 3 is a sectional view taken along line AA.

First, as shown in FIG. 9A, after a light-shielding film 2 and an insulating film 3 are formed on a transparent substrate 1, an indium tin oxide film (hereinafter, referred to as an ITO film) is formed on the insulating film 3. Membrane 4
And an n ⁺ -type amorphous silicon film doped with phosphorus to be a contact layer (hereinafter, referred to as an a-Si film)
5 are sequentially formed.

Next, after forming resist patterns 6a and 6b on the a-Si film 5, the a-Si film 5 and the ITO film 4 are sequentially etched and removed, and the ITO film 4a / a-Si
The film 5a and the ITO film 4b / a-Si film 5b remain.
At this time, the ITO film 4a / a-Si film 5a and the ITO film 4a
The b / a-Si film 5b is formed at a predetermined interval in a region above the light shielding film 2 so as to be insulated from each other.
For this reason, when etching the underlying ITO film 4, it is usually excessively etched so that the ITO film 4 does not remain on the surface of the insulating film 3 (FIG. 9B).

Next, a-S to be an operating semiconductor layer is formed on the entire surface.
An i film 7, a silicon nitride film 8 serving as a gate insulating film, and an aluminum film (hereinafter referred to as an Al film) 9 serving as a gate electrode are sequentially formed (FIG. 9C).

Next, an ITO film 4a / a-Si film 5 including a region above the light-shielding film 2 and facing the other region with this region interposed therebetween.
After forming a resist pattern 10 so as to extend over the respective regions above the respective end portions of the a film and the ITO film 4b / a-Si film 5b, the resist film 10 is used as a mask to dry-etch the Al film 9 / silicon nitride. Membrane 8 /
The a-Si film 7 / a-Si films 5a and 5b are continuously etched and removed. Thereby, the active semiconductor layer 7a connected via the contact layers 5c and 5d at the respective ends of the ITO films 4a and 4b, the gate insulating film 8a on the active semiconductor layer 7a, and the gate electrode 9a on the gate insulating film 8a Are formed, and a staggered TFT is completed. Note that the ITO film 4a / contact layer 5c constitutes the source electrode 11a,
The TO film 4b / contact layer 5d forms the drain electrode 11b. Further, the active semiconductor layer 7a in a region sandwiched between the source electrode 11a and the drain electrode 11b becomes a channel region layer. Further, a pixel electrode 4c formed integrally with the ITO film 4a is exposed on the insulating film 3 (FIG. 10D).

Then, after forming an insulating film 12 covering the TFT to protect the TFT, an opening 12a is formed in the insulating film 12 on the ITO film 4b. Subsequently, the drain bus line 13 connected to the ITO film 4b through the opening 12a
After forming the liquid crystal layer 14, an active matrix LCD having a staggered TFT is completed (FIGS. 10E and 10F).

FIGS. 13A to 13C and FIG.
(D) and (e) are TFT active matrix LCDs.
FIG. 14F is a cross-sectional view for explaining a method of manufacturing a conventional inverted staggered TFT used in the method shown in FIG.
FIG. 4E is a sectional view taken along line BB of FIG.

First, a gate electrode 16 is selectively formed on a transparent substrate 15 as shown in FIG. At this time, the gate bus line connected to the gate electrode 16 at the same time
16a is also formed. Subsequently, the insulating film 17 which covers the gate electrode 16 and becomes the gate insulating film / a- which becomes the active semiconductor layer
An insulating film 19 serving as a Si film 18 / a channel protective film is continuously formed.

Next, a resist pattern 20 is selectively formed on the insulating film 19 by exposing the back surface of the transparent substrate 15 using the gate electrode 16 as a mask.
9 is selectively etched and removed to form a channel protective film 19a above the gate electrode 16 and on the a-Si film 18 serving as a channel region layer (FIG. 13B).

Next, after removing the resist pattern 20, an n ⁺ -type a-Si film 21 / Ti film 22 is formed on the entire surface to form a source electrode and a drain electrode. Subsequently, after forming the resist film 23, selective exposure is performed using the exposure mask 24 so that the formed resist pattern overlaps the channel protective film 19a in consideration of patterning accuracy (FIG. 13C).

Then, a resist film 23 is developed to form a resist pattern 23a on the Ti film 22 on both sides of the channel protective film 19a at intervals corresponding to the width L _SD of the channel region layer.
Form 23b. Next, the resist patterns 23a and 23b
The an a-Si film 21 / Ti film 22 is etched and removed as a mask, the source electrode 25a and the n ⁺ -type composed of a-Si film 21a / Ti film 22a of the n ⁺ -type extending over the channel protective film 19a A drain electrode 25b composed of the a-Si film 21b / Ti film 22b is formed. Thus, the TFT is completed (FIG. 14D).

Next, a pixel electrode 26 made of an indium tin oxide film (hereinafter referred to as an ITO film) is formed by connecting to the source electrode 25a, and a drain bus line 27 is formed by connecting to the drain electrode 25b. .

Next, when a liquid crystal layer 28 is formed on the entire surface, an active matrix LCD having inverted stagger type TFTs is formed.
Is completed (FIGS. 14E and 14F).

[0018]

By the way, an active matrix LC having a staggered TFT of the above-mentioned conventional example is used.
9D, the source electrode 11a and the drain electrode 11b are formed as shown in FIG.
When separating / insulating the / a-Si film 5, the ITO film 4 is usually excessively etched so that the ITO film 4 does not remain on the surface of the insulating film 3.

For this reason, as shown in FIG. 11A, the opposed ITO film 4a / a-Si film 5a and the ITO film 4b
At each end (part A) of the / a-Si film 5b, the lower ITO films 4a and 4b are side-etched,
The a-Si films 5a and 5b on the TO films 4a and 4b are in an overhang state. Therefore, as shown in FIG. 11B, when the a-Si film 7 serving as the operating semiconductor layer is formed on the entire surface, a step break may occur in the portion A due to overhang. For this reason, there is a problem that the created TFT does not operate.

In order to solve this problem, FIG.
As shown in (a) to (c), only the lower ITO film is formed and patterned, and then the opposite ITO film 4c,
The upper a-Si film 5e,
When 5f is formed, a-Si film 7 serving as an operation semiconductor layer is formed.
When b is formed on the entire surface, the ITO film 4c at the end (part B),
Abnormal growth may occur on 4d, causing a problem such as an increase in resistance. Further, even when such abnormal growth does not occur, after forming the ITO film, the upper a-Si film 5e,
Since a resist pattern is formed and removed for patterning the ITO film before forming 5f, the ITO film 4
The interface between the c / a-Si film 5e and the ITO film 4d / a-Si film 5f is easily contaminated, so that the ITO film 4c / a-Si
There is a problem that contact characteristics between the films 5e and between the ITO film 4d / a-Si film 5f are deteriorated.

On the other hand, in the conventional method of manufacturing an active matrix LCD having inverted staggered TFTs, a source electrode 25a and a drain electrode 25b connected to an active semiconductor layer are formed as shown in FIG. In this case, in order to secure the patterning accuracy, it is formed to extend on the channel protective film 19a. Therefore, the gate electrode 16
Must be at least a width L _SD for securing the channel region layer and a width 2 × ΔL for overlapping the source electrode 25a, the drain electrode 25b and the channel protective film 19a. For this reason, the width L _SD for securing the channel region layer
As described above, it is necessary to increase the width of the gate electrode 16 and the parasitic capacitance increases. Therefore, it is necessary to increase the storage capacitance to be added in order to prevent burning of a still screen. As a result, there is a problem that, for example, the aperture ratio is reduced.

In order to solve this problem, FIG.
As shown in (a) to (c), a source electrode and a drain electrode are formed on an a-Si film 18 serving as an operation semiconductor layer on both sides of a channel protective film 19a by lift-off.
May be formed in a self-aligned manner.

That is, first, a resist pattern 20 is formed on the insulating film in the region where the channel protective film is to be formed by the same steps as those shown in FIGS. 13A and 13B, and the insulating film is etched and removed. To form a channel protective film 19a (FIG. 15).
(A)). Subsequently, as shown in FIG. 15B, to form source and drain electrodes, n ⁺ -type a-Si films 21c to 21c- ² are formed on the entire surface while the resist pattern 20 is left.
1e / Ti films 22c to 22e were formed (FIG. 15B).
After that, the resist pattern 20 is removed. As a result, the a-Si film 21e on the resist pattern 20 is lifted off.
/ Ti film 22e is removed and channel protective film 19 is removed.
aS separated and insulated on a-Si film 18 on both sides of a
Source electrode 25c composed of i film 21c / Ti film 22c and a-
A drain electrode 25d composed of the Si film 21d / Ti film 22d is formed in self-alignment with the gate electrode 16 (FIG. 15).
(C)).

However, in this method, a piece of the a-Si film 21e or a piece of the Ti film 22e peeled off by the lift-off may adhere to the transparent substrate and remain on the transparent substrate. There is a problem that causes a decrease.

The present invention has been made in view of the above-mentioned problems of the prior art, and when a staggered TFT is formed, disconnection of a working semiconductor layer at an end of a source electrode and a drain electrode or formation of a working semiconductor layer occurs. While preventing abnormal growth of the layer,
Insufficient contact between the multilayer conductive films constituting the source electrode and the drain electrode can be prevented, and the parasitic capacitance can be reduced by minimizing the gate electrode width when forming an inverted staggered TFT. An object of the present invention is to provide a method for manufacturing a TFT active matrix LCD.

[0026]

According to a first aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: a source electrode facing a first substrate at a predetermined distance; A drain electrode, an operating semiconductor layer connected to opposite ends of the source electrode and the drain electrode, formed between the source electrode and the drain electrode, a gate insulating film on the operating semiconductor layer, and the gate insulating film A method of manufacturing a thin film transistor having an upper gate electrode, comprising: forming a first conductive film on the first base, patterning the first conductive film, and holding the first conductive film at a predetermined interval to face the first conductive film. Leaving a conductive film of the first conductive film, and exposing the first conductive film to a gas containing a conductive material to selectively form a film containing the first conductive material on the first conductive film. And the first step 3. The method according to claim 2, further comprising the step of: selectively forming a first semiconductor film on the film containing an electrically conductive material; and forming the source electrode and the drain electrode. Item 1. The method for manufacturing a thin film transistor according to Item 1, wherein the temperature of the first substrate on which the first conductive film is formed is kept at 230 ° C. or lower, and then the first substrate is exposed to an atmosphere of hydrogen gas. The invention according to claim 3, wherein a film containing the first conductive material is selectively formed on the first conductor film continuously without exposure. The film containing the first conductive material is a film containing at least one of tungsten, molybdenum, aluminum, titanium, and tantalum, and the gas containing the conductive material is heated. Typically 5. The method according to claim 4, wherein a thermal chemical vapor deposition method for forming a film by forming a film or a plasma chemical vapor deposition method for forming a film by electrically activating the gas containing the conductive substance is used. The present invention relates to the method of manufacturing a thin film transistor according to any one of claims 1 to 3, wherein the first semiconductor film is provided between one electrode holding the first base and another electrode. A silicon film formed by using a reaction gas that has been turned into plasma by applying a voltage from a power supply; a first period of exposure to a gas containing silicon that has been turned into plasma; and hydrogen (H ₂ ) that has been turned into plasma. , Helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe)
6. The method according to claim 5, wherein the silicon film is formed by alternately performing a second period of exposing to a gas containing at least one of the above. According to the method, in the first period, the one electrode is connected to a ground side, and the other electrode is connected to a power supply side. In the second period, the one electrode is connected to the power side. 7. The method according to claim 6, wherein the second electrode is connected to the ground side, and the gate electrode and the gate electrode are coated on the first substrate. A gate insulating film, an operating semiconductor layer formed of a first semiconductor film formed on the gate insulating film above the gate electrode, and a channel protective film formed of an insulating film covering a channel region layer of the operating semiconductor layer. A method of manufacturing a thin film transistor having a source electrode and a drain electrode made of a first conductor film connected to an operation semiconductor layer on both sides of the channel protection film, wherein a channel protection film is formed on the first semiconductor film. 7. The invention according to claim 7, wherein after the formation, the first conductor film is selectively formed on the first semiconductor film exposed on both sides of the channel protection film. Forming a channel protective film on the first semiconductor film and then selecting the first conductor film on the first semiconductor film exposed on both sides of the channel protective film. A conductive impurity is introduced into the first semiconductor film before the first semiconductor film is formed, and the invention according to claim 8 relates to the method of manufacturing a thin film transistor according to claim 6, wherein Light on the film The invention according to claim 9 is characterized in that the first conductor film is selectively formed while irradiating the thin film transistor. Is a tungsten film, a molybdenum film, a titanium film, or an aluminum film, and a thermal chemical vapor deposition method of thermally activating a gas containing the conductive material to form a film;
Alternatively, a plasma-enhanced chemical vapor deposition method of electrically activating a gas containing the conductive substance to form a film is used, and the invention according to claim 10 is the invention according to any one of claims 6 to 8. The method according to claim 11, wherein the first conductor film is a film including a second semiconductor film. The invention according to claim 11, wherein the first conductor film is a film including a second semiconductor film. In this regard, the first conductor film is a two-layer film of a second semiconductor film / a second conductor film, and after forming a channel protection film on the first semiconductor film, The second semiconductor film is selectively formed on the first semiconductor film on both sides of the film, and then the second semiconductor film is exposed to a gas containing a conductive substance to form a second semiconductor film on both sides of the channel protection film. Selectively forming the second conductor film on the second semiconductor film 13. The invention according to claim 12, wherein a source electrode and a drain electrode comprising two layers of the second semiconductor film and the second conductor film connected to the first semiconductor film are formed. The method according to claim 10, wherein the first conductive film is a two-layer film of a film containing a first conductive material / a second semiconductor film, After forming a channel protective film on the semiconductor film, the first semiconductor film is exposed to a gas containing a conductive material, and the first conductive material is deposited on the first semiconductor film on both sides of the channel protective film. Forming a film containing
A second semiconductor film is selectively formed on the film containing the first conductive material, and the film containing the first conductive material / the second semiconductor film is connected to the first semiconductor film. A thirteenth aspect of the present invention is directed to the method of manufacturing a thin film transistor according to the twelfth aspect, wherein a source electrode and a drain electrode comprising the first conductive material are formed. After exposing one substrate to hydrogen gas which has been turned into plasma, the second semiconductor film is continuously formed on the film containing the first conductive material without exposing the substrate to air. The invention according to claim 14 is the invention according to claim 12 or 13
According to the method of manufacturing a thin film transistor described above, the film containing the first conductive material is a film containing at least one of tungsten, molybdenum, titanium, and aluminum, and the film containing the conductive material is heated. The method is characterized in that a thermal chemical vapor deposition method for forming a film by electrically activating the gas or a plasma chemical vapor deposition method for forming a film by electrically activating a gas containing the conductive substance is used, 1
According to a fifth aspect of the present invention, there is provided the method of manufacturing a thin film transistor according to any one of the tenth to fourteenth aspects, wherein the second semiconductor film is formed of one electrode holding the first base and another electrode. A silicon film formed by using a reaction gas that is turned into a plasma by applying a voltage from a power supply between the first electrode and the first electrode that is connected to the ground side and exposed to a gas containing the turned into plasma. And the one electrode is connected to the power supply side, and hydrogen (H ₂ ), helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe) are turned into plasma. 17. The method according to claim 16, wherein the silicon film is formed by alternately performing a second period of exposing to a gas containing at least one of the above. One In the first period, the one electrode is connected to a ground side, and the other electrode is connected to a power source side, and the second electrode is connected to the power source side in the second period. And the other electrode is connected to a ground side.

[0027]

In the method of manufacturing a thin film transistor according to the present invention, in the case of a so-called staggered thin film transistor, the first method is used.
Forming a first conductive film forming a source electrode and a drain electrode, selectively forming a film containing a first conductive material on the first conductive film, and further forming a first conductive film on the first conductive film; One semiconductor film is selectively formed over a film containing a first conductive substance. Therefore, unlike the conventional case, overhang does not occur at the opposite ends of the source electrode and the drain electrode, so that disconnection of the operating semiconductor layer can be prevented. Further, since the underlying first conductive film is covered to the end with the first semiconductor film and is not exposed, abnormal growth of the active semiconductor layer can be prevented.

Second, a film containing the first conductive material is formed on the first conductive film to improve the contact property, and further, selectively on the film containing the first conductive material. In addition, since the first semiconductor film is formed continuously,
To prevent intervening contaminants such as resist residues between the film containing the conductive material and the first semiconductor film.
It is possible to prevent contact failure between the first conductor film and the first semiconductor film forming the source electrode and the drain electrode.

Third, by exposing the first conductive film to plasma-converted hydrogen gas, the selectivity for forming a film containing the first conductive material can be increased. In particular, when the first conductor film is an ITO film, it is desirable to maintain the temperature of the first base at 230 ° C. or lower in order to prevent a decrease in the transparency of the ITO film.

Fourth, the first semiconductor film is a silicon film. When forming the first semiconductor film, the first semiconductor film is exposed to a plasma-containing gas containing silicon and is exposed to a plasma-containing gas containing hydrogen and the like. By alternately performing the second period, the deposition and the etching are alternately performed, so that the selectivity of forming the first semiconductor film can be increased. In particular, the first period and the second
By switching the polarity of the voltage applied to one electrode holding the first base between the periods, the etching property of the unnecessary silicon film formed on the first base is increased, and
Of the conductive film can be increased.

In the case of a so-called inverted staggered thin film transistor, first, the first conductive film is selectively and self-aligned on the first semiconductor film exposed on both sides of the channel protective film. Since the first conductor film is formed, the first conductor film can be surely formed adjacent to the channel protective film without providing an overlapping region on the channel protective film. As a result, the width of the gate electrode can be reduced to a necessary minimum to reduce the parasitic capacitance. In particular, since the conductivity of the surface of the first semiconductor film is increased by introducing a conductive impurity into the first semiconductor film or irradiating the first semiconductor film with light, the first conductor film Can be increased in the selectivity of formation.

Second, the first conductor film includes the second semiconductor film, that is, only the second semiconductor film, the second semiconductor film /
Second conductive film or film containing first conductive material / second
Are selectively formed on the first semiconductor film exposed on both sides of the channel protective film. In particular, the second semiconductor film is a silicon film, and when the second semiconductor film is formed, the first semiconductor film is exposed to a plasma-containing gas containing silicon.
Period and the second exposure to a gas containing hydrogen
Alternately, the deposition and the etching are performed alternately, and the selectivity of the formation of the second semiconductor film can be increased. In particular, by switching the polarity of the voltage applied to one electrode holding the first base between the first period and the second period, the etching property of the unnecessary silicon film formed on the gate insulating film is reduced. In addition, the selectivity for forming the second semiconductor film can be increased.

Third, in particular, when the first conductor film is a film containing the first conductive material / the second semiconductor film, the first film on which the film containing the first conductive material is formed is formed. By exposing the substrate to hydrogen gas that has been turned into plasma, the selectivity for forming the second semiconductor film over the film containing the first conductive substance can be further increased.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a TF including a method of manufacturing a thin film transistor (hereinafter, referred to as a TFT) according to an embodiment of the present invention will be described.
A method for manufacturing a T active matrix LCD will be described with reference to the drawings.

First, the a-Si films (the first semiconductor films 38c and 38d, the second
Thin films serving as nuclei for selectively growing a Mo film (first conductive films 57a and 57b, second conductive films 62a and 62b) or an a-Si film. An apparatus for forming the films (the films 37a and 37b containing the first conductive material) will be described with reference to FIG.

In FIG. 8A, reference numeral 71 denotes a chamber;
Reference numeral 2 denotes a gas inlet for introducing a gas into the chamber 71, and is formed integrally with the electrode 76. 74 is an exhaust port, 75
Is a holder for holding the base 31 or 51, which has a built-in heater and also serves as an electrode (one electrode) for converting the gas in the chamber 71 into plasma, and is usually connected to the earth side. Reference numeral 76 denotes an electrode (another electrode) which is paired with an electrode (one electrode) 75 to convert the gas in the chamber 71 into plasma, and is usually connected to the power supply 77 side. In this case, a high-frequency power supply capable of supplying high-frequency power having a frequency of 13.56 MHz is used as the power supply 77.

By providing a switch, the electrode 7
The connection between the ground and the power supply 77 can be exchanged between 5, 76. (1) First Embodiment FIGS. 1 (a) to 1 (d), 2 (e) and 2 (f) show a TF including a method of manufacturing a staggered TFT according to a first embodiment of the present invention.
FIG. 3H is a plan view for explaining a method of manufacturing the T active matrix LCD, FIG. 3F is a plan view, and FIG.
It is a CC sectional view taken on the line (h).

First, a chromium film (hereinafter, referred to as a Cr film) having a thickness of about 600.degree. Is formed on a transparent substrate 31 made of a glass substrate, and then patterned, and a liquid crystal device is formed on a channel region layer of a TFT operating semiconductor layer. A light-shielding film 32 made of a Cr film is formed in a region below a region where a channel region layer of a TFT is to be formed so as not to be irradiated with backlight for driving the TFT. Subsequently, the light-shielding film 32 is coated to a thickness of about
An insulating film 33 made of a silicon oxide film of 5000 ° is formed. The above constitutes the base (first base) 34.

Next, on the insulating film 33, an indium tin oxide film (hereinafter, referred to as an ITO film (first conductive film)) having a thickness of about 500 °
Called. ) 35 is formed (FIG. 1A). Then
After forming a resist pattern 36 at predetermined intervals in a region above the light shielding film 32 so as to be insulated from each other,
The ITO film 35 is selectively etched and removed by using the resist pattern 36 as a mask, and ITO films 35a and 35b forming a source electrode and a drain electrode, and an ITO film 35c serving as a pixel electrode integrated with the ITO film 35a are formed. Remain (FIG. 1 (b)).

Next, the substrate 34 is introduced into the chamber 71 shown in FIG. 8A and is placed on the holder 75 serving as one electrode.
4 is heated and maintained at a temperature of 350 ° C. Subsequently, MoF ₆ + Ar gas is introduced into the chamber 71 from the gas inlet 72, and the pressure is maintained at 0.1 Torr. At this time, the activated species containing Mo thermally decomposed include the ITO films 35a, 35b and 35.
On the other hand, while the conductivity is large, the electrons are adsorbed by the movement of the electrons, whereas the insulating film 3 exposed in the removed region of the ITO film is formed.
On 3, electrons are not transferred and are not adsorbed due to insulating properties. Thus, thin Mo films (films containing the first conductive material) 37a and 37b are selectively formed only on the ITO films 35a, 35b and 35c (FIG. 1C). The ITO film 35
After forming a, 35b, and 35c, the temperature of the substrate is maintained at 150 ° C. and hydrogen gas at a pressure of 0.1 Torr is applied before performing the next process for increasing the selectivity of the nucleation process using MoF ₆ gas. In some cases, surface treatment is performed by converting the plasma to a power of about 100 W. In this case, it is desirable to keep the temperature of the substrate at 230 ° C. or lower in order to prevent the transparency of the ITO films 35a, 35b, and 35c from being deteriorated.

Next, while the MoF ₆ + Ar gas was stopped, the temperature of the base 34 was maintained at 250 ° C. while maintaining the reduced pressure, and as shown in FIG. H ₂ gas is supplied constantly and SiH ₄ + P
H ₃ gas (a gas containing silicon) is intermittently introduced into the chamber 71 at an introduction period (first period; t1) of 5 seconds / stop period (second period; t2) of 40 seconds (tc). While adjusting the pressure to 0.3 Torr. Subsequently, when a power of 60 W is applied between the electrodes (one electrode and the other electrode) 75 and 76 to convert the mixed gas into a plasma, phosphorus-doped n ⁺
Amorphous silicon films (hereinafter referred to as a-Si films) 38a and 38b begin to be formed. At this time, ITO
On the films 35a and 35b, the Mo films 37a and 37b are used as growth nuclei.
Although the -Si films 38a and 38b are formed smoothly, the growth nucleus does not exist on the insulating film 33, so that the a-Si film is hardly formed even in the introduction period (t1) of 5 seconds. Even if thin a-Si film is formed, the 40 seconds of the stop period (t2) is etched by the plasma of H ₂ gas. Therefore, the a-Si films 38a and 38b are formed by the ITO films 35a and 35b.
b is selectively formed only on Mo through the Mo films 37a and 37b. This state is maintained for a predetermined time, and the ITO films 35a, 35a
The a-Si films 38a and 38b having a thickness of about 350 ° are formed only on the layer b (FIG. 1D).

Next, after the chamber was once evacuated, the H ₂ gas and the PH ₃ gas were stopped while the temperature of the substrate 34 was maintained at 250 ° C., and SiH ₄ gas was constantly supplied from the gas inlet 72 to the chamber 71. To adjust the pressure to 0.7 Torr. Subsequently, the SiH ₄ gas is turned into plasma at a power of 30 W, and the a-Si film 3 having a thickness of about 350
9 is formed on the entire surface. Further, after the vacuum is drawn again, while maintaining the temperature of the base 34 at 200 ° C., the pressure is adjusted to 1 Torr by introducing NH ₃ gas from the gas inlet 72 in addition to the SiH ₄ gas. Subsequently, the mixed gas is turned into plasma at a power of 100 W, and a silicon nitride film (insulating film) 40 having a thickness of about 3000 と serving as a gate insulating film is formed on the a-Si film 39. Subsequently, an aluminum film (hereinafter, referred to as an Al film) 41 having a thickness of about 3000 と serving as a gate electrode is formed on the silicon nitride film 40 by sputtering (FIG. 2E).

Next, after a resist film is formed, patterning is performed to cover the region above the light-shielding film 32 and to extend to the region above the ITO films 35a and 35b opposed to each other with this region interposed therebetween. The pattern 42 is formed.

Next, using the resist pattern 42 as a mask, the Al film 41 / silicon nitride film 40 / a-Si film 39
The / a-Si films 38a and 38b / Mo films 37a and 37b are sequentially etched and removed to form a gate electrode 41a made of an Al film, a gate insulating film 40a made of a silicon nitride film, and an operating semiconductor layer made of an a-Si film. 39a, ITO film 35a / Mo film 37
source electrode 43a made of c / a-Si film 38c and ITO
A drain electrode 43b composed of a film 35b / Mo film 37d / a-Si film 38d is formed. With this, the staggered TFT
Is completed. The source electrode 43a and the drain electrode 43
The operation semiconductor layer 39a in the region sandwiched between the layers b becomes the channel region layer (FIG. 2F).

Thereafter, a silicon nitride film 44 covering the TFT is formed to protect the TFT, and then the ITO film 35b is formed.
An opening 44a is formed in the upper silicon nitride film 44. Subsequently, after forming a drain bus line 45 connected to the ITO film 35b through the opening 44a and then forming a liquid crystal layer 46, an active matrix L having a staggered TFT is formed.
The CD is completed (FIGS. 3 (g) and (h)).

As described above, according to the method of manufacturing an active matrix LCD having a staggered TFT according to the first embodiment of the present invention, the source electrode 43a and the drain electrode 43 are provided.
b, only the ITO films 35a and 35b constituting the first and second films (FIG. 1) were formed.
(B)) On the ITO films 35a and 35b, Mo films 37a and 37
b is selectively formed (FIG. 1 (c)), and the a-Si films 38a and 38b serving as upper contact layers are further changed to Mo films 37a and 37b.
It is formed only on the upper side (FIG. 1D). Therefore, unlike the related art, overhang does not occur at the opposing ends of the source electrode 43a and the drain electrode 43b.
Of the a-Si film 39 can be prevented. The underlying ITO films 35a and 35b are a-Si films 38.
Since the end portions are covered with a and 38b and are not exposed, abnormal growth of the a-Si film 39 can be prevented.

Further, a-Si films 38a and 38d as contact layers are selectively formed on Mo films 37a and 37b selectively formed on ITO films 35a and 35b without breaking vacuum. As a result, unlike the conventional method, it prevents contamination such as resist residue from intervening, and
Between the ITO film 35a / a-Si film 38c forming the 43a and the ITO film 35b / a-Si film forming the drain electrode 43b
The contact failure between 38d can be prevented.

In the first embodiment, the Mo film formed of MoF ₆ gas as the film containing the first conductive material is used.
37a and 37b are used, but a W film formed by WF ₆ gas, an Al film formed by Al (CH) ₃ gas, TiCl ₄
A Ti film formed by a gas or a Ta film formed by a TaCl ₅ gas can also be used.

Further, as the film containing the first conductive substance,
Although examples of Mo, W, Al, Ti, and Ta have been given, these films serve as nuclei for selectively growing the a-Si films 38a and 38b as described above, and are not necessarily continuous films. Need not be. That is, the same effect can be obtained even when the thickness is very thin (<50 ° or less), or a discontinuous film formed in an island shape. Further, a silicide film such as a Mo silicide film may be used.

Further, a thermal chemical vapor deposition method for forming a film by thermally activating the above-mentioned gas containing a conductive substance is used, but the gas containing the above-mentioned conductive substance is electrically activated. Alternatively, a plasma chemical vapor deposition method in which a film is formed by using the above method can be used.

The Mo film 37 is formed on the ITO films 35a and 35b.
When selectively forming the a-Si films 38a and 38b via the a and 37b, a SiH ₄ + PH ₃ gas (a gas containing silicon) is used.
Although hydrogen gas (H ₂ gas) is constantly introduced during the introduction period (t1) and during the suspension period (t2), the introduction is stopped during the introduction period (t1), and during the suspension period (t2). You may introduce only.

Further, during the introduction period (t1), the suspension period (t
During the period 2), the one electrode 75 holding the base 34 is connected to the ground side. During the stop period (t2), the electrode 75 is switched to the power supply 77 side, so that an unnecessary thin film formed on the insulating film 33 is unnecessary. The etchability of the a-Si film can be increased,
Thereby, the ITO film 35a / Mo film 37a and the ITO film 35a
The selectivity of the growth of the a-Si films 38a and 38b on the b / Mo film 37b can be increased.

(2) Second Embodiment FIGS. 4 (a) to 4 (c), FIGS. 5 (d), 5 (e) and 6 (f)
FIG. 6G is a cross-sectional view illustrating a method of manufacturing a TFT active matrix LCD including a method of manufacturing an inverted stagger type TFT according to a second embodiment of the present invention, FIG. 6G is a plan view, and FIG. It is DD sectional drawing of FIG.6 (f).

First, a gate electrode 52 made of a titanium film (hereinafter, referred to as a Ti film) having a thickness of about 800 ° is selectively formed on a transparent substrate (first base) 51 made of glass. A gate insulating film 53 made of a silicon nitride film having a thickness of about 3000 .ANG. Covering the metal layer 52; and an a-Si film (first semiconductor film) 5 having a thickness of about 300 .ANG.
4 and a silicon oxide film (insulating film) 55 having a thickness of about 1500 と serving as a channel protective film are continuously formed (FIG. 4A).

Next, after a resist film 56 is formed on the silicon oxide film 55 above the gate electrode 52, light is irradiated from the back surface of the transparent substrate 51 using the gate electrode 52 as a mask, and the resist film 56 is selectively exposed (FIG. 4 (b)).

Subsequently, after the resist film 56 is developed to selectively form a resist pattern 56a, the silicon oxide film 55 is selectively etched and removed using the resist pattern 56a as a mask to form an a- Si film 5
A channel protection film 55a is formed on the substrate 4 (FIG. 4C).

Next, after the resist pattern 56a is removed, phosphorus is introduced into the a-Si film 54 by ion implantation under the conditions of a dose of 5 × 10 ¹⁵ cm ⁻² and an acceleration voltage of 30 keV using the channel protective film 55a as a mask. (Fig. 5 (d))
Thereafter, annealing is performed at a temperature of about 250 ° C. to form n ⁺ -type conductive region layers 54c and 54d. Subsequently, a power of 300 W is applied to a hydrogen gas at a pressure of 0.1 Torr to generate plasma, and the substrate 54 is exposed for 5 minutes to clean the surfaces of the n ⁺ -type conductive region layers 54c and 54d and the channel protective film 56a.

Next, in order to form a source electrode and a drain electrode, the transparent substrate 51 is introduced into a chamber 71 shown in FIG. The transparent substrate 51 is heated by a built-in heater and maintained at a temperature of 250 ° C. Subsequently, MoF6 + Ar gas is introduced into the chamber 71, and the pressure is reduced to 0.
Keep at 1 Torr. At this time, the activated species containing Mo that has been thermally decomposed are adsorbed by the movement of electrons because of their high conductivity on the conductive type region layers 54c and 54d, whereas the active species containing Mo are insulated on the channel protective film 56a. Therefore, the electrons do not move and are not adsorbed. As a result, an M layer having a thickness of about 1000 ° is formed only on the conductive type region layers 54c and 54d with the channel protective film 56a interposed therebetween.
O films (first conductor films) 57a and 57b are formed in a self-aligned manner and selectively (FIG. 5E). Subsequently, the Mo films 57a, 57b and a- are etched by dry etching using CCl4 gas using a resist pattern (not shown) as a mask.
The Si film 54 is etched and removed, and the source electrode 57c made of the Mo film 57c and the drain electrode 57 made of the Mo film 57d
When d is formed and the operating semiconductor layer 54e made of an a-Si film is formed, the TFT is completed.

Next, the pixel electrode 58 is formed by connecting to the source electrode 57c, and the drain bus line 59 is formed by connecting to the drain electrode 57d. Next, when a liquid crystal layer 60 is formed on the entire surface, an active matrix LCD having an inversely staggered TFT is completed (FIG. 6F,
(G)).

As described above, according to the second embodiment of the present invention, the Mo films 57a and 57b are selectively and self-aligned on the a-Si film 54 exposed on both sides of the channel protection film 55a.
Is formed, the Mo films 57a and 57b can be surely formed adjacent to the channel protective film 55a without providing an overlapping region on the channel protective film 55a. Thus, the width of the gate electrode 52 can be reduced to a necessary minimum to reduce the parasitic capacitance.

In the second embodiment, the a-Si film 54
Mo is formed thereon by thermal CVD using MoF ₆ + Ar gas.
Although the films 57a and 57b are selectively formed, WF ₆ + H ₂
Tungsten film (W film) by thermal CVD using gas
Or T by thermal CVD using TiCl ₄ + H ₂ gas.
i-film, Al film by thermal CVD using Al (CH ₃ ) ₃ + H ₂ gas, or thermal CVD using MoCl ₅ + SiH ₄ gas
Mo silicide film by the method, W silicide film by the thermal CVD method using WF ₆ + SiH ₄ gas, or TiCl ₄
A Ti silicide film can be selectively formed by a thermal CVD method using + SiH ₄ gas.

In order to increase the film forming speed, a plasma CVD method can be used instead of the thermal CVD method. (3) Third Embodiment FIGS. 7A to 7C are cross-sectional views illustrating a method of manufacturing a TFT active matrix LCD including a method of manufacturing an inverted staggered TFT according to a third embodiment of the present invention. It is.

First, through a process similar to that shown in FIGS. 4A to 4C, a channel made of a silicon oxide film (insulating film) is formed on the channel region layer of the a-Si film 54 by patterning based on the resist pattern 56a. A protective film 55a is formed.
In the drawing, 51 is a transparent substrate, 52 is a gate electrode 52 selectively formed on the transparent substrate 51, 53 is a gate insulating film covering the gate electrode 52, 54 is a gate insulating film 53
This is an a-Si film to be an operating semiconductor layer formed thereon (FIG. 7A).

Next, after removing the resist pattern 55a, the transparent substrate (base) 51 is introduced into the chamber 71 shown in FIG. 8A, and is held in the holder 75 as one electrode. Subsequently, the pressure in the chamber 71 is reduced, and the transparent substrate 51 is heated by a heater to maintain the temperature at 250 ° C. Subsequently, while irradiating the a-Si film 54 with light having a wavelength of 800 nm or less, as shown in FIG. 8B, H2 gas is constantly supplied and SiH4 and PH3 gases are introduced (first period; t1) 5 seconds / stop period (second period; t2) 40
It is intermittently introduced into the chamber 71 at a cycle (tc) of seconds,
The pressure is maintained at 0.3 Torr. Subsequently, when a power of 60 W is applied between the electrodes (one electrode and the other electrode) 75 and 76 to convert the mixed gas into plasma, a phosphorus-doped n + -type amorphous silicon film (hereinafter a-Si film) is formed. (This is referred to as (second semiconductor film).) 61a and 61b start to be formed.
At this time, a large number of conductive carriers are generated in the a-Si film 54 due to light irradiation, and the conductivity is increased. Therefore, the a-Si film 61 is formed on the a-Si film 54 during the introduction period (t1) of 20 seconds.
Although a and 61b are formed smoothly, conductive carriers are not generated in the insulating channel protective film 55a, so that an a-Si film is hardly formed on the channel protective film 55a.
Even if a thin a-Si film is formed, it is etched by H2 gas plasma during the stop period (t2) of 40 seconds. Therefore, the a-Si films 61a and 61b are
It is selectively formed only on the Si film 54. This state is maintained for a predetermined time, and a film thickness of about 350
The n + -type a-Si films 61a and 61b are formed only on the a-Si film 54 (FIG. 7B).

Next, in order to form a source electrode and a drain electrode, the reduced pressure state in the chamber 71 shown in FIG. 8A is maintained, and the MoF is kept in the chamber 71 while the temperature of the transparent substrate 51 is maintained at 250 ° C. ₆ + Ar gas is introduced,
The pressure is maintained at 0.1 Torr. At this time, the active species containing Mo thermally decomposed include the n ⁺ -type a-Si films 61a and 61b.
On the surface of the channel protection film 55a, the electrons are not absorbed because they are insulative, whereas the electrons are absorbed by the movement of the electrons because of the high conductivity. As a result, Mo films 62a and 62b having a thickness of about 1000.degree. Are formed only on the a-Si films 61a and 61b with the channel protection film 55a interposed therebetween, in a self-aligned manner with the gate electrode 52 and selectively ( FIG.
(C)).

Subsequently, the Mo films 62a, 62b / a-Si films 61a, 61b / a-Si film 54 are etched and removed by dry etching using CCl ₄ gas using a resist pattern (not shown) as a mask. A source electrode and a drain electrode made of a Si film / Mo film are formed, and a
When an operation semiconductor layer made of a -Si film is formed, a TFT is completed.

Next, an active matrix LCD having an inversely staggered TFT is completed through steps similar to those shown in FIGS. 6 (f) and 6 (g). As described above, according to the third embodiment of the present invention, the a-S film is selectively and self-aligned on the a-Si film 54 exposed on both sides of the channel protection film 55a.
Since the i film 61a / Mo film 62a and the a-Si film 61b / Mo film 62b are formed, the source can be surely provided adjacent to the channel protection film 55a without providing an overlapping region on the channel protection film 55a. An electrode and a drain electrode can be formed. Thus, the width of the gate electrode 52 can be reduced to a necessary minimum to reduce the parasitic capacitance.

When the a-Si film 61a and the a-Si film 61b are formed, the ion implantation is performed in order to increase the conductivity of the a-Si film 54, as compared with the second embodiment. In the third embodiment, the process is simplified because the light is merely applied to increase the conductivity of the a-Si film 54.

[0069]

As described above, according to the method of manufacturing a thin film transistor according to the present invention, a so-called staggered T-type TFT is manufactured.
When forming an FT, first, after forming a first conductor film forming a source electrode and a drain electrode, the first conductive film is formed.
A film containing a first conductive material is selectively formed on the conductive film, and an upper first semiconductor film is selectively formed on a film containing the first conductive material. Therefore, unlike the conventional case, overhang does not occur at the opposite ends of the source electrode and the drain electrode, so that disconnection of the operating semiconductor layer can be prevented. Further, since the underlying first conductive film is covered to the end with the first semiconductor film and is not exposed, abnormal growth of the active semiconductor layer can be prevented.

Second, a film containing the first conductive material is formed on the first conductive film to improve the contact property, and further, selectively on the film containing the first conductive material, In addition, since the first semiconductor film is formed continuously,
To prevent intervening contaminants such as resist residues between the film containing the conductive material and the first semiconductor film.
It is possible to prevent contact failure between the first conductor film and the first semiconductor film forming the source electrode and the drain electrode.

In the case of a so-called inverted staggered thin film transistor, the first conductor film is formed selectively and self-aligned on the first semiconductor film exposed on both sides of the channel protective film. Therefore, the first conductor film can be reliably formed adjacent to the channel protective film without providing an overlapping region on the channel protective film. As a result, the width of the gate electrode can be reduced to a necessary minimum to reduce the parasitic capacitance.

[Brief description of the drawings]

FIG. 1 is a diagram (part 1) illustrating a method of manufacturing a TFT active matrix LCD including a method of manufacturing a staggered TFT according to a first embodiment of the present invention.

FIG. 2 is a diagram (part 2) for explaining the method of manufacturing the TFT active matrix LCD including the method of manufacturing the staggered TFT according to the first embodiment of the present invention.

FIG. 3 is a diagram (part 3) for explaining the method of manufacturing the TFT active matrix LCD including the method of manufacturing the staggered TFT according to the first embodiment of the present invention;

FIG. 4 is a view (No. 1) for explaining a method of manufacturing a TFT active matrix LCD including a method of manufacturing an inverted staggered TFT according to a second embodiment of the present invention.

FIG. 5 is a diagram (part 2) for explaining the method of manufacturing the TFT active matrix LCD including the method of manufacturing the inverted staggered TFT according to the second embodiment of the present invention.

FIG. 6 is a diagram (part 3) for explaining the method of manufacturing the TFT active matrix LCD including the method of manufacturing the inverted staggered TFT according to the second embodiment of the present invention.

FIG. 7 is a sectional view illustrating a method of manufacturing a TFT active matrix LCD including a method of manufacturing an inverted staggered TFT according to a third embodiment of the present invention.

FIG. 8 is a diagram illustrating a configuration and a driving method of a film forming apparatus used in an embodiment of the present invention.

FIG. 9 is a view (No. 1) for explaining a method of manufacturing a TFT active matrix LCD including a method of manufacturing a staggered TFT of a first conventional example.

FIG. 10 is a diagram (part 2) for explaining the method of manufacturing the TFT active matrix LCD including the method of manufacturing the staggered TFT of the first conventional example.

FIG. 11 is a cross-sectional view illustrating a problem of the first conventional example.

FIG. 12 is a sectional view for explaining another problem of the first conventional example.

FIG. 13 is a view (No. 1) explaining a method of manufacturing a TFT active matrix LCD including a method of manufacturing a second conventional inverted staggered TFT.

FIG. 14 is a diagram (part 2) for describing the method of manufacturing the TFT active matrix LCD including the method of manufacturing the inverted staggered TFT of the second conventional example.

FIG. 15 is a sectional view illustrating a problem of the second conventional example.

[Explanation of symbols]

31 transparent substrate, 32 light shielding film, 33, 18 insulating film,
34 substrate (first substrate), 35, 35a, 35b ITO
Film (first conductive film), 35c, 58 pixel electrode, 36,
42, 56a resist pattern, 37a, 37b, 37c, 37
d Mo film (film containing a first conductive material), 38a, 38
b, 38c, 38da a-Si film (first semiconductor film), 39
a-Si film, 39a, 54e Operating semiconductor layer, 40 silicon nitride film (insulating film), 40a, 53 gate insulating film, 4
1 Al film, 41a, 52 Gate electrode, 41b, 52a Gate bus line, 43a, 57c Source electrode, 43b, 57d
Drain electrode, 44 silicon oxide film, 44a opening, 45, 59 drain bus line, 46, 60 liquid crystal layer, 51 transparent substrate (first substrate), 54 a-Si
Film (first semiconductor film), 54a, 54b conductivity type impurity introduction layer, 54c, 54d conductivity type region layer, 55 silicon oxide film (insulating film), 55a channel protection film, 56 resist film, 57a, 57b Mo film ( First conductive film), 61a, 61
Ba-Si film (second semiconductor film), 62a, 62b Mo
Film (second conductive film), 63a, 63b first conductive film,
71 chamber, 72 gas inlet, 74 exhaust, 7
5 electrodes (one electrode; holder), 76 electrodes (other electrodes), 77 power supply.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroshi Takizawa 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Within Fujitsu Limited (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21 / 336 H01L 21/28 H01L 29/40

Claims (16)

(57) [Claims] 1. A source electrode and a drain electrode which are opposed to each other at a predetermined interval on a first base, and are connected to opposite ends of the source electrode and the drain electrode. A method for manufacturing a thin film transistor, comprising: an operating semiconductor layer formed on a substrate; a gate insulating film on the operating semiconductor layer; and a gate electrode on the gate insulating film, wherein a first conductive film is formed on the first substrate. After forming the body film, patterning and leaving the first conductor film so as to face each other while maintaining a predetermined interval; and exposing the first conductor film to a gas containing a conductive substance. Selectively forming a film containing a first conductive material on the first conductive film by using the above method, and selectively forming a first semiconductor film on the film containing the first conductive material. The source electrode and the drain A method for manufacturing a thin film transistor, comprising a step of forming an in-electrode. 2. A method according to claim 1, wherein the first substrate on which the first conductive film is formed is exposed to a plasma-generated hydrogen gas while maintaining the temperature of the first substrate at 230 ° C. or lower, and then continuously without being exposed to the atmosphere. 2. The method according to claim 1, wherein a film containing the first conductive material is selectively formed on the first conductive film. 3. The film containing the first conductive material is a film containing at least one of tungsten, molybdenum, aluminum, titanium and tantalum, and thermally activates a gas containing the conductive material. 3. The method according to claim 1, wherein a thermal chemical vapor deposition method for forming a film by forming a film is used, or a plasma chemical vapor deposition method for forming a film by electrically activating the gas containing the conductive material. A method for manufacturing the thin film transistor according to the above. 4. The first semiconductor film is formed by applying a voltage from a power supply between one electrode holding the first base and another electrode and using a reaction gas which is turned into plasma. A first period of exposure to a gas containing silicon which has been formed into a silicon film, and hydrogen (H
₂ ) alternately performing a second period of exposing to a gas containing at least one of helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe). 4. The method according to claim 1, wherein the silicon film is formed. 5. In the first period, the one electrode is connected to a ground side, and the other electrode is connected to a power supply side. In the second period, the one electrode is connected to the power supply side. 5. The method for manufacturing a thin film transistor according to claim 4, wherein the other electrode is connected to a ground side while being connected to the ground. 6. An operating semiconductor layer comprising a gate electrode on a first substrate, a gate insulating film covering the gate electrode, and a first semiconductor film formed on the gate insulating film above the gate electrode. A channel protection film made of an insulating film covering a channel region layer of the operation semiconductor layer, and a source electrode and a drain electrode made of a first conductor film connected to the operation semiconductor layer on both sides of the channel protection film. A method of manufacturing a thin film transistor, comprising: after forming a channel protection film on the first semiconductor film, forming the first conductor film on the first semiconductor film exposed on both sides of the channel protection film. A method for manufacturing a thin film transistor, which is selectively formed. 7. After forming a channel protection film on the first semiconductor film, selectively forming the first conductor film on the first semiconductor film exposed on both sides of the channel protection film. 7. The method according to claim 6, wherein a conductive impurity is introduced into the first semiconductor film before performing the method. 8. The method according to claim 6, wherein the first conductive film is selectively formed while irradiating the first semiconductor film with light. 9. The first conductive film is any one of a tungsten film, a molybdenum film, a titanium film, and an aluminum film, and heat-activates a gas containing the conductive material to form a film. 9. The thin film transistor according to claim 6, wherein a chemical vapor deposition method or a plasma chemical vapor deposition method of electrically activating the gas containing the conductive substance to form a film is used. Manufacturing method. 10. The method according to claim 6, wherein the first conductive film is a film including a second semiconductor film. 11. The first conductive film is a two-layer film of a second semiconductor film / a second conductive film. After forming a channel protective film on the first semiconductor film,
The second semiconductor film is selectively formed on the first semiconductor film on both sides of the channel protection film, and thereafter, the second semiconductor film is exposed to a gas containing a conductive substance to form the channel protection film. The second conductor film is selectively formed on the second semiconductor films on both sides, and two layers of the second semiconductor film / the second conductor film connected to the first semiconductor film are formed. 11. The method according to claim 10, wherein a source electrode and a drain electrode made of a film are formed. 12. The first conductor film is a two-layer film of a film containing a first conductive material / a second semiconductor film, and a channel protection film is formed on the first semiconductor film. After doing
By exposing the first semiconductor film to a gas containing a conductive substance, the first semiconductor film is formed on the first semiconductor film on both sides of the channel protective film.
Forming a film containing a conductive material, and then selectively forming a second semiconductor film on the film containing the first conductive material, and connecting the first semiconductor film to the first semiconductor film. 11. The method of manufacturing a thin film transistor according to claim 10, wherein a source electrode and a drain electrode comprising a film containing a conductive material and a second semiconductor film are formed. 13. The method according to claim 1, further comprising: exposing the first substrate on which the film containing the first conductive material is formed to hydrogen gas which has been converted into plasma; 13. The method according to claim 12, wherein the second semiconductor film is formed on a film containing: 14. The film containing the first conductive material is a film containing at least one of tungsten, molybdenum, titanium and aluminum, and thermally activates a gas containing the conductive material. 14. The method according to claim 12, wherein a thermal chemical vapor deposition method for forming a film by a plasma chemical vapor deposition method for forming a film by electrically activating a gas containing the conductive material is used. Method for manufacturing thin film transistor. 15. The second semiconductor film is formed by applying a voltage from a power supply between one electrode holding the first base and another electrode and using a reaction gas which is turned into plasma. A first silicon film formed by connecting the one electrode to a ground side and exposing the film to a gas containing silicon which has been turned into plasma;
And the one electrode is connected to the power supply side, and hydrogen (H ₂ ), helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe) are turned into plasma. 2. The silicon film is formed by alternately performing a second period of exposing to a gas containing at least one of the above.
5. The method for manufacturing a thin film transistor according to any one of 4. 16. In the first period, the one electrode is connected to a ground side, and the other electrode is connected to a power supply side. In the second period, the one electrode is connected to the power supply side. 17. The method according to claim 15, wherein the other electrode is connected to a ground side while connecting to the ground.