JPH10290012A - Active matrix liquid crystal display unit and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the optical effect on transistor performance and the disconnection of the top electrode and increase the yield. SOLUTION: Firstly, a bottom gate electrode 1 and a gate bus line 2 are formed by forming and patterning a metallic film 102 on an insulating substrate 101. Next, after the formation of an insulating film, a drain electrode 3, a drain bus line 4 and a source electrode 5 are formed by forming and patterning another metallic film 102'. Later, an island 6 is formed by forming and patterning a semiconductor film 104 and an insulating film 105. Next, after the formation of the insulating films, a contact hole 7 for conducting bottom gate electrode and top gate electrode and a contact hole 7' for conducting source electrode and picture element are formed by patterning the insulating film. Finally, a top gate electrode 9 and a picture element electrode 8 are formed by forming and patterning a transparent film 106.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an active matrix type liquid crystal display device and a method of manufacturing the same.
The present invention relates to an active matrix type liquid crystal display device using a dual-gate thin film transistor as a switching element and a method for manufacturing the same.

[0002]

2. Description of the Related Art Thin-film transistors having a dual-gate structure are intended to improve transistor characteristics, and some thin-film transistors have already been proposed. For example, FIGS. 6 to 12 show an active matrix liquid crystal display device (hereinafter referred to as a first conventional example) using a thin film transistor having a dual gate structure as a switching element disclosed in Japanese Patent Application Laid-Open No. 2-304532. These are shown in the order of the manufacturing process. In each figure, (a) is a plan view,
(B) is a sectional view taken along line AA 'in (a),
(C) is a sectional view taken along line BB 'in (a).

FIG. 6 shows a first step, in which an indium-tin oxide film (hereinafter referred to as IT) is formed on a transparent insulating substrate 101 made of glass or the like by sputtering.
O) and the like.
Patterning into the shape of the pixel electrode 8 is performed by a photolithography process using 07 and an ITO wet etch.

FIG. 7 shows the second step, and the first step is shown in FIG.
A metal film 102 such as chromium (hereinafter, referred to as Cr) formed by sputtering on the substrate after the step
The bottom gate electrode 1 is formed by a photolithography process using the photoresist 107 and Cr wet etching.
And the gate bus line 2 and the contact portion 10 connected to it are patterned.

FIG. 8 shows a third step.
Plasma CVD (Chemical Chemical)
An insulating film 103 such as silicon nitride (hereinafter referred to as SiN), a semiconductor film 104 such as amorphous silicon (hereinafter referred to as a-Si), and n formed by a vapor deposition method.
N such as amorphous silicon (hereinafter referred to as n ⁺ a-Si)
The pattern semiconductor film 104 ′ is patterned into the shape of the island 6 by a photolithography process using the photoresist 107 and n ⁺ a-Si / a-Si dry etching.

FIG. 9 shows a fourth step.
The contact hole 7 is formed by a photolithography process using the photoresist 107 and a SiN dry etch on the substrate on which the process has been completed.

FIG. 10 shows a fifth step. On the substrate after the fourth step, a metal film 102 'such as Cr formed by sputtering is applied to the photoresist 10
By a photolithography process using Cr and a wet etching of Cr, the drain electrode 3 and the drain bus line 4 connected to the drain electrode 3 and the source electrode 5 are patterned.

FIG. 11 shows a sixth step, in which the n ⁺ a-Si between the drain electrode 3 and the source electrode 5 of the substrate after the fifth step is removed by n ⁺ a-Si dry etching ( Hereinafter, it will be referred to as a channel etch).
After forming an insulating film 105 such as SiN by D, a photolithography process using a photoresist 107 and S
A contact hole 7 'is formed by iN dry etching.

FIG. 12 shows a seventh step. On the substrate after the sixth step, a metal film 102 ″ of Cr or the like formed by sputtering is applied to the photoresist 10
7 is patterned into a shape of the top gate electrode 9 by a photolithography process using 7 and Cr wet etching.

In summary, in order to manufacture the first conventional thin film transistor, the patterning step of the pixel electrode 8, the bottom gate electrode 1, the gate bus line 2,
Patterning process of contact part 10, island 6
Patterning step, contact hole 7 forming step, drain electrode 3, drain bus line 4, source electrode 5 patterning step, contact hole 7 'forming step, top gate electrode 9 patterning step,
7 photolithography steps are required. Thus, if the number of photolithography steps is large,
Not only is the cost increased simply due to the amount of indirect members such as photomasks and the number of man-hours required to use the exposure apparatus and the like, but also the yield is reduced, and the production cost is greatly increased.

Another problem caused by the structure is that the gate bus line 2 and the pixel electrode 8 cannot be overlapped with each other because the gate bus line 2 and the pixel electrode 8 are formed without interposing an insulating film. This limits the increase in the aperture ratio.

As a method of compensating for the drawback of the first conventional example, Japanese Patent Application Laid-Open No. 5-53147 discloses a method in which the number of photolithography steps is reduced and the pixel electrodes, gate bus lines and drain bus lines are formed by insulating films. A manufacturing method for manufacturing a thin film transistor having a dual gate structure by separating layers (hereinafter referred to as a second conventional example) is disclosed.

13 to 17 show a second conventional active matrix type liquid crystal display device in the order of manufacturing steps. In each figure, (a) is a plan view, (b)
3A is a cross-sectional view taken along line AA ′ in FIG. 3A, and FIG. 3C is a cross-sectional view taken along line BB ′ in FIG.

FIG. 13 shows a first step, in which a metal film 102 of Cr or the like formed by sputtering on a transparent insulating substrate 101 made of glass or the like is subjected to a photolithography step using a photoresist 107. Cr
The bottom gate electrode 1 and the gate bus line 2 connected thereto are patterned by wet etching.

FIG. 14 shows a second step, in which an insulating film 103 such as SiN, a semiconductor film 104 such as a-Si, and the like are formed on the substrate after the first step by a plasma CVD method. An n-type semiconductor film 104 'such as n ⁺ a-Si
The islands 6 are patterned by a photolithography process using the photoresist 107 and n ⁺ a-Si / a-Si dry etching.

FIG. 15 shows a third step, in which a metal film 102 'of Cr or the like formed by sputtering is applied to the photoresist 10 on the substrate after the completion of the second step.
The drain electrode 3, the drain bus line 4 connected to the drain electrode 3, and the source electrode 5 are patterned by a photolithography process using Cr and wet etching of Cr.

FIG. 16 shows a fourth step. The substrate after the third step is subjected to channel etching, and an insulating film 105 such as SiN is formed by plasma CVD. By using the photolithography process and the SiN dry etching, the contact hole 7 and the opening at the place where the pixel electrode is to be formed are formed.

FIG. 17 shows a fifth step, in which a transparent conductive film 106 such as ITO formed by sputtering on the substrate after the fourth step is subjected to a photolithography step using a photoresist 107. And a pattern of the pixel electrode 8 and the top gate electrode 9 by the wet etching of ITO.

[0019]

However, each of the above-mentioned prior arts has the following problems. The first problem is that in the case of the first conventional example (JP-A-2-304532), the cost increases. The reason is that in order to manufacture the first conventional thin film transistor, a pixel electrode patterning step, a bottom gate electrode, a gate bus line, a contact section patterning step, an island patterning step, a contact hole forming step,
This is because seven photolithography steps of a patterning step of a drain electrode, a drain bus line and a source electrode, a step of forming a contact hole, and a step of patterning a top gate electrode are required. If the number of photolithography steps is large, not only increase in the amount of indirect members such as a photomask and the number of man-hours for using an exposure apparatus and the like, but also a decrease in yield, etc. In order to get up.

The second problem is that in the case of the first conventional example, there is a limitation on increasing the aperture ratio of the liquid crystal display device. The reason is that since the gate bus line and the pixel electrode are formed without the interposition of the insulating film, a structure in which the gate bus line and the pixel electrode overlap cannot be provided.

A third problem is that in the case of the second conventional example, disconnection of the top gate electrode easily occurs. The reason for this is that the second conventional example has an inverted staggered structure, and it is necessary to increase the thickness of the semiconductor film serving as an island to several thousand Å due to a variation margin of channel etching.
Therefore, the top gate electrode has a structure having a large step due to the step of the island, and the step of the top gate electrode is likely to be disconnected. In addition, ITO has poor workability by wet etching, and it is difficult to form a film having a thickness of 1000 ° or more.

A fourth problem is that in the case of the second conventional example, the transistor performance is easily affected by light. The reason is that in the second conventional example, a transparent conductive film is used for the top gate electrode, so that the structure above the transistor is not shielded from light. Therefore, light from above the transistor causes a large leak current when the transistor is off.

A fifth problem is that in the case of the second conventional example, disconnection of the drain bus line is likely to occur. This is because in the second conventional example, the step of forming the drain bus lines is performed after the island forming step, that is, after the plasma CVD step that generates a large amount of particles. Therefore, disconnection of the drain bus line particularly easily occurs due to particles attached during the plasma CVD process.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. In an active matrix type liquid crystal display device using a thin film transistor having a dual gate structure as a switching element and a method of manufacturing the same, the number of photolithography steps is reduced. It is an object to improve yield and performance by improving the structure of a thin film transistor without increasing it.

[0025]

In order to achieve the above object, an active matrix type liquid crystal display device according to the present invention comprises a bottom gate electrode formed on an insulating substrate and a gate bus line connected to the bottom gate electrode. A first insulating film covering the bottom gate electrode and the gate bus line;
A drain electrode formed on the insulating film, a drain bus line and a source electrode connected thereto, and a semiconductor film and a second insulating film formed from the lower layer side so as to overlap at least a part of the drain electrode and the source electrode. , A third insulating film covering the island, a top gate electrode and a pixel electrode made of a transparent conductive film formed on the third insulating film, and a bottom gate electrode and a top gate electrode. Are electrically connected via a contact hole, and the source electrode and the pixel electrode are electrically connected via the contact hole.

Further, according to the method of manufacturing an active matrix type liquid crystal display device of the present invention, a conductive film is formed on an insulating substrate, and then the conductive film is patterned to form a bottom gate electrode and a gate connected thereto. Forming a bus line, forming a first insulating film covering the bottom gate electrode and the gate bus line, forming a conductive film on the first insulating film, and patterning the conductive film. Thereby forming a drain electrode and a drain bus line and a source electrode connected to the drain electrode and a semiconductor film and a second insulating film sequentially on the drain electrode and the source electrode. Forming an island overlapping at least a part of the drain electrode and the source electrode by patterning the second insulating film; By forming a third insulating film covering the land and patterning the third insulating film and the insulating film thereunder, a contact hole for bottom gate electrode-top gate electrode conduction and a source electrode-pixel electrode conductive film are formed. Forming a common contact hole at the same time; forming a transparent conductive film on the third insulating film; and patterning the transparent conductive film to form a top gate electrode electrically connected to the bottom gate electrode. Forming a pixel electrode electrically connected to the source electrode,
It is characterized by having. In the above-described manufacturing method, when forming the semiconductor film and the second insulating film, a phosphine plasma treatment and a plasma C
The VD method can be used.

In order to realize a high aperture ratio and shorten the manufacturing process, it is effective to form a pixel electrode on the uppermost layer as a basic structure of a liquid crystal display device. Further, in order to increase the on-state current and decrease the off-state current of the transistor, it is effective to adopt a dual gate structure. Therefore, the point of the technology is how to form a thin film transistor with high yield and secure the characteristics by using the same thin transparent conductive film as ITO as the pixel electrode for the top gate electrode. Therefore, the following describes how this object can be achieved with the configuration of the present invention.

Since the thin film transistor of the present invention basically has a forward stagger structure, the thickness of the semiconductor film serving as an island can be reduced to several hundreds of mm. Therefore, disconnection of the top gate due to the step of the island can be prevented, and the yield can be improved.

In general, when light is irradiated to a semiconductor film, holes and electrons are generated, which causes a leak current when the transistor is turned off. However, when the thickness of the semiconductor film is reduced, the distance between the front channel and the back channel becomes shorter, and holes and electrons generated by light recombine with defects in the back channel portion, and thus disappear. Therefore, an increase in leakage current due to light when the transistor is off can be prevented, and normal transistor characteristics can be maintained without a light-shielding film over the transistor. Further, since the semiconductor device has a dual gate structure, a reduction in leakage current by inverting the entire semiconductor film can be expected.

Further, in the manufacturing method of the present invention, the gate bus line and the drain bus line are formed before the plasma CVD process that generates a large amount of particles. Therefore, the disconnection of the bus line due to particles in the plasma CVD process is eliminated, and the disconnection rate of the bus line is greatly reduced. As a result, the effect of improving the yield can be obtained.

[0031]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. 1 to 5 show a part of an active matrix substrate circuit (active matrix type liquid crystal display device) using a thin film transistor having a dual gate structure as a switching element according to the present embodiment in the order of manufacturing steps. In each figure, (a)
3A is a plan view, FIG. 3B is a cross-sectional view taken along line AA ′ in FIG. 3A, and FIG. 3C is a cross-sectional view taken along line BB ′ in FIG.

FIG. 1 shows a first step, in which a metal film 1 made of Cr or the like and having a thickness of 1500 ° is formed on a transparent insulating substrate 101 made of a glass substrate or the like by sputtering.
After the formation of 02 (conductive film), patterning is performed by a photolithography process using the photoresist 107 and Cr wet etching to form the bottom gate electrode 1 and the gate bus line 2 connected thereto.

FIG. 2 shows the second step, and FIG.
On the substrate having been subjected to the step (3), an insulating film 103 made of silicon oxide or the like and having a thickness of 3000.degree.
After that, a 1500 ° -thick metal film 102 ′ (conductive film) made of Cr or the like is formed by sputtering, and patterned by a photolithography process using a photoresist 107 and a Cr wet etch. An electrode 3 and a drain bus line 4 and a source electrode 5 connected thereto are formed.

FIG. 3 shows the third step.
Is completed by a phosphine (PH ₃ ) plasma treatment and a plasma CVD method, a 500 ° -thick semiconductor film 104 made of a-Si or the like, and a 500 ° -thick insulating film 105 made of SiN or the like (the second film). An insulating film is formed, and is patterned by a photolithography process using a photoresist 107 and a SiN / a-Si dry etch to form an island 6.

FIG. 4 shows the fourth step.
Is completed by plasma CVD on the substrate after the step
An insulating film 105 ′ made of iN or the like and having a thickness of 2500
Is formed, and is patterned by a photolithography process using the photoresist 107 and a SiN dry etch, and is formed in the next step with the bottom gate electrode 1, the top gate electrode formed in the next step, and the source electrode 5. Contact holes 7 for electrically connecting the pixel electrodes are formed.

FIG. 5 shows the fifth step.
On the substrate where the process of
After forming a transparent conductive film 106 having a thickness of 500 ° such as O,
It is patterned by a photolithography process using a photoresist 107 and an ITO wet etch, and is electrically connected to the pixel electrode 8 electrically connected to the source electrode 5 through the contact hole 7 and the bottom gate electrode 1 through the contact hole 7. A top gate electrode 9 which is electrically connected is formed.

As described above, according to the present embodiment, the patterning step of the bottom gate electrode 1 and the gate bus line 2, the patterning step of the drain electrode 3, the drain bus line 4 and the source electrode 5, the patterning step of the island 6, 5 of forming a contact hole 7 and patterning a pixel electrode 8 and a top gate electrode 9
A thin film transistor can be manufactured in a single photolithography process. Therefore, the number of photolithography steps is reduced as compared with the case of Conventional Example 1, the amount of indirect members such as a photomask, the number of steps of using an exposure apparatus and the like are reduced, the yield is improved, and the manufacturing cost is reduced. can do.

Further, the structure of the thin film transistor of this embodiment is different from that of the conventional example 1 in that the gate bus line 2
Since the pixel bus 8 and the pixel electrode 8 are formed with the insulating film 103 interposed therebetween, the gate bus line 2 and the pixel electrode 8 can be overlapped, and a high aperture ratio can be achieved.

Since the semiconductor film 104 serving as the island 6 can be thinned to several hundreds of mm (500 mm in the present embodiment) because of the forward stagger structure, the step of the top gate electrode 9 becomes smaller than before. In addition, the probability of occurrence of disconnection of the top gate electrode 9 is reduced. In addition, since the gate bus line 2 and the drain bus line 4 are formed before the plasma CVD process that generates a large amount of particles, the occurrence of disconnection of the bus line due to the particles can be suppressed. As a result, the yield can be improved. When 400 liquid crystal panels were actually manufactured by trial using the manufacturing method of the present embodiment, no disconnection of the top gate electrode occurred, and the disconnection of the gate bus line and the drain bus line was 2 panels each. As a result, it was confirmed that the number of defective panels was four, which was sufficiently reduced as compared with the conventional defect occurrence rate of 2 to 4%.

Further, in the structure of the present embodiment, the top gate electrode 9 is also formed of the same transparent conductive film 106 of ITO or the like as the pixel electrode 8, so that the transistor is not shielded from light. With this function, the leakage current when the transistor is turned off is suppressed, and stable transistor performance that is hardly affected by light can be exhibited.

The technical scope of the present invention is not limited to the above embodiment, and various changes can be made without departing from the spirit of the present invention. For example, the type and thickness of each film used for a thin film transistor, the manufacturing conditions in each process, and the like are not limited to those described in this embodiment, and can be appropriately adopted.

[0042]

As described above, according to the present invention, the following effects can be obtained. The first effect is that the disconnection of the top gate electrode can be reduced, and the yield is improved. The reason is that the semiconductor film serving as an island can be reduced in thickness to about several hundreds of mm by using the forward stagger structure.

A second effect is that the effect of light on transistor performance can be reduced. This is also because, as in the case of the first effect, the forward stagger structure can reduce the thickness of the semiconductor film serving as an island to about several hundreds of mm. Normally, when light is applied to a semiconductor film, holes and electrons are generated, which causes a leak current when the transistor is off. However, when the thickness of the semiconductor film is reduced, the distance between the front channel and the back channel becomes shorter, and holes and electrons generated by light recombine with defects in the back channel portion, and thus disappear. Therefore, an increase in leakage current due to light when the transistor is off can be prevented.

The third effect is that the disconnection rate of the gate bus line and the drain bus line can be reduced, and the yield is improved. The reason is that the gate bus line and the drain bus line are formed before the plasma CVD process that generates a large amount of particles. Therefore, disconnection of the bus line due to particles in the plasma CVD process is eliminated.

In the present invention, these effects can be obtained, and as a result, it is possible to realize an improvement in yield, an improvement in characteristics and a reduction in manufacturing cost in an active matrix type liquid crystal display device.

[Brief description of the drawings]

FIG. 1A is a plan view showing a state during a first step in a method of manufacturing an active matrix liquid crystal display device according to an embodiment of the present invention, and FIG. 1B is a line AA ′ in FIG. A cross-sectional view along line BB ′ of (c) and (a),
It is.

2A is a plan view showing a state in a second step, FIG. 2B is a cross-sectional view taken along line AA ′ in FIG. 2A, FIG.
It is sectional drawing which follows the BB 'line of (a).

FIG. 3A is a plan view showing a state in a third step, FIG. 3B is a cross-sectional view taken along line AA ′ in FIG.
It is sectional drawing which follows the BB 'line of (a).

4A is a plan view showing a state in a fourth step, FIG. 4B is a cross-sectional view taken along the line AA ′ in FIG. 4A, FIG.
It is sectional drawing which follows the BB 'line of (a).

5A is a plan view showing a state in a fifth step, FIG. 5B is a cross-sectional view taken along the line AA ′ in FIG. 5A, FIG.
It is sectional drawing which follows the BB 'line of (a).

6A is a plan view showing a state in a first step in a method of manufacturing a first conventional active matrix liquid crystal display device, and FIG. 6B is a plan view taken along line AA ′ of FIG. It is sectional drawing, (c) It is sectional drawing which follows the BB 'line of (a).

FIG. 7A is a plan view showing a state in a second step, FIG. 7B is a cross-sectional view taken along the line AA ′ in FIG.
It is sectional drawing which follows the BB 'line of (a).

8A is a plan view showing a state in a third step, FIG. 8B is a cross-sectional view taken along the line AA ′ in FIG. 8A, FIG.
It is sectional drawing which follows the BB 'line of (a).

FIG. 9A is a plan view showing a state in a fourth step, FIG. 9B is a cross-sectional view taken along the line AA ′ in FIG.
It is sectional drawing which follows the BB 'line of (a).

FIG. 10A is a plan view showing a state in a fifth step, FIG. 10B is a cross-sectional view taken along the line AA ′ of FIG.
It is sectional drawing which follows the BB 'line of (a).

FIG. 11A is a plan view showing a state in a sixth step, FIG. 11B is a cross-sectional view taken along the line AA ′ in FIG.
It is sectional drawing which follows the BB 'line of (a).

12A is a plan view showing a state in a seventh step, FIG. 12B is a cross-sectional view taken along the line AA ′ in FIG. 12A, FIG.
It is sectional drawing which follows the BB 'line of (a).

13A is a plan view showing a state of a first step in a method of manufacturing a second conventional active matrix liquid crystal display device, and FIG. 13B is a plan view taken along line AA ′ in FIG. 13A. It is sectional drawing, (c) It is sectional drawing which follows the BB 'line of (a).

14A is a plan view showing a state in a second step, FIG. 14B is a cross-sectional view taken along the line AA ′ in FIG. 14A, FIG.
It is sectional drawing which follows the BB 'line of (a).

FIG. 15A is a plan view showing the state at the time of the third step, FIG. 15B is a cross-sectional view taken along the line AA ′ of FIG.
It is sectional drawing which follows the BB 'line of (a).

16A is a plan view showing a state in a fourth step, FIG. 16B is a sectional view taken along the line AA ′ in FIG. 16A, FIG.
It is sectional drawing which follows the BB 'line of (a).

17A is a plan view showing a state in a fifth step, FIG. 17B is a cross-sectional view taken along the line AA ′ in FIG. 17A, FIG.
It is sectional drawing which follows the BB 'line of (a).

[Explanation of symbols]

Reference Signs List 1 bottom gate electrode 2 gate bus line 3 drain electrode 4 drain bus line 5 source electrode 6 island 7, 7 'contact hole 8 pixel electrode 9 top gate electrode 10 contact portion 101 insulating substrate 102 metal film (for bottom gate, conductive film) 102 ′ metal film (for source / drain, conductive film) 102 ″ metal film (for top gate, conductive film) 103 insulating film (bottom gate insulating film, first insulating film) 104 semiconductor film 104 ′ n-type semiconductor film 105 Insulating film (1st top gate insulating film, second insulating film) 105 ′ Insulating film (2nd top gate insulating film, third insulating film) 106 Transparent conductive film 107 Photoresist

Claims (3)

[Claims] 1. An active matrix type liquid crystal display device using a dual-gate thin film transistor as a switching element, comprising: a bottom gate electrode formed on an insulating substrate; and a gate bus line connected to the bottom gate electrode. First covering the bottom gate electrode and the gate bus line
An insulating film, a drain electrode formed on the first insulating film, a drain bus line and a source electrode connected to the drain electrode, and a lower layer so as to overlap at least a part of the drain electrode and the source electrode. An island formed of a semiconductor film and a second insulating film, a third insulating film covering the island, a top gate electrode and a pixel electrode made of a transparent conductive film formed on the third insulating film, Wherein the bottom gate electrode and the top gate electrode are electrically connected via a contact hole, and the source electrode and the pixel electrode are electrically connected via a contact hole. Active matrix type liquid crystal display device. 2. A method for manufacturing an active matrix type liquid crystal display device using a thin film transistor having a dual gate structure as a switching element, comprising: forming a conductive film on an insulating substrate; Forming a gate electrode and a gate bus line connected to the bottom gate electrode; and a first step of covering the bottom gate electrode and the gate bus line.
Forming a conductive film on the first insulating film, and patterning the conductive film to form a drain electrode, a drain bus line connected to the drain electrode, and a source. Forming an electrode; a semiconductor film on the drain electrode and the source electrode;
Forming an island overlapping at least a part of the drain electrode and the source electrode by patterning the semiconductor film and the second insulating film after sequentially forming the insulating film, and a third step of covering the island. Forming a third insulating film and patterning the insulating film therebelow to form a bottom gate electrode-top gate electrode contact hole and a source electrode-pixel electrode conductive contact hole. Forming a transparent conductive film on the third insulating film and patterning the transparent conductive film to form a top gate electrode and the source electrically connected to the bottom gate electrode. Forming a pixel electrode electrically connected to the electrode. A method for manufacturing a display device. 3. The method for manufacturing an active matrix type liquid crystal display device according to claim 2, wherein a phosphine plasma treatment and a plasma CVD method are used when forming the semiconductor film and the second insulating film. A method for manufacturing an active matrix liquid crystal display device.