JP3047859B2 - Active matrix type liquid crystal display device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device using thin film transistors as switching elements and a method for manufacturing the same.

[0002]

2. Description of the Related Art Amorphous silicon, polycrystalline silicon, Cd
A thin film transistor using a semiconductor film such as Se has attracted attention as a switching element of an active matrix drive display device. FIGS. 4 and 5 show, as Conventional Example 1, an active matrix type liquid crystal display device (hereinafter, referred to as an LCD device) using a thin film transistor as a switching element proposed in Japanese Patent Application Laid-Open No. 6-160906 in the order of manufacturing steps. It is. (A) of each figure is a plan view,
(B) is a sectional view taken along the line AA in (a). FIG. 4 shows a first step, in which the insulating substrate 10
A transparent conductive film 103 such as indium tin oxide (hereinafter, ITO) is formed on the transparent insulating film 102 by sputtering, and the drain electrode 1 is formed by a photolithography process using a photoresist 105 and wet or dry etching. A drain bus line 2 connected to the drain electrode 1; a source electrode 3;
Is formed.

[0005] Next, as shown in FIG.
Plasma CVD (Chemical Vapor Deposit)
ion) method for non-crystalline (amorphous) silicon
semiconductor film 106 such as a-Si), silicon nitride (Si
N) or the like, and a low-resistance metal film 104 ′ such as chromium (Cr) by sputtering, and a gate electrode 5 by a photolithography process using a photoresist 105 and wet etching and dry etching.
A gate bus line 6 connected to the gate electrode 5 is formed, and an island 7 having the same shape as the gate electrode and the gate bus line is formed. Then, although not described, two photolithography steps are performed to form openings and passivation in the bonding pad portion.

In the prior art 1, the drain bus line 2
And the pixel electrode 4 are formed simultaneously in one photolithography step, so that the drain bus line 2 is connected to the pixel electrode 4
It should be formed of a transparent conductive film such as ITO, which is several tens of times higher in resistance than a metal film such as Cr (specific resistance of about 20 times in ITO / Cr). As a result, the resistance of the drain bus line is increased, making it difficult to operate the device at high speed. In addition, it is necessary to take measures such as enlarging the line width of the drain bus line. As a result, a larger screen and higher definition of the LCD device are required. It becomes difficult. To cope with this, a low-resistance conductive film may be formed only on the drain bus line. However, in this case, a photolithography process for selectively forming the low-resistance conductive film is increased, and This will lead to higher costs.

In order to solve such a problem, Japanese Patent Application No. 62-185924 proposes an LCD device in which the drain bus line is reduced in resistance without increasing the number of photolithography steps. 6 to 8 show a method of manufacturing the LCD device of the second conventional example in the order of manufacturing steps. In addition, (a) of each figure is a plan view, and (b) is
FIG. 3A is a cross-sectional view taken along line AA in FIG. FIG. 6 shows a first step, in which a transparent conductive film 103 such as ITO, a low-resistance metal film 104 such as Cr, and a plasma CVD are formed on a transparent insulating film 102 on an insulating substrate 101 by sputtering.
An n-type semiconductor film 106 ′ of n-type amorphous silicon (hereinafter, n ⁺ a-Si) or the like is formed by a
The drain electrode 1, the drain bus line 2 connected to the drain electrode 1, the source electrode 3, and the pixel electrode 4 connected to the source electrode 3 are formed by a photolithography process using Form.

Next, as shown in FIG. 7, a semiconductor film 106 such as a-Si and an insulating film 107 such as SiN are formed on the substrate by plasma CVD, and a low-resistance metal film such as Cr is formed by sputtering. A gate electrode 5, a gate bus line 6 connected to the gate electrode 5, and a connection with the gate bus line 6 are formed by photolithography using a photoresist 105 and wet and dry etching to form 104 ′. An unformed drain bus line cover 2 'is formed, and an island 7 having the same shape as the gate electrode, the gate bus line and the drain bus line cover 2' is formed. And as shown in FIG.
As described above, the n-type semiconductor film 106 'and the low-resistance metal film 104 on the pixel electrode 4 are removed by dry and wet etching before removing the photoresist (not shown) used in the formation.

[0007]

However, in the improved LCD device, since a low-resistance metal film is laminated on a transparent conductive film made of ITO, the resistance can be reduced. Since the drain bus line cover is formed so as to be cut at the intersection with the gate bus line, it is difficult to sufficiently reduce the resistance of the drain bus line.
As in the case (1), there is a problem in increasing the screen size and definition of the LCD device. Further, in the case of Conventional Example 2, since both the source / drain layer and the gate layer require a plasma CVD process in which a large amount of particles are generated, there are many occurrences of defects due to particles in the plasma CVD apparatus, and the quality is problematic. Tends to occur.

An object of the present invention is to provide an LCD having reduced wiring resistance without increasing the number of photolithography steps.
An object of the present invention is to provide an apparatus and a method of manufacturing the same.

[0009]

According to the present invention , a gate electrode and a gate electrode are formed on a drain bus line formed integrally with a drain electrode constituting a part of a thin film transistor as a switching element of an active matrix type LCD device.
Tobasurain drain bus line cover having a low resistance metal film formed integrally are formed, the drain bus lines cover the gate bus lines only are formed in a direction crossing the drain bus line at one end It is characterized by being connected. Also,
The drain electrode and the drain bus line constituting a part of the thin film transistor, and a source electrode opposed to the drain electrode are formed of a laminated film of a transparent conductive film and a first low-resistance metal film. A pixel electrode integrally formed with the transparent conductive film is formed only,
It is preferable that the gate electrode, the drain bus line cover, and the gate bus line are formed of a stacked film of a semiconductor layer, an insulating film, and a second low-resistance metal film.

Further, according to the manufacturing method of the present invention, a transparent conductive film and a first low-resistance metal film are sequentially formed on an insulating substrate, and the transparent conductive film and the first low-resistance metal film are patterned. Forming a drain electrode, a drain bus line connected to the drain electrode, a source electrode, and a pixel electrode connected to the source electrode, and forming a PH ₃ plasma treatment and a plasma CVD method on the substrate surface. Forming a semiconductor film, an insulating film, and a second low-resistance metal film sequentially, and selectively patterning the semiconductor film, the insulating film, and the second low-resistance metal film to form a gate electrode; and the gate bus line connected to, step a, the first low-resistance metal on the pixel electrode forming the only drain connected bus line cover at one end relative to the gate bus line Characterized in that it comprises a step of removing the film.

[0011]

Next, embodiments of the present invention will be described with reference to the drawings. 1 to 3 are views showing an embodiment of the LCD device of the present invention in the order of steps, wherein each figure (a) is a plan view, and (b) is a cross-sectional view taken along line AA of (a). .
FIG. 1 shows a first step in which silicon oxide (SiO 2) is formed on an insulating substrate 101 such as a glass substrate by sputtering.
₂ ) The transparent insulating film 102 is formed to a thickness of 1000 等, and a transparent conductive film 103 such as ITO is formed thereon to a thickness of 400 Å.
And a low and low anti-metal film 10 of Cr or the like thereon.
4 is sequentially formed to a thickness of 1400 °. Then, a photolithography process using the photoresist 105 and Cr
By dry etching and ITO dry etching, a drain electrode 1 having a laminated structure of the transparent conductive film 103 and the low resistance metal film 104, a drain bus line 2 connected to the drain electrode 1, a source electrode 3, and a source electrode The pixel electrode 4 connected to 3 is formed.

Next, as shown in FIG. 2, after performing a PH ₃ plasma treatment on the substrate after the first step, a semiconductor film 106 of a-Si or the like is formed by a plasma CVD method.
Similarly, an insulating film 107 such as SiN
A film with a thickness of 00Å
A low-resistance metal film 104 'such as r is formed to a thickness of 1400 °. The gate electrode 5, the gate bus line 6 connected to the gate electrode 5, and the drain bus line 2 are covered by a photolithography process using the photoresist 105 and Cr wet etching to form a single gate bus line. Only the connected drain bus line cover 2 'is formed.

Thereafter, as shown in FIG. 3, SiN / a
An island 7 having the same shape as the gate electrode 5, the gate bus line 6, and the drain bus line cover 2 'is formed by Si dry etching. Further, the low-resistance metal film 1 on the pixel electrode 4 is formed by Cr wet etching.
Remove only 04. Thus, in two photolithography steps, it becomes possible to manufacture an LCD device including an active matrix substrate using a low-resistance wiring forward staggered thin film transistor as a switching element. In this formed substrate, since the drain bus line cover 2 'is connected to only one gate bus line 6, the adjacent gate bus lines 6 are short-circuited by the drain bus line cover 2'. On the other hand, there is no need to provide a gap between one end of the drain bus line cover 2 ′ and the gate bus line 6, and the resistance of the drain bus line 2 can be reduced accordingly.

By the way, when comparing the drain wiring resistance of each pixel of the active matrix circuit having the pixel pitch of 260 μm and the drain bus line width of 8 μm, the conventional example 1 is shown.
Approximately 490Ω in the case of the ITO wiring as shown in FIG.
Is about 160Ω when the drain bus line cover is separated from the gate bus line as in
When the drain bus line cover 2 ′ is connected to only one gate bus line 6 as in the above-described embodiment, the resistance becomes about 105Ω. Thus, in the present embodiment, compared to the conventional structure, about 1/5 of the conventional example 1 and 2
The wiring resistance can be reduced to / 3. In this example, the sheet resistance is 1.5Ω / □ at 1400 ° for Cr and 4% for ITO.
The calculated value was 150 Ω / □ at 00 °, and the gap between the gate bus line 6 and the drain bus line cover 2 ′ was 3 μm, which is the minimum exposure accuracy of the liquid crystal exposure device.

In the above embodiment, after the PH ₃ plasma treatment is performed, the semiconductor film 10 is formed by the plasma CVD method.
6, the insulating film 107 is formed, and the low-resistance metal film 104 'is formed by sputtering. Therefore, the amount of verticles generated by plasma CVD is suppressed, and the occurrence of defects due to particles can be suppressed.

[0016]

As described above, according to the present invention, the drain bus line cover formed on the drain bus line is provided with the gate electrode and the gate bus line integrated with the second low bus.
Is configured to have a resistance metal film, and by being connected to said gate bus lines are formed in a direction crossing the drain bus line only at one end, the drain bus line cover intersects the gate bus line Only one end is cut at the portion, so that the cut portion in the length direction of the drain bus line cover at the other end can be eliminated, and the resistance can be reduced. As a result, the wiring resistance can be reduced without increasing the number of times of photography, and it is possible to cope with a large-screen liquid crystal display device. Semiconductor film,
Since the phosphine plasma treatment is performed when forming the insulating film and the second low-resistance metal film, generation of particles in plasma CVD can be suppressed, and a high-quality LCD device that suppresses generation of defects due to particles can be provided. It can be manufactured.

[Brief description of the drawings]

FIG. 1 is a plan view showing a first step in an embodiment of the present invention, and a sectional view taken along line AA of FIG.

FIG. 2 is a plan view showing a second step in the embodiment of the present invention and a cross-sectional view taken along line AA of FIG.

FIG. 3 is a plan view showing a third step in the embodiment of the present invention, and a sectional view taken along line AA of FIG.

FIG. 4 is a plan view showing a first step in Conventional Example 1 and a cross-sectional view taken along line AA of FIG.

FIG. 5 is a plan view showing a second step in the conventional example 1 and a cross-sectional view taken along line AA thereof.

FIG. 6 is a plan view showing a first step in a conventional example 2 and a cross-sectional view taken along line AA thereof.

7A and 7B are a plan view showing a second step in the conventional example 2 and a cross-sectional view taken along the line AA.

8A and 8B are a plan view showing a third step in the conventional example 2 and a sectional view taken along line AA.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Drain electrode 2 Drain bus line 2 'Drain bus line cover 3 Source electrode 4 Pixel electrode 5 Gate electrode 6 Gate bus line 7 Island 101 Insulating substrate 102 Transparent insulating film 103 Transparent conductive film 104 Low resistance metal film 104' Low resistance metal film 105 Photoresist 106 Semiconductor film 106'Semiconductor film 107 Insulating film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/1362 G02F 1/1343 G02F 1/13 101 H01L 29/78

Claims (3)

(57) [Claims] In an active matrix type liquid crystal display device using a thin film transistor as a switching element , a gate electrode and a drain electrode are formed on a drain bus line formed integrally with a drain electrode constituting a part of the thin film transistor.
Drain bus lines cover having a low resistance metal film formed integrally with the fine gate bus lines are formed, the drain bus lines cover the only formed in a direction crossing the drain bus line at one end thereof < An active matrix liquid crystal display device which is connected to a gate bus line. 2. The drain electrode and the drain bus line forming a part of the thin film transistor, and a source electrode opposed to the drain electrode are formed of a transparent conductive film.
A pixel electrode formed of a laminated film of a first low-resistance metal film thereon and formed integrally with the source electrode is formed only of the transparent conductive film, and includes a gate electrode, a drain bus line cover, and a gate bus line. Is sequentially laminated from the bottom layer
2. The active matrix type liquid crystal display device according to claim 1 , wherein the active matrix type liquid crystal display device is formed of a laminated film of a semiconductor layer, an insulating film, and a second low resistance metal film. 3. A transparent conductive film on an insulating substrate comprising the steps of sequentially forming a first low-resistance metal film, the transparent conductive film and the first <br/> low-resistance metal film is pattern-learning a drain electrode, a drain bus line connected to the drain electrode, a source electrode, a pixel electrode connected to the source electrode it
And forming phosphine (P) on the surface of the substrate.
H ₃₎ semiconductor film by plasma treatment and plasma CVD method, the insulating film, a step of sequentially forming a second low-resistance metal film, the semiconductor film, the insulating film is selectively patterned second low-resistance metal film a gate electrode and a gate electrode connected to a gate bus line, a step of forming only the connected drain bus lines cover at one end respectively with respect to the gate bus line, the on the pixel electrode first 1. A method for manufacturing an active matrix type liquid crystal display device, comprising a step of removing one low resistance metal film.