JP3195187U - 線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ - Google Patents
線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ Download PDFInfo
- Publication number
- JP3195187U JP3195187U JP2014005585U JP2014005585U JP3195187U JP 3195187 U JP3195187 U JP 3195187U JP 2014005585 U JP2014005585 U JP 2014005585U JP 2014005585 U JP2014005585 U JP 2014005585U JP 3195187 U JP3195187 U JP 3195187U
- Authority
- JP
- Japan
- Prior art keywords
- linear
- insulating layer
- contact pad
- substrate
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 54
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 20
- 239000000523 sample Substances 0.000 claims abstract description 31
- 230000002093 peripheral effect Effects 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 description 13
- 229920002120 photoresistant polymer Polymers 0.000 description 12
- 238000000034 method Methods 0.000 description 11
- 239000003963 antioxidant agent Substances 0.000 description 4
- 230000003078 antioxidant effect Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 238000007521 mechanical polishing technique Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/20—Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
- H01R43/20—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for assembling or disassembling contact members with insulating base, case or sleeve
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
- H05K3/143—Masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
- G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09409—Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0574—Stacked resist layers used for different processes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
L3>L1
(数2)
D>L3
(数3)
D/2>L1/2+L2
L1=L2
図1から図3Bに示したのは本考案の第1実施形態による線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ10である。図1はスペーストランスフォーマ10の一部分を示す平面図である。スペーストランスフォーマ10は基板20を備える。図2Aは基板20を示す平面図である。図3Aおよび図3Bはスペーストランスフォーマ10の一部分を示す断面図である。図1、図3Aおよび図3Bに示すように、スペーストランスフォーマ10はさらに絶縁層30および複数の導電ブロック40を備える。絶縁層30は基板20の上に配置される。導電ブロック40は基板20の上に配置され、少なくとも一部分が絶縁層30の外部に露出する。図1はスペーストランスフォーマ10の一部分のみを示すため、導電ブロック40は数が八つであるが、これに限らない。一方、説明の便をはかるために、図3Aおよび図3Bの中の導電ブロック40は一つのみにされる。
一方、絶縁層30は円柱状接触パッド44の周縁部44bの全体または一部分に被さるように設計されてもよい。図4Aおよび図4Bに示すように、本考案の第2実施形態によるスペーストランスフォーマでは、絶縁層30は円柱状接触パッド44の接触面44aと水平に並ぶ表面30aを有する。絶縁層30の開口部32は下方開口部32aおよび上方開口部50aを有する。下方開口部32aは線状連結柱42を格納する。上方開口部50aは下方開口部32aと連絡し、かつ円柱状接触パッド44を格納する。絶縁層30は円柱状接触パッド44の周縁部44bに被さるため、円柱状接触パッド44は安定し、プローブに当接することができる。
L3>L1
D>L3
(数3)
D/2>L1/2+L2
(数5)
D>2R
L1=L2
20:キャリアボード、
22:回線、
22A:第一回線、
22B:第二回線、
222:線状接点、
30:絶縁層、
30a:表面、
31:下方絶縁層、
32:開口部、
32a:下方開口部、
34:フォトレジスト、
40:導電ブロック
42:線状連結柱、
44:円柱状接触パッド、
44a:接触面、
44b:周縁部、
46:抗酸化層、
50:上方絶縁層、
50a:上方開口部、
54:フォトレジスト、
D:円柱状接触パッドの直径、
L1:第一回路の幅、
L2:第一回路と第二回路との間の距離、
L3:線状接点の長さ、
R:プローブの末端の半径
Claims (3)
- 基板、絶縁層および導電ブロックを備え、
前記基板は、隣り合う第一回線および第二回線を有し、前記第一回路は線状接点を有し、
前記絶縁層は、前記基板に配置され、前記線状接点に対応する開口部を有し、
前記導電ブロックは、線状連結柱および円柱状接触パッドを有し、前記線状連結柱は前記開口部内に位置し、前記第一回線の前記線状接点に接続され、前記円柱状接触パッドは前記線状連結柱に接続され、かつ少なくとも一部分が前記絶縁層の外部に露出し、プローブの末端に接触し、
前記円柱状接触パッドの直径はD、前記第一回線の幅はL1、前記第一回線と前記第二回線との間の距離はL2、前記線状接点の長さはL3と定義され、D、L1、L2およびL3の関係は、
L3>L1、
D>L3、
D/2>L1/2+L2
を満たすことを特徴とする線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ。 - 前記円柱状接触パッドに接触するプローブの末端の半径はRと定義され、前記円柱状接触パッドの直径Dと前記プローブの末端の半径Rの関係は、
D>2R
を満たすことを特徴とする請求項1に記載の線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ。 - 前記絶縁層は、表面を有し、前記絶縁層は前記表面が前記円柱状接触パッドの接触面より低いため、前記円柱状接触パッドの少なくとも一部分の周縁部は前記絶縁層の外部に露出することを特徴とする請求項1に記載の線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW102138165A TWI541959B (zh) | 2013-10-22 | 2013-10-22 | And a space converter for a wafer carrier for a wafer having a long strip contact is used And its manufacturing method |
TW102138165 | 2013-10-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP3195187U true JP3195187U (ja) | 2015-01-08 |
Family
ID=52339696
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014005585U Active JP3195187U (ja) | 2013-10-22 | 2014-10-21 | 線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ |
Country Status (5)
Country | Link |
---|---|
US (1) | US9648757B2 (ja) |
JP (1) | JP3195187U (ja) |
CN (1) | CN104569514B (ja) |
SG (1) | SG10201406781WA (ja) |
TW (1) | TWI541959B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020514691A (ja) * | 2016-12-16 | 2020-05-21 | テクノプローべ ソシエタ ペル アチオニ | 改善された周波数特性を有する試験ヘッド |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102179035B1 (ko) * | 2014-03-07 | 2020-11-16 | 삼성전자주식회사 | 반도체 장치 |
US10886245B2 (en) * | 2019-05-30 | 2021-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure, 3DIC structure and method of fabricating the same |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6674156B1 (en) * | 2001-02-09 | 2004-01-06 | National Semiconductor Corporation | Multiple row fine pitch leadless leadframe package with use of half-etch process |
US20030150640A1 (en) * | 2002-02-14 | 2003-08-14 | Crippen Warren Stuart | Silicon space transformer and method of manufacturing same |
TWI231028B (en) * | 2004-05-21 | 2005-04-11 | Via Tech Inc | A substrate used for fine-pitch semiconductor package and a method of the same |
US7459795B2 (en) * | 2004-08-19 | 2008-12-02 | Formfactor, Inc. | Method to build a wirebond probe card in a many at a time fashion |
TWI261329B (en) * | 2005-03-09 | 2006-09-01 | Phoenix Prec Technology Corp | Conductive bump structure of circuit board and method for fabricating the same |
TWI292296B (en) * | 2006-01-27 | 2008-01-01 | Au Optronics Corp | The fpc having next door to pads can prevent a short circuit |
KR100609652B1 (ko) * | 2006-02-16 | 2006-08-08 | 주식회사 파이컴 | 공간변형기와 상기 공간변형기의 제조방법 및 상기공간변형기를 갖는 프로브 카드 |
US7425837B2 (en) * | 2006-05-18 | 2008-09-16 | Keithley Instruments, Inc. | Spatial transformer for RF and low current interconnect |
TWI322494B (en) * | 2006-10-20 | 2010-03-21 | Ind Tech Res Inst | Electrical package, and contact structure and fabricating method thereof |
TWI342952B (en) * | 2007-10-09 | 2011-06-01 | Ind Tech Res Inst | Improved vertical probe card and space transformer design method |
US8033012B2 (en) * | 2008-03-07 | 2011-10-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for fabricating a semiconductor test probe card space transformer |
KR100951344B1 (ko) * | 2008-03-25 | 2010-04-08 | 주식회사 아이엠텍 | 프로브 카드, 프로브 카드용 스페이스 트랜스포머 및스페이스 트랜스포머 제조 방법 |
JP5121530B2 (ja) * | 2008-03-27 | 2013-01-16 | 京セラ株式会社 | 基板、プローブカード・アセンブリ用基板および基板の製造方法 |
JP4759041B2 (ja) * | 2008-12-04 | 2011-08-31 | 太陽誘電株式会社 | 電子部品内蔵型多層基板 |
KR101033400B1 (ko) * | 2009-06-05 | 2011-05-09 | 남주한 | 반도체 기판의 전기적 특성 검사 장치용 프로브 카드의 공간 변형기 및 이의 제작 방법 |
US8430676B2 (en) * | 2009-08-10 | 2013-04-30 | Sv Probe Pte. Ltd. | Modular space transformer for fine pitch vertical probing applications |
KR20110020098A (ko) * | 2009-08-21 | 2011-03-02 | 주식회사 메카로닉스 | 프로브 카드용 스페이스 트랜스포머 및 그 제조방법 |
KR101121644B1 (ko) * | 2009-09-17 | 2012-02-28 | 삼성전기주식회사 | 프로브 카드용 공간 변환기 및 공간 변환기의 복구 방법 |
KR20120095657A (ko) * | 2011-02-21 | 2012-08-29 | 삼성전기주식회사 | 프로브 카드용 STF(Space Transformer) 기판 |
CN102914673B (zh) * | 2011-08-03 | 2015-09-30 | 旺矽科技股份有限公司 | 探针测试装置 |
KR20130062720A (ko) * | 2011-12-05 | 2013-06-13 | 삼성전기주식회사 | 기판 및 그 제조방법, 그리고 프로브 카드 |
CN102692530A (zh) * | 2012-06-26 | 2012-09-26 | 日月光半导体制造股份有限公司 | 探针结构与薄膜式探针的制造方法 |
-
2013
- 2013-10-22 TW TW102138165A patent/TWI541959B/zh active
-
2014
- 2014-10-10 CN CN201410531595.3A patent/CN104569514B/zh active Active
- 2014-10-20 SG SG10201406781WA patent/SG10201406781WA/en unknown
- 2014-10-21 JP JP2014005585U patent/JP3195187U/ja active Active
- 2014-10-22 US US14/520,772 patent/US9648757B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020514691A (ja) * | 2016-12-16 | 2020-05-21 | テクノプローべ ソシエタ ペル アチオニ | 改善された周波数特性を有する試験ヘッド |
JP7228517B2 (ja) | 2016-12-16 | 2023-02-24 | テクノプローべ ソシエタ ペル アチオニ | 改善された周波数特性を有する試験ヘッド |
Also Published As
Publication number | Publication date |
---|---|
US20150107102A1 (en) | 2015-04-23 |
CN104569514A (zh) | 2015-04-29 |
CN104569514B (zh) | 2017-10-03 |
TWI541959B (zh) | 2016-07-11 |
TW201517227A (zh) | 2015-05-01 |
US9648757B2 (en) | 2017-05-09 |
SG10201406781WA (en) | 2015-05-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20100276690A1 (en) | Silicon Wafer Having Testing Pad(s) and Method for Testing The Same | |
US9234917B2 (en) | Probing device and manufacturing method thereof | |
JP5012191B2 (ja) | 多層配線板およびその製造方法並びにプローブ装置 | |
JP3195187U (ja) | 線状接点が配置されたチップパッケージング用基板を使用するスペーストランスフォーマ | |
TWI430411B (zh) | 堆式防護結構 | |
US7867790B2 (en) | Substrate of probe card and method for regenerating thereof | |
KR100967565B1 (ko) | 반도체 부품 | |
KR101566173B1 (ko) | 반도체 테스트 소켓 및 그 제조방법 | |
WO2013134568A1 (en) | Shielded probe array | |
US9459286B2 (en) | Large-area probe card and method of manufacturing the same | |
KR101535179B1 (ko) | 반도체소자 테스트 소켓용 컨택터 및 그 제조방법 | |
WO2013134561A1 (en) | Fine pitch probe array from bulk material | |
US7808248B2 (en) | Radio frequency test key structure | |
US20140001471A1 (en) | Conformal shielding module | |
US8466704B1 (en) | Probe cards with minimized cross-talk | |
KR101693001B1 (ko) | 반도체 패키지 테스트 보드 및 그를 구비하는 반도체 패키지 테스트용 보드 어셈블리 | |
TWI586968B (zh) | 高頻垂直式探針、探針卡及高頻垂直式探針的製作方法 | |
CN211206583U (zh) | 晶圆测试探针卡 | |
KR101083711B1 (ko) | 평판표시소자 검사용 점등 보드 및 그 제조방법 | |
KR101363368B1 (ko) | 인쇄회로기판 검사장치 | |
KR101270134B1 (ko) | 탐침 구조체 및 그 제조 방법 | |
JP2005241505A (ja) | 半導体テスト用ソケットおよび半導体テスト装置 | |
CN210427646U (zh) | 晶圆测试探针卡 | |
US20130234746A1 (en) | Shielded probe array | |
KR20170047777A (ko) | 인터페이스 보드 및 상기 인터페이스 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R150 | Certificate of patent or registration of utility model |
Ref document number: 3195187 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |