JP3106454B2 - IC tester - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an IC under test, for example,
IC for testing liquid crystal drivers for liquid crystal displays
The present invention relates to an IC tester that can perform a test with high accuracy without requiring a capacitance correction.

[0002]

2. Description of the Related Art When testing an IC under test (hereinafter abbreviated as DUT) such as a liquid crystal driver of an STN type liquid crystal display having high voltage, high speed and high output impedance,
An input stage of the IC tester receiving an output from a pin of one DUT is provided with a high-resistance dividing resistor in order to obtain DC accuracy. After dividing the voltage, a digital function module or a digital function module is connected via a buffer amplifier or a comparator. Input to the waveform digitizer.

FIG. 3 shows the configuration of such a conventional IC tester.
Shown in In the figure, 1 is a DUT, 2 is an attenuator, which inputs a signal from the DUT 1 and attenuates the input signal. Reference numeral 3 denotes a buffer amplifier to which a signal attenuated by the attenuator 2 is input. Reference numeral 4 denotes a measurement calculation unit that measures a signal from the buffer amplifier 3, performs calculation processing based on the measurement result, and determines whether the DUT 1 is good or not. Attenuator 2
, The resistors R1 and R2 are resistances of several MΩ to several tens MΩ. The resistor R 1 has one end connected to the DUT 1 and the other end connected to the buffer amplifier 3. Resistance R2
Has one end connected to the other end of the resistor R1 and the other end grounded. The capacitor C1 is connected in parallel with the resistor R1.
One end of the variable capacitor C2 is connected to the other end of the resistor R1, and the other end is grounded. Although the configuration for one pin of the DUT 1 has been described above, the attenuator 2 and the buffer amplifier 3 are provided for each pin of the DUT 1, and the DUT 1 is tested by the measurement calculation unit 4.

[0004] The operation of such a device is described below. A signal is supplied from a signal generator (not shown) to the DUT 1, and the DUT 1 outputs a signal corresponding to the signal. Then, the measurement calculation unit 4 is connected via the attenuator 2 and the buffer amplifier 3.
To measure the signal from the DUT 1 and perform arithmetic processing based on the measurement result to determine whether the DUT 1 is good or not.

[0005]

Here, the DUT 1 has a liquid crystal driver for outputting 0 to +20 V, and -20 to 0.
Some output different voltage ranges, such as a liquid crystal driver that outputs V. Since the buffer amplifier 3 is driven by a power supply voltage of ± 15 V, the signal from the DUT 1 needs to be attenuated by the attenuator 2 so as to fall within the range of ± 15 V before being input to the buffer amplifier 3. However, the resistance constituting the attenuator 2 is DUT1
It is necessary to make the resistance high because it does not affect
A stray capacitance such as a wiring connected to each pin of T1 forms a CR circuit having a time constant of several tens of μs, and deteriorates a rising characteristic of an input signal. For the correction, the effect of the stray capacitance must be canceled by the variable capacitor C2. In addition, the liquid crystal driver generally has a pin number of several tens to one hundred and several tens pins, and there is a problem that the capacitance must be corrected for the pins corresponding to the test.

An object of the present invention is to realize an IC tester which can perform a high-accuracy test without performing capacitance correction.

[0007]

According to the present invention, there is provided an IC tester for testing an IC under test, which comprises a buffer amplifier for inputting a signal output from the IC under test, and a low resistance. An attenuator for attenuating a signal, a test section for testing the IC under test with a signal from the attenuator, and changing the voltage in accordance with an output voltage range of a signal output from the IC under test and providing the voltage to the buffer amplifier And a power supply unit.

[0008]

According to the present invention, the power supply unit supplies the buffer amplifier with a voltage corresponding to the output voltage range of the signal output from the IC under test. Then, the test unit tests the IC under test using a signal output from the IC under test via the buffer amplifier and the attenuator.

[0009]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a configuration diagram showing an embodiment of the present invention. In the figure, 1
Is a DUT, and 5 is a buffer amplifier, to which a signal output from the DUT 1 is input. Reference numeral 6 denotes an attenuator, which has a low resistance and attenuates a signal from the buffer amplifier 5. Reference numeral 7 denotes a measurement operation unit which is a test unit, and tests the DUT 1 based on a signal from the attenuator 6. Reference numeral 8 denotes a power supply unit that supplies a voltage corresponding to an output voltage range of a signal output from the DUT 1 to the buffer amplifier 5. 9 is a control unit, corresponding to DUT1,
The power supply unit 8 outputs a voltage. Then, the mid-point potential value supplied from the power supply unit 8 to the buffer amplifier 5 is measured and calculated by the measurement unit
Give to. In the attenuator 6, the resistors R3 and R4 are resistors of several hundred Ω. The resistor R3 has one end connected to the buffer amplifier 5 and the other end connected to the measurement calculation unit 7. Resistance R
4 has one end connected to the other end of the resistor R3 and the other end grounded.

The operation of such a device will be described below.
FIG. 2 is a diagram illustrating a relationship between a control signal of the control unit 9 and a voltage output from the power supply unit 8. Here, three types of liquid crystal drivers having output voltages of ± 10 V, 0 to +20 V, and −20 to 0 V are considered as the DUT 1.

When the output voltage is ± 10V. The control unit 9 supplies the power supply unit 8 with signals in which the control signals CTRL2 and CTRL1 are “0” and “0”, respectively, and notifies the measurement calculation unit 7 of the midpoint potential value “0V”. The power supply 8 is -15
V and +15 V are applied to the buffer amplifier 5. Thereby, the buffer amplifier 5 can input a signal in the range of -15 to + 15V. Actually, about ± 12V
Voltage can be input. Then, a signal is supplied from a signal generator (not shown) to the DUT 1, and the DUT 1 outputs a signal corresponding to the input signal. The measurement calculation unit 7 measures this signal via the buffer amplifier 5 and the attenuator 6, and performs calculation based on the measurement result and the midpoint potential value.
The quality of the DUT1 is determined.

When the output voltage is 0 to + 20V. The control unit 9 supplies the power supply unit 8 with signals in which the control signals CTRL2 and CTRL1 are “0” and “1”, and notifies the measurement calculation unit 7 of the midpoint potential value “+10 V”. The power supply unit 8
Voltages of 5V and + 25V are applied to the buffer amplifier 5. Thereby, the buffer amplifier 5 can input a signal in the range of −5 to + 25V. In practice, about -2 to 2
A voltage of 2V can be input. Similarly, a signal is supplied from the signal generator to DUT1, and DUT1 outputs a signal corresponding to the input signal. The measurement calculation unit 7 measures this signal via the buffer amplifier 5 and the attenuator 6, performs calculation based on the measurement result and the midpoint potential value, and determines whether the DUT 1 is good or not.

When the output voltage is -20 to 0V. The control unit 9 supplies the power supply unit 8 with signals in which the control signals CTRL2 and CTRL1 are "1" and "0", respectively, and notifies the power supply unit 8 of the midpoint potential value "-10V". Power supply unit 8 is -25V, +5
A voltage of V is applied to the buffer amplifier 5. Thereby, the buffer amplifier 5 can input a signal in the range of −25 to + 5V. In practice, a voltage of about −22 to 2 V can be input. Similarly, from the signal generator to the DUT
1 and the DUT 1 outputs a signal corresponding to the input signal. The measurement calculation unit 7 converts this signal into a buffer amplifier 5
And the attenuator 6, calculate based on the measurement result and the midpoint potential value, and determine the quality of the DUT 1.

As described above, since the power supply unit 9 applies a voltage to the buffer amplifier 5 in accordance with the type of the DUT 1, the capability of the buffer amplifier 5 can be fully utilized. Can be provided. That is, since the attenuator 6 can be formed with a low resistance of about several hundred Ω, even if the stray capacitance is several pF around the attenuator 6, the time constant of the CR circuit constituted by the resistance of the attenuator 6 and the stray capacitance Is several hundred ns,
There is no practical effect on the settling time and frequency characteristics of the signal from the DUT 1. Therefore, capacitance correction is not required, and a highly accurate test can be performed.

Note that the present invention is not limited to this. In the embodiment, the measurement calculation unit 7 takes in a signal from the DUT 1 with an A / D converter, and stores the data from the A / D converter. Although it is configured to determine whether or not the DUT 1 outputs a desired voltage based on the point potential value, a configuration of a test unit that determines by comparing with a desired voltage by a comparator may be used.

[0016]

According to the present invention, the following effects can be obtained. According to the type of the IC under test, the power supply unit applies a voltage to the buffer amplifier, and an attenuator having a low resistance is provided at the subsequent stage of the buffer amplifier.
High precision testing can be performed.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a control signal of a control unit 9 and a voltage output by a power supply unit 8;

FIG. 3 is a diagram showing a configuration of a conventional IC tester.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 DUT 5 Buffer amplifier 6 Attenuator 7 Measurement operation part 8 Power supply part R3, R4 Resistance

Continuation of front page (56) References JP-A-4-122866 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 31/28 G01R 31/26

Claims (1)

(57) [Claims] 1. An IC tester for testing an IC under test, comprising: a buffer amplifier for inputting a signal output from the IC under test; an attenuator configured with low resistance and attenuating a signal from the buffer amplifier; A test unit for testing the IC under test by a signal from an attenuator; and a test unit according to an output voltage range of a signal output from the IC under test.
An IC tester comprising: a power supply unit for changing a voltage and supplying the voltage to the buffer amplifier.