JP3022178B2 - Power device chip mounting structure - Google Patents

Abstract

PURPOSE:To reduce the thermal resistance of a module and to enhance reliability of wiring connection while minimizing modification in the compositional elements of an existing semiconductor module while furthermore to realize compaction and reduction in the inductance of wiring. CONSTITUTION:An insulating board 104 is provided on the surface of a module board, i.e., a metal plate 103. An electrode 115 disposed on the surface of a power device chip 101, on the active region side thereof, is connected directly to an electrode, i.e., a metal film 105, disposed on the surface of the insulating board by means of solder 110, for example, thus enhancing the reliability of wiring. Thermal resistance of the module is also reduced because heat, generated from the active region, does not pass through the power device chip but is transmitted directly to the module side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a power semiconductor module.

[0002]

2. Description of the Related Art Conventionally, a module widely used as a power semiconductor module has a structure shown in FIG. In the figure, reference numeral 101 denotes a semiconductor chip of a vertical power device. Here, a vertical power MOS transistor will be described as an example. A source electrode (main electrode) and a gate electrode (control electrode) are formed on the surface of the semiconductor chip 101, and only the source electrode 115 is shown in the figure. On the back surface of the semiconductor chip 101, a metal film 102 serving as a drain electrode is formed.

[0003] Further, reference numeral 103 denotes a metal module substrate serving as a module substrate, and 104 denotes a module substrate.
Is an insulating plate provided on the semiconductor chip 101
Connects the drain electrode 108 and the metal film 1801 with the solder 11
0 is welded. Further, 106 is an insulating plate 10
4 is a protective film formed on the metal film 1801 to prevent solder from adhering. Note that the insulating plate 104
Are fixed to the module substrate 103 by soldering or the like.

[0004] Also, 1802A and 1802B are terminal leads. The module has terminals corresponding to at least three electrodes of the transistor, and here only two are shown for convenience. 1802A is a terminal of the drain electrode, which is connected to the back electrode (electrode film 102) of the semiconductor chip 101 via the metal film 1801. Also, 180
Reference numeral 2B denotes a terminal for a source electrode, and the semiconductor chip 101
Surface source electrode 115 and bonding wire 1803
It is connected to the.

[0005] Further, reference numeral 111 denotes a box-shaped outer shell case made of an insulator such as plastic for a module.
2B and a part of the drain terminal 1802A are exposed to the outside. Further, nuts 112 for screwing a crimp terminal or the like are embedded in portions corresponding to the source terminal 1802B and the drain terminal 1802A, respectively. Reference numeral 113 denotes a screw hole provided at an end of the module substrate 103 for fixing to a cooling device.

Incidentally, in such a vertical power transistor, heat generated during operation is generated near the surface of the semiconductor chip 101. The generated heat passes through the semiconductor chip 101 itself, and passes through the metal plate 1801 and the insulating plate 104.
The heat is radiated out of the module through. FIG. 19 shows a breakdown of data such as the thermal resistance of the module when heat flows one-dimensionally along such a heat flow path. Note that FIG.
Is a representative value of a commercially available product.

Next, the thermal resistance in the above will be described with reference to FIG.
Explanation will be made based on the data shown in FIG. The module substrate 103 is generally made of a copper material having a thickness of about 3 mm and occupies about half of the thermal resistance. The module is screwed to the heat receiving portion of the cooling device at the end as shown in FIG. 18, but the module substrate 1 is used to reduce the contact thermal resistance.
03 needs some rigidity. Therefore, the thickness of the module substrate 103 cannot be reduced.

The insulating plate 104 is made of ceramic having a low thermal resistance. In FIG. 19, aluminum nitride is used, and occupies about 1/4 of the thermal resistance of the module. Although the thickness of the insulating plate 104 is too large for the withstand voltage, the metal plate 1801
And the semiconductor chip 101 are subjected to thermal stress, so that the thickness of the current material cannot be reduced.

Further, from the data shown in FIG. 19, about 1/6 of the thermal resistance is the thermal resistance of the semiconductor chip 101 itself, and the rest is the thermal resistance of the solder 110 and the like. In order to reduce the thermal resistance of the power device in the module, it is difficult to change the dimensions of the components of the module for the above-described reason. Therefore, measures are generally taken to reduce the thickness of the chip as much as possible. That is, although the semiconductor wafer has a thickness of several hundreds of μm, the functioning as a transistor is at most 10 to 100 μm on the surface, and the remaining portion has only a function as a mere structure. For this reason, a method has been adopted in which, when transistors are substantially formed on the front surface in the wafer state, the wafer is ground from the back surface to reduce the thickness. However, even in this method, the limit is to reduce the thickness of the wafer to about half.

In the conventional structure, the current is taken out from the surface electrode of the semiconductor chip 101 by the metal wire 1.
803. That is, the semiconductor chip 10
A wire made of an aluminum alloy is pressed against an electrode metal film made of an aluminum alloy on one surface while applying ultrasonic waves. When the current capacity of the semiconductor chip 101 increases,
On the other hand, the number of wires must be increased. On the other hand, if the number of wires is too large, the reliability is significantly reduced, and the number of bonding steps is increased.

Therefore, a thick wire is used. However, it is not the case that a current proportional to the cross-sectional area can be applied to the wire. If the wire diameter is large, the ratio of the surface area to the volume is reduced, so that the heat radiation becomes poor. Experiments have shown that only a current proportional to the wire diameter to the fifth power can be passed. Therefore,
If a thicker wire is used to secure a desired current value, a larger number of wires will be required than the result of simple calculation from the cross-sectional area.

[0012] In addition, an excessively thick wire has high rigidity and is inconvenient to handle. Further, since stronger ultrasonic waves and pressure are required at the time of bonding, the semiconductor chip 10
In consideration of the influence on No. 1, the wire diameter cannot be made too large, and a diameter of 500 μm seems to be the limit.

[0013]

In the conventional power semiconductor module as described above, heat generated during operation passes through the chip itself, so that the heat resistance is high, and because of the structural reasons, There was a problem that this thermal resistance could not be reduced.

Further, since a structure is employed in which a current is taken out from the surface electrode of the semiconductor chip by a bonding wire, if the number of wires is increased in order to increase the current capacity, the connection reliability is reduced. There is a problem that stress on the chip increases.

The present invention has been made in view of the above problems, and has a low thermal resistance of a module, high wiring reliability at the same time, a compact size, low wiring inductance, and mounting of a power device chip. It is intended to provide structure.

[0016]

In order to achieve the above object, a power device chip mounting structure according to claim 1 has a relatively low thermal resistance and a low electric resistance on one main surface of a metal plate. Having a high insulating plate, having one or more metal films insulated from the metal plate on the insulating plate, having an insulating film on the metal film, In a predetermined region of the insulating film, there are two types of contact windows exposing the metal film, and among the contact windows, a first contact window connects the metal film and an electrode of a power device chip, and a second contact window. In the contact window, the metal film and the metal terminal are connected, and the power device chip has at least a major part of one main surface as an active region, and has a plurality of electrodes having different functions on the main surface having the active region. And on the active area Each electrode is one that is connected to the corresponding one of the metal layer in the first contact window.

According to a second aspect of the present invention, in the power device chip mounting structure, among the electrodes of the power device chip, an electrode on a main surface which does not face the metal film, that is, a metal terminal corresponding to a back surface electrode is provided. The back electrode and the metal terminal are fixed to an insulating plate and are electrically connected by a lead frame.

According to a third aspect of the present invention, a corresponding metal terminal is directly welded to a back electrode of the power device chip.

According to a fourth aspect of the present invention, in the power device chip mounting structure, a metal terminal corresponding to a back electrode of the power device chip is fixed on the insulating plate, and a space between the back electrode and the metal terminal is provided. They are connected by wire bonding.

According to a fifth aspect of the present invention, there is provided a power device chip mounting structure comprising an insulating plate having a relatively low thermal resistance and a high electric resistance on one main surface of a metal plate, wherein the insulating plate is provided on the insulating plate. The metal plate has one or more insulated metal films, an insulating film is provided on the metal film, and the metal film is exposed in a predetermined region of the insulating film for each of the metal films. It has two types of contact windows, of the contact windows, the first contact window connects the metal film and the electrode of the power device chip, and the second contact window connects the metal film and the metal terminal. There are two structures, the power device chip has at least a major part of at least one main surface as an active region, and has a plurality of electrodes having different functions on a main surface having the active region. Each electrode is At the contact window, the first
An electrode present on the other main surface of the power device chip, connected to the corresponding metal film on the second structure, and connected to the corresponding metal film on the second structure, Is sandwiched between the first and second structures by a buffer having a constant thickness.

According to a sixth aspect of the present invention, there is provided a power device chip mounting structure, wherein a radiation fin is provided on another main surface of the structure which is not in contact with the insulating plate.

According to a seventh aspect of the present invention, there is provided a power device chip mounting structure in which electrodes of the power device chip and the metal film are connected by solder welding.

[0023]

In a power device chip mounting structure according to the present invention, a structure in which an insulating plate having a metal film serving as an electrode is attached to a metal plate serving as a module substrate, similarly to the related art. Conversely, by directly connecting the electrode on the active area surface of the power device chip and the electrode on the module side with solder etc., the heat generated from the active area of the chip flows to the module without passing through the chip itself,
Since the heat flow does not pass through the chip itself, the thermal resistance of the entire module structure is reduced. Furthermore, the connection between the electrode on the surface of the active region of the chip and the electrode on the module side, which has conventionally been performed by wire bonding, is directly connected by soldering or the like as described above, thereby reducing the number of connection points and increasing reliability. Is compact, and the wiring inductance in the module is reduced.

Further, in the power device chip mounting structure according to the claims (claim 2), the back surface of the chip mounted as described above (claim 1) and the corresponding electrode on the module side are leaded. By connecting with a frame, the number of connection points of the back surface electrodes is minimized and the reliability is improved while the change in the module structure is minimized.

Further, in the power device chip mounting structure according to the claims (claim 3), the back surface of the chip mounted as described above (claim 1) and the corresponding metal terminal on the module side are connected. By performing direct welding, the outer shape of the module becomes compact, and this metal terminal also newly serves as a sub-radiator.

Further, in the power device chip mounting structure according to the claims (claim 4), the back surface of the chip mounted as described above (claim 1) and the corresponding module-side electrode are formed as follows. The connection work is simplified by the same wire bonding as in the past, so that the mounting operation is simplified.

In the mounting structure of the power device chip according to the claims (claim 5), (claim 1)
By welding a structure similar to the structure on which the chip is mounted to the back surface of the chip, that is, by sandwiching the chip between the two structures, the heat radiation effect is improved. In addition, between the two structures, a buffer that secures a predetermined space is interposed with the chip, and protects the chip from external force.

Further, in the mounting structure of the power device chip according to the claim (claim 6), in the metal plate having the structure mounted as described in (claim 5), another metal plate not in contact with the insulating plate may be used. By having the radiation fin on the main surface, the radiation characteristic is improved.

Further, in the mounting structure of a power device chip according to the claims (claim 7), in the structure mounted as described in the above (claims 1 to 5), the metal on the structure is The mounting process is simplified by welding the film and the metal film on the chip side with solder.

[0030]

【Example】

[Embodiment 1] An embodiment of a mounting structure of a power device chip according to the present invention will be described below with reference to the accompanying drawings. The first embodiment will be described with reference to FIGS. 1 to 3 show the basic structure of the present embodiment.
Is a cross-sectional view of the mounting structure of the power device according to the embodiment,
FIG. 2 is a front view showing a surface electrode of a power device chip used for this, and FIG. 3 is a front view showing a surface electrode structure of a module on which the power device chip is mounted. In the figure, 10
Reference numeral 1 denotes a semiconductor chip which is a vertical power device. In this embodiment, a vertical power MOS transistor will be described as an example. On the back surface of the semiconductor chip 101, an electrode film 102 serving as a drain electrode is formed. Also, 103
Is a metal module substrate serving as a module substrate, 1
Reference numeral 04 denotes an insulating plate fixed on the module substrate 103, and reference numeral 105 denotes a metal film (electrode film) formed on the insulating plate 104, which corresponds to a source electrode on the semiconductor chip 101. Reference numeral 106 denotes a protective film for preventing solder from adhering to an unnecessary portion of the metal film 105 when a semiconductor chip is mounted.

Reference numeral 107 denotes a source terminal, 108 denotes a drain terminal, and 109 denotes a lead frame for the drain terminal 108, which is connected to the drain electrode and the drain terminal 108 of the semiconductor chip 101 by solder 110.
Reference numeral 111 denotes a box-shaped outer shell case for storing and protecting the module. It is made of a relatively strong and highly insulating material such as plastic or ceramic or wood. On the upper surface of the outer shell case 111, a part of the source terminal 107 and the drain terminal 108 is exposed to the outside. Further, a nut for screwing a crimp terminal or the like to a portion corresponding to the source terminal 107 and the drain terminal 108. 112 are respectively buried.
Reference numeral 113 denotes a screw hole provided at an end of the module substrate 103 for fixing a cooling device; 114, an insulating film formed on the surface of the semiconductor chip 101; and 115, a source electrode made of an aluminum alloy.

FIG. 2 is a plan view showing the surface electrode structure of the semiconductor chip 101 constituting the structure of FIG. 1. On the surface of the semiconductor chip 101, there are two electrodes, a source electrode 115 and a gate electrode 201. (Only the source electrode 115 is shown in FIG. 1). Further, an insulating film 114 is formed on the surface of the semiconductor chip 101,
Further, contact windows 115A and 201A through which the metal film is exposed are opened in the insulating film 114.

FIG. 3 is a plan view of the module shown in FIG. 1 when the outer shell case 111, the semiconductor chip 101 and each terminal are removed.
1 is a gate terminal. The position indicated by the broken line is the mounting position of the semiconductor chip 101.

The metal film 1 corresponding to the source electrode 115 of the semiconductor chip 101 is formed on the surface of the insulating plate 104.
05 and the metal film 302 corresponding to the gate electrode 201
Are formed. Further, a protective film (insulating film) 106 is formed on these, and 105A in FIG.
Reference numerals 302A and 302A denote windows opened in the protective film (insulating film) 106, that is, contact electrode windows in which metal portions are exposed. The electrode windows 105A and 302A provided in the protective film (insulating film) 106 are
Electrode windows 115A and 2A provided in one insulating film 114
01A.

Although not shown in FIG. 2, a solder layer is provided on each of the electrode windows 115A and 201A of the insulating film 114, and the semiconductor chip 101 and the metal film 105 of the module are welded. Note that the source electrode 115 and the gate electrode 201 on the semiconductor chip 101 may use any metal material. In this case, a multilayer metal may be used. For example, the layer in contact with the semiconductor chip 101 may be made of an aluminum alloy, and may have a multilayer structure having a nickel layer thereon and a silver layer on the nickel layer.

The electrode windows 115A and 201A,
The interval between the electrode window 105A and the electrode window 302A is provided such that a short circuit does not occur when the solder is melted. As is apparent from comparison between FIGS. 2 and 3, the electrode windows 115A and 201A on the semiconductor chip 101, the electrode windows 105A and the electrode windows 30
2A are configured to be superposed face to face.

The above solder film is formed by vapor deposition, screen printing, or the like, and a sufficient distance is provided between the solder film corresponding to the source electrode 115 and the gate electrode 201 so as not to short-circuit during mounting. Insulating plate 1
In a region where the solder is not desired to adhere to the metal film on the metal film 02 as well, the protective film 106 is used to repel the solder. Further, the module substrate 103, the insulating plate 104, and other components such as leads are welded to predetermined positions by high-temperature solder in advance.

Further, the semiconductor chip is arranged on each metal film on the insulating plate 104 such that the corresponding electrode on the semiconductor chip side is overlapped therewith. Further, a lead frame 109 for connecting the terminal corresponding to the back electrode is provided. Placed, heated and soldered. This solder uses a solder having a lower melting point than the high-temperature solder to which the module has been previously welded. Further, at the time of melting the solder, welding can be performed in a vacuum in order to prevent generation of voids between the semiconductor chip 101 and the metal film.

FIG. 4 is a cross-sectional view showing another embodiment. In this manner, terminals corresponding to the back electrode can be directly connected to the back surface of the semiconductor chip 101. By doing so, the metal terminal becomes a new auxiliary heat flow path and contributes to a reduction in the thermal resistance of the module. Further FIG.
Is a cross-sectional view showing another embodiment, but the connection between the back surface electrode and the corresponding terminal on the module side may be connected by wire bonding (metal wire 501). This is an effective mounting method in a lateral power device chip, for example, when a large current does not flow through the back surface electrode, but it is necessary to keep only the ground. Also,
Since the number of wires is one or a small number, and the back surface is an electrode on the entire surface of the semiconductor chip 101, the wires do not need to be aligned at the time of bonding, and the mounting operation can be simplified.

With the above-described power device chip mounting structure, heat generated from the surface of the semiconductor chip 101 is directly conducted to the module substrate 103 via the insulating plate 104 without passing through the semiconductor chip 101 itself. Therefore, the thermal resistance is reduced by the heat conduction.

By employing a configuration in which the active region of the semiconductor chip 101 is directly connected to the metal film on the module side without using wire bonding as in the present embodiment, the number of connection points can be minimized. And the reliability of the wiring is improved. Further, as described above, since the solder connection portion has a large area, its strength is significantly higher than that of the wire bonding portion.

The mounting method according to the present embodiment can be realized relatively easily by partially remodeling and diverting a device based on flip chip technology for an IC chip. The flip chip technology is used for efficiently mounting wiring of an IC having a large number of connection points. I
The area to be solder-connected in the mounting of the C chip is a pad area provided at a location (mainly a peripheral part) away from the active area in the IC chip. In contrast, in the case of the present embodiment,
The location where the solder is welded is on the active region that directly generates heat, and the point that the solder region is the main current path and the main heat flow path is greatly different from the case of the IC.

Further, in the connection method by wire bonding shown in the conventional example, a wire containing aluminum as a main component is bonded to an electrode film made of aluminum or an aluminum alloy by applying pressure while applying ultrasonic waves. I do. In order to avoid the damage at the time of bonding, a bonding region is conventionally provided in a region apart from the active region. This region occupies a considerable part of the chip area, and is one factor that cannot reduce the chip size.

In the conventional wire bonding method, a bonding area of 3 × 5 times the wire diameter was required. Since the wires are mounted in one direction as much as possible, the shape of the bonding region also limits the degree of freedom in designing transistors on the chip. Although a method of wire bonding directly to a metal film on the active region is also generally used in some cases, the bonding conditions must be carefully set so that the active region is not damaged in this case.

In contrast to the above-mentioned conventional problems, in the present embodiment, by using solder melting for bonding the electrodes, the processing can be performed without applying pressure to the bonded portions. Therefore, a connection with the outside of the chip can be easily formed without damaging the active region.

Further, the shape of the connection surface on the chip is arbitrary. FIGS. 6 and 7 show another embodiment of the surface electrode structure of the power device chip corresponding to FIG. 2, but as shown in FIG.
A corner region that is difficult to use as an active region of the power device chip can be used as a control terminal contact. Further, as shown in FIG. 7, an elongated contact region (201A) can be provided on one side of the active region of the chip.

Further, for example, in the case of a comb-shaped emitter wiring and a base wiring used in a normal bipolar transistor chip, it is also possible to employ a configuration in which a solder connection is directly provided on the wiring. Therefore, the degree of freedom in chip design is significantly improved. Further, a large-area connection that cannot be realized by a wire can be performed, and the electric resistance of the wiring can be reduced.

In the prior art, as a means for reducing the thermal resistance, an attempt has been made to reduce the thickness of the chip itself. However, in the present embodiment, since the chip itself does not serve as a heat flow path, this structure is not used. Such a step can also be omitted.

In the wire bonding, the number of connection points was 2 × n using n wires.
The number of connection points can be reduced to one by the large-area solder connection area. Therefore, it is possible to realize highly reliable mounting while effectively using the chip area.
Further, for example, as in the case of a lateral type power device chip, it is difficult to perform direct wire bonding on a multi-layer wiring using two metal electrodes. Even with a simple structure, it is possible to perform solder connection, and the chip area can be effectively used to the maximum.

In the case of an IGBT chip, a certain chip area is required rather than the current capacity due to the limitation of the heat radiation capability of the module. On the other hand, in the mounting structure of this embodiment, the thermal resistance of the entire module is, for example, 15%.
When reduced, the chip area can be reduced to 15
%, And as a result, the cost per chip can be reduced.

Second Embodiment Next, a second embodiment will be described. Embodiment 2 will be described with reference to FIGS. In particular, FIGS. 8 to 12 show one embodiment.
FIG. 8 is a sectional view taken along line AA ′ in FIG. Conversely, FIG. 9 is a surface view corresponding to the bottom of the mounting structure of the power device chip cut along the line AA ′ in FIG. 8, and FIG. 10 is a corresponding upper surface view. FIG. 11 is a sectional view taken along line BB 'in FIG. 9, and FIG. 12 is a perspective view of the mounting structure. FIG. 13 is a cross-sectional view corresponding to FIG. 8 and illustrating another embodiment according to the second embodiment.

Each of the explanatory diagrams according to the present embodiment is the same as that of the first embodiment.
Those having the same functions as those described above are denoted by the same reference numerals, and description thereof will be omitted. In the second embodiment, in addition to the first embodiment, a structure composed of an insulating plate 104 'and a module substrate 103' is also connected to the back surface. Further, the insulating plate 104 and the insulating plate 10
A buffer 801 for keeping the interval of 4 'constant is provided. The buffer 801 has a function of keeping the total distance of the thickness of the semiconductor chip 101, the specified thickness of the solder on the source electrode side 115 side, and the specified thickness of the solder on the back electrode side within a certain range. Further, the buffer 801 may be integrated with the terminal of the module. Further, the buffer 801
Any material may be used as long as it can withstand the pressure applied to the module and does not damage the semiconductor chip 101 while maintaining the above thickness.

In the figure, a buffer 801 is provided on the insulating plate 10.
4 and 104 ', but the buffer 801 itself is made of an insulator, and the metal film 105 or 10'
It may be at a position that contacts 5 ′. Further, the buffer 8
Since 01 is for the purpose of protecting the semiconductor chip 101 from external pressure, it is preferable to provide it at a position as close to the semiconductor chip 101 as possible.

Therefore, in the configuration of the second embodiment, the insulating plates 104, 104 'and the module substrate 1 are provided on both sides.
03 and 103 ', the heat generated from the semiconductor chip 101 is conducted to both sides. By using this module sandwiched between two cooling devices, the heat dissipation effect of the semiconductor chip 101 is further improved. It can be increased to nearly twice. In addition, by providing the buffer 801, the interval can be kept constant, and external pressure applied to the semiconductor chip 101 can be prevented.

As a configuration in which the heat sink is formed on the two main surfaces of the vertical semiconductor chip as described above, there is a flat package conventionally implemented in a thyristor or the like.
In this method, a wafer-shaped circular device is connected by pressing a metal plate from both sides instead of welding electrodes. Therefore, first, it cannot be used for a chip having a delicate structure such as a MOS structure on the surface.

The control electrode of the thyristor is extended as a separate terminal from the edge or the center of the wafer through a groove having a depth of several tens of μm dug in the wafer surface. Therefore, secondly, it is difficult to mount a chip manufactured by the planar technology on the chip.

Further, in the above-described conventional configuration, both metal plates are the main terminal electrodes and the heat radiating surfaces. Therefore, third, when using this, it is necessary to insulate it from others while using the cooling device in contact as an electrode, or to provide another insulator between the cooling device and the electrode. .

On the other hand, in the present embodiment, the metal on the heat radiation surface of the module is insulated from the electrodes by the insulating plate 104. Therefore, the third problem in the flat package does not exist from the beginning. Furthermore, by providing the buffer body 801, the MOS
A device having a delicate structure such as a structure can be mounted.

Next, a method of manufacturing a module having the above structure will be described. The step of welding the semiconductor chip 101 is the same as in the first embodiment. That is, the semiconductor chip 101 is fixed with low melting point solder, and after cooling, the semiconductor chip 10 is fixed.
1 is fixed with a heat-resistant adhesive of 2 to 300 ° C., such as a polyimide-based material. Thus, when the semiconductor chip 101 generates heat, the solder is prevented from melting and the semiconductor chip 101 is prevented from moving, and furthermore, it is possible to prevent moisture from entering the surface of the semiconductor chip 101.

After the above processing steps, a solder sheet is placed on the back surface of the semiconductor chip 101 whose surface is exposed,
Weld with the metal film 105 'on 04'. In this case, the solder sheet having a smaller area than the semiconductor chip 101 and a thickness of several hundred μm is used. When the solder is melted, the volume of the solder sheet is set so that the solder spreads over the entire semiconductor chip 101 and the thickness of the solder is about 50 μm.

On the other hand, the buffer body 801 is connected to the semiconductor chip 10.
1 and the specified thickness of the solder on the source electrode side 115 and the specified thickness of the solder on the back electrode side. Although not in contact with 104 and 104 ′, the solder melts by heating, and the melted solder spreads and contacts insulating plates 104 and 104 ′. Further, the insulating plates do not approach each other any more, and the weight of the structure by the module substrate 103 ′ and the insulating plate 104 ′ does not cover the semiconductor chip 101.

FIG. 13 is a cross-sectional view showing another configuration example according to the second embodiment, in which the module substrate 103 'is formed into a fin shape as shown in the figure to enhance the heat radiation function. Further, the module substrate 103 on one main surface has the same shape, and is configured to be attached to the cooling device as in the related art.

With the above-described structure, the heat radiation effect can be further improved, and it is not necessary to attach a new heat radiation fin. In FIG. 13, the side on which the radiation fins are formed is the back side of the semiconductor chip 101. However, the fins may be mounted on the opposite module substrate 103, or may be mounted on both sides depending on the application. Good.

Further, in the conventional module, the end of the module is fastened with a screw in order to bring the structure into close contact with the cooling device. At this time, since the module substrate 103 has a certain degree of rigidity and the metal plate adheres uniformly to the cooling device without distortion, the module substrate 103 needs a certain thickness. As a result, the metal plate occupies most of the thermal resistance. On the other hand, in this embodiment, since the module is configured to be pressure-bonded to the cooling device from both sides of the two main surfaces, it is not necessary to tighten the module with a screw in order to bring the module into close contact with the cooling device. Therefore, the thickness of the module substrate 103 can be reduced, and a considerable part of the thermal resistance of the module can be reduced.

Third Embodiment Next, a third embodiment will be described. The third embodiment will be described with reference to FIGS.
The third embodiment relates to an example of a module including a plurality of transistors, and FIGS. 14 to 17 illustrate a module having two sets of transistors that perform different operations as used when configuring an inverter. Also,
FIG. 17 is an equivalent circuit diagram of the power device shown in FIG.

That is, FIG. 14 is an explanatory view showing a mounting structure of the power device chip according to the third embodiment from a cross section, and shows an AA ′ cross section in FIG. Also,
FIG. 15 is an explanatory view showing a mounting structure of the power device chip according to the third embodiment from a cross section, and shows a plan view cut out by a line passing through two chips in FIG. 14.

In the figure, components having the same functions as those of the first and second embodiments are denoted by the same reference numerals, and description thereof is omitted. However, the one with the suffix “u” relates to the transistor on the high potential side in the inverter circuit, and the one with the suffix “d” relates to the transistor on the low potential side. Reference numeral 1401 denotes a lead connecting the low potential side drain electrode 102d and the high potential side source electrode 115u. 15 and FIG.
Reference numerals 501d and 1501u denote reflux diodes, respectively.

With the above configuration, compared with the conventional one,
The following effects are obtained. That is, in the conventional method using wire bonding, when a plurality of semiconductor chips 101u and 101d are mounted as described above, the number of mounting steps increases in proportion to the number of chips. Accordingly, the mounting of the semiconductor chips 101u and 101d can be performed in a batch process, and the cost does not increase.

Further, by disposing the transistor on one side and the other on the other side, the lead 1401 for connecting the bottom and ceiling electrodes becomes unnecessary. Further, in each of the above embodiments, the inner space of the outer shell case 111 may be filled with an insulator such as a silicone resin. In addition, although the MOS transistor is used as the semiconductor chip 101 in the module according to this embodiment, it is needless to say that the power supply is not limited to a bipolar transistor, a thyristor, and other vertical devices, but a lateral power device, and a logic circuit is partially mounted. It can be applied to the chip of the smart power device.

[0070]

The advantages of the present invention, which have been described with reference to the embodiments, are summarized below.
In the mounting structure of the power device chip related to
As before, a structure in which an insulating plate having a metal film serving as an electrode is attached to a metal plate serving as a module substrate, and the active region surface of the power device chip is turned down and the electrodes on the active region surface and the module side are mounted, contrary to the conventional method. By directly welding the electrodes with solder or the like, heat generated from the active region of the chip flows to the module side without passing through the chip itself. That is, since the heat flow does not pass through the chip itself, the thermal resistance of the entire module structure can be reduced.

Furthermore, the connection between the electrode on the surface of the active region of the chip and the electrode on the module side, which has conventionally been performed by wire bonding, is directly welded with solder or the like as described above, so that the number of connection points is reduced and the bonding strength is increased. Reliability is improved. Conventionally, local heating caused by non-uniform current in the active region has limited the safe operation area of the device chip, but as described above, the metal electrodes on the active region are directly connected with a large area. This also has the effect of expanding the safe operation area.

Further, since the time for mounting a plurality of wires at the same time can be reduced to one welding step, the mounting cost can be reduced. Conventionally, the device chip itself was incorporated in the heat flow path, so there was a process of reducing the thickness of the chip in order to reduce the thermal resistance.However, it was no longer necessary to perform this process. There is also an effect that costs can be reduced. In addition, by reducing the thermal resistance of the mounting structure in this manner, the chip size, which was conventionally increased to secure a heat radiation area, can be reduced to an appropriate size, and the chip cost can be reduced. Can be.

Further, in the mounting structure of the power device chip according to the claims (claim 2), the back surface of the chip mounted as described in (claim 1) and the corresponding electrode on the module side are leaded. By connecting with a frame, it is possible to improve the reliability by minimizing the change in the module structure and minimizing the number of connection points of the back surface electrodes.

Further, in the power device chip mounting structure according to the claims (claim 3), the back surface of the chip mounted as described above (claim 1) and the corresponding metal terminal on the module side are connected. By performing direct welding, the outer shape of the module becomes compact, and furthermore, the metal terminal also functions as a heat flow path, so that the heat dissipation is improved.

Further, in the power device chip mounting structure according to the claims (claim 4), the back surface of the chip mounted as described above (claim 1) and the corresponding electrode on the module side are formed as follows. The connection work is simplified by the same wire bonding as in the past, so that the mounting operation is simplified. Such a configuration is particularly effective when the back electrode only needs to be grounded in a power device having a low current capacity or a lateral power device chip.

In the power device chip mounting structure according to the claims (claim 5), (claim 1)
By welding a structure similar to the structure on which the chip is mounted to the back surface of the chip, that is, by sandwiching the chip between the two structures, the heat radiation effect is approximately doubled. Further, since the metal film, which is the main current of the module, forms a parallel plate, the inductance of the module is reduced. In addition, since the electrodes on the module side, which have been conventionally developed on a two-dimensional plane, can be arranged three-dimensionally, the module size can be significantly reduced.
In addition, between the two structures, a buffer that secures a predetermined distance with the chip is interposed to protect the chip from external force, so even device chips having a delicate surface structure such as a MOS structure can be safely mounted and used. can do.

Further, in the power device chip mounting structure according to the claims (claim 6), in the metal plate having the structure mounted as described in (claim 5), another metal plate not in contact with the insulating plate may be used. By having the radiation fins on the main surface, the radiation characteristics can be easily improved.

Further, in the mounting structure of the power device chip according to the claims (claim 7), in the structure mounted as described in the above (claims 1 to 5), the metal on the structure is The mounting process is simplified by welding the film and the metal film on the chip side with solder as before.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a mounting structure of a power device chip according to a first embodiment.

FIG. 2 is a plan view showing a surface electrode structure of a semiconductor chip mounted on the module shown in FIG. 1;

FIG. 3 is a plan view showing a case where an outer shell case, a semiconductor chip, and each terminal of the module shown in FIG. 1 are removed.

FIG. 4 is a sectional view showing another example of a mounting structure according to the first embodiment.

FIG. 5 is a sectional view showing another example of a mounting structure according to the first embodiment.

FIG. 6 is a plan view showing another embodiment of the surface electrode structure of the semiconductor chip shown in FIG. 2;

FIG. 7 is a plan view showing another embodiment of the surface electrode structure of the semiconductor chip shown in FIG. 2;

FIG. 8 is a cross-sectional view illustrating a mounting structure of a power device chip according to a second embodiment.

FIG. 9 is a cross-sectional view illustrating a mounting structure of a power device chip according to a second embodiment.

FIG. 10 is a sectional view showing the opposite side of the section shown in FIG. 9;

FIG. 11 is a cross-sectional view illustrating a mounting structure of a power device chip according to a second embodiment.

FIG. 12 is a perspective view illustrating an outer shape of a module according to a second embodiment.

FIG. 13 is a cross-sectional view illustrating another example of a mounting structure according to the second embodiment.

FIG. 14 is a sectional view illustrating a mounting structure of a power device chip according to a third embodiment.

FIG. 15 is a sectional view illustrating a mounting structure of a power device chip according to a third embodiment.

16 is a sectional view showing the opposite side of the sectional view shown in FIG.

17 is an equivalent circuit diagram corresponding to the cross-sectional view shown in FIG.

FIG. 18 is a sectional view showing the structure of a conventional power semiconductor module.

FIG. 19 is an explanatory diagram showing a breakdown of data such as a thermal resistance value for each component in a conventional power semiconductor module.

[Explanation of symbols]

 101 semiconductor chip 103, 103 'module substrate 104, 104' insulating plate 105, 105 'metal film 108 drain terminal 110 solder 115A, 201A electrode window 105A, 302A electrode window 801 buffer

Claims (7)

(57) [Claims] 1. An insulating plate having a relatively low thermal resistance and a high electric resistance is provided on one main surface of a metal plate, and one metal film insulated from the metal plate is provided on the insulating plate. Or a plurality of contact windows having an insulating film on the metal film, and having two types of contact windows exposing the metal film in a predetermined region of the insulating film for each metal film; In the first contact window, the metal film and the electrode of the power device chip are connected, and in the second contact window, the metal film and the metal terminal are connected, and the power device chip has at least most of one main surface. Is an active region, a plurality of electrodes having different functions are provided on a main surface of the active region, and each electrode on the active region is provided with the metal film corresponding to the first contact window. Characterized by being connected Power device chip mounting structure. 2. Among the electrodes of the power device chip, the electrode on the main surface not facing the metal film, that is, the metal terminal corresponding to the back electrode is fixed to the insulating plate, and the back electrode and the metal terminal The power device chip mounting structure according to claim 1, wherein the power device chips are electrically connected by a lead frame. 3. The mounting structure of a power device chip according to claim 1, wherein a corresponding metal terminal is directly welded to a back electrode of the power device chip. 4. The power device chip according to claim 1, wherein a metal terminal corresponding to the back electrode is fixed on the insulating plate, and the back electrode and the metal terminal are connected by wire bonding. The mounting structure of the described power device chip. 5. The heat resistance of one main surface of the metal plate is relatively low,
And having an insulating plate having a high electric resistance, having one or more metal films insulated from the metal plate on the insulating plate, and having an insulating film on the metal film; In a predetermined region of the insulating film, the metal film has two types of contact windows exposing the metal film. Of the contact windows, the first contact window connects the metal film and an electrode of a power device chip. In the second contact window, there are two structures in which the metal film and the metal terminal are connected. In the power device chip, at least a major part of one main surface is an active region, and the power device chip has a main region having the active region. A plurality of electrodes having different functions are provided on the surface, and each electrode on the active region is connected to the first contact window at the first contact window.
An electrode present on the other main surface of the power device chip, connected to the corresponding metal film on the second structure, and connected to the corresponding metal film on the second structure, A distance between the first and second structures sandwiching the first and second structures is held by a buffer having a constant thickness. 6. The mounting structure of a power device chip according to claim 5, wherein a heat radiation fin is provided on another main surface of said structure that is not in contact with said insulating plate. 7. The mounting structure of a power device chip according to claim 1, wherein an electrode of the power device chip and the metal film are connected by solder welding.