JP3525753B2 - Power module - Google Patents

Power module

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Publication number
JP3525753B2
JP3525753B2 JP24008398A JP24008398A JP3525753B2 JP 3525753 B2 JP3525753 B2 JP 3525753B2 JP 24008398 A JP24008398 A JP 24008398A JP 24008398 A JP24008398 A JP 24008398A JP 3525753 B2 JP3525753 B2 JP 3525753B2
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JP24008398A
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JP2000068447A (en )
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雄二 八木
厚志 塚田
宏 長瀬
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株式会社豊田中央研究所
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、電気自動車に使用される電力用パワーモジュールに関する。 BACKGROUND OF THE INVENTION [0001] [Technical Field of the Invention The present invention relates to power a power module used in an electric vehicle. 【0002】 【従来の技術】電気自動車等(ハイブリッド自動車を含む)の電動機のコイルに所定の交流電力を供給するインバータは、電力用スイッチング素子等で構成されている。 [0002] Inverter supplying predetermined AC power to the coil of the electric motor of the Related Art electric vehicles (including hybrid vehicles) is composed of a power switching element. 電力用半導体としては、IGBTやパワーMOSF As the semiconductor for power, IGBT and power MOSF
ET等の半導体チップに形成されたパワー素子が用いられている。 A semiconductor chip which is formed in the power element such as ET is used. パワー素子が形成された半導体チップは、制御回路等と共に一つのパワーモジュールに封止されている。 The semiconductor chip of the power element is formed is sealed in one of the power module with the control circuit or the like. 【0003】このようなパワーモジュールにおいては、 [0003] In such a power module,
封止されているパワー素子自体に大電流が流れるため、 Since a large current flows through the power device itself is sealed,
このパワー素子が発熱し熱破壊が起こる場合がある。 The power element is sometimes exothermic heat failure occurs. このような熱破壊を防止するために、従来、封止されている半導体チップを絶縁板を介して金属基板に取り付け、 To prevent such thermal destruction, conventional, mount the semiconductor chip are sealed to the metal substrate through an insulating plate,
その金属基板には放熱フィンを取り付け、冷却が行われていた。 As the metal substrate attached to the heat radiating fin, the cooling has been carried out. 【0004】図1には、従来のパワーモジュールが示されている。 [0004] Figure 1 is a conventional power module is shown. パワーモジュール2内には、表面にパワー素子としてIGBT(Insulated Gate B In the power module 2, IGBT on the surface as the power element (Insulated Gate B
ipolar Transistor)が形成された半導体チップ4が、絶縁基板6上の金属膜8に半田9で固定されている。 iPolar Transistor) semiconductor chip 4 formed is fixed by solder 9 to the metal film 8 on the insulating substrate 6. 【0005】金属膜8はコレクタ用電極端子(図示せず)に接続されており、半導体チップ4の半導体基板にコレクタ電圧を供給する。 [0005] Metal layer 8 is connected to the collector electrode terminals (not shown), supplies a collector voltage to the semiconductor substrate of the semiconductor chip 4. AlやAu等の金属細線でできている金属細線10の両端は、半導体チップ4上のゲート電極11と絶縁基板6上の金属膜12に超音波溶接で接合されている。 Both ends of the thin metal wire 10 which is made of Al or Au, etc. of the metal thin wire is bonded by ultrasonic welding to the metal film 12 on the gate electrode 11 and the insulating substrate 6 on the semiconductor chip 4. 金属膜12はゲート用電極端子(図示せず)に接続されているため、金属細線10とゲート用電極端子は電気的に接続され、ゲート用電極端子から金属細線10にゲート電圧が供給される。 Since the metal film 12 is connected to the gate electrode terminals (not shown), the metal thin wire 10 and the gate electrode terminal is electrically connected, the gate voltage is supplied to the thin metal wire 10 from the gate electrode terminal . また、ボンディングワイヤ13の両端は、半導体チップ4上のエミッタ電極14と絶縁基板6上の金属膜16に超音波溶接で接合されている。 Further, both ends of the bonding wire 13 is bonded by ultrasonic welding to the metal film 16 of the emitter electrode 14 and on the insulating substrate 6 on the semiconductor chip 4. エミッタ用電極端子18は半田20で金属膜16に取り付けられているので、ボンディングワイヤ13とエミッタ用電極端子18は電気的に接続され、エミッタ用電極端子18からボンディングワイヤ1 Since the emitter electrode terminal 18 is attached to the metal film 16 with solder 20, the bonding wire 13 and the emitter electrode terminals 18 are electrically connected, the bonding wire 1 from the emitter electrode terminals 18
3にエミッタ電圧が供給される。 Emitter voltage is supplied to the 3. 【0006】絶縁基板6下面は、金属膜22を介して、 [0006] insulating substrate 6 the lower surface through the metal film 22,
金属基板24上に半田26で取り付けられている。 On the metal substrate 24 are attached by solder 26. プラスチック等の材質で形成された外殻ケース28と金属基板24とでパッケージ29が構成され、半導体チップ4、絶縁基板6、金属膜8、12、16、金属細線1 Package 29 is composed of an outer shell case 28 and the metal substrate 24 formed of a material such as plastic, a semiconductor chip 4, the insulating substrate 6, the metal film 8, 12, 16, metal thin wires 1
0、13とエミッタ用電極端子18の一部分は、パッケージ29に封止されており、一つのパワーモジュールを構成している。 0,13 and part of the emitter electrode terminal 18 are sealed in the package 29 constitutes a single power module. 金属基板24には図示していない放熱フィンが設置されており、半導体チップ4で発生した熱は金属基板24を介して半導体チップ4の下面に放熱されることにより、半導体チップ4が冷却される。 Radiation fins is not shown in the metal substrate 24 is installed, by the heat generated in the semiconductor chip 4 is radiated to the lower surface of the semiconductor chip 4 through the metal substrate 24, the semiconductor chip 4 is cooled . 【0007】 【発明が解決しようとする課題】しかしながら、金属基板24で半導体チップ4を冷却する場合、半導体チップ4と金属基板24との間に、熱伝導率が低い絶縁基板6 [0007] The present invention is, however, the case of cooling the semiconductor chip 4 with a metal substrate 24, the semiconductor chip 4 and between the metal substrate 24, a low thermal conductivity insulating substrate 6
や半田9、26が介在している。 And solder 9, 26 is interposed. そのため、半導体チップ4を十分に冷却することができない。 Therefore, it is impossible to sufficiently cool the semiconductor chip 4. また、金属細線10、13は一般に熱伝導率が高い材質であるが、金属細線であるため、効果的な放熱ができない。 Further, the metal thin wires 10, 13 are generally of high thermal conductivity material, because it is thin metal wires, it can not be effectively radiated. そのため、 for that reason,
半導体チップ4の発熱量が増大すると、チップ破壊が生じる場合がある。 When the amount of heat generated by the semiconductor chip 4 is increased, there is a case where chip breakdown occurs. 【0008】本発明は、上記課題に鑑みなされたものであり、封止されたパワー素子を効果的に冷却することができるパワーモジュールを提供することを目的とする。 [0008] The present invention has been made in view of the above problems, and an object thereof is to provide a power module which can effectively cool the sealed power element. 【0009】 【課題を解決するための手段】本発明は、 パワーモジュ [0009] According to an aspect of the present invention, the power module
ールであって、上面電極と下面電極とを有するパワー素 A Lumpur, power element having a top surface electrode and the lower electrode
子と、前記パワー素子の下面電極が固定される絶縁基板 An insulating substrate and a child, the lower electrode of the power device is fixed
と、前記絶縁基板の下面が固定される、内部に冷却液が When the insulating lower surface of the substrate is fixed, inside the cooling liquid
流通する金属製の第1の冷却板と、前記絶縁基板の上面 A first cooling plate metal flowing, upper surface of the insulating substrate
に設けられ、外部に電気的接続を行うための電極端子 Provided, the electrode terminals for electrical connection to an external
と、前記パワー素子の上面電極と前記電極端子とを電気 When the electrical and the electrode terminal and the upper surface electrode of the power device
的に接続する金属板と、前記金属板の前記パワー素子に A metal plate connected to said power element of said metal plate
接続された反対の面が、絶縁体を介して接続される、内 Connected opposite side is connected via an insulator, the inner
部に冷却液が流通する金属製の第2の冷却板と、を備え Includes a second cooling plate metal coolant flows in part, the
ることを特徴とする。 And wherein the Rukoto. 【0010】また、 さらに前記金属板と前記電極端子と Further, the more the electrode terminal and the metal plate
を電気的に接続する配線用金属端子を備え、前記配線用 Includes a wiring metal terminals for electrically connecting, for said wiring
金属端子の上面は、前記パワー素子の上面電極と、同一平面上にあり、前記金属板は、平板であるが好ましい。 The upper surface of the metal pins, and the upper surface electrode of the power device, are coplanar, the metal plate is a flat plate preferred. 【0011】パワー素子は、その動作に応じて発熱する。 [0011] The power element generates heat in response to the operation. 接続線路は、電気的接続を行う導電体であり、パワー素子の熱は接続線路を通じて伝達されやすい。 Connection line is a conductor for electrically connecting, easy heat of the power device is transmitted through the connection line. そして、この接続線路が金属板となっている。 Then, the connection line is a metal plate. 金属板は、比較的大きな面積としやすく、この金属板から効果的に放熱を行える。 Metal plate is easy to relatively large areas, it can be performed efficiently radiated from the metal plate. 【0012】また、金属板とパワー素子の接続は、スポット溶接で行うことが好ましい。 [0012] The connection of the metal plate and the power element is preferably carried out by spot welding. 複数点におけるスポット溶接によって、面積の広い金属板とパワー素子の電極面との接続を確実に行うことができる。 By spot welding at a plurality of points, it is possible to connect the electrode surface of the wider metal plate and the power element in area reliably. スポット溶接は超音波接合が好ましい。 Spot welding is ultrasonic bonding is preferred. 【0013】なお、パワー素子は、通常絶縁基板上に固定されている。 [0013] The power element is fixed to the normally insulating substrate. 従って、この絶縁基板側からの放熱は、 Thus, heat dissipation from the insulating substrate side,
従来通り行える。 It can be carried out as usual. 本発明では、接続線路を介して放熱できる熱量が大きくなり、効果的な放熱が達成できる。 In the present invention, the amount of heat that can be dissipated through the connecting line increases, effective heat dissipation can be achieved. 【0014】また、本発明では、金属板が絶縁体を介して、冷却板に接続されていてもよい。 [0014] In the present invention, the metal plate through an insulator, may be connected to the cooling plate. 金属板は、比較的大きな面積としやすいため、この金属板から冷却板に効果的に熱を伝達できる。 Metal plate, and is easy and relatively large area can be effectively transfers heat to the cooling plate from the metal plate. 冷却板は内部に冷却液が流通しており、かつ熱伝導率の高い金属製であるため、より効果的な放熱が行える。 The cold plate has coolant flowing therein, and because it is made of metal having high thermal conductivity, allows more effective heat dissipation. 【0015】また、前記金属板と冷却板の間に介在する絶縁体は、熱伝導性のよい材質を採用することが好ましい。 [0015] The insulating body interposed between the metal plate and the cooling plates, it is preferable to employ a good material thermal conductivity. これによって、金属板から冷却板へ向けての熱の流れをスムーズなものにでき、放熱効果を上昇することができる。 Thus, the flow of heat towards the metal plate to the cooling plate can be a smooth one, it is possible to increase the heat dissipation effect. 【0016】また、電極端子を外部に引き出す部分を除くパワー素子の周囲を金属製の冷却板により覆うように構成することで、パワー素子の放熱を上昇できる。 Further, the periphery of the power device except the portion to draw the electrode terminals to the outside by configuring so as to cover the metal cooling plate, can increase the heat dissipation of the power element. また、電極端子を外部に引き出す部分は、プラスチック材で構成し、冷却板とこのプラスチック材とで、パワー素子の周囲を封止する封止体を構成することが好ましい。 The portion to draw the electrode terminals to the outside, and a plastic material, in the cooling plate and the plastic material, it is preferable that the sealing body for sealing the periphery of the power device. 【0017】更に、冷却板を二層構造として、各層間の間隙を冷却液の通路にすることが好ましい。 Furthermore, a cooling plate as a two-layer structure, it is preferable that the gap between the layers to the passage of the cooling liquid. この構成により、冷却液の通路を容易に形成することができる。 With this configuration, it is possible to easily form the passage of the cooling liquid. 【0018】 【発明の実施の形態】以下、本発明の実施の形態(以下実施形態という)を、図面に従って説明する。 DETAILED DESCRIPTION OF THE INVENTION Hereinafter, the embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings. 【0019】図2(a)には第一の実施形態の冷却手段を備えたパワーモジュールの断面図が、図2(b)には図2(a)のA−A'線での平面図が示されている。 The cross-sectional view of a power module having a cooling means of the first embodiment in FIG. 2 (a), a plan view at line A-A 'in FIG. 2 (a) in FIG. 2 (b) It is shown. パワーモジュール2内には、表面にパワー素子としてIG In the power module 2, IG on the surface as a power element
BTが形成された半導体チップ4が、絶縁基板6上の金属膜8に半田9で固定されている。 BT semiconductor chip 4 which is formed, are fixed by solder 9 to the metal film 8 on the insulating substrate 6. 絶縁基板6は金属膜22を介して、金属基板24に半田26を介して取り付けられている。 Insulating substrate 6 through the metal film 22, it is mounted via the solder 26 to the metal substrate 24. 絶縁基板6によって、金属膜22と半導体チップ4は電気的に絶縁される。 The insulating substrate 6, the metal film 22 and the semiconductor chip 4 is electrically insulated. 【0020】なお、ここでは、パワー素子としてIGB [0020] Here, as a power element IGB
Tを使用しているが、パワーMOSFET(Metal We are using the T, but the power MOSFET (Metal
Oxide Semiconductor Feil Oxide Semiconductor Feil
d−Effect Transistor)等の他のパワー素子を用いてもよい。 It may use other power devices d-Effect Transistor) or the like. 【0021】パワー素子としてIGBTを用いた場合、 [0021] In the case of using the IGBT as the power element,
半導体チップ4上のゲート電極11、エミッタ電極14 The gate electrode 11 on the semiconductor chip 4, the emitter electrode 14
及びコレクタ電極(即ち、半導体チップ4の半導体基板)に電圧を供給するために、チップ上のそれぞれの電極と、チップ外部へ電気的に接続される電極端子とを接続する必要がある。 And collector electrodes (i.e., a semiconductor substrate of the semiconductor chip 4) voltage to supply to the respective electrodes on the chip, it is necessary to connect the electrode terminals electrically connected to outside the chip. 【0022】半導体チップ4上のゲート電極11への電圧供給は、ゲート用電極端子30から行われる。 The voltage supply to the gate electrode 11 on the semiconductor chip 4 is carried out from the gate electrode terminal 30. ゲート電極11は、金属細線10を介してゲート用電極端子3 The gate electrode 11, the gate electrode terminal 3 through the thin metal wire 10
0に電気的に接続される。 0 to be electrically connected. まず、金属細線10の両端は、一方がゲート電極11に、もう一方が絶縁基板6上の金属膜12にスポット溶接される。 First, both ends of the thin metal wires 10, one of the gate electrode 11, the other is spot welded to the metal film 12 on the insulating substrate 6. スポット溶接は超音波溶接が好ましい。 Spot welding, ultrasonic welding is preferred. さらに、金属膜12はゲート用電極端子30に半田で接合されるので、金属細線10とゲート用電極端子30は電気的に接続される。 Furthermore, the metal film 12 because they are joined by soldering to the gate electrode terminal 30, the metal thin wire 10 and the gate electrode terminal 30 are electrically connected. 【0023】半導体チップ4上のコレクタ電極、即ち、 [0023] The collector electrode on the semiconductor chip 4, that is,
半導体チップ4の半導体基板への電圧供給は、コレクタ用電極端子32から、半導体チップ4の下面に半田9で取り付けられている金属膜8を介して行われる。 Voltage supply to the semiconductor substrate of the semiconductor chip 4, from the collector electrode terminal 32 is performed via a metal film 8 is attached by solder 9 on the lower surface of the semiconductor chip 4. 【0024】半導体チップ4上のエミッタ電極14への電圧供給は、エミッタ用電極端子18から行われる。 The voltage supply to the emitter electrode 14 on the semiconductor chip 4 is carried out from the emitter electrode terminal 18. エミッタ電極14には、金属板34が接続されている。 The emitter electrode 14, the metal plate 34 is connected. 金属板34にはさらに配線用金属端子38が接続されている。 It is further connected wiring metal terminal 38 in the metal plate 34. 配線用金属端子38は金属膜16に半田40で接合されており、金属膜16にはエミッタ用電極端子18が半田20で接合されている。 Wiring metal terminal 38 is joined with solder 40 to the metal film 16, an emitter electrode terminal 18 is joined by solder 20 to the metal film 16. このように、エミッタ電極14は、金属板34、配線用金属端子38、半田40、 Thus, the emitter electrode 14, the metal plate 34, wiring metal terminals 38, solder 40,
金属膜16、半田20を介してエミッタ用電極端子18 Metal film 16, the electrode emitter through the solder 20 terminal 18
に電気的に接続されている。 It is electrically connected to. 【0025】エミッタ電極14とエミッタ用電極端子1 [0025] The emitter electrode 14 and the emitter electrode terminals 1
8との接続線路は、従来用いられていた金属細線ではなく、金属板34を使用しており、金属板34は金属細線と比較して大きな面積を有している。 Connection line between the 8 is not a metal conventionally used thin lines, uses a metal plate 34, metal plate 34 has a larger area compared to the thin metal wire. そのため、金属板34とエミッタ電極14及び配線用金属端子38との接続はそれぞれ接合部36及び接合部39において、スポット溶接することが好ましい。 Therefore, the metal plate 34 and the emitter electrode 14 and the respective joint portions 36 and the joining portion 39 is connected to the wiring metal terminal 38, it is preferable to spot weld. 接合部36及び接合部3 Joint 36 and the joint portion 3
9の複数点でスポット溶接を行うことにより、面積の広い金属板34と、エミッタ電極14および配線用金属端子38との接続を確実に行うことができる。 By performing the spot welding at a plurality of points of 9, a wide metal plate 34 in area, the connection between the emitter electrode 14 and the wiring metal terminal 38 can be reliably performed. スポット溶接は超音波溶接であることが好ましい。 It is preferred spot welding is ultrasonic welding. なお、金属板3 It should be noted that the metal plate 3
4と配線用金属端子38との接続はレーザ溶接を用いても良い。 4 and the connection between the wiring metal terminal 38 may be a laser welding. 【0026】また、本実施形態では、金属板34と配線用金属端子38と接続し、エミッタ電極14とエミッタ用電極端子18との接続線路として用いたが、金属板3 Further, in this embodiment, connected to the metal plate 34 and the wiring metal terminal 38, it is used as the connection line between the emitter electrode 14 and the emitter electrode terminal 18, the metal plate 3
4と配線用金属端子38とを一体とした金属製の部材を用いても構わない。 4 and the wiring metal terminal 38 may be used a metal member having integrated. 【0027】また、各電極端子18、30、32、配線用金属端子38と金属板34は、導電性の良い材料が用いられるのが好ましい。 Further, the electrode terminals 18,30,32, wiring metal terminals 38 and the metal plate 34, a conductive material having good is preferably used. そして、金属板34は、配線用金属端子38およびエミッタ電極14に超音波溶接で接合されるので、配線用金属端子38およびエミッタ電極14の材質により、超音波溶接が容易にできる材料を適宜選択するのが好ましい。 Then, the metal plate 34, because they are joined by ultrasonic welding to the wiring metal terminal 38 and the emitter electrode 14, the material of the wiring metal terminal 38 and the emitter electrode 14, appropriately selecting a material ultrasonic welding can be easily it is preferable to. 例えば、エミッタ電極14がAlで形成されている場合、金属板34もAl等のAl For example, if the emitter electrode 14 is formed by Al, the metal plate 34 of Al such as Al
と超音波溶接が容易にできる材料のものが良い。 And good ones materials ultrasonic welding can be easily. 【0028】半導体チップ4が載置された絶縁基板6の下面は、金属膜22を介して、金属基板24上に半田2 The lower surface of the semiconductor chip 4 insulating substrate 6 placed is via the metal film 22, second solder on the metal substrate 24
6で取り付けられている。 It is installed in the 6. チップ側面側は外殻ケース2 Chip side surface of the outer shell case 2
8で囲まれており、外殻ケース28の下部には金属基板24が、上部冷却板44が取り付けられている。 8 is surrounded by, the bottom of the outer case 28 metal substrate 24, the upper cooling plate 44 is attached. 外殻ケース28は、電極端子18、30、32を外部に引き出すため、プラスチック等の絶縁部材で構成されている。 Outer case 28, for drawing the electrode terminals 18,30,32 to the outside is made of an insulating member such as plastic.
これらの金属基板24、外殻ケース28と上部冷却板4 These metal substrates 24, the outer shell case 28 and the upper cooling plate 4
4より、パッケージ29が構成される。 Than 4, package 29 is constructed. パッケージ29 Package 29
内には、半導体チップ4、絶縁基板6、金属膜8、1 The inner semiconductor chip 4, the insulating substrate 6, the metal film 8,1
2、16、金属細線10、金属板34と、ゲート用電極端子30、コレクタ用電極端子32、エミッタ用電極端子18の一部分が封止され、一つのパワーモジュール2 2,16, the metal thin wires 10, the metal plate 34, the gate electrode terminal 30, a collector electrode terminal 32, a portion of the emitter electrode terminal 18 are sealed, one power module 2
を構成している。 Constitute a. なお、金属基板24及び上部冷却板4 The metal substrate 24 and the upper cooling plate 4
4は熱伝導率が良い金属製であることが好ましい。 4 is preferably the thermal conductivity is good metal. 【0029】半導体チップ4は絶縁基板6を介して、冷却された金属基板24に載置されているので、絶縁基板6を介しての放熱を従来通り行うことが可能である。 The semiconductor chip 4 through the insulating substrate 6, because it is placed on the cooled metal substrate 24, it is possible to perform conventional heat dissipation through the insulation substrate 6. 【0030】また、エミッタ電極14に接続される金属板34は、絶縁膜48を介して、上部冷却板44に接続される。 Further, the metal plate 34 connected to the emitter electrode 14 through the insulating film 48, is connected to the upper cooling plate 44. 金属板34は比較的面積が広いため、半導体チップ4で発生する熱を効果的に上部冷却板44に伝達することができる。 Since a wide metal plate 34 is relatively area, it is possible to transfer heat generated in the semiconductor chip 4 to effectively upper cooling plate 44. 上部冷却板44は比較的面積が広く、 Upper cooling plate 44 are relatively area is wide,
金属製であるため、半導体チップ4で発生する熱を効果的に放熱できる。 Because it is made of metal, the heat can be effectively dissipated generated in the semiconductor chip 4. なお、絶縁膜48は、金属板34と上部冷却板44とを電気的に絶縁できればよいが、上部冷却板44から半導体チップ4に効果的に熱を伝達する必要があるため、シリコンゴム等の熱伝導率が高く厚さを薄くできる材質の物が好ましい。 Note that the insulating film 48, may if electrically insulating the metal plate 34 and the upper cooling plate 44, it is necessary to effectively transfer heat from the upper cooling plate 44 to the semiconductor chip 4, such as silicone rubber those are preferred materials which can reduce the high thickness thermal conductivity. 【0031】このように、第一の実施形態では、半導体チップ4は比較的面積の大きな金属板34を介して、比較的面積の大きな上部冷却板44と接続されている。 [0031] Thus, in the first embodiment, the semiconductor chip 4 through a large metal plate 34 of a relatively area, is connected to the large upper cooling plate 44 of a relatively area. そのため、金属板34を介して、半導体チップ4から上部冷却板44へ逃げる熱量が大きくなり、効果的な放熱が達成できる。 Therefore, through the metal plate 34, heat is increased to escape from the semiconductor chip 4 to the upper cooling plate 44, effective heat dissipation can be achieved. そのため、半導体チップ4を絶縁基板6側と上部冷却板44側の両側より冷却することができるので、従来より効果的に半導体チップ4を冷却することができる。 Therefore, since the semiconductor chip 4 can be cooled from both sides of the insulating substrate 6 side and the upper cooling plate 44 side, can be cooled effectively the semiconductor chip 4 than the conventional. 【0032】次に、第二の実施形態の冷却手段を備えたパワーモジュールについて説明する。 Next, a description will be given of a power module having a cooling means in the second embodiment. 【0033】図3(a)には第二の実施形態の冷却手段を備えたパワーモジュールの断面図が、図3(b)には図3(a)のA−A'線での平面図が示されている。 The cross-sectional view of a power module having a cooling means of the second embodiment in FIG. 3 (a), a plan view at line A-A 'in FIG. 3 in FIG. 3 (b) (a) It is shown. 【0034】第二の実施形態においては、パッケージ2 [0034] In the second embodiment, the package 2
9内に、封止された半導体チップ4を取り囲むように数個の冷却溝46が形成されている。 In 9, several cooling channels 46 are formed so as to surround the semiconductor chip 4 sealed. 冷却溝46内には冷却液が循環されており、パッケージ29の金属基板24 The inside of the cooling channel 46 and the cooling fluid is circulated, a metal substrate 24 of the package 29
と上部冷却板44が冷却液により冷却されている。 An upper cooling plate 44 is cooled by the cooling fluid and. 金属板34は、絶縁膜48を介して、上部冷却板44に接続されいる。 Metal plate 34 via the insulating film 48, and is connected to the upper cooling plate 44. 金属板34は比較的面積が大きく、半導体チップ4で発生した熱を上部冷却板44に容易に伝達できる。 Metal plate 34 is relatively area is large and can easily transmit the heat generated in the semiconductor chip 4 to the upper cooling plate 44. そのため、上部冷却板44から半導体チップ4を効果的に冷却することができる。 Therefore, it is possible to effectively cool the semiconductor chip 4 from the upper cooling plate 44. 【0035】このように、第二の実施形態では、半導体チップ4を絶縁基板6側と上部冷却板44側の両側より冷却することができるので、従来より効果的に半導体チップ4を冷却することができる。 [0035] Thus, in the second embodiment, since the semiconductor chip 4 can be cooled from both sides of the insulating substrate 6 side and the upper cooling plate 44 side, possible to effectively cool the semiconductor chip 4 than the conventional can. 特に、上部冷却板44 In particular, the upper cooling plate 44
は、半導体チップ4と比較的面積の大きな金属板34を介して接続されているため、半導体チップ4から上部冷却板44に逃げる熱量が大きくなり、効果的な放熱が達成できる。 , Because they are connected via a large metal plate 34 of a relatively area between the semiconductor chip 4, the amount of heat is increased to escape to the upper cooling plate 44 from the semiconductor chip 4, effective heat dissipation can be achieved. 【0036】図4には、二層構造のパッケージを備えたパワーモジュールの断面図が示されている。 [0036] FIG. 4 is a sectional view of a power module with a package of two-layer structure is shown. 図4では、 In Figure 4,
図3におけるパッケージ29を二層構造にし、層と層の間に冷却液を循環させている。 The package 29 in FIG. 3 and a two-layer structure, and by circulating cooling fluid between the layers. 上部冷却板44、外殻ケース28、金属基板24で第一の封止層が構成され、第一の封止層の外側に第二の封止層52が形成されている。 Upper cooling plate 44, the outer shell case 28, the first sealing layer in the metal substrate 24 is formed, the second sealing layer 52 is formed on the outside of the first sealing layer. 第一の封止層は三方が第二の封止層52に囲まれており、第一の封止層と第二の封止層52との間の冷却溝46に冷却液が流されている。 The first sealing layer is three sides surrounded by a second sealing layer 52, the cooling fluid is passed through the cooling channels 46 between the first sealing layer and the second sealing layer 52 there. 【0037】第一の封止層と第二の封止層52との間に冷却液を流すための、冷却液の流入口を確保するため金属板54及び56が取り付けネジ58、60、62、6 The first sealing layer and the second for the flow of cooling liquid between the sealing layer 52, threaded metal plates 54 and 56 attached for securing the inlet of the cooling fluid 58, 60, 62 , 6
4で第一の封止層及び第二の封止層52に固定されている。 4 is fixed to the first sealing layer and the second sealing layer 52. なお、本実施形態では、冷却液の流入口の確保は、 In the present embodiment, securing the inlet of the cooling liquid,
金属板54及び56を取り付けネジ58、60、62、 Screw 58, 60, 62 fitted with a metal plate 54 and 56,
64で取り付ける方法で行った。 It was carried out in the method of attaching at 64. しかしながら、流入口の確保はこの方法に限定したものではなく、例えば、金属板54と56を第二の封止層52と一体型するなど、 However, securing the inlet is not intended to be limited to this method, for example, a metal plate 54 and 56 and the second sealing layer 52 such as an integrated,
流入口を確保できればよい。 It is only necessary to ensure the inlet. また、金属板54と56は金属製である必要はなく、絶縁物でもよく、材料は適宜選択することができる。 The metal plate 54 and 56 need not be made of metal, may be an insulating material, the material can be appropriately selected. 【0038】このように、第一の封止層と第二の封止層52との間に冷却液が循環され、第一の封止層が冷却される。 [0038] Thus, the coolant is circulated between the first sealing layer and the second sealing layer 52, the first sealing layer is cooled. 第一の封止層が冷却されると、上部冷却板44および金属基板24により、半導体チップ4が冷却される。 When the first sealing layer is cooled, by the upper cooling plate 44 and the metal substrate 24, the semiconductor chip 4 is cooled. 【0039】二層構造のパッケージによる冷却方法は、 The cooling method according to the package of a two-layer structure,
図5に示されるように、第一の封止層の四方を囲むように冷却液を流してもよい。 As shown in FIG. 5, it may be flowed coolant so as to surround the four sides of the first sealing layer. この場合、冷却液の流入口を確保するために金属板66が取り付けネジ68、70により、第二の封止層52に取り付けられている。 In this case, the metal plate 66 is attached screws 68, 70 to ensure the inlet of the cooling liquid is attached to the second sealing layer 52. また、 Also,
エミッタ用電極端子18と金属板66とを電気的に絶縁するために、絶縁チューブ72が設置される。 To electrically insulate the emitter electrode terminals 18 and the metal plate 66, the insulating tube 72 is placed. なお、金属板66は冷却水の冷却口を確保できればよいので、第二の封止層52と一体型でもよいし、また、金属製でなくてもよい。 Since the metal plate 66 may be secured to the cooling outlet of the cooling water, it may be the second sealing layer 52 and the integral, or may be non-metallic. 【0040】このように、以上の実施形態では、半導体チップ4をチップ下面の金属板24および上部冷却板4 [0040] Thus, in the above embodiments, the metal plate 24 of the chip bottom surface of the semiconductor chip 4 and the upper cooling plate 4
4の両側から冷却するので、効果的に半導体チップ4を冷却することができる。 Since cooling from both sides of the 4, it is possible to effectively cool the semiconductor chip 4. 【0041】なお、以上の実施形態では、絶縁基板6上には一個の半導体チップのみを載置したが、二個以上の半導体チップを絶縁基板6上に載置してもよい。 [0041] In the above embodiments, but on the insulating substrate 6 was placed only one semiconductor chip, two or more semiconductor chips may be mounted on the insulating substrate 6. 【0042】 【発明の効果】以上のように、本発明では、パワー素子が載置された絶縁基板側からとパワー素子と電気的に接続された接続線路側の両側から、パワー素子を冷却することが可能であり、特に接続線路側から逃げる熱量が大きいので、パワー素子を効果的に冷却することが可能である。 [0042] As described above, according to the present invention, the present invention, an insulating substrate on which the power elements are mounted from both sides of the power element and electrically connected to the connection line side, to cool the power element it is possible, especially since the amount of heat is large escaping from the connection line side, it is possible to effectively cool the power element.

【図面の簡単な説明】 【図1】 従来の冷却手段を備えたパワーモジュールの概略図である。 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a power module with a conventional cooling means. 【図2】 第一の実施形態のパワーモジュールの概略図である。 Figure 2 is a schematic view of the power module of the first embodiment. 【図3】 第二の実施形態のパワーモジュールの概略図である。 Figure 3 is a schematic diagram of a power module of the second embodiment. 【図4】 二層構造のパッケージを備えたパワーモジュールの概略図である。 Figure 4 is a schematic diagram of a power module with a package of two-layer structure. 【図5】 第4図に示したパッケージの他の実施例を示す概略図である。 5 is a schematic diagram showing another embodiment of the package shown in Figure 4. 【符号の説明】 2 パワーモジュール、4 半導体チップ、6 絶縁基板、8、12、16、22 金属膜、9、20、26、 [Reference Numerals] 2 power module, 4 semiconductor chips, 6 insulating substrate, 8,12,16,22 metal film, 9,20,26,
40 半田、10、13 金属細線、11 ゲート電極、14 エミッタ電極、18 エミッタ用電極端子、 40 solder, 10, 13 thin metal wire, 11 a gate electrode, 14 an emitter electrode, 18 an emitter electrode terminal,
24 金属基板、28 外殻ケース、29 パッケージ、30 ゲート用電極端子、32 コレクタ用電極端子、34 金属板、36、39 接合部、38 配線用金属端子、44 上部冷却板、46 冷却溝、48 絶縁膜、50 第二の封止層、54、56、66 金属板、58、60、62、64、68、70 取り付けネジ、72絶縁チューブ。 24 metal substrate, 28 an outer shell case, 29 packages, the electrode terminal 30 gate, 32 a collector electrode terminal, 34 a metal plate, 36 and 39 joints, 38 wiring metal terminal, 44 an upper cooling plate 46 the cooling groove, 48 insulating film, 50 second sealing layer, 54,56,66 metal plate, 58,60,62,64,68,70 mounting screws, 72 an insulating tube.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平7−231071(JP,A) 特開 平9−134983(JP,A) 特開 平9−172136(JP,A) (58)調査した分野(Int.Cl. 7 ,DB名) H01L 25/00 - 25/18 H01L 23/473 ────────────────────────────────────────────────── ─── of the front page continued (56) reference Patent flat 7-231071 (JP, a) JP flat 9-134983 (JP, a) JP flat 9-172136 (JP, a) (58) were investigated field (Int.Cl. 7, DB name) H01L 25/00 - 25/18 H01L 23/473

Claims (1)

  1. (57)【特許請求の範囲】 【請求項1】上面電極と下面電極とを有するパワー素子と、 前記パワー素子の下面電極が固定される絶縁基板と、 前記絶縁基板の下面が固定される、内部に冷却液が流通する金属製の第1の冷却板と、 前記絶縁基板の上面に設けられ、外部に電気的接続を行うための電極端子と、 前記パワー素子の上面電極と前記電極端子とを電気的に接続する金属板と、 前記金属板の前記パワー素子に接続された反対の面が、 (57) and a power element having a Claims 1. A top electrode and the lower electrode, and an insulating substrate on which the lower electrode is fixed the power device, the lower surface of the insulating substrate is fixed, a first cooling plate made of metal inside the cooling liquid flows, is provided on the upper surface of the insulating substrate, and the electrode terminals for electrical connection to the outside, and the upper surface electrode of the power element and the electrode terminal a metal plate for electrically connecting the opposite surface connected to said power element of said metal plate,
    絶縁体を介して接続される、内部に冷却液が流通する金属製の第2の冷却板と、 を備えたパワー素子モジュール。 Power device module comprising connected via an insulator, a metallic second cooling plate inside the cooling liquid flows, the. 【請求項2】請求項1に記載のパワー素子モジュールであって、 さらに前記金属板と前記電極端子とを電気的に接続する 2. A power device module of claim 1, further electrically connecting the electrode terminal and the metal plate
    配線用金属端子を備え、前記配線用金属端子の上面は、前記パワー素子の上面電極と、同一平面上にあり、前記金属板は、平板であることを特徴とするパワー素子モジュール。 Includes a wiring metal terminals, the upper surface of the wiring metal terminals, and the upper surface electrode of the power device, it is coplanar, a power device module, wherein the metal plate is a flat plate.
JP24008398A 1998-08-26 1998-08-26 Power module Expired - Fee Related JP3525753B2 (en)

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JP4478049B2 (en) 2005-03-15 2010-06-09 アルストム・トランスポール・ソシエテ・アノニム Semiconductor device
JP2007251076A (en) 2006-03-20 2007-09-27 Hitachi Ltd Power semiconductor module
JP5103863B2 (en) 2006-10-16 2012-12-19 富士電機株式会社 Semiconductor device
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