JP3525753B2 - Power module - Google Patents

Power module

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Publication number
JP3525753B2
JP3525753B2 JP24008398A JP24008398A JP3525753B2 JP 3525753 B2 JP3525753 B2 JP 3525753B2 JP 24008398 A JP24008398 A JP 24008398A JP 24008398 A JP24008398 A JP 24008398A JP 3525753 B2 JP3525753 B2 JP 3525753B2
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JP
Japan
Prior art keywords
metal
semiconductor chip
power element
plate
metal plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP24008398A
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Japanese (ja)
Other versions
JP2000068447A (en
Inventor
雄二 八木
厚志 塚田
宏 長瀬
Original Assignee
株式会社豊田中央研究所
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Application filed by 株式会社豊田中央研究所 filed Critical 株式会社豊田中央研究所
Priority to JP24008398A priority Critical patent/JP3525753B2/en
Publication of JP2000068447A publication Critical patent/JP2000068447A/en
Application granted granted Critical
Publication of JP3525753B2 publication Critical patent/JP3525753B2/en
Anticipated expiration legal-status Critical
Application status is Expired - Fee Related legal-status Critical

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power module for electric power used in an electric vehicle. [0002] An inverter for supplying predetermined AC power to a coil of an electric motor of an electric vehicle or the like (including a hybrid vehicle) is constituted by a power switching element or the like. IGBTs and power MOSFs for power semiconductors
A power element formed on a semiconductor chip such as ET is used. The semiconductor chip on which the power element is formed is sealed in one power module together with a control circuit and the like. In such a power module,
Because a large current flows through the sealed power element itself,
This power element may generate heat and cause thermal destruction. In order to prevent such thermal destruction, conventionally, a sealed semiconductor chip is attached to a metal substrate via an insulating plate,
Heat radiation fins were attached to the metal substrate and cooling was performed. FIG. 1 shows a conventional power module. The power module 2 has an IGBT (Insulated Gate B) as a power element on the surface.
A semiconductor chip 4 on which an ipolar transistor is formed is fixed to a metal film 8 on an insulating substrate 6 with solder 9. The metal film 8 is connected to a collector electrode terminal (not shown) and supplies a collector voltage to the semiconductor substrate of the semiconductor chip 4. Both ends of the fine metal wire 10 made of a fine metal wire such as Al or Au are joined to the gate electrode 11 on the semiconductor chip 4 and the metal film 12 on the insulating substrate 6 by ultrasonic welding. Since the metal film 12 is connected to a gate electrode terminal (not shown), the metal thin wire 10 and the gate electrode terminal are electrically connected, and a gate voltage is supplied from the gate electrode terminal to the metal thin wire 10. . Both ends of the bonding wire 13 are joined to the emitter electrode 14 on the semiconductor chip 4 and the metal film 16 on the insulating substrate 6 by ultrasonic welding. Since the emitter electrode terminal 18 is attached to the metal film 16 with the solder 20, the bonding wire 13 and the emitter electrode terminal 18 are electrically connected, and the emitter electrode terminal 18 connects the bonding wire 1.
3 is supplied with an emitter voltage. The lower surface of the insulating substrate 6 has a metal film 22 interposed therebetween.
The metal substrate 24 is attached with solder 26. A package 29 is constituted by an outer shell case 28 made of a material such as plastic and a metal substrate 24, and includes a semiconductor chip 4, an insulating substrate 6, metal films 8, 12, 16 and a thin metal wire 1.
Portions 0 and 13 and a part of the emitter electrode terminal 18 are sealed in a package 29 to constitute one power module. The metal substrate 24 is provided with heat radiating fins (not shown), and the heat generated in the semiconductor chip 4 is radiated to the lower surface of the semiconductor chip 4 through the metal substrate 24 to cool the semiconductor chip 4. . However, when the semiconductor chip 4 is cooled by the metal substrate 24, the insulating substrate 6 having low thermal conductivity is interposed between the semiconductor chip 4 and the metal substrate 24.
And solders 9 and 26 are interposed. For this reason, the semiconductor chip 4 cannot be sufficiently cooled. Moreover, although the thin metal wires 10 and 13 are generally materials having high thermal conductivity, since they are thin metal wires, effective heat dissipation cannot be performed. for that reason,
If the amount of heat generated by the semiconductor chip 4 increases, chip destruction may occur. The present invention has been made in view of the above problems, and an object thereof is to provide a power module capable of effectively cooling a sealed power element. The present invention provides a power module.
A power element having an upper surface electrode and a lower surface electrode.
And an insulating substrate to which the lower electrode of the power element is fixed
And the lower surface of the insulating substrate is fixed, and the coolant is inside.
A first metal cooling plate that circulates, and an upper surface of the insulating substrate
Electrode terminals for electrical connection to the outside
And the upper electrode of the power element and the electrode terminal
Metal plate to be connected to the power element of the metal plate
The connected opposite side is connected via an insulator
A metal second cooling plate through which the coolant flows.
It is characterized by that. Further, the metal plate and the electrode terminal
It includes a wiring metal terminals for electrically connecting, for said wiring
The upper surface of the metal terminal is on the same plane as the upper surface electrode of the power element, and the metal plate is preferably a flat plate. The power element generates heat according to its operation. The connection line is a conductor that performs electrical connection, and the heat of the power element is easily transmitted through the connection line. And this connection line is a metal plate. The metal plate can easily have a relatively large area, and heat can be effectively radiated from the metal plate. The metal plate and the power element are preferably connected by spot welding. By spot welding at a plurality of points, it is possible to reliably connect the metal plate having a large area and the electrode surface of the power element. Spot welding is preferably ultrasonic bonding. The power element is usually fixed on an insulating substrate. Therefore, the heat dissipation from this insulating substrate side is
It can be done as usual. In the present invention, the amount of heat that can be dissipated through the connection line is increased, and effective heat dissipation can be achieved. In the present invention, the metal plate may be connected to the cooling plate via an insulator. Since the metal plate tends to have a relatively large area, heat can be effectively transferred from the metal plate to the cooling plate. Since the cooling plate is made of a metal having a high thermal conductivity, the cooling plate circulates inside the cooling plate, so that more effective heat dissipation can be performed. The insulator interposed between the metal plate and the cooling plate is preferably made of a material having good thermal conductivity. Thereby, the flow of heat from the metal plate to the cooling plate can be made smooth, and the heat dissipation effect can be increased. Further, by configuring the power element so as to cover the periphery of the power element excluding the part where the electrode terminal is drawn out to the outside, the heat radiation of the power element can be increased. Moreover, it is preferable that the part which pulls out an electrode terminal is comprised with a plastic material, and comprises the sealing body which seals the circumference | surroundings of a power element with a cooling plate and this plastic material. Further, it is preferable that the cooling plate has a two-layer structure, and the gap between the layers serves as a coolant passage. With this configuration, the coolant passage can be easily formed. DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention (hereinafter referred to as embodiments) will be described below with reference to the drawings. FIG. 2 (a) is a cross-sectional view of the power module provided with the cooling means of the first embodiment, and FIG. 2 (b) is a plan view taken along the line AA 'of FIG. 2 (a). It is shown. The power module 2 has an IG as a power element on the surface.
The semiconductor chip 4 on which the BT is formed is fixed to the metal film 8 on the insulating substrate 6 with solder 9. The insulating substrate 6 is attached to the metal substrate 24 via the metal film 22 via the solder 26. The metal film 22 and the semiconductor chip 4 are electrically insulated by the insulating substrate 6. Here, IGB is used as the power element.
T is used, but power MOSFET (Metal
Oxide Semiconductor Feil
Other power elements such as d-Effect Transistor may be used. When an IGBT is used as the power element,
A gate electrode 11 and an emitter electrode 14 on the semiconductor chip 4
In order to supply a voltage to the collector electrode (that is, the semiconductor substrate of the semiconductor chip 4), it is necessary to connect each electrode on the chip and an electrode terminal electrically connected to the outside of the chip. A voltage is supplied to the gate electrode 11 on the semiconductor chip 4 from the gate electrode terminal 30. The gate electrode 11 is connected to the gate electrode terminal 3 via the fine metal wire 10.
Electrically connected to zero. First, at both ends of the fine metal wire 10, one is spot welded to the gate electrode 11 and the other is spot welded to the metal film 12 on the insulating substrate 6. Spot welding is preferably ultrasonic welding. Further, since the metal film 12 is joined to the gate electrode terminal 30 with solder, the metal thin wire 10 and the gate electrode terminal 30 are electrically connected. The collector electrode on the semiconductor chip 4, that is,
The voltage supply to the semiconductor substrate of the semiconductor chip 4 is performed from the collector electrode terminal 32 through the metal film 8 attached to the lower surface of the semiconductor chip 4 with the solder 9. The voltage supply to the emitter electrode 14 on the semiconductor chip 4 is performed from the emitter electrode terminal 18. A metal plate 34 is connected to the emitter electrode 14. A metal terminal for wiring 38 is further connected to the metal plate. The wiring metal terminal 38 is joined to the metal film 16 with solder 40, and the emitter electrode terminal 18 is joined to the metal film 16 with solder 20. Thus, the emitter electrode 14 includes the metal plate 34, the wiring metal terminal 38, the solder 40,
Emitter electrode terminal 18 through metal film 16 and solder 20
Is electrically connected. Emitter electrode 14 and emitter electrode terminal 1
8 is not a metal thin wire conventionally used, but a metal plate 34, and the metal plate 34 has a larger area than the metal thin wire. Therefore, the connection between the metal plate 34, the emitter electrode 14, and the wiring metal terminal 38 is preferably spot-welded at the joint 36 and the joint 39, respectively. Junction 36 and junction 3
By performing spot welding at a plurality of nine points, it is possible to reliably connect the metal plate 34 having a large area to the emitter electrode 14 and the wiring metal terminal 38. The spot welding is preferably ultrasonic welding. Metal plate 3
Laser welding may be used for connection between 4 and the metal terminal for wiring 38. In this embodiment, the metal plate 34 is connected to the wiring metal terminal 38 and used as a connection line between the emitter electrode 14 and the emitter electrode terminal 18.
4 and a metal member in which the wiring metal terminal 38 is integrated may be used. The electrode terminals 18, 30, 32, the wiring metal terminal 38 and the metal plate 34 are preferably made of a material having good conductivity. Since the metal plate 34 is joined to the wiring metal terminal 38 and the emitter electrode 14 by ultrasonic welding, a material that facilitates ultrasonic welding is appropriately selected depending on the material of the wiring metal terminal 38 and emitter electrode 14. It is preferable to do this. For example, when the emitter electrode 14 is made of Al, the metal plate 34 is also made of Al such as Al.
A material that can be easily ultrasonically welded is preferable. The lower surface of the insulating substrate 6 on which the semiconductor chip 4 is placed is soldered onto the metal substrate 24 via the metal film 22.
6 is attached. Chip side is outer shell case 2
8, a metal substrate 24 and an upper cooling plate 44 are attached to the lower part of the outer shell case 28. The outer shell case 28 is made of an insulating member such as plastic in order to draw the electrode terminals 18, 30 and 32 to the outside.
These metal substrate 24, outer shell case 28 and upper cooling plate 4
4 constitutes a package 29. Package 29
In the semiconductor chip 4, the insulating substrate 6, the metal films 8, 1
2, 16, metal thin wire 10, metal plate 34, and gate electrode terminal 30, collector electrode terminal 32, and emitter electrode terminal 18 are partially sealed to form one power module 2.
Is configured. The metal substrate 24 and the upper cooling plate 4
4 is preferably made of metal having good thermal conductivity. Since the semiconductor chip 4 is mounted on the cooled metal substrate 24 through the insulating substrate 6, heat can be radiated through the insulating substrate 6 as usual. The metal plate 34 connected to the emitter electrode 14 is connected to the upper cooling plate 44 through an insulating film 48. Since the metal plate 34 has a relatively large area, the heat generated in the semiconductor chip 4 can be effectively transmitted to the upper cooling plate 44. The upper cooling plate 44 has a relatively large area,
Since it is made of metal, heat generated in the semiconductor chip 4 can be effectively dissipated. The insulating film 48 only needs to be able to electrically insulate the metal plate 34 and the upper cooling plate 44, but it is necessary to effectively transfer heat from the upper cooling plate 44 to the semiconductor chip 4. The thing of the material which has high heat conductivity and can make thickness thin is preferable. Thus, in the first embodiment, the semiconductor chip 4 is connected to the upper cooling plate 44 having a relatively large area via the metal plate 34 having a relatively large area. Therefore, the amount of heat that escapes from the semiconductor chip 4 to the upper cooling plate 44 via the metal plate 34 increases, and effective heat dissipation can be achieved. Therefore, since the semiconductor chip 4 can be cooled from both sides of the insulating substrate 6 side and the upper cooling plate 44 side, the semiconductor chip 4 can be cooled more effectively than before. Next, a power module provided with the cooling means of the second embodiment will be described. FIG. 3 (a) is a cross-sectional view of the power module provided with the cooling means of the second embodiment, and FIG. 3 (b) is a plan view taken along the line AA 'of FIG. 3 (a). It is shown. In the second embodiment, the package 2
Several cooling grooves 46 are formed in 9 so as to surround the sealed semiconductor chip 4. A coolant is circulated in the cooling groove 46, and the metal substrate 24 of the package 29.
The upper cooling plate 44 is cooled by the coolant. Metal plate 34 via the insulating film 48, and is connected to the upper cooling plate 44. The metal plate 34 has a relatively large area and can easily transfer heat generated in the semiconductor chip 4 to the upper cooling plate 44. Therefore, the semiconductor chip 4 can be effectively cooled from the upper cooling plate 44. Thus, in the second embodiment, since the semiconductor chip 4 can be cooled from both sides of the insulating substrate 6 side and the upper cooling plate 44 side, the semiconductor chip 4 can be cooled more effectively than before. Can do. In particular, the upper cooling plate 44
Since the semiconductor chip 4 is connected to the semiconductor chip 4 through a metal plate 34 having a relatively large area, the amount of heat escaping from the semiconductor chip 4 to the upper cooling plate 44 is increased, and effective heat dissipation can be achieved. FIG. 4 is a cross-sectional view of a power module having a two-layer package. In FIG.
The package 29 in FIG. 3 has a two-layer structure, and a coolant is circulated between the layers. The upper cooling plate 44, the outer shell case 28, and the metal substrate 24 constitute a first sealing layer, and a second sealing layer 52 is formed outside the first sealing layer. Three sides of the first sealing layer are surrounded by the second sealing layer 52, and the cooling liquid is caused to flow into the cooling groove 46 between the first sealing layer and the second sealing layer 52. Yes. Metal plates 54 and 56 are attached to the screws 58, 60, 62 in order to secure an inflow port for the coolant for flowing the coolant between the first sealing layer and the second sealing layer 52. , 6
4 is fixed to the first sealing layer and the second sealing layer 52. In this embodiment, securing the coolant inlet is as follows.
Metal plates 54 and 56 are attached with screws 58, 60, 62,
The method of attaching with 64. However, securing the inflow port is not limited to this method. For example, the metal plates 54 and 56 are integrated with the second sealing layer 52, and the like.
It is only necessary to secure an inflow port. Further, the metal plates 54 and 56 do not need to be made of metal, and may be insulators, and materials can be appropriately selected. Thus, the coolant is circulated between the first sealing layer and the second sealing layer 52, and the first sealing layer is cooled. When the first sealing layer is cooled, the semiconductor chip 4 is cooled by the upper cooling plate 44 and the metal substrate 24. A cooling method using a two-layer package is as follows.
As shown in FIG. 5, the cooling liquid may flow so as to surround the four sides of the first sealing layer. In this case, the metal plate 66 is attached to the second sealing layer 52 by means of attachment screws 68 and 70 in order to secure an inlet for the coolant. Also,
In order to electrically insulate the emitter electrode terminal 18 from the metal plate 66, an insulating tube 72 is provided. Since the metal plate 66 only needs to secure a cooling water cooling port, the metal plate 66 may be integrated with the second sealing layer 52 or may not be made of metal. Thus, in the above embodiment, the semiconductor chip 4 is replaced with the metal plate 24 and the upper cooling plate 4 on the lower surface of the chip.
Since cooling is performed from both sides of the semiconductor chip 4, the semiconductor chip 4 can be effectively cooled. In the above embodiment, only one semiconductor chip is placed on the insulating substrate 6. However, two or more semiconductor chips may be placed on the insulating substrate 6. As described above, according to the present invention, the power element is cooled from the side of the insulating substrate on which the power element is placed and from both sides of the connection line that is electrically connected to the power element. In particular, since the amount of heat that escapes from the connection line side is large, the power element can be effectively cooled.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a power module provided with a conventional cooling means. FIG. 2 is a schematic view of a power module according to the first embodiment. FIG. 3 is a schematic view of a power module according to a second embodiment. FIG. 4 is a schematic view of a power module including a package having a two-layer structure. FIG. 5 is a schematic view showing another embodiment of the package shown in FIG. 4; [Description of Symbols] 2 Power module, 4 Semiconductor chip, 6 Insulating substrate, 8, 12, 16, 22 Metal film, 9, 20, 26,
40 Solder 10, 13 Metal fine wire, 11 Gate electrode, 14 Emitter electrode, 18 Electrode terminal for emitter,
24 metal substrate, 28 outer shell case, 29 package, 30 gate electrode terminal, 32 collector electrode terminal, 34 metal plate, 36, 39 junction, 38 wiring metal terminal, 44 upper cooling plate, 46 cooling groove, 48 Insulating film, 50 Second sealing layer, 54, 56, 66 Metal plate, 58, 60, 62, 64, 68, 70 Mounting screw, 72 Insulating tube.

──────────────────────────────────────────────────── ----- Continuation of the front page (56) References JP 7-231071 (JP, A) JP 9-134983 (JP, A) JP 9-172136 (JP, A) (58) Investigation Field (Int.Cl. 7 , DB name) H01L 25/00-25/18 H01L 23/473

Claims (1)

  1. (57) Claims 1. A power element having an upper electrode and a lower electrode, an insulating substrate to which a lower electrode of the power element is fixed, and a lower surface of the insulating substrate are fixed. A metal first cooling plate in which a coolant flows, an electrode terminal provided on the upper surface of the insulating substrate for electrical connection to the outside, an upper surface electrode of the power element, and the electrode terminal; A metal plate that electrically connects the opposite surface of the metal plate connected to the power element,
    A power element module, comprising: a second metal cooling plate connected through an insulator and having a coolant flowing therein. 2. The power element module according to claim 1, further comprising electrically connecting the metal plate and the electrode terminal.
    It includes a wiring metal terminals, the upper surface of the wiring metal terminals, and the upper surface electrode of the power device, are coplanar, a power device module, wherein the metal plate is a flat plate.
JP24008398A 1998-08-26 1998-08-26 Power module Expired - Fee Related JP3525753B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24008398A JP3525753B2 (en) 1998-08-26 1998-08-26 Power module

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Application Number Priority Date Filing Date Title
JP24008398A JP3525753B2 (en) 1998-08-26 1998-08-26 Power module

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Publication Number Publication Date
JP2000068447A JP2000068447A (en) 2000-03-03
JP3525753B2 true JP3525753B2 (en) 2004-05-10

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CN103545298A (en) * 2012-07-09 2014-01-29 赛米控电子股份有限公司 Power semiconductor module with at least one stress-reducing adjustment element

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JP3627738B2 (en) * 2001-12-27 2005-03-09 株式会社デンソー Semiconductor device
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