JP3009696B2 - Manufacturing method of semiconductor nonvolatile memory - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing an electrically rewritable semiconductor nonvolatile memory.

[Conventional technology]

MONOS (Metal Oxide Nit)
ride semiconductor) type memories are known. This MO
When memory transistors of a NOS type memory are arranged in a matrix to form a memory array, a MOS (metal oxide) for addressing is used to prevent malfunction due to high voltage application during rewriting.
xide Semiconductor) transistors are required. A conventional manufacturing method for a semiconductor nonvolatile memory having this memory transistor and a MOS transistor will be described with reference to FIG.

2 (a) to 2 (d) are cross-sectional views showing a method of manufacturing a conventional semiconductor nonvolatile memory in the order of steps.

First, as shown in FIG. 2A, an element isolation insulating film 17 is formed in an element isolation region 15 around an element region 13 of a semiconductor substrate 11 of the first conductivity type. Thereafter, a memory oxide film 19, a silicon nitride film 21, and a silicon dioxide film 23 are formed on the entire surface. The memory oxide film 19, the silicon nitride film 21, and the silicon dioxide film 23 form a memory gate insulating layer 29 of a memory transistor.
Becomes Thereafter, a first polysilicon film 47 is formed on the entire surface.

Next, as shown in FIG.
A first polysilicon film 47, a silicon dioxide film 23, a silicon nitride film 21, and a memory oxide film are formed by using a photosensitive resin (not shown) as an etching mask.
Etch 19 with. As a result, the memory gate electrode 35 made of the first polysilicon film 47 is formed in the memory gate region 25.
Then, a memory gate insulating layer 29 including the memory oxide film 19, the silicon nitride film 21, and the silicon dioxide film 23 is formed.

Next, as shown in FIG. 2C, a silicon oxide film 57 is formed on the entire surface. This silicon oxide film 57 becomes the MOS gate insulating film 31 of the MOS transistor. Thereafter, a second polysilicon film 49 is formed on the entire surface.

Next, as shown in FIG. 2D, a photosensitive resin (not shown) is formed in the MOS gate region 27, and using this photosensitive resin as a mask, a second polysilicon film 49 and a silicon oxide film are formed.
Etch 57 and.

As a result, a second polysilicon film 49 is formed in the MOS gate region 27.
A MOS gate electrode 37 made of and a MOS gate insulating film 31 made of a silicon oxide film 57 are formed.

Through the above steps, the memory transistor 51 is provided in the memory gate region 25 and the MOS transistor 53 is provided in the MOS gate region 27.
To form

[Problems to be solved by the invention]

In a conventional method of manufacturing a nonvolatile memory in which a memory transistor and a MOS transistor coexist, a MOS transistor is formed after a memory transistor is formed. That is, the memory transistor and the MOS transistor are manufactured by separate photoetching processes. Therefore, in consideration of each alignment error in the photosensitive resin exposure process using a photomask,
MOS transistors and memory transistors must be arranged with a margin, which hinders high integration of semiconductor nonvolatile memories.

An object of the present invention is to solve the above-mentioned problem and to provide a manufacturing method capable of highly integrating a semiconductor nonvolatile memory.

[Means for solving the problem]

In order to achieve the above object, a method for manufacturing a semiconductor nonvolatile memory according to the present invention employs the following means.

A method for manufacturing a semiconductor nonvolatile memory according to the present invention includes a memory transistor having a memory gate electrode and a memory gate electrode, comprising a memory oxide film as a lower film, a silicon nitride film as an intermediate film, and a silicon dioxide film as an upper film, and a MOS gate. A MOS transistor having an insulating film and a MOS gate electrode;
A method for manufacturing a semiconductor nonvolatile memory formed in an element region formed on a semiconductor substrate of a first conductivity type, comprising: forming an element isolation insulating film in an element isolation region around the element region of the semiconductor substrate; Forming the memory oxide film as the upper film of the memory gate insulating layer and the silicon nitride film as the intermediate film over the entire surface; and photo-etching the memory oxide film and the silicon nitride film in the memory gate region. Performing a patterning step and oxidizing the semiconductor substrate and the silicon nitride film to form the MOS gate insulating film on the semiconductor substrate and the memory gate insulating layer on the silicon nitride film as the upper film of the memory gate insulating layer. Simultaneously forming the silicon dioxide film; forming a gate material film over the entire surface; A step of patterning a MOS gate electrode in the MOS gate region and a memory gate electrode in the memory gate region by performing an etching process; and a step of forming a pattern in the element region in a region where the MOS gate electrode matches the memory gate electrode. Forming a two-conductivity-type impurity layer; and forming an interlayer film and performing photo-etching to pattern connection holes in the interlayer film and further form a wiring. And

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

1A to 1F are cross-sectional views showing a method for manufacturing a semiconductor nonvolatile memory according to the present invention in the order of steps.

First, as shown in FIG. 1A, a silicon nitride film (Si ₃ N ₄ ) which is an oxidation-resistant film (not shown) formed on an element region 13 of a P-type semiconductor substrate 11 is used. Oxidation is performed as a mask for oxidation, that is, in a so-called selective oxidation, a silicon oxide film (SiO ₂ ) having a thickness of 70
A 0 nm element isolation insulating film 17 is formed. Thereafter, the silicon nitride film on the element region 13 used for the selective oxidation is removed by wet etching with phosphoric acid. Thereafter, an oxidation process is performed in a mixed gas of oxygen and nitrogen to form a memory oxide film 19 made of a silicon oxide film having a thickness of about 2 nm on the entire surface. Thereafter, a silicon nitride film 21 made of a silicon nitride film is formed to a thickness of about 12 nm on the entire surface of the memory oxide film 19 by a chemical vapor deposition method (hereinafter, referred to as a CVD method).

Next, as shown in FIG. 1B, the photosensitive resin 55
Is formed by a spin coating method, and is subjected to an exposure process and a development process using a predetermined photomask, to thereby form a memory gate region.
A photosensitive resin 55 patterned into 25 is formed. Thereafter, using the patterned photosensitive resin 55 as an etching mask, the nitrided silicon film 21 and the memory oxide film 19 are etched. The etching of the silicon nitride film 21 is performed by dry etching using a reactive ion etching apparatus, and a mixed gas of carbon tetrafluoride (CF ₄ ) and oxygen is used as an etching gas. Memory oxide film 19
Is performed by wet etching using a hydrofluoric acid (HF) -based etchant. Thereafter, the photosensitive resin 55 used as an etching mask is removed.

Next, as shown in FIG. 1C, an oxidation treatment is performed to form a silicon dioxide film 23 made of a silicon oxide film.
As a condition for forming the silicon dioxide film 23, oxidation treatment is performed at a temperature of 1000 ° C. for 180 minutes in an oxygen atmosphere. Due to this oxidation treatment, a 100 n
A silicon dioxide film 23 having a thickness of about 3 m and a silicon dioxide film 23 having a thickness of about 3 nm are formed on the silicon nitride film 21. Since the oxidation rate of silicon of the semiconductor substrate 11 is different from that of silicon nitride of the silicon nitride film 21, the silicon dioxide film 23 having a different thickness is formed on the semiconductor substrate 11 and the silicon nitride film 21 as described above. Is done. The memory oxide film 19, the silicon nitride film 21, and the silicon dioxide film 23 formed in the memory gate region 25 become the memory gate insulating layer 29 of the memory transistor. On the other hand, the silicon dioxide film 23 in the MOS gate region formed in a process described later in the element region 13
Becomes the MOS gate insulating film of the MOS transistor.

Next, as shown in FIG. 1 (d), a polycrystalline silicon film is used as the gate material film 33, and monosilane (Si
A film thickness of about 450 nm is formed by a CVD method using H ₄ ). As the gate material film 33, in addition to the polycrystalline silicon film, a refractory metal film such as molybdenum or tungsten, a silicide film which is an alloy of a refractory metal and silicon, or a polycrystalline silicon film and a silicide film or polycrystalline silicon A laminated film of a film and a high melting point metal film is also applicable.

Next, as shown in FIG. 1 (e), the photosensitive resin 55
Is formed by a spin coating method, and is subjected to an exposure process and a development process using a predetermined photomask, to thereby form a memory gate region.
Photosensitive resin 5 patterned on 25 and MOS gate region 27
Form 5 Then, using the patterned photosensitive resin 55 as an etching mask, the polycrystalline silicon film as the gate material film 33 is mixed with a mixed gas of sulfur hexafluoride (SF ₆ ) and oxygen using a reactive ion etching apparatus. Etching is performed using an etching gas. By this etching, a memory gate electrode 35 and a MOS gate electrode 37 made of a polycrystalline silicon film as the gate material film 33 are simultaneously formed. Thereafter, the photosensitive resin 55 used as an etching mask is removed.

Next, as shown in FIG. 1 (f), an N-type impurity having a conductivity type opposite to the conductivity type of the semiconductor substrate 11 is introduced into a region where the MOS gate electrode 37 and the memory gate electrode 35 are aligned. The layer 39 is formed. The formation of the impurity layer 39 is performed by using an ion implantation apparatus to convert phosphorus into phosphorus at an acceleration energy of 50 keV and 3.5 ×
It is formed by ion implantation at an ion implantation dose of 10 ¹⁵ cm ^-2 . The impurity layer 39 between the element isolation insulating film 17 and the memory gate electrode 35 and the impurity layer 39 between the element isolation insulating film 17 and the MOS gate electrode 37 are a source region and a drain region. Thereafter, an interlayer film 41 made of a silicon oxide film doped with phosphorus is formed, and this interlayer film 41 is formed by photoetching.
Then, a connection hole 43 is formed, and a wiring 45 made of an alloy of aluminum and silicon is formed.

Through the above steps, the memory transistor 51 is provided in the memory gate region 25 and the MOS transistor 53 is provided in the MOS gate region 27.
Is obtained.

〔The invention's effect〕

As apparent from the above description, according to the method for manufacturing a nonvolatile memory of the present invention in which the memory gate electrode of the memory transistor and the MOS gate electrode of the MOS transistor are formed in the same photoetching step, the MOS transistor and the memory The distance between the transistor and the transistor does not need to provide a margin for alignment in photomask alignment. Therefore, it becomes possible to arrange the MOS transistor and the memory transistor close to each other to the limit dimension in the photoetching, and a highly integrated semiconductor nonvolatile memory can be obtained.

Further, in the method for manufacturing a nonvolatile memory according to the present invention, a silicon dioxide film forming a memory gate insulating layer of a memory transistor formed in a separate process in the past, and a MOS
A silicon dioxide film as a MOS gate insulating film of the transistor is formed in the same oxidation step. Therefore, there is also an effect that the number of manufacturing steps of the nonvolatile memory can be reduced by one.

Further, in the method for manufacturing a nonvolatile memory according to the present invention, the memory gate electrode of the memory transistor and the MOS gate electrode of the MOS transistor, which are conventionally formed in separate steps, are formed in the same photoetching step. There is also an effect that one process can be reduced.

[Brief description of the drawings]

1 (a) to 1 (f) are cross-sectional views showing a method of manufacturing a semiconductor nonvolatile memory according to the present invention in the order of steps, and FIGS.
FIGS. 7A to 7D are cross-sectional views illustrating a method of manufacturing a conventional semiconductor nonvolatile memory in the order of steps. 19: Memory oxide film, 21: Silicon nitride film, 23: Silicon dioxide film, 35: Memory gate electrode, 37: MOS gate electrode, 51: Memory transistor, 53: MOS transistor.

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-3-82082 (JP, A) JP-A 1-218057 (JP, A) JP-A-62-49670 (JP, A) JP-A-1- 155629 (JP, A) JP-A-3-218074 (JP, A) JP-A-61-80851 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/8247 H01L 27 / 115 H01L 29/788 H01L 29/792

Claims (1)

(57) [Claims] 1. A memory transistor having a memory gate electrode and a memory gate electrode comprising a memory oxide film as a lower film, a silicon nitride film as an intermediate film, and a silicon dioxide film as an upper film, a MOS gate insulating film and a MOS gate electrode. MOS with
A method for manufacturing a semiconductor non-volatile memory in which a transistor is formed in an element region formed on a semiconductor substrate of a first conductivity type, wherein an element isolation insulating film is formed in an element isolation region around the element region of the semiconductor substrate. Forming a memory oxide film as the upper film of the memory gate insulating layer and the silicon nitride film as the intermediate film over the entire surface; and forming the memory oxide film and the silicon nitride film in a memory gate region. Forming a pattern by photo-etching, and oxidizing the semiconductor substrate and the silicon nitride film to form the MOS gate insulating film on the semiconductor substrate and the memory gate insulating layer on the silicon nitride film. Simultaneously forming the silicon dioxide film as an upper layer film, forming a gate material film over the entire surface, Patterning a MOS gate electrode in a MOS gate region and a memory gate electrode in a memory gate region by performing a photoetching process on a gate material film; and a region where the MOS gate electrode matches the memory gate electrode. Forming an impurity layer of the second conductivity type in the element region, forming an interlayer film, and performing photoetching to pattern connection holes in the interlayer film and further form wiring And a method for manufacturing a semiconductor nonvolatile memory.