JP3009683B2 - Method for manufacturing semiconductor nonvolatile memory element - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor nonvolatile memory element, and to stabilize the state of a gate electrode, stabilize memory characteristics,
Regarding high reliability.

[Conventional technology and its problems]

Generally, since a MOS transistor is required for rewriting and reading information of a nonvolatile storage element, a MOS transistor and a memory transistor are formed in the same element region.

In the manufacturing process of this non-volatile memory element, the following method for forming the MOS gate electrode of the MOS transistor and the memory gate electrode of the memory transistor is performed in the following gate electrode forming step.

2 (a) to 2 (d) are cross-sectional views showing a method for manufacturing a nonvolatile memory element in a conventional example in the order of steps.

First, as shown in FIG. 2A, an impurity layer 7 is formed in a field region 3 of a semiconductor substrate 1 of a first conductivity type, and a field oxide film 9 is formed in the field region 3 by using a selective oxidation method. . Next, a memory oxide film 11, a nitride film 13, and a silicon dioxide film 15 are formed on the entire surface.

Next, as shown in FIG. 2 (b), the silicon dioxide film 15, the nitride film 13, and the memory oxide film 11 are removed while leaving the memory gate region 17 in the element region 5.

Next, a first polycrystalline silicon film 51 is formed on the entire surface of the semiconductor substrate 1, a resist 35 is formed in the memory gate region 17, and the first polycrystalline silicon film is
A memory gate electrode made of a first polycrystalline silicon film 51 by a so-called photoetching technique for etching 51
Form 27.

Thereafter, as shown in FIG. 2C, a gate oxide film 21 is formed on the semiconductor substrate 1, and a second polycrystalline silicon film 53 is formed on the entire surface.

Next, as shown in FIG. 2 (d), a second polycrystalline silicon film 53 is formed using a resist 35 as a mask so as to overlap the memory gate electrode 27 by a photoetching technique.
The MOS gate electrode 25 is formed.

Next, using the MOS gate electrode 25 and the memory gate electrode 27 as a mask, a second-conductivity-type high-concentration impurity layer 29 including a source and a drain is formed to form a nonvolatile memory element.

In this conventional method of manufacturing a gate electrode in which a MOS transistor and a memory transistor are mixed, the MOS gate electrode 2
The memory gate electrode 27 is formed earlier than 5.

In the structure described with reference to FIGS. 2A to 2D, the second polycrystalline silicon film 53 is formed by the memory gate electrode 27 due to the step of the memory gate electrode 27 formed first.
It is formed thick on top.

Therefore, when forming the MOS gate electrode 25, in the etching process of the second polycrystalline silicon film 53, the memory gate electrode
Residues form on side walls of 27.

This residue short-circuits the MOS gate electrode 25 and the memory gate electrode 27.

Further, the memory gate electrode 27 is
An oxide film is formed thicker than S gate electrode 25. For this reason, the oxide film thicknesses of the memory gate electrode 27 and the MOS gate electrode 25 are different. Further, since the number of steps for forming the gate electrode is large, there is a problem that the number of defects in the gate region increases and the yield is disadvantageous.

An object of the present invention is to provide a method for manufacturing a semiconductor nonvolatile memory element in which generation of a residue when forming a MOS gate electrode on a memory gate electrode is suppressed.

[Means for solving the problem]

In order to achieve the above object, a method for manufacturing a semiconductor nonvolatile memory element according to the present invention employs the following steps.

(A) A method for manufacturing a semiconductor nonvolatile memory element according to the present invention is a method for manufacturing a semiconductor nonvolatile memory element in which a memory transistor and a MOS transistor are formed in an element region formed on a semiconductor substrate of a first conductivity type. Forming a field oxide film in a field region around the element region of the semiconductor substrate and forming a memory gate insulating film in the element region; and leaving the memory gate insulating film in the memory gate region by photoetching technology Forming a gate oxide film in the element region, further forming a polycrystalline silicon film on the entire surface of the semiconductor substrate, patterning the polycrystalline silicon film by photo-etching technology, MOS transistor in MOS gate area
Simultaneously forming a MOS gate electrode and a memory gate electrode of the memory transistor in the memory gate region; and forming a second conductive type high region in the element region in a region where the MOS gate electrode and the memory gate electrode match. Forming a concentration impurity layer; forming a multi-layer wiring insulating film mainly composed of a silicon dioxide film; forming a contact window in the multi-layer wiring insulating film by photo-etching technology; forming a wiring metal And a step of performing

(B) A method for manufacturing a semiconductor nonvolatile memory element according to the present invention is a method for manufacturing a semiconductor nonvolatile memory element in which a memory transistor and a MOS transistor are formed in an element region formed on a semiconductor substrate of a first conductivity type. Forming a field oxide film in a field region around the device region of the semiconductor substrate, forming a memory oxide film, a nitride film, and a silicon dioxide film in the device region; Forming a pattern so as to leave the memory oxide film, the nitride film and the silicon dioxide film, forming a gate oxide film in the element region, and further forming a polycrystalline silicon film on the entire surface of the semiconductor substrate. And patterning the polycrystalline silicon film by a photo-etching technique to form a MOS transistor in a MOS gate region. Simultaneously forming a MOS gate electrode of the transistor and a memory gate electrode of the memory transistor in the memory gate region; and providing a second conductivity type in the element region in a region where the MOS gate electrode matches the memory gate electrode. Forming a high-concentration impurity layer of silicon, a step of forming an insulating film for multilayer wiring mainly composed of a silicon dioxide film, a step of forming a contact window in the insulating film for multilayer wiring by photoetching technology, And a step of forming

(C) In the method for manufacturing a semiconductor nonvolatile memory element according to the present invention, the pattern width of the memory gate electrode is smaller than the pattern width of the memory gate insulating film.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

First, the manufacture of the semiconductor nonvolatile memory element according to the present invention will be described with reference to FIG.

A high-concentration impurity layer 29 is provided between the MOS gate electrode 25 and the memory gate electrode 27 to eliminate the overlap between the MOS gate electrode 25 and the memory gate electrode 27.

Next, a manufacturing method for forming the structure will be described.

1 (a) to 1 (f) are sectional views showing a manufacturing method for manufacturing a structure of a nonvolatile memory element according to the present invention in the order of steps.

First, as shown in FIG. 1A, a P-type semiconductor substrate 1 is formed.
Using the silicon nitride film 2 in the element region 5 as a mask, boron is introduced into the field region 3 at an acceleration energy of 25 KeV with an ion implantation amount of 2 × 10 ¹³ atoms / cm ² to form the impurity layer 7.

Next, as shown in FIG. 1 (b), the field region 3 around the element region 5 is formed in an oxidizing atmosphere to a thickness of 700 nm using a selective oxidation method using the silicon nitride film 2 as a mask for oxidation. A field oxide film 9 made of a silicon dioxide film is formed.

Next, the silicon nitride film 2 on the element region 5 used for selective oxidation is removed by wet etching with phosphoric acid. Next, oxidation treatment is performed on the entire surface in a mixed gas of oxygen and nitrogen to form a memory oxide film 11 made of a silicon dioxide film having a thickness of about 2 nm. Next, a nitride film made of a silicon nitride film is formed on the entire surface of the memory oxide film 11 by a chemical vapor deposition method (hereinafter, referred to as a CVD method).
13 is formed with a thickness of about 12 nm. Further, an oxidation treatment is performed on the nitride film 13 in an oxidizing atmosphere to form a silicon dioxide film 15.

Next, a resist 35 is formed on the memory gate electrode 17 forming the memory gate electrode, and the silicon dioxide film 15, the nitride film 13, and the memory oxide film 11 are etched using the resist 35 as an etching mask.

Next, as shown in FIG. 1 (c), the entire surface of the element region 5 is oxidized in a mixed gas of oxygen and nitrogen to a thickness of 30 nm.
Gate oxide film 21 consisting of silicon dioxide film of moderate thickness
To form

Next, a polycrystalline silicon film 23 is formed with a thickness of about 450 nm on the entire surface by a CVD method in a monosilane atmosphere. After that, a resist 35 is formed on the memory gate electrode 17 and the MOS gate region 19.

Thereafter, as shown in FIG.
Is used as an etching mask to form a polycrystalline silicon film 23.
Is dry-etched with a mixed gas of sulfur hexafluoride and oxygen to form a MOS gate electrode 25 and a memory gate electrode 27 simultaneously.

Next, as shown in FIG.
By using the mask and the memory electrode 27 as a mask, phosphorus is ion-implanted at an acceleration energy of 50 KeV at an ion implantation amount of about 3.5 × 10 ¹⁵ atoms / cm ² , thereby forming a MOS transistor as a source and drain region of the second conductivity type. Between the gate electrode 25 and the memory gate electrode 27, between the memory gate electrode 27 and the field oxide film 9, between the MOS gate electrode 25 and the field oxide film 9;
A high-concentration impurity layer 29 is formed in a region between the two.

Next, as shown in FIG. 1 (f), an insulating film 31 for multilayer wiring mainly composed of a silicon dioxide film is formed, a contact window 37 is formed by using a photo-etching technique, and a wiring metal 33 is formed.
By forming aluminum, a nonvolatile memory element can be obtained.

In the semiconductor nonvolatile memory element structure of the present invention, the MOS gate electrode 25 and the memory gate electrode 27 do not overlap in the same element region 5 and are formed of the same polycrystalline silicon film 23. In addition, the thickness of the oxide film formed on top of polycrystalline silicon, which is the electrode material, is
Since there is no overlap between the gate electrode 25 and the memory gate electrode 27, a stable memory characteristic can be obtained without a short circuit between the MOS gate electrode 25 and the memory gate electrode 27.

Further, in the semiconductor nonvolatile memory element structure of the present invention, an impurity layer for controlling a threshold voltage may be provided in the semiconductor substrate 1 below the memory gate region 17.

〔The invention's effect〕

As is apparent from the above description, in the method for manufacturing a semiconductor nonvolatile memory element of the present invention, the MOS gate electrode and the memory gate electrode do not overlap in the same element region. The MO gate electrode and the memory gate electrode for obtaining this structure are formed from the same polycrystalline silicon film.

As a result, the thickness of the polycrystalline silicon as the electrode material is the same, and the thickness of the silicon dioxide on the same can be formed the same.

Further, since the MOS gate electrode and the memory gate electrode are formed at the same time, there is no interaction with the etching and no residue of the polycrystalline silicon film is generated.

Further, since the thermal history of the gate material is the same, the film configuration on the gate is the same, and the contact window can be easily formed.

As a result, it is possible to obtain a nonvolatile memory element which has a simple memory forming process and high reliability and stable memory characteristics.

[Brief description of the drawings]

1A to 1F are cross-sectional views showing a manufacturing method for manufacturing the structure of a nonvolatile memory element according to the present invention in the order of steps, and FIGS. 2A to 2D are non-volatile memory elements in a conventional example. FIG. 4 is a cross-sectional view illustrating a method for manufacturing a storage element in the order of steps. 11: Memory oxide film, 13: Nitride film, 15: Silicon dioxide film, 25: MOS gate electrode, 27: Memory gate electrode, 29: High concentration impurity layer

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-263167 (JP, A) JP-A-59-188977 (JP, A) JP-A-60-210878 (JP, A) JP-A Sho 62- 49670 (JP, A) JP-A-63-170970 (JP, A) JP-A-62-14473 (JP, A) JP-A-55-156371 (JP, A) JP-A-2-180079 (JP, A) JP-A-2-180078 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/8247 H01L 27/115 H01L 29/788 H01L 29/792

Claims (3)

(57) [Claims] 1. A method of manufacturing a semiconductor nonvolatile memory element, wherein a memory transistor and a MOS transistor are formed in an element region formed on a semiconductor substrate of a first conductivity type, the method comprising: Forming a field oxide film in a field region and forming a memory gate insulating film in the device region; forming a pattern by photoetching so as to leave the memory gate insulating film in the memory gate region; Forming a gate oxide film on the entire surface of the semiconductor substrate, and forming a polycrystalline silicon film on the entire surface of the semiconductor substrate.
Simultaneously forming a MOS gate electrode and a memory gate electrode of the memory transistor in the memory gate region; and forming a second conductive type high region in the element region in a region where the MOS gate electrode and the memory gate electrode match. Forming a concentration impurity layer; forming a multi-layer wiring insulating film mainly composed of a silicon dioxide film; forming a contact window in the multi-layer wiring insulating film by photo-etching technology; forming a wiring metal And a method of manufacturing a semiconductor nonvolatile memory element. 2. A method for manufacturing a semiconductor non-volatile memory element, wherein a memory transistor and a MOS transistor are formed in an element region formed on a semiconductor substrate of a first conductivity type, the method comprising: Forming a field oxide film in a field region, forming a memory oxide film, a nitride film and a silicon dioxide film in the element region; and forming the memory oxide film and the nitride film in a memory gate region by a photo-etching technique. A step of forming a pattern so as to leave the silicon dioxide film, a step of forming a gate oxide film in the element region, and a step of forming a polycrystalline silicon film over the entire surface of the semiconductor substrate; Pattern the silicon film and place the above MOS transistor in the MOS gate region.
Simultaneously forming a MOS gate electrode and a memory gate electrode of the memory transistor in the memory gate region; and forming a second conductive type high region in the element region in a region where the MOS gate electrode and the memory gate electrode match. Forming a concentration impurity layer; forming a multi-layer wiring insulating film mainly composed of a silicon dioxide film; forming a contact window in the multi-layer wiring insulating film by photo-etching technology; forming a wiring metal And a method of manufacturing a semiconductor nonvolatile memory element. 3. The method according to claim 1, wherein a pattern width of the memory gate electrode is smaller than a pattern width of the memory gate insulating film.