JP2983543B2 - Electrode formation method - Google Patents

Description

The present invention relates to a method for forming an electrode, and more particularly to a method for forming an electrode which can be etched with a thin resist layer. (B) Conventional technology A conventional method for forming an electrode will be described in detail with reference to FIGS. 2A and 2B. First, as shown in FIG. 2A, a metal wiring layer (13) is formed by sputtering aluminum on an oxide film (12) covering the surface of a semiconductor substrate (11), and a patterned resist layer (14) is formed thereon. ). In this step, the surface of the semiconductor substrate (11) is already MOS
Desired circuit elements such as transistors and resistors are formed, and the surface is protected by a silicon oxide film (12). The metal wiring layer (13) is formed by sputtering aluminum containing silicon to a thickness of about 8000 mm over the entire surface of the substrate (11).
The resist layer (14) is used as a mask for etching the metal wiring layer (13) into a desired pattern. The resist layer (14) is thickly attached to a thickness of about 2 μm to 2.5 μm to serve as a mask during the etching of the metal wiring layer (13). You. Next, as shown in FIG. 2B, the metal wiring layer (13) is anisotropically etched using the resist layer (14) as a mask to form a wiring having a desired pattern. In this step, reactive ion etching (RIE) is performed using SiCl ₄ / Cl ₂ as an etching gas to etch away the metal wiring layer (13) not covered with the resist layer (14). In addition, as such a prior art, Japanese Patent Application Laid-Open No. 59-100377 (H01L21 / 302) is known. (C) Problems to be solved by the invention However, in the above-described conventional method for forming an electrode,
Resist layer (14) and metal wiring layer such as aluminum (13)
Poor etching selectivity of 1: 3, resist layer (14)
If the resist layer (14) is not attached as thick as about 2 to 2.5 .mu.m in order to use as a mask, the resist layer (14) is also etched, so that it cannot function as a mask. Therefore, when the thick resist layer (14) is used, there is a problem that the resolution of the resist layer (14) is deteriorated and it is difficult to form the metal wiring layer (13) having a fine pattern. Further, since the resist layer (14) is also etched, there is a problem that the metal wiring layer (13) becomes thinner than the resist layer (14). Further, when the metal wiring layer (13) on the contact hole is etched, there is a problem that the substrate (11) is also etched due to the thinning of the line width, resulting in a contact failure. (D) Means for Solving the Problems The present invention has been made in view of the above-mentioned various problems, and greatly reduces the conventional problems by covering the electrode wiring layer with an insulating film having a high etching selectivity. Thus, an improved method for forming an electrode is realized. (E) Operation According to the present invention, the electrode wiring layer of aluminum or the like is covered with an insulating film such as a silicon oxide film or a boron phosphorus glass layer, and the etching selectivity between the insulating film and the electrode wiring layer is large. Utilizing this fact, good etching is realized and the thickness of the resist layer is made sufficiently thin to obtain high resolution. (F) Example The method for forming an electrode according to the present invention will be described with reference to FIGS. 1A to 1C.
It will be described in detail with reference to FIG. First, as shown in FIG. 1A, a metal wiring layer (3) formed by sputtering aluminum on an oxide film (2) covering the surface of a semiconductor substrate (1), and a metal wiring layer (3) are coated. An insulating film (4) having a high etching selectivity with aluminum and a patterned resist layer (5) attached on the insulating film (4) are sequentially laminated. In this step, the surface of the semiconductor substrate (1) is already MOS
Desired circuit elements such as transistors and resistors are formed, and the surfaces thereof are covered and protected by a silicon oxide film (2). The metal wiring layer (3) is formed by sputtering aluminum containing silicon to a thickness of about 8000 ° on the entire surface of the silicon oxide film (2) on the substrate (1). On the metal wiring layer (3), an insulating film (4) characteristic of the present invention is attached. The insulating film (4) is made of a material having a high etching selectivity with aluminum, for example, a silicon oxide film, a boron phosphorus glass layer or the like, and is adhered to a thickness of about 800 mm by a low pressure CVD method. The resist layer (5) is an insulating film (4)
It is patterned and adhered to the desired shape, and its film thickness is reduced to about 3000 °. This resist layer (5)
Functions as a mask when etching the insulating film (4) and the metal wiring layer (3). Next, as shown in FIG. 1B, the insulating film (4) is dry-etched using the resist layer (5) as a mask. In this step, reactive ion etching is performed using CHF ₃ / O ₂ as a reaction gas to etch the insulating film (4) into a desired pattern. During this etching, the etching selectivity between the resist layer (5) and the insulating film (4) is 1:20, and the insulating film (4) can be etched with high resolution. Further, as shown in FIG. 1C, the metal wiring layer (3) is etched using the resist layer (5) and the insulating film (4) as a mask. This step is a characteristic step of the present invention. The etching selectivity between the resist layer (5) and the electrode wiring layer (3) is obtained by using both the resist layer (5) and the insulating film (4) as a mask. The badness is covered. That is, in this step, reactive ion etching is performed using SiCl ₄ / Cl ₂ as a reaction gas. In this etching, the etching selectivity between the resist layer (5) and aluminum was 1: 3.
However, the etching selectivity of the insulating film (4), for example, silicon oxide film or boron phosphorus glass layer to aluminum is 1: 7, and even if the resist layer (5) is etched, the insulating film (4) is masked. And dry-etches the electrode wiring layer (3) into a desired pattern. Note that the resist layer (5) is also entirely etched during this etching, exposing the insulating film (4). Therefore, the step of removing the resist layer (5) can be omitted. (G) Effects of the Invention According to the present invention, the insulating film (4) has a better etching selectivity than the resist layer (5), so that the insulating film (4) can be used as a mask for the metal wiring layer (3). Therefore, there is an advantage that the resist layer (5) can be thinned to half or less of the conventional film thickness, the resolution of the resist layer (5) can be greatly increased, and the metal wiring layer (3) having a fine pattern can be realized. Further, since the resist layer (5) is also etched during the etching, there is no etching conversion difference due to the receding of the resist layer (5), and the metal wiring layer (3) which is substantially the same as the pattern of the first resist layer (5) is realized. Have the advantages that can be. Further, when the metal wiring layer (3) on the contact hole is etched, the thinning of the line width is protected by the insulating film (4). Furthermore, since the resist layer (5) can be removed by etching simultaneously with the etching of the metal wiring layer (3), there is an advantage that the step of removing the resist layer (5) can be simplified.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A to 1C are cross-sectional views illustrating a method of forming an electrode according to the present invention, and FIGS. 2A and 2B are cross-sectional views illustrating a conventional method of forming an electrode. FIG. (1) is a semiconductor substrate, (2) is a silicon oxide film, (3)
Is a metal wiring layer, (4) is an insulating film, and (5) is a resist layer.

Claims (1)

(57) [Claims] A method for forming an electrode, comprising forming a resist layer on a metal wiring made of a metal such as aluminum and then patterning the resist layer as a mask to form an electrode, wherein boron having a large etching selectivity with a metal is provided on the metal wiring layer. A step of attaching a phosphorus glass layer, a step of coating a resist layer having a desired pattern on the boron phosphorus glass layer with a thickness that can be removed by etching when patterning the metal wiring layer, and using the resist layer as a mask, Dry etching the boron phosphorus glass layer, and patterning the metal wiring layer by dry etching using the resist layer and the boron phosphorus glass layer as a mask, and etching and removing the resist layer. Characteristic electrode formation method.