JP2951922B2 - 犠牲層を用いた微細構造体の製造方法 - Google Patents

犠牲層を用いた微細構造体の製造方法

Info

Publication number
JP2951922B2
JP2951922B2 JP9182398A JP18239897A JP2951922B2 JP 2951922 B2 JP2951922 B2 JP 2951922B2 JP 9182398 A JP9182398 A JP 9182398A JP 18239897 A JP18239897 A JP 18239897A JP 2951922 B2 JP2951922 B2 JP 2951922B2
Authority
JP
Japan
Prior art keywords
film
oxide film
sacrificial layer
microstructure
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP9182398A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10107339A (ja
Inventor
鐘▲ひゅん▼ 李
元翼 張
昌承 李
種泰 白
炯濬 劉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KANKOKU DENSHI TSUSHIN KENKYUSHO
Original Assignee
KANKOKU DENSHI TSUSHIN KENKYUSHO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KANKOKU DENSHI TSUSHIN KENKYUSHO filed Critical KANKOKU DENSHI TSUSHIN KENKYUSHO
Publication of JPH10107339A publication Critical patent/JPH10107339A/ja
Application granted granted Critical
Publication of JP2951922B2 publication Critical patent/JP2951922B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Micromachines (AREA)
  • Pressure Sensors (AREA)
  • Drying Of Semiconductors (AREA)
JP9182398A 1996-09-21 1997-07-08 犠牲層を用いた微細構造体の製造方法 Expired - Lifetime JP2951922B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR96-41474 1996-09-21
KR1019960041474A KR100237000B1 (ko) 1996-09-21 1996-09-21 희생층을 사용한 미소구조체 제조 방법

Publications (2)

Publication Number Publication Date
JPH10107339A JPH10107339A (ja) 1998-04-24
JP2951922B2 true JP2951922B2 (ja) 1999-09-20

Family

ID=19474744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9182398A Expired - Lifetime JP2951922B2 (ja) 1996-09-21 1997-07-08 犠牲層を用いた微細構造体の製造方法

Country Status (2)

Country Link
JP (1) JP2951922B2 (ko)
KR (1) KR100237000B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7547642B2 (en) 2004-12-15 2009-06-16 Denso Corporation Micro-structure manufacturing method

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000060652A1 (fr) 1999-03-30 2000-10-12 Citizen Watch Co., Ltd. Procede de fabrication d'un substrat a couches minces et substrat a couches minces fabrique selon ce procede
KR100532991B1 (ko) * 1999-05-17 2005-12-02 엘지전자 주식회사 고주파 스위치 제조방법
KR100380274B1 (ko) * 1999-06-23 2003-04-14 주식회사 하이닉스반도체 디유브이 공정을 이용한 실리콘 산화막 식각방법
KR100393768B1 (ko) * 2000-12-20 2003-08-02 엘지전자 주식회사 고주파 스위치 및 그 제조방법
US6696364B2 (en) * 2001-10-19 2004-02-24 Stmicroelectronics S.R.L. Method for manipulating MEMS devices, integrated on a wafer semiconductor and intended to be diced one from the other, and relevant support
US7221495B2 (en) * 2003-06-24 2007-05-22 Idc Llc Thin film precursor stack for MEMS manufacturing
KR100627139B1 (ko) 2004-06-18 2006-09-25 한국전자통신연구원 미세기전 구조물 그 제조방법
US7553684B2 (en) 2004-09-27 2009-06-30 Idc, Llc Method of fabricating interferometric devices using lift-off processing techniques
US7683429B2 (en) 2005-05-31 2010-03-23 Semiconductor Energy Laboratory Co., Ltd. Microstructure and manufacturing method of the same
US7741687B2 (en) 2006-03-10 2010-06-22 Semiconductor Energy Laboratory Co., Ltd. Microstructure, semiconductor device, and manufacturing method of the microstructure
KR100882148B1 (ko) * 2007-06-22 2009-02-06 한국과학기술원 정전 구동기, 그 구동방법 및 이를 이용한 응용소자
US7719754B2 (en) 2008-09-30 2010-05-18 Qualcomm Mems Technologies, Inc. Multi-thickness layers for MEMS and mask-saving sequence for same
GB2487716B (en) * 2011-01-24 2015-06-03 Memsstar Ltd Vapour Etch of Silicon Dioxide with Improved Selectivity
CN102963861B (zh) * 2012-11-12 2015-07-29 北京大学 一种实时确定牺牲层腐蚀时间的方法
CN104671192A (zh) * 2013-11-29 2015-06-03 无锡华润上华半导体有限公司 微机电系统用可动质量块的制造方法
CN104627955A (zh) * 2015-02-06 2015-05-20 苏州工业园区纳米产业技术研究院有限公司 一种制备mems密闭腔的方法
WO2019200028A1 (en) * 2018-04-11 2019-10-17 Wisys Technology Foundation, Inc. Stiction-aided fabrication of flat nanomembranes for microelectronics applications

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4317274A1 (de) * 1993-05-25 1994-12-01 Bosch Gmbh Robert Verfahren zur Herstellung oberflächen-mikromechanischer Strukturen

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7547642B2 (en) 2004-12-15 2009-06-16 Denso Corporation Micro-structure manufacturing method

Also Published As

Publication number Publication date
JPH10107339A (ja) 1998-04-24
KR19980022353A (ko) 1998-07-06
KR100237000B1 (ko) 2000-01-15

Similar Documents

Publication Publication Date Title
JP2951922B2 (ja) 犠牲層を用いた微細構造体の製造方法
JP4603740B2 (ja) 精密機械的な構造要素、及びその製造方法
US5314572A (en) Method for fabricating microstructures
US5130276A (en) Method of fabricating surface micromachined structures
JP5602761B2 (ja) 分離した微細構造を有する微小電気機械システムデバイス及びその製造方法
KR100515423B1 (ko) 회전속도센서제조방법
US9260290B2 (en) Technique for forming a MEMS device
KR100290852B1 (ko) 에칭 방법
JP6016290B2 (ja) 微小電気機械システム（ｍｅｍｓ）デバイスを形成する方法
JPH11265982A (ja) 使い捨てハ―ド・マスクを使用したトレンチ型キャパシタの製造
JP5776232B2 (ja) 電子デバイスの製造方法
JP5341579B2 (ja) 微細構造体の製造方法
TW201118035A (en) Fabricating method of single chip for intergating with field-effect transistor and MEMS
JP2000190299A (ja) マイクロ機械的な構造部材の製造方法
US20180057351A1 (en) MEMS Structure with Graphene Component
KR101632650B1 (ko) 희생층의 에칭 속도를 증가시키는 방법 및 이 방법으로 제조된 디바이스
JP2005028504A (ja) Ｍｅｍｓ素子及びその製造方法
JP3067737B2 (ja) 酸化バナジウム膜のプラズマエッチング方法
JP2004230546A (ja) エピタキシャルリアクタにおいて表面マイクロマシニングされた構造物を解放する方法
US7160751B2 (en) Method of making a SOI silicon structure
CN109904145A (zh) 一种薄膜电阻的制造方法
JP4852220B2 (ja) ミクロ構造、およびこれを製造する方法
US6790699B2 (en) Method for manufacturing a semiconductor device
JP2006224219A (ja) Ｍｅｍｓ素子の製造方法
WO2003015183A1 (fr) Procede de fabrication d'une structure a couches minces

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990622

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070709

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080709

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080709

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090709

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100709

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100709

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110709

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120709

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130709

Year of fee payment: 14

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term