JP2874483B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a LOC using a TAB.
The present invention relates to a semiconductor device in a (lead-on-chip) type package.

[0002]

2. Description of the Related Art Memory chips have a remarkable increase in storage capacity due to the improvement in microfabrication techniques for semiconductor devices, and chip dimensions tend to be large. In the package for storing the memory chip, the types and external dimensions of the package, and the electrical arrangement and arrangement pitch of the external terminals are standardized by semiconductor manufacturers. For this reason, it is extremely difficult to accommodate a memory chip having a large chip size due to an increase in storage capacity in a standardized package. As a package for accommodating such a large memory chip (see FIG.
LOC (lead on chip, LOC)
) Type lead frame type package 19 is used. In this method, a device electrode 21 provided in the periphery of a conventional chip is arranged at a central portion of a memory chip (hereinafter, referred to as a semiconductor chip) 20 as shown in FIG. Lead 22 'of the lead frame 22 and the semiconductor chip 2
This is a packaging method in which 0 and the element electrode 21 are electrically connected by wire bonding and sealed with a mold resin 23. According to this method, 1) the wire bonding 29 between the bonding lead 22 ′ of the lead frame 22 and the element electrode 21 of the semiconductor chip 20 is performed at the center of the semiconductor chip 20.
The bonding regions W1 and W2 around the semiconductor chip 20 which are generated in the conventional package shown in FIG. 9C become unnecessary, and the package width W3 can be reduced by about 20%, so that the size of the package can be reduced. 2) In the central arrangement of the element electrodes 21 (signal, power supply, GND electrode), the wiring length (not shown) of the signal and power supply is shortened, and the wiring delay and noise are reduced by reducing the wiring capacitance and wiring resistance. In, it is possible to increase the speed of memory access and reduce power consumption. 3) Since the lead frame 22 has no die pad 18 for die bonding the semiconductor chip 20, the lead frame 22 and the molding resin
Cracks at the interface of No. 3 hardly occur, and the moisture resistance can be improved. 4) Since the lead frame 22 does not have a die pad, even when the type of the semiconductor chip 20 is changed due to a change in the cell structure and the cell arrangement of the semiconductor chip 20, the lead frame 22 can be used.
And a mold forming die can be used, and the manufacturing cost can be reduced.

[0003] It has the following features. But,
In recent years, LOC-type TAB using a thin film carrier for mounting a large number of memory packages at high density for the purpose of reducing the size, weight, and functionality of electronic devices.
A type package has been developed.

[0004] (D in the same figure) LO by film carrier
1 shows a C-type TAB type package 24. As a bonding method of the TAB type package 24, in a memory chip having such a large chip size and a relatively small number of device electrodes as 20 to 40, the inner lead 26 of the film carrier 25 is used instead of the conventional gang bonding method (collective bonding). The single point method (individually) in which the bonding between the semiconductor chip 20 and the device electrode 21 is performed by pressing the bonding tool 28 having a pressure contact surface 27 close to the size of the device electrode 21 of the semiconductor chip 20 individually at one point similarly to the wire bonding. Bonding) is used. This method uses a film carrier 25 in which leads are formed on a flexible film of polyimide or the like with a rolled copper having a thickness of about 35 μm. The semiconductor chip 20 is provided with an element electrode 21 in the center of the chip as in the case of the lead frame type package 19.
1 and inner lead 26 are bumps 3 mainly made of Au
0 is electrically connected.

FIG. 5 shows a joining method in the single point method. FIG. 1A shows a film carrier 25 and a semiconductor chip 20 in which bumps 30 are formed on inner leads 26 by the transfer bump method. First, the inner leads 26 are aligned with the device electrodes 21 of the semiconductor chip 20. . After alignment, inner lead 2
Each of the bumps 30 formed on the inner lead 26 is plastically deformed by applying a pressure contact 31 and ultrasonic vibration (not shown) from above the inner lead 26 with a bonding tool 28 one by one. 20 and the device electrodes 21 (FIG. 2B). The bonding is mainly performed by heating the semiconductor chip 20 and deforming the bumps 30 by the application of ultrasonic vibration, whereby an oxide film (not shown) on the surface of the aluminum electrode which is the element electrode 21 of the semiconductor chip 20 is broken, and a new aluminum surface is formed. (Not shown) and new surfaces of the bumps 30 are brought into contact with each other to perform metal bonding. Subsequent bonding is performed by repeating the above-described step B for the number of element electrodes 21 formed on the semiconductor chip 20, that is, for the number of inner leads 26 (FIGS. C and D).

As described above, TAB using a film carrier
In the package, since the lead frame thickness and the loop height of the bonding wire that occur in the lead frame type package do not occur, the package thickness can be reduced to about 80%, and a plurality of TABs are formed as shown in FIG. By stacking a plurality of packages 24 and mounting them on a circuit board 32 of an electronic device (not shown), the electronic device can be easily reduced in size and weight, and highly functionalized.

[0007]

In single point bonding in a TAB package, the inner leads and the element electrodes of the semiconductor chip are joined by applying ultrasonic waves to plastically deform the bumps. By applying an ultrasonic wave to the inner lead, the inner lead vibrates finely in the vibration direction of the ultrasonic wave, and the vibration energy is transmitted to the bump and the element electrode, and the bump is plastically deformed.
However, in the conventional LOC type TAB package structure using a film carrier, the method for fixing the film carrier to the surface of the semiconductor chip requires the use of a relatively inelastic insulating adhesive resin material and a relatively inelastic insulating adhesive resin material. Fixed. Due to this, the inner lead is fixed to the semiconductor chip, so that micro vibration of the inner lead due to ultrasonic vibration from the bonding tool does not occur, plastic deformation of the bump becomes extremely difficult, and the occurrence of poor bonding and reduction in strength The manufacturing yield of semiconductor devices has been reduced. Further, the ultrasonic vibration output for causing the plastic deformation of the bumps becomes excessively large, causing a serious damage to the semiconductor chip and a problem such that the reliability is impaired.

[0008]

In order to solve the above-mentioned problems, a semiconductor device according to the present invention is characterized in that a film carrier and a semiconductor chip are bonded with a rubber-based material having elasticity. The carrier and the carrier are held in a semi-fixed state where they can move by a small amount by external force, and the inner lead and the element electrode are joined by a structure that allows the inner lead to vibrate finely by ultrasonic vibration from the bonding tool. A semiconductor device having high strength and excellent reliability can be easily obtained.

[0009]

According to the present invention, since the film carrier and the semiconductor chip are bonded to each other with an elastic adhesive material of a rubber material according to the above configuration, the semiconductor chip and the film carrier are semi-fixed, which can be slightly moved by an external force. Adhered in state. Therefore, the inner lead can be easily microvibrated by the ultrasonic vibration from the bonding tool, and the vibration of the inner lead can be efficiently transmitted to the bump, and the plastic deformation of the bump can be favorably performed. As a result, the bonding strength between the inner lead and the element electrode is high, and a highly reliable single point bonding TAB package can be realized.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a sectional structure of a TAB package using a film carrier according to the present invention. A large number of semiconductor element groups (not shown) are formed in a specific region on the main surface of the semiconductor chip 1, and an element electrode 2 is provided in the center of the semiconductor chip 1. A film carrier 3 made of a flexible film such as polyimide is arranged on the upper part of the semiconductor chip 1. Film carrier 3
The semiconductor chip 1 is bonded to the semiconductor chip 1 with an adhesive material 4 having the same elastic properties as a rubber-based material. As the bonding material 4,
A material having heat resistance and electrical insulation, for example, a silicone resin or a fluorine rubber-based resin can be used. Also, as shown in FIG. 2, as another composite material,
It is also possible to use a sheet-like adhesive material 4 having a thermosetting or thermoplastic adhesive 6 applied to both sides based on an elastic material 5 made of a silicone resin or a fluororubber resin or the like. An inner lead 7 extends from the film carrier 3 bonded to the semiconductor chip 1 with the adhesive material 4 toward the element electrode 2, and a leading end of the inner lead 7 is opposed to the element electrode 2 of the semiconductor chip 1. Au
Is formed. Inner lead 7
As shown in FIG. 3, the bumps 8 provided at the tips of the lead wires are pressed by the bonding tool 9 on the inner leads 7 one by one by a single point bonding method.
Electrical connection is made by applying heat and ultrasonic waves.
At this time, the inner lead 7 and the semiconductor chip 1 are bonded to the element electrode 2 by applying ultrasonic vibration 10 to the inner lead 7 from the bonding tool 9 to cause the inner lead 7 to vibrate slightly. Next, the micro-vibration A is transmitted to the bumps 8 to cause plastic deformation of the bumps 8, and the inner leads 7 are joined to the element electrodes 2 by metal bonding. In the present invention, since the bonding between the semiconductor chip 1 and the film carrier 3 is performed by the rubber-based material 4 having elasticity, the film carrier 3 and the inner leads 7 are slightly vibrated in the lateral direction.
A structure that can be used. Therefore, the minute vibration A of the inner lead 7 due to the ultrasonic vibration 10 from the bonding tool 9 is transmitted to the bump 8 as it is, and the plastic deformation of the bump 8 can be sufficiently performed. As a result, the metal connection between the bump 8 and the element electrode 2 of the semiconductor chip 1 can be reliably performed, and the bonding between the two can be further strengthened and stabilized. Further, in the LOC method, since the film carrier is bonded to the semiconductor chip, the same amount of plastic deformation (bonding strength) of the bump as in the TAB method except for the conventional LOC is obtained.
It was necessary to set the bonding conditions, particularly the ultrasonic output, higher. For this reason, cracks are generated in the element electrodes of the semiconductor chip, which significantly reduces the reliability of the semiconductor device and causes a reduction in the manufacturing yield. However, the adhesion between the film carrier and the semiconductor chip has the elasticity of a rubber-based material. By bonding with an adhesive material, bonding conditions (ultrasonic output) can be set low, and cracks in the element electrodes do not occur.

[0012]

As described above, according to the present invention, by bonding the film carrier and the semiconductor chip with an adhesive material having elasticity, the minute vibration of the inner lead due to the application of the ultrasonic wave from the bonding tool is facilitated, and the bump and the bump are formed. The metal bonding of the device electrodes of the semiconductor chip can be reliably performed, and the bonding between them can be made stronger and more stable. Further, in the LOC method, since the film carrier is bonded to the semiconductor chip, the same amount of plastic deformation (bonding strength) of the bump as in the TAB method except for the conventional LOC is obtained.
It was necessary to set the bonding conditions, particularly the ultrasonic output, higher. For this reason, cracks are generated in the element electrodes of the semiconductor chip, which significantly reduces the reliability of the semiconductor device and causes a reduction in the manufacturing yield. However, the adhesion between the film carrier and the semiconductor chip has the elasticity of a rubber-based material. By bonding with an adhesive material, bonding conditions (ultrasonic output) can be set low, and cracks in the element electrodes do not occur.

[Brief description of the drawings]

FIG. 1 is a structural sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a structural sectional view of an adhesive material used in an embodiment of the present invention.

FIG. 3 is a process sectional view showing a bonding state in the embodiment of the present invention.

FIG. 4 is a configuration diagram of a conventional semiconductor device.

FIG. 5 is a process sectional view of a conventional semiconductor device manufacturing method.

FIG. 6 is a sectional view showing a conventional semiconductor device mounting method according to the embodiment;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Element electrode 3 Film carrier 4 Adhesive material having elasticity 7 Inner lead 8 Bump 9 Bonding tool 10 Ultrasonic vibration A, B vibration

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23/50

Claims (1)

(57) [Claims] 1. A half having a plurality of element electrodes provided on a main surface.
The semiconductor chip has elasticity on the main surface of the semiconductor chip.
From a flexible film adhered by the adhesive material
Derived from the film carrier
And the semiconductor provided by the bumps provided at the tip thereof.
Consists of inner leads bonded to chip device electrodes
A semiconductor device, wherein the adhesive material is the inner lead.
Provided on the film carrier portion excluding the
The film carrier and the semiconductor chip against external force.
Glued in a semi-fixed state that can be moved
The bump at the tip of the lead is plastically deformed and the semiconductor chip is deformed.
A semiconductor device which is bonded to an element electrode of a semiconductor device.