JPH10335368A - Wire-bonding structure and semiconductor device - Google Patents

Wire-bonding structure and semiconductor device

Info

Publication number
JPH10335368A
JPH10335368A JP9142238A JP14223897A JPH10335368A JP H10335368 A JPH10335368 A JP H10335368A JP 9142238 A JP9142238 A JP 9142238A JP 14223897 A JP14223897 A JP 14223897A JP H10335368 A JPH10335368 A JP H10335368A
Authority
JP
Japan
Prior art keywords
wire
bonding
ball
capillary
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9142238A
Other languages
Japanese (ja)
Inventor
Makoto Tsubonoya
誠 坪野谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP9142238A priority Critical patent/JPH10335368A/en
Publication of JPH10335368A publication Critical patent/JPH10335368A/en
Pending legal-status Critical Current

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To avoid damages on a chip, and to directly wire-bond chips by providing a ball part at a pad. SOLUTION: A ball part 16, in which only a ball bonding gold ball is formed, is formed on a pad 13. The height of the ball part 16 is made higher than at least that of a passivation coating 14. A wire 10 which is 1st bonded to another part by a capillary 11 is moved around on the ball part 16, and the wire is crushed by a pressing part 11a of the capillary 11 so that the wire 10 can be fixed to the ball part 16.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体チップのパ
ッド表面にボンディングワイヤのステッチボンドを可能
にしたワイヤボンド構造と、同一パッケージ内に複数の
半導体チップを容易に収納できる半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wire bond structure in which a bonding wire can be stitch-bonded to a pad surface of a semiconductor chip, and a semiconductor device which can easily accommodate a plurality of semiconductor chips in the same package.

【０００２】[0002]

【従来の技術】半導体装置の封止技術として最も普及し
ているのが、半導体チップの周囲を熱硬化性のエポキシ
樹脂で封止するトランスファーモールド技術である。半
導体チップの支持素材としてリードフレームを用い、リ
ードフレームのアイランドに半導体チップをダイボンド
し、半導体チップのボンディングパッドとリードをワイ
ヤでワイヤボンドし、所望の外形形状を具備する金型内
にリードフレームをセットし、金型内にエポキシ樹脂を
注入、これを硬化させることにより製造する。2. Description of the Related Art A transfer molding technique for sealing the periphery of a semiconductor chip with a thermosetting epoxy resin is most widely used as a sealing technique for a semiconductor device. A lead frame is used as a support material for the semiconductor chip, the semiconductor chip is die-bonded to the lead frame island, the bonding pads of the semiconductor chip and the leads are wire-bonded with wires, and the lead frame is placed in a mold having a desired external shape. It is manufactured by setting, injecting an epoxy resin into a mold, and curing the epoxy resin.

【０００３】一方、各種電子機器に対する小型、軽量化
の波はとどまるところを知らず、これらに組み込まれる
半導体装置にも、一層の大容量、高機能、高集積化が望
まれることになる。そこで、以前から発想としては存在
していた（例えば、特開平０５ー１２１６４５号）、１
つのパッケージ内に複数の半導体チップを封止する技術
が注目され、実現化する動きが出てきた。つまり図９
（Ａ）（Ｂ）に示すように、アイランド１上に第１と第
２の半導体チップ２、３を固着し、第１と第２の半導体
チップ２、３のボンディングパッド４とリード５とをボ
ンディングワイヤ６で接続し、樹脂７で封止したもので
ある。On the other hand, the wave of miniaturization and weight reduction of various electronic devices is unavoidable, and semiconductor devices incorporated therein are required to have higher capacity, higher function, and higher integration. Therefore, there has been an idea from before (for example, Japanese Patent Laid-Open No. 05-121645).
Attention has been paid to a technology for sealing a plurality of semiconductor chips in one package, and there has been a move toward realization. That is, FIG.
(A) As shown in (B), the first and second semiconductor chips 2 and 3 are fixed on the island 1, and the bonding pads 4 and the leads 5 of the first and second semiconductor chips 2 and 3 are connected. They are connected by bonding wires 6 and sealed with resin 7.

【０００４】回路機能の組み合わせによって第１の半導
体チップ２と第２の半導体チップ３とを電気的に接続す
る場合は、上述した特開平０５ー１２１６４５号の様に
第１の半導体チップ２のパッド４から第２の半導体チッ
プ３のパッド４に直接ワイヤを打つことが考えられる。
しかし、図１０に示すようにボールを形成しない２回目
のボンディング（ステッチボンディング）をパッド４上
に直接打つと、キャピラリツール８の先端部８ａが第２
の半導体チップ３の表面に直接衝撃を与えてダメージを
与えることになる。In the case where the first semiconductor chip 2 and the second semiconductor chip 3 are electrically connected by a combination of circuit functions, the pad of the first semiconductor chip 2 must be electrically connected as described in Japanese Patent Laid-Open No. 05-121645. It is conceivable to directly wire a wire from 4 to the pad 4 of the second semiconductor chip 3.
However, when the second bonding (stitch bonding) without forming a ball is directly hit on the pad 4 as shown in FIG. 10, the tip 8a of the capillary tool 8 is moved to the second position.
Directly impacts the surface of the semiconductor chip 3 to cause damage.

【０００５】そこで、外部接続リード５の一つを中間点
とし、第１の半導体チップ２と第２の半導体チップ３の
両方から共通の外部接続リード５にワイヤを打つか（図
示しない）、または図９（Ａ）（Ｂ）に示した様に、ア
イランド１とは電気的に絶縁した接続導体９をアイラン
ド１上に固着し、両半導体チップ２、３から接続導体９
にワイヤを打つことにより、両者を接続する手法もあ
る。Therefore, one of the external connection leads 5 is set as an intermediate point, and a wire is driven from both the first semiconductor chip 2 and the second semiconductor chip 3 to the common external connection lead 5 (not shown), or As shown in FIGS. 9A and 9B, a connection conductor 9 electrically insulated from the island 1 is fixed on the island 1, and the connection conductor 9 is separated from the two semiconductor chips 2 and 3.
There is also a method of connecting the two by hitting a wire.

【０００６】[0006]

【発明が解決しようとする課題】このように、パッド上
にワイヤを直接ステッチボンドを打つとチップにダメー
ジを与えるので、実施が困難であるという欠点があっ
た。これを避けるために共通の外部接続リードを介して
接続する手法を採ると、ボンディングワイヤ５が長くな
るので他との接触事故等の要因になり、更にはリード端
子の本数が増大するという欠点がある。同じく接続導体
９を用いる手法を採用すると、接続導体９の部品代と工
数の増大によりコスト高になるという欠点があるほか、
中間に接続導体９を配置する必要性からパッケージが大
型化するという欠点があった。As described above, if a wire is stitch-bonded directly on a pad, the chip is damaged, and therefore, there is a disadvantage that implementation is difficult. If a method of connecting via a common external connection lead is adopted to avoid this, the bonding wire 5 becomes longer, which may cause a contact accident with other parts, and furthermore, the number of lead terminals increases. is there. Similarly, when the method using the connection conductor 9 is adopted, there is a disadvantage that the cost is increased due to an increase in the cost of parts and man-hours of the connection conductor 9.
There is a drawback that the package becomes large due to the necessity of disposing the connection conductor 9 in the middle.

【０００７】[0007]

【課題を解決するための手段】本発明は上述した従来の
課題に鑑み成されたもので、半導体チップのパッド上に
ボールボンディングの１ｓｔボンドによりボール部分だ
けをあらかじめ形成しておき、該ボール部分にワイヤの
２ｎｄボンドを打つことにより、キャピラリツールが半
導体チップに接触することなく、第１の半導体チップと
第２の半導体チップとをボンディングワイヤで直接接続
することを可能ならしめたものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems. Only a ball portion is formed in advance on a pad of a semiconductor chip by a first bonding of ball bonding, and the ball portion is formed. Then, the first semiconductor chip and the second semiconductor chip can be directly connected by bonding wires without the capillary tool coming into contact with the semiconductor chip by hitting a second bond of the wire.

【０００８】また、本発明の第２の特徴は、ボール部分
を複数配置することにより、２ｎｄボンド時のキャピラ
リツールのずれによる事故を未然に防止したものであ
る。更に本発明の第３の特徴は、複数のボール部分を離
間せしめることにより、ワイヤ切れを良好にして確実な
ワイヤボンド工程を可能ならしめたものである。A second feature of the present invention is to prevent an accident due to displacement of a capillary tool at the time of a second bond by arranging a plurality of ball portions. Further, a third feature of the present invention is that a plurality of ball portions are separated from each other so that the wire breakage is improved and a reliable wire bonding process is enabled.

【０００９】[0009]

【発明の実施の形態】以下に本発明の第一の実施の形態
を図面を参照しながら詳細に説明する。図１（Ａ）
（Ｂ）は本発明のワイヤボンディング構造を示す断面図
と平面図であり、他から引き回したワイヤ１０をキャピ
ラリ１１でボンディングしている様子を示している。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 (A)
2B is a cross-sectional view and a plan view showing the wire bonding structure of the present invention, and shows a state in which a wire 10 routed from another is bonded by a capillary 11.

【００１０】１２は半導体チップ等からなる支持基体、
１３は支持基体１２の絶縁膜上に形成したボンディング
パッド、１４はパッシベーション皮膜、１５はパッシベ
ーション皮膜１４に形成した開口部分である。パッド１
３には該パッド１３を他に電気接続するための延在部分
１５が連続している。パッド１３の露出部分には直径が
約１００μ、高さが約３０μのボール部分１６を形成し
ている。ボール部分１６の高さは、少なくともパッシベ
ーション皮膜１４よりは高いものとしている。Reference numeral 12 denotes a support base made of a semiconductor chip or the like;
13 is a bonding pad formed on the insulating film of the support base 12, 14 is a passivation film, and 15 is an opening formed in the passivation film 14. Pad 1
An extension portion 15 for electrically connecting the pad 13 to another is continuous with 3. A ball portion 16 having a diameter of about 100 μ and a height of about 30 μ is formed on an exposed portion of the pad 13. The height of the ball portion 16 is at least higher than the passivation film 14.

【００１１】キャピラリ１１はワイヤボンド工程に用い
るツールの一つであり、その中心に設けた直径４０μ程
度の貫通孔１７に挿通したボンディングワイヤ１０を任
意の方向に延在し、そして被接続箇所にワイヤ１０を固
着する為のものである。上下左右に任意に制御可能な制
御アームに固定されており、全体として直径２００μ程
度の円筒形を有する。その先端部分に幅約７０μの平坦
面からなる押圧部１１ａを具備し、キャピラリ１１の上
部にはボンディングワイヤ１０を挟み固定可能なクラン
パー（図示せぬ）を具備する。ワイヤ１０は直径３０μ
程度の、金（Ａｕ）を主体とする材料からなる。The capillary 11 is one of the tools used in the wire bonding process. The capillary 11 extends the bonding wire 10 inserted in the through hole 17 having a diameter of about 40 μ provided at the center thereof in an arbitrary direction. This is for fixing the wire 10. It is fixed to a control arm that can be arbitrarily controlled up, down, left and right, and has a cylindrical shape with a diameter of about 200 μ as a whole. The tip portion is provided with a pressing portion 11a having a flat surface with a width of about 70 μ, and the upper portion of the capillary 11 is provided with a clamper (not shown) capable of holding the bonding wire 10 therebetween. Wire 10 has a diameter of 30μ
Of a material mainly composed of gold (Au).

【００１２】そして、ボンディングパッド１３上に形成
したボール部分１６に、他の箇所に１ｓｔボンド（ボー
ルボンド）したワイヤ１０を延在せしめ、上方からキャ
ピラリ１１の押圧部１１ａでワイヤ１０を押しつぶし、
キャピラリ１１から超音波振動を与えてボール部分１６
とワイヤ１０とを固着し、クランパでワイヤ１０を挟み
固定しキャピラリ１１と共に上に移動させることでワイ
ヤを切断する。ワイヤ１０を押しつぶしてから切断する
までの工程を２ｎｄボンド（ステッチボンド）と称し、
図１（Ａ）は押しつぶしている状態を、図１（Ｂ）は切
断した状態を各々示している。ワイヤ１０は押圧部１１
ａの平坦面で押しつぶされ、更に角部１１ｂの箇所で引
きちぎられるような形となる。Then, the wire 10 which is first-bonded (ball-bonded) to another portion is extended to the ball portion 16 formed on the bonding pad 13, and the wire 10 is crushed from above by the pressing portion 11 a of the capillary 11.
By applying ultrasonic vibration from the capillary 11 to the ball portion 16
And the wire 10 are fixed, and the wire 10 is cut and fixed by sandwiching the wire 10 with a clamper and moving the wire 10 together with the capillary 11. The process from crushing the wire 10 to cutting it is referred to as 2nd bond (stitch bond),
FIG. 1A shows a crushed state, and FIG. 1B shows a cut state. The wire 10 has a pressing portion 11
The shape is such that it is crushed by the flat surface a and further torn off at the corner 11b.

【００１３】このように、パッド１３上に高さが突出す
るボール部分１６を設けることによって、ワイヤ１０を
押しつぶすときの高さが高くなるので、キャピラリ１１
の押圧部分１１ａを半導体チップ表面に接触させること
なく、ワイヤの２ｎｄボンドが可能になる。尚、ワイヤ
１０先端に金ボールを形成し、該金ボールを押しつけ固
着することをボールボンド、金ボールが無い状態のワイ
ヤをキャピラリ１１の押圧部分１１ａで押しつぶし固着
することをステッチボンドをと称している。As described above, by providing the ball portion 16 having a protruding height on the pad 13, the height when the wire 10 is crushed is increased.
The second bonding of the wire can be performed without bringing the pressing portion 11a of FIG. Note that forming a gold ball at the end of the wire 10 and pressing and fixing the gold ball is referred to as ball bonding, and pressing and fixing the wire without the gold ball by the pressing portion 11a of the capillary 11 is referred to as stitch bonding. I have.

【００１４】図２（Ａ）乃至図２（Ｄ）に、ボール部分
１６の形成方法の第一の例、同じく図２（Ｅ）乃至図２
（Ｈ）に、ボール部分１６の形成方法の第２の例を示し
た。第一の例は、先ず図２（Ａ）に示したように、スパ
ーク手法によりワイヤ１０を溶融し、その表面張力によ
りワイヤ１０の先端部分に金ボール１０ａを形成し、キ
ャピラリ１１をボンディングパッド１３上方に移動せし
め、通常のワイヤボンド工程のプログラムに従い１ｓｔ
ボンドを行うべくキャピラリ１１を下降させる。但し金
ボール１０ａがボンディングパッド１３に接触しない高
さまで下降させるようにプログラムを調整する。FIGS. 2A to 2D show a first example of a method of forming the ball portion 16, which is also shown in FIGS.
(H) shows a second example of the method of forming the ball portion 16. In the first example, as shown in FIG. 2A, first, a wire 10 is melted by a spark method, a gold ball 10a is formed at a tip portion of the wire 10 by the surface tension, and a capillary 11 is connected to a bonding pad 13 by a bonding method. Move it upward and follow the normal wire bonding process program for 1st
The capillary 11 is lowered to perform bonding. However, the program is adjusted so that the gold ball 10a is lowered to a height at which the gold ball 10a does not contact the bonding pad 13.

【００１５】次いで図２（Ｂ）に示すように、通常のワ
イヤボンド工程のプログラムに従いキャピラリ１１を上
昇させる。金ボール１０ａが固着されていないので、金
ボール１０ａも上昇する。次いで図２（Ｃ）に示すよう
に、キャピラリ１１の位置を変更せず、通常のワイヤボ
ンド工程のプログラムに従って２ｎｄボンドを行うべく
キャピラリを再度下降する。今度は金ボール１０ａをボ
ンディングパッド１３表面に押圧し、同時にキャピラリ
１１から超音波振動を与えることにより金ボール１０ａ
をボンディングパッド１３に固着する。Next, as shown in FIG. 2B, the capillary 11 is raised in accordance with a program of a normal wire bonding process. Since the gold ball 10a is not fixed, the gold ball 10a also rises. Next, as shown in FIG. 2C, the capillary is lowered again so as to perform the second bonding according to the program of the normal wire bonding process without changing the position of the capillary 11. This time, the gold ball 10a is pressed against the surface of the bonding pad 13 and simultaneously the ultrasonic vibration is applied from the capillary 11 so that the gold ball 10a is
Is fixed to the bonding pad 13.

【００１６】そして図２（Ｄ）に示すように、キャピラ
リ１１と共にワイヤ１０を上方に引き上げることにより
ワイヤ１０を金ボール１０ａの根本部分で切断し、ボン
ディングパッド１３上にボール部分１６を残す。このと
き、キャピラリ１１をボール部分１６上に残したままで
ワイヤだけをクランパで挟み引くようにすると、ワイヤ
の切断が容易になる。Then, as shown in FIG. 2D, the wire 10 is pulled up together with the capillary 11 so that the wire 10 is cut at the root of the gold ball 10a, leaving the ball portion 16 on the bonding pad 13. At this time, if only the wire is sandwiched and pulled with the clamper while the capillary 11 is left on the ball portion 16, the cutting of the wire becomes easy.

【００１７】第２の方法は以下の通りである。先ず図２
（Ｅ）に示したように、キャピラリ１１をボンディング
パッド１３上方に移動せしめ、通常のワイヤボンド工程
のプログラムに従いあらかじめ形成しておいた金ボール
１０ａをボンディングパッド１３表面に押圧・固着して
１ｓｔボンドを行う。次いで図２（Ｆ）に示すように、
通常のワイヤボンド工程のプログラムに従いキャピラリ
１１を上昇させる。The second method is as follows. First, FIG.
As shown in (E), the capillary 11 is moved above the bonding pad 13, and the gold ball 10 a formed in advance according to the program of a normal wire bonding process is pressed and fixed to the surface of the bonding pad 13 to perform the first bonding. I do. Then, as shown in FIG.
The capillary 11 is raised according to a program of a normal wire bonding process.

【００１８】次いで図２（Ｇ）に示すように、キャピラ
リ１１の位置を１００μ程横に移動し、通常のワイヤボ
ンド工程のプログラムに従って２ｎｄボンドを行うべく
キャピラリを再度下降する。キャピラリ１１の位置をボ
ールずらすことによって、ワイヤ１０をキャピラリ１１
の押圧部１１ａで押しつぶすことを可能にしている。そ
して図２（Ｈ）に示すように、キャピラリ１１と共にワ
イヤ１０をクランパで固定し、上方に引き上げることに
よりワイヤ１０を押圧下部分で切断し、ボンディングパ
ッド１３上にボール部分１６を残す。ワイヤ１０を押し
つぶす図２（Ｇ）の工程を具備するので、ワイヤの切断
状態を均一にできる。Next, as shown in FIG. 2 (G), the position of the capillary 11 is moved laterally by about 100 μm, and the capillary is lowered again to perform 2nd bonding in accordance with a program of a normal wire bonding process. By shifting the position of the capillary 11 by a ball, the wire 10 is
Squeezed by the pressing portion 11a. Then, as shown in FIG. 2 (H), the wire 10 is fixed together with the capillary 11 by a clamper, and the wire 10 is cut at the lower portion by being pulled up to leave the ball portion 16 on the bonding pad 13. Since the process of FIG. 2G for crushing the wire 10 is provided, the cutting state of the wire can be made uniform.

【００１９】図３は、第一のボンディングパッド１３ａ
から第２のボンディングパッド１３ｂにワイヤ１０をワ
イヤボンドする工程を示したものである。先ず図３
（Ａ）を参照して、あらかじめ２ｎｄボンド箇所となる
第２のボンディングパッド１３ｂの上に図２に示した手
法によりボール部分１６を形成しておく。そして図２
（Ｅ）（Ｆ）の工程と同様に、キャピラリ１１の貫通孔
１７に挿通されたワイヤ１０の先端に金ボール１０ａを
形成し、該金ボール１０ａを第１のボンディングパッド
１３ａ表面に押圧・加熱超音波振動により固着して１ｓ
ｔボンドとし、キャピラリ１１を上方向、続いて横方向
に移動する。。FIG. 3 shows the first bonding pad 13a.
2 shows a step of wire bonding the wire 10 to the second bonding pad 13b. First, FIG.
Referring to (A), a ball portion 16 is formed in advance on the second bonding pad 13b serving as a second bonding position by the method shown in FIG. And FIG.
(E) As in the steps (F), a gold ball 10a is formed at the tip of the wire 10 inserted into the through hole 17 of the capillary 11, and the gold ball 10a is pressed and heated on the surface of the first bonding pad 13a. 1 s fixed by ultrasonic vibration
The capillary 11 is moved upward, and then laterally, with a t bond. .

【００２０】次いで図３（Ｂ）に示すように、ボール部
分１６上部にワイヤ１０を再度押圧・加熱超音波振動に
より固着して２ｎｄボンド（ステッチボンド）とする。
この状態が図１に示した状態である。そして図３（Ｃ）
に示すように、キャピラリ１１上方に位置する図示せぬ
クランパがワイヤ１０を挟み固定し、その状態でキャピ
ラリ１１を上方に移動することにより、２ｎｄボンドさ
れたワイヤ１０と貫通孔１７内部のワイヤとを分離・切
断する。斯かる工程により、異なるチップに形成したパ
ッド１３ａ、１３ｂをワイヤ１０により直接ワイヤボン
ドする事が可能になる。Next, as shown in FIG. 3B, the wire 10 is again fixed to the upper portion of the ball portion 16 by pressing and heating ultrasonic vibration to form a 2nd bond (stitch bond).
This state is the state shown in FIG. And FIG. 3 (C)
As shown in FIG. 2, a clamper (not shown) positioned above the capillary 11 sandwiches and fixes the wire 10, and moves the capillary 11 upward in this state, whereby the wire 10 bonded to the second bond and the wire inside the through hole 17 are Is separated and cut. According to such a process, the pads 13a and 13b formed on different chips can be directly wire-bonded with the wires 10.

【００２１】図４に、これまで説明したワイヤボンド手
法を用いて製造したた半導体装置の例を示す。図中、２
０、２１は各々第１と第２の半導体チップ、２２は第１
と第２の半導体チップ２０、２１の表面に形成したボン
ディングパッド、２３は半導体チップ２０、２１を搭載
するためのアイランド、２４は半導体チップ２０、２１
を固着するための接着剤、２５は外部接続リード、２６
はパッド２２と外部接続リード２５とを接続するボンデ
ィングワイヤ、２７は主要部を封止する樹脂を示してい
る。FIG. 4 shows an example of a semiconductor device manufactured by using the wire bonding technique described above. In the figure, 2
0 and 21 are first and second semiconductor chips, respectively, and 22 is a first semiconductor chip.
And bonding pads formed on the surfaces of the second semiconductor chips 20, 21; 23, an island for mounting the semiconductor chips 20, 21; and 24, the semiconductor chips 20, 21.
Adhesive for fixing the external connection leads 25
Denotes a bonding wire for connecting the pad 22 and the external connection lead 25, and 27 denotes a resin for sealing a main part.

【００２２】第１と第２の半導体チップ２０、２１のシ
リコン表面には、前工程において各種の能動、受動回路
素子を形成し、各素子を電極配線で接続することにより
所望の回路機能を達成している。ボンディングパッド２
２は前記電極材料からなり、各チップの周辺部分に複数
個配置されている。各半導体チップ２０、２１の表面に
はボンディングパッド２２を被覆するようにシリコン窒
化膜、シリコン酸化膜、ポリイミド系絶縁膜などのパッ
シベーション皮膜が形成され、ボンディングパッド２２
の上部だけが電気接続のために開口されている。Various active and passive circuit elements are formed on the silicon surfaces of the first and second semiconductor chips 20 and 21 in the previous process, and the desired circuit functions are achieved by connecting the elements with electrode wiring. doing. Bonding pad 2
Reference numeral 2 is made of the above-mentioned electrode material, and a plurality of the reference numerals 2 are arranged around each chip. A passivation film such as a silicon nitride film, a silicon oxide film, or a polyimide-based insulating film is formed on the surface of each of the semiconductor chips 20 and 21 so as to cover the bonding pads 22.
Only the top is open for electrical connection.

【００２３】各半導体チップ２０、２１は、リードフレ
ームのアイランド２３上に並べて接着剤２４によりダイ
ボンドされている。基板の導電型が同じ組み合わせであ
る場合は両者共にＡｇペーストなどのエポキシ系導電接
着剤を使用するが、導電型が異なる場合及び基板電位が
異なる場合は、どちらか一方または両方を絶縁性の接着
剤によってダイボンドしている。Each of the semiconductor chips 20 and 21 is die-bonded with an adhesive 24 side by side on an island 23 of the lead frame. When the conductive type of the substrate is the same combination, use an epoxy-based conductive adhesive such as Ag paste for both, but when the conductive type is different and the substrate potential is different, either or both of them should be insulated. It is die-bonded by the agent.

【００２４】ボンディングワイヤ２６は直径３０ミクロ
ン程度の金線からなり、ボールボンディング方式により
パッド２２と外部接続リード２５とを電気的に接続す
る。すなわち、先端に金ボールを形成したボンディング
ワイヤ２６を各半導体チップ２０、２１のパッド２２上
に押しつけて１ｓｔボンドとし、キャビラリツールを移
動し、外部接続リード２５の先端部表面に押圧接着する
と共に切断して２ｎｄボンドとする方式である。各半導
体チップ２０、２１の、外部接続リード２５に近接する
３辺に位置するパッド２２は、ボールボンディングによ
り外部接続リード２５に接続する。The bonding wire 26 is made of a gold wire having a diameter of about 30 μm, and electrically connects the pad 22 and the external connection lead 25 by a ball bonding method. That is, a bonding wire 26 having a gold ball formed at the tip is pressed against the pad 22 of each of the semiconductor chips 20 and 21 to form a first bond, and the cabillary tool is moved to be pressed and adhered to the surface of the tip of the external connection lead 25. This is a method of cutting into 2nd bonds. The pads 22 located on three sides of each of the semiconductor chips 20 and 21 adjacent to the external connection lead 25 are connected to the external connection lead 25 by ball bonding.

【００２５】残りの各１辺、すなわち、第１と第２の半
導体チップ２０、２１が相対向する辺に位置するパッド
２２ａは、図３に示した手法により、第１の半導体チッ
プ２０から第２の半導体チップ２１にワイヤボンドし
て、両者を直接電気的に接続する。２ｎｄボンド側とな
る第２の半導体チップ２１のパッド２２ａ上には、ワイ
ヤとの接続を介するボール部分２８が形成されており、
ボンディングワイヤ２６の端部は前記ボール部分２８に
ボンディングされている。The remaining one side, that is, the pad 22a located on the side where the first and second semiconductor chips 20 and 21 are opposed to each other is separated from the first semiconductor chip 20 by the method shown in FIG. By wire bonding to the two semiconductor chips 21, the two are directly electrically connected. On the pad 22a of the second semiconductor chip 21 on the 2nd bond side, a ball portion 28 is formed via connection with a wire.
The end of the bonding wire 26 is bonded to the ball portion 28.

【００２６】第１と第２の半導体チップ２０、２１、外
部接続リード２５の先端部、およびボンディングワイヤ
２６を含む主要部は、周囲をエポキシ系の熱硬化樹脂２
７でモールドし、パッケージ化する。リード端子２５は
パッケージの側壁の、樹脂２７の厚みの約半分の位置か
ら外部に導出される。そして、樹脂２７の外部に導出さ
れたリード端子２５は一端下方に曲げられ、再度曲げら
れてＺ字型にフォーミングされている。このフォーミン
グ形状は、リード端子２５の裏面側固着部分をプリント
基板に形成した導電パターンに対向接着する、表面実装
用途の為の形状である。The main parts including the first and second semiconductor chips 20 and 21, the tips of the external connection leads 25, and the bonding wires 26 are surrounded by an epoxy-based thermosetting resin 2.
7. Mold and package. The lead terminal 25 is led out from a position on the side wall of the package that is about half the thickness of the resin 27. The lead terminal 25 led out of the resin 27 is bent downward at one end, bent again, and formed into a Z-shape. This forming shape is a shape for surface mounting use in which the fixed portion on the back surface side of the lead terminal 25 is opposed to the conductive pattern formed on the printed circuit board.

【００２７】以上に説明したように、本発明では第２の
半導体チップ２０上のボンディングパッド２２ａ上にボ
ール部分２８（１６）を形成し、チップ表面より突出し
た該ボール部分２８（１６）上にワイヤ２６（１０）の
２ｎｄボンドを打つので、キャピラリ１１によって第２
の半導体チップ２１表面にダメージを与えることなく、
第１の半導体チップ２０と第２の半導体チップ２１とを
直接ボンディングワイヤ２６（１０）で接続できるもの
である。故に外部接続リードを用いることが無く、また
従来例で示した接続導体９も無用であるので、組立工程
を簡素化し、安価に製造することができるほか、接続導
体９を省くことによって半導体装置の横方向のサイズを
小さくすること、さらには同一サイズのアイランドによ
り大きなサイズのチップを搭載することが可能になる。As described above, in the present invention, the ball portion 28 (16) is formed on the bonding pad 22a on the second semiconductor chip 20, and the ball portion 28 (16) projecting from the chip surface is formed on the ball portion 28 (16). Since the second bond of the wire 26 (10) is hit, the second
Without damaging the surface of the semiconductor chip 21
The first semiconductor chip 20 and the second semiconductor chip 21 can be directly connected by bonding wires 26 (10). Therefore, no external connection lead is used, and the connection conductor 9 shown in the conventional example is unnecessary, so that the assembling process can be simplified and the manufacturing can be performed at low cost. It is possible to reduce the size in the lateral direction, and to mount a chip of a larger size on an island of the same size.

【００２８】図５に、本発明の第２の実施の形態を示し
た。同一箇所に同一符号を付して重複説明を省略する。
図１の様に、ボール部分１６を１個だけ設けたもので
は、キャピラリ１１の位置あわせ精度によっては２ｎｄ
ボンドを打つときにボール部１６とキャピラリ１１の位
置がずれ、キャピラリ１１の押圧部１１ａがボール部分
１６の真上に位置しない場合がある。すると、接触面積
が少ないのでキャピラリ１１がボール部分１６の側壁を
滑り落ち、ワイヤボンドを失敗するような事故を発生す
る可能性がある。FIG. 5 shows a second embodiment of the present invention. The same portions are denoted by the same reference numerals, and redundant description will be omitted.
As shown in FIG. 1, in the case where only one ball portion 16 is provided, depending on the positioning accuracy of the capillary 11, 2nd
When hitting a bond, the position of the ball portion 16 and the capillary 11 may shift, and the pressing portion 11a of the capillary 11 may not be located directly above the ball portion 16. Then, since the contact area is small, there is a possibility that the capillary 11 slides down the side wall of the ball portion 16 and an accident such as failure of wire bonding occurs.

【００２９】そこで本実施の形態では、図示するように
ボール部分１６を隣接して複数個設け、キャピラリ１１
の押圧部１１ａが当節する面積を増大することによっ
て、上記した事故を完全に防止するものである。ボール
部分１６が２個の場合はワイヤ１０の延在する方向の延
長線上に配置する。３個以上の場合は、キャピラリ１１
の貫通孔１７を中心とするようにして配置する。尚、図
５（Ａ）は２ｎｄボンディングにおいてキャピラリ１１
がワイヤ１０を押圧している状態を示し、図５（Ｂ）は
キャピラリ１１を上昇させてワイヤ１０を切断した状態
を示している。Therefore, in this embodiment, a plurality of ball portions 16 are provided adjacent to each other as shown in FIG.
The above-mentioned accident is completely prevented by increasing the area that the pressing portion 11a contacts. When two ball portions 16 are provided, they are arranged on an extension of the direction in which the wire 10 extends. In the case of three or more, the capillary 11
Are arranged so that the through-hole 17 is the center. FIG. 5A shows the capillary 11 in the second bonding.
5 shows a state in which the wire 10 is being pressed, and FIG. 5B shows a state in which the capillary 11 is lifted and the wire 10 is cut.

【００３０】このように、本発明の第２の実施の形態で
はボール部分１６を複数個配置することにより、キャピ
ラリ１１の押圧部１１ａとの接触面積を増大できるの
で、キャピラリ１１が滑り落ちるような事故を完全に防
止できるものである。以下、本発明の第３の実施の形態
を説明する。同一箇所に同一符号を付して重複説明を省
略する。パッド１３上に形成したボール部分１６は、ワ
イヤ１０で形成することからワイヤと同じ金素材からな
る。従ってボール部分１６にワイヤ１０を接続すること
は、金素材と金素材との金属接合になる。この組み合わ
せは、パッドとワイヤのようにアルミと金素材との接合
よりも遙かに接着力が強い。As described above, in the second embodiment of the present invention, by arranging a plurality of ball portions 16, the contact area of the capillary 11 with the pressing portion 11 a can be increased. Can be completely prevented. Hereinafter, a third embodiment of the present invention will be described. The same portions are denoted by the same reference numerals, and redundant description will be omitted. Since the ball portion 16 formed on the pad 13 is formed of the wire 10, it is made of the same gold material as the wire. Therefore, connecting the wire 10 to the ball portion 16 is a metal joining between the gold material and the gold material. This combination has much stronger adhesive strength than the bonding of aluminum and gold materials, such as pads and wires.

【００３１】そのため、第２の実施の形態において、図
６に示すように押圧部１１ａと貫通孔１７との境界に位
置するワイヤ１０の湾曲部１０ｂが、押圧部１１ａによ
り堅固に押されていないにも関わらずボール部分１６と
接着してしまい、押圧部１１ａのエッジ部分１１ｂに位
置する箇所（図示１０ｃの箇所）できれいに切断されず
に髭部分１０ｄを残すような事故が発生することがあ
る。髭部分１０ｄが長くなれば次のワイヤボンドのため
の金ボールを形成することができなくなり、ワイヤボン
ド装置が異常を検知して停止することになる。諸条件を
詰めれば防ぐことは可能であるが、工程管理が厳しくな
る。Therefore, in the second embodiment, as shown in FIG. 6, the curved portion 10b of the wire 10 located at the boundary between the pressing portion 11a and the through hole 17 is not firmly pressed by the pressing portion 11a. Nevertheless, an accident may occur in which the beard portion 10d is not cut cleanly at the portion (the portion shown in FIG. 10c) located at the edge portion 11b of the pressing portion 11a and adheres to the ball portion 16 in spite of the fact. . If the beard portion 10d becomes long, it becomes impossible to form a gold ball for the next wire bond, and the wire bond device detects an abnormality and stops. It is possible to prevent this by reducing various conditions, but the process control becomes stricter.

【００３２】そこで本実施の形態では、図７に示したよ
うに、隣接する複数のボール部分１６を、間隔をあけて
配置することにより髭部分１０ｄの発生を防止する。間
隔（図示Ｘの距離）は少なくともワイヤ１０の直径より
大きく、望ましくは貫通孔１７の直径からその２倍程度
まで（４０から８０μ）あればよい。間隔をあけること
により、ワイヤ１０の湾曲部１０ｂが間隔の間に収まる
ことになり、ボール部分１６に接触しないので、図６に
示したような事故を完全に防止することができる。尚、
図７はキャピラリ１１が押圧した状態を示している。Therefore, in this embodiment, as shown in FIG. 7, a plurality of adjacent ball portions 16 are arranged at intervals to prevent the generation of the beard portion 10d. The interval (distance X in the figure) is at least larger than the diameter of the wire 10 and desirably is about twice the diameter of the through hole 17 (40 to 80 μ). By providing an interval, the curved portion 10b of the wire 10 falls within the interval and does not contact the ball portion 16, so that the accident as shown in FIG. 6 can be completely prevented. still,
FIG. 7 shows a state where the capillary 11 is pressed.

【００３３】ボール部分１６を２個形成する場合は、図
８（Ａ）に示すようにワイヤ１０の延在方向の延長線上
に並べる。３個以上の場合は、図８（Ｂ）に示したよう
にキャピラリ１１の貫通孔１７を中心とするようにして
配置する。以上に説明したように、本発明の第３の実施
の形態によれば、複数個配置したボール部分１６を離間
したことにより、キャピラリ１１が滑り落ちる事故を防
止できると共に、ワイヤ１０の湾曲部１０ｂがボール部
分１６に接触して髭部分１０ｄを残すような事故を完全
に防止できるものである。When two ball portions 16 are formed, they are arranged on an extension line in the extending direction of the wire 10 as shown in FIG. In the case of three or more, they are arranged so that the through hole 17 of the capillary 11 is centered as shown in FIG. As described above, according to the third embodiment of the present invention, since the plurality of ball portions 16 are separated from each other, an accident in which the capillary 11 slides down can be prevented, and the bending portion 10b of the wire 10 can be prevented from slipping. It is possible to completely prevent an accident such as contact with the ball portion 16 and leaving the beard portion 10d.

【００３４】[0034]

【発明の効果】以上に説明した通り、本発明によれば、
チップにダメージを与えることなくボンディングパッド
１３とボンディングパッドとを直接ワイヤボンドする事
が可能である利点を有する。これにより、第１の半導体
チップ２０と第２の半導体チップ２１とを直接ボンディ
ングワイヤ１０で接続し、マルチチップ型の半導体装置
を安価に製造することができる利点を有する。更に、従
来例のように接続を仲介する部分がないので、半導体装
置の横方向の寸法を縮小できる利点を有する他、部品代
等のコストを大幅に減じる利点を有する。As described above, according to the present invention,
There is an advantage that the bonding pad 13 and the bonding pad can be directly wire-bonded without damaging the chip. Thus, there is an advantage that the first semiconductor chip 20 and the second semiconductor chip 21 are directly connected by the bonding wires 10 and a multi-chip type semiconductor device can be manufactured at low cost. Further, since there is no portion that mediates the connection unlike the conventional example, there is an advantage that the lateral dimension of the semiconductor device can be reduced, and also that there is an advantage that costs such as parts cost are greatly reduced.

【００３５】更に本発明の第２の実施の形態によれば、
キャピラリ１１が滑り落ちるような事故を防止できる利
点を有する。そして本発明の第３の実施の形態によれ
ば、ワイヤ１０の髭部分１０ｄを残すような現象を防止
できる利点を有する。Further, according to the second embodiment of the present invention,
There is an advantage that an accident such as the capillary 11 slipping down can be prevented. According to the third embodiment of the present invention, there is an advantage that the phenomenon that the beard portion 10d of the wire 10 is left can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の第１の実施の形態を説明するための
（Ａ）断面図、（Ｂ）平面図である。FIG. 1A is a cross-sectional view and FIG. 1B is a plan view for explaining a first embodiment of the present invention.

【図２】ボール部分１６の形成方法を説明するための断
面図である。FIG. 2 is a cross-sectional view for explaining a method of forming a ball portion 16;

【図３】ワイヤボンド工程を説明するための断面図であ
る。FIG. 3 is a cross-sectional view for explaining a wire bonding step.

【図４】本発明の半導体装置を説明するための（Ａ）平
面図、（Ｂ）断面図である。FIGS. 4A and 4B are a plan view and a cross-sectional view illustrating a semiconductor device of the present invention.

【図５】本発明の第２の実施の形態を説明するための
（Ａ）断面図、（Ｂ）平面図である。FIG. 5A is a sectional view and FIG. 5B is a plan view for explaining a second embodiment of the present invention.

【図６】髭部分１０ｄを説明するための断面図である。FIG. 6 is a sectional view for explaining a beard portion 10d.

【図７】本発明の第３の実施の形態を説明するための断
面図であるFIG. 7 is a sectional view illustrating a third embodiment of the present invention.

【図８】本発明の第３の実施の形態を説明するための平
面図であるFIG. 8 is a plan view for explaining a third embodiment of the present invention.

【図９】従来例を説明するための（Ａ）平面図、（Ｂ）
断面図である。9A is a plan view for explaining a conventional example, and FIG.
It is sectional drawing.

【図１０】従来例を説明するための断面図である。FIG. 10 is a sectional view for explaining a conventional example.

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 ボールボンディングにより、パッド上に
ワイヤが切断されたボール部分を形成し、該ボール部分
に、他から延在したワイヤをステッチボンドしたことを
特徴とするワイヤボンディング構造。1. A wire bonding structure, wherein a ball portion where a wire is cut is formed on a pad by ball bonding, and a wire extending from the other portion is stitch-bonded to the ball portion. 【請求項２】 前記ボール部分を複数個形成したことを
特徴とする請求項１記載のワイヤボンディング構造。2. The wire bonding structure according to claim 1, wherein a plurality of said ball portions are formed. 【請求項３】 前記複数個のボール部分を、少なくとも
ワイヤの直径より広い間隔で配置したことを特徴とする
請求項２記載のワイヤボンディング構造。3. The wire bonding structure according to claim 2, wherein the plurality of ball portions are arranged at intervals wider than at least a diameter of the wire. 【請求項４】 アイランドの上に少なくとも第１と第２
の半導体チップを並べて設置し、前記第１の半導体チッ
プのボンディングパッドと前記第２の半導体チップのボ
ンディングパッドとをボンディングワイヤで接続し、主
要部を封止した半導体装置であって、 前記第２の半導体チップのボンディングパッドに、ボー
ルボンディングによりワイヤが切断されたボール部分を
形成し、前記第１の半導体チップのボンディングパッド
上にワイヤの１ｓｔボンドを打ち、前記第２の半導体チ
ップのボール部分に前記ワイヤの２ｎｄボンドを形成し
たことを特徴とする半導体装置。4. At least a first and a second on an island
A semiconductor device in which a main part is sealed by connecting the bonding pads of the first semiconductor chip and the bonding pads of the second semiconductor chip with bonding wires; Forming a ball portion from which a wire has been cut by ball bonding on a bonding pad of the semiconductor chip, hitting a first bond of the wire on the bonding pad of the first semiconductor chip, and forming a ball portion on the bonding portion of the second semiconductor chip. A semiconductor device, wherein a second bond of the wire is formed. 【請求項５】 前記ボール部分を複数個形成したことを
特徴とする請求項４記載の半導体装置。5. The semiconductor device according to claim 4, wherein a plurality of said ball portions are formed. 【請求項６】 前記複数個のボール部分を、少なくとも
ワイヤの直径より広い間隔で配置したことを特徴とする
請求項５記載のワイヤボンディング構造。6. The wire bonding structure according to claim 5, wherein the plurality of ball portions are arranged at intervals wider than at least the diameter of the wire.
JP9142238A 1997-05-30 1997-05-30 Wire-bonding structure and semiconductor device Pending JPH10335368A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9142238A JPH10335368A (en) 1997-05-30 1997-05-30 Wire-bonding structure and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9142238A JPH10335368A (en) 1997-05-30 1997-05-30 Wire-bonding structure and semiconductor device

Publications (1)

Publication Number Publication Date
JPH10335368A true JPH10335368A (en) 1998-12-18

Family

ID=15310653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9142238A Pending JPH10335368A (en) 1997-05-30 1997-05-30 Wire-bonding structure and semiconductor device

Country Status (1)

Country Link
JP (1) JPH10335368A (en)

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JP2002237499A (en) * 2001-02-09 2002-08-23 Mitsubishi Electric Corp Method and apparatus for manufacturing semiconductor device
US6774494B2 (en) 2001-03-22 2004-08-10 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
EP1617967A2 (en) * 2003-02-20 2006-01-25 Freescale Semiconductor, Inc. Wirebonding insulated wire
JP2007005828A (en) * 2000-09-14 2007-01-11 Vishay Intertechnology Inc High-precision high-frequency capacitor formed on semiconductor substrate
JP2007019476A (en) * 2005-06-09 2007-01-25 Seiko Epson Corp Laser light source device, display device, scanning display device, and projector
JP2008130863A (en) * 2006-11-22 2008-06-05 Nichia Chem Ind Ltd Semiconductor device, and manufacturing method therefore
JP2009054950A (en) * 2007-08-29 2009-03-12 Tokai Rika Co Ltd Bump forming method
US8476726B2 (en) 2009-04-30 2013-07-02 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device
US9136060B2 (en) 2000-09-14 2015-09-15 Vishay-Siliconix Precision high-frequency capacitor formed on semiconductor substrate

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9136060B2 (en) 2000-09-14 2015-09-15 Vishay-Siliconix Precision high-frequency capacitor formed on semiconductor substrate
JP2007005828A (en) * 2000-09-14 2007-01-11 Vishay Intertechnology Inc High-precision high-frequency capacitor formed on semiconductor substrate
EP1895568B1 (en) * 2000-09-14 2014-07-16 Vishay Intertechnology, Inc. High-frequency capacitor formed on semiconductor substrate
EP1895569B1 (en) * 2000-09-14 2013-06-12 Vishay Intertechnology, Inc. Precision high-frequency capacitor formed on semiconductor substrate
JP2002237499A (en) * 2001-02-09 2002-08-23 Mitsubishi Electric Corp Method and apparatus for manufacturing semiconductor device
US6774494B2 (en) 2001-03-22 2004-08-10 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
EP1617967A4 (en) * 2003-02-20 2008-09-03 Freescale Semiconductor Inc Wirebonding insulated wire
EP1617967A2 (en) * 2003-02-20 2006-01-25 Freescale Semiconductor, Inc. Wirebonding insulated wire
JP2007019476A (en) * 2005-06-09 2007-01-25 Seiko Epson Corp Laser light source device, display device, scanning display device, and projector
JP2008130863A (en) * 2006-11-22 2008-06-05 Nichia Chem Ind Ltd Semiconductor device, and manufacturing method therefore
JP2009054950A (en) * 2007-08-29 2009-03-12 Tokai Rika Co Ltd Bump forming method
US8476726B2 (en) 2009-04-30 2013-07-02 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device
US9281457B2 (en) 2009-04-30 2016-03-08 Nichia Corporation Semiconductor device and method of manufacturing the semiconductor device

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