JP2795069B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2795069B2
JP2795069B2 JP4163656A JP16365692A JP2795069B2 JP 2795069 B2 JP2795069 B2 JP 2795069B2 JP 4163656 A JP4163656 A JP 4163656A JP 16365692 A JP16365692 A JP 16365692A JP 2795069 B2 JP2795069 B2 JP 2795069B2
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor device
bonding
insulator
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4163656A
Other languages
English (en)
Other versions
JPH05335366A (ja
Inventor
和明 前原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4163656A priority Critical patent/JP2795069B2/ja
Publication of JPH05335366A publication Critical patent/JPH05335366A/ja
Application granted granted Critical
Publication of JP2795069B2 publication Critical patent/JP2795069B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、半導体装置に関し、特
に樹脂封止された半導体装置に関する。
【０００２】
【従来の技術】多層リードフレームを用いた半導体装置
では、チップおよびリードフレームが銅板上に固着され
ることが多い。即ち、図３に示されるように、銅板１上
に絶縁体２を介してリードフレーム３が固着され、銅板
１の中央には導電性接着剤４を介してチップ５が搭載さ
れる。そして、チップ５−リードフレーム間をボンディ
ングワイヤ６により接続した後、全体をモールド樹脂７
により封止している。
【０００３】
【発明が解決しようとする課題】上述した従来の半導体
装置では、チップとリードフレーム間が直接ボンディン
グワイヤにより接続されているため、ボンディングワイ
ヤが長い場合には、樹脂封止の際にボンディングワイヤ
が変形してしまい、隣り合うボンディングワイヤ同士が
接触してしまうという問題点があった。
【０００４】
【課題を解決するための手段】本発明の半導体装置は、
金属板の中央にチップが搭載され、その周辺に絶縁体を
介してリードフレームが固着され、全体がモールド樹脂
により封止されたものであって、チップ−リードフレー
ム間を接続する全てのボンディングワイヤが、チップ−
リードフレーム間の途中で絶縁体上にもボンディングさ
れ、そして、リードフレーム上のワイヤボンディング点
と絶縁体上のワイヤボンディング点とがほぼ同一平面上
に位置している。
【０００５】
【実施例】次に、本発明の実施例について図面を参照し
て説明する。図１は、本発明の第１の実施例を示す断面
図である。この半導体装置は、次のようにして組み立て
られる。銅板１に、予めリードフレーム３が固着されて
いる絶縁体２を接着剤を用いて接着する。この絶縁体２
の内側部分には突起が形成されており、この突起上には
メタライズ層が形成されている。
【０００６】次に、銅板１上に導電性接着剤４を用いて
チップ５をマウントする。次いで、ボンディングワイヤ
６を用いてチップ上のパッド−絶縁体２上のメタライズ
層−リードフレーム３の順にボンディングを行い、最後
にモールド樹脂７にて封止を行う。
【０００７】このように構成された半導体装置では、ボ
ンディングワイヤが中継点を経由しているためフライイ
ングワイヤ長が短くなり、変形されにくくなる。そのた
め、モールド工程でのワイヤ変形による短絡事故が激減
し歩留りが向上する。
【０００８】本実施例では、絶縁体２に突起を設けて絶
縁体のボンディング面と、チップやリードフレームのボ
ンディング面との高低差を少なくしている。この構成に
よりフライイングワイヤ長をより短くすることができ、
また、ボンディング工程も容易化される。リードフレー
ムが多層リードフレームであるとき、リードフレームの
面に合わせて絶縁体の突起の表面にも凹凸を作ることが
できる。
【０００９】図２は、本発明の第２の実施例を示す断面
図である。本実施例は、絶縁体２上で２回ワイヤボンデ
ィングを行っている点が先の実施例と相違しているが、
その他の点では同様である。
【００１０】
【発明の効果】以上説明したように、本発明の半導体装
置は、チップ−リードフレーム間のワイヤボンディング
を、リードフレームが固着された、表面高さがリードフ
レームの表面高さとほぼ等しい絶縁体を中継点として行
うものであるので、本発明によれば、ボンディングワイ
ヤのフライイングワイヤ長を短くすることができる。従
って、本発明によれば、樹脂封止の際のボンディングワ
イヤの変形を抑制することができ、隣接するボンディン
グワイヤ同士が接触するという事故を防止することがで
きる。また、リードフレーム上のワイヤボンディング点
と中継点との高さをほぼ等しくしたのでボンディングの
作業性を向上させることができる。
【図面の簡単な説明】
【図１】 本発明の第１の実施例の断面図。
【図２】 本発明の第２の実施例の断面図。
【図３】 従来例の断面図。
【符号の説明】
１ 銅板 ２ 絶縁体 ３ リードフレーム ４ 導電性接着剤 ５ チップ ６ ボンディングワイヤ ７ モールド樹脂

Claims (3)

    (57)【特許請求の範囲】
  1. 【請求項１】 絶縁体上にリードフレームが固定され、
    半導体素子上のパッドと前記リードフレーム間がボンデ
    ィングワイヤにより接続され、全体がモールド樹脂によ
    り封止されている半導体装置において、前記ボンディン
    グワイヤの全てが、前記リードフレーム−前記半導体素
    子間において、前記絶縁体上にもボンディングされ、か
    つ、前記リードフレーム上のワイヤボンディング点と前
    記絶縁体上のワイヤボンディング点とがほぼ同一平面上
    に位置していることを特徴とする半導体装置。
  2. 【請求項２】 前記リードフレーム−前記パッド間が同
    一の連続したボンディングワイヤにより接続されている
    ことを特徴とする請求項１記載の半導体装置。
  3. 【請求項３】 前記絶縁体上で前記ボンディングワイヤ
    が複数回ボンディングされていることを特徴とする請求
    項２記載の半導体装置。
JP4163656A 1992-05-29 1992-05-29 半導体装置 Expired - Fee Related JP2795069B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4163656A JP2795069B2 (ja) 1992-05-29 1992-05-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4163656A JP2795069B2 (ja) 1992-05-29 1992-05-29 半導体装置

Publications (2)

Publication Number Publication Date
JPH05335366A JPH05335366A (ja) 1993-12-17
JP2795069B2 true JP2795069B2 (ja) 1998-09-10

Family

ID=15778088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4163656A Expired - Fee Related JP2795069B2 (ja) 1992-05-29 1992-05-29 半導体装置

Country Status (1)

Country Link
JP (1) JP2795069B2 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839556A (en) * 1983-02-25 1989-06-13 Rca Licensing Corporation Cathode-ray tube having an improved shadow mask contour
US7199477B1 (en) * 2000-09-29 2007-04-03 Altera Corporation Multi-tiered lead package for an integrated circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113931U (ja) * 1984-06-29 1986-01-27 関西日本電気株式会社 半導体装置
US4975761A (en) * 1989-09-05 1990-12-04 Advanced Micro Devices, Inc. High performance plastic encapsulated package for integrated circuit die

Also Published As

Publication number Publication date
JPH05335366A (ja) 1993-12-17

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