JP2724083B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP2724083B2
JP2724083B2 JP4343736A JP34373692A JP2724083B2 JP 2724083 B2 JP2724083 B2 JP 2724083B2 JP 4343736 A JP4343736 A JP 4343736A JP 34373692 A JP34373692 A JP 34373692A JP 2724083 B2 JP2724083 B2 JP 2724083B2
Authority
JP
Japan
Prior art keywords
lid
semiconductor element
metal layer
insulating base
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4343736A
Other languages
Japanese (ja)
Other versions
JPH06196579A (en
Inventor
弘二 井苅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP4343736A priority Critical patent/JP2724083B2/en
Publication of JPH06196579A publication Critical patent/JPH06196579A/en
Application granted granted Critical
Publication of JP2724083B2 publication Critical patent/JP2724083B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を収容するた
めの半導体素子収納用パッケージに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device.

【0002】[0002]

【従来の技術】従来、半導体素子、特にLSI等の半導
体素子を収容するための半導体素子収納用パッケージ、
例えばプラグイン型の半導体素子収納用パッケージはア
ルミナセラミックス等の電気絶縁材料から成り、その上
面の略中央部に半導体素子を収容するための凹部を有
し、且つ該凹部周辺から下面にかけて導出されたタング
ステン、モリブデン、マンガン等の高融点金属粉末から
成るメタライズ配線層を有する四角形状の絶縁基体と、
半導体素子を外部電気回路に電気的に接続するために前
記メタライズ配線層に銀ロウ等のロウ材を介し取着され
た外部リード端子と、アルミナセラミックス等の電気絶
縁材料から成る四角形状の蓋体とから構成されており、
絶縁基体の凹部底面に半導体素子を接着剤を介して取着
固定し、半導体素子の各電極とメタライズ配線層とをボ
ンディングワイヤを介して電気的に接続するとともに絶
縁基体の上面に蓋体を半田等から成る封止材により接合
させ、絶縁基体と蓋体とから成る容器の内部に半導体素
子を気密に封止することによって製品としての半導体装
置となる。
2. Description of the Related Art Conventionally, semiconductor device housing packages for housing semiconductor devices, particularly semiconductor devices such as LSIs,
For example, a plug-in type semiconductor element housing package is made of an electrically insulating material such as alumina ceramics, has a concave portion for housing the semiconductor element at a substantially central portion of the upper surface, and is led out from the periphery of the concave portion to the lower surface. A quadrangular insulating base having a metallized wiring layer made of a refractory metal powder such as tungsten, molybdenum, and manganese;
An external lead terminal attached to the metallized wiring layer via a brazing material such as silver brazing to electrically connect the semiconductor element to an external electric circuit, and a rectangular lid made of an electrically insulating material such as alumina ceramics And is composed of
The semiconductor element is attached and fixed to the bottom of the concave portion of the insulating base via an adhesive, and each electrode of the semiconductor element is electrically connected to the metallized wiring layer via a bonding wire, and the lid is soldered to the upper surface of the insulating base. A semiconductor device as a product is obtained by joining the semiconductor element with a sealing material made of the above and the like, and hermetically sealing the semiconductor element inside a container formed of an insulating base and a lid.

【0003】尚、かかる従来の半導体素子収納用パッケ
ージは絶縁基体と蓋体の接合が、絶縁基体の上面に予め
タングステン、モリブデン、マンガン等の高融点金属粉
末から成る金属層を、また蓋体の下面及び側面全周に銀
−パラジウムから成る金属層を各々形成しておき、絶縁
基体と蓋体の各金属層を封止材である半田を介し接合さ
せ、蓋体側面の金属層と絶縁基体上面の金属層との間に
半田の溜まりを形成することによって行われている。
In such a conventional package for housing a semiconductor element, an insulating base and a lid are joined together by forming a metal layer made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like on the upper surface of the insulating base. A metal layer made of silver-palladium is formed on the lower surface and the entire side surface, respectively, and the metal layers of the insulating base and the lid are joined to each other via solder as a sealing material. This is done by forming a pool of solder between the upper metal layer.

【0004】また、前記蓋体の金属層は銀 パラジウム
粉末に適当な有機溶剤、溶媒を添加混合して得られる金
属ペーストを蓋体の下面及び側面に従来周知のスクリー
ン印刷法を採用することによって所定厚みに印刷塗布
し、しかる後、これを焼成することによって蓋体下面及
び側面全周に被着される。
The metal layer of the lid is formed by applying a well-known screen printing method to the lower and side surfaces of the lid by applying a metal paste obtained by adding a suitable organic solvent and a solvent to silver-palladium powder. By printing and applying to a predetermined thickness, and then baking it, the cover is attached to the lower surface and the entire side surface of the lid.

【0005】しかしながら、この従来の半導体素子収納
用パッケージにおいては蓋体は四角形状をなし、側面各
角部が角張っていること及び蓋体は脆弱なアルミナセラ
ミックスから成り、且つその厚みが0.6mm程度と薄
いこと等から絶縁基体と蓋体とから成る容器の内部に半
導体素子を気密に収容した後、蓋体に外力が印加される
と該外力が蓋体の側面各角部に集中して欠けが発生し、
その結果、容器の気密封止が破れ、内部に収容する半導
体素子を長時間にわたり正常、且つ安定に作動させるこ
とができないという欠点を有していた。
However, in this conventional package for accommodating a semiconductor element, the lid has a quadrangular shape, each side edge is angular, and the lid is made of fragile alumina ceramics and has a thickness of 0.6 mm. After the semiconductor element is hermetically housed in a container formed of an insulating base and a lid because of its degree and thickness, when an external force is applied to the lid, the external force concentrates on each corner of the side surface of the lid. Chipping occurs,
As a result, the hermetic sealing of the container is broken, and the semiconductor element contained therein cannot be normally and stably operated for a long time.

【0006】そこで上記欠点を解消するために蓋体の側
面各角部を半径0.5mm以上の円弧状に加工し、側面
各角部に外力が集中するのを防止して蓋体の機械的強度
を向上させることが行われている。
Therefore, in order to solve the above-mentioned drawback, each corner of the side face of the lid is processed into an arc shape having a radius of 0.5 mm or more to prevent the external force from concentrating on each corner of the side face, and to mechanically operate the lid. Improvements in strength have been made.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、蓋体の
側面各角部に円弧状の加工を施すと、蓋体の側面に金属
ペーストをスクリーン印刷法により塗布し、蓋体の側面
全周に金属層を被着させる際、蓋体の側面各角部が円弧
状であり、スクリーンマスクに密着しないことから蓋体
の側面各角部に金属層を被着させることができず、その
結果、絶縁基体上面の金属層と蓋体の下面及び側面の金
属層とを封止材である半田を介して接合させ、絶縁基体
と蓋体とから成る容器内部に半導体素子を気密に封止す
ることによって半導体装置となした場合、蓋体の側面各
角部に半田溜まりの存在しない領域が形成されてしま
う。そのためこの半導体装置は封止材(半田)に半導体
素子の作動時に発する熱が繰り返し印加されると半田の
伸縮による応力が前記半田溜まりの存在しない領域に集
中し、該集中した応力によって蓋体の下面金属層と絶縁
基体上面の金属層との間に配される封止材(半田)にク
ラックを発生させ、絶縁基体と蓋体とから成る容器の気
密封止が破れて内部に収容する半導体素子を長期間にわ
たり、正常、且つ安定に作動させることができないとい
う欠点を誘発してしまう。
However, if each corner of the side surface of the lid is processed into an arc shape, a metal paste is applied to the side surface of the lid by a screen printing method, and the metal is applied all around the side surface of the lid. When the layer is applied, each corner of the side surface of the lid has an arc shape, and the metal layer cannot be applied to each corner of the side surface of the lid because it does not adhere to the screen mask. By bonding the metal layer on the upper surface of the base and the metal layers on the lower surface and the side surfaces of the lid via solder as a sealing material, and sealing the semiconductor element in a container including the insulating substrate and the lid in an airtight manner. In the case of a semiconductor device, a region where no solder pool exists is formed at each corner of the side surface of the lid. Therefore, in this semiconductor device, when the heat generated during the operation of the semiconductor element is repeatedly applied to the sealing material (solder), the stress due to the expansion and contraction of the solder concentrates on the area where the solder pool does not exist, and the concentrated stress causes the lid to be closed. A semiconductor that generates cracks in a sealing material (solder) disposed between a lower surface metal layer and a metal layer on an upper surface of an insulating substrate, and breaks hermetic sealing of a container including an insulating substrate and a lid, and accommodates the semiconductor inside the container. This causes a disadvantage that the element cannot be operated normally and stably for a long period of time.

【0008】[0008]

【発明の目的】本発明は上記欠点に鑑みて案出されたも
ので、その目的は絶縁基体と蓋体とから成る容器に気密
封止を完全とし、内部に収容する半導体素子を長期間に
わたり、正常、且つ安定に作動させることができる半導
体素子収納用パッケージを提供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to completely seal hermetically in a container comprising an insulating base and a lid, and to provide a semiconductor device accommodated therein for a long period of time. Another object of the present invention is to provide a semiconductor device housing package that can be operated normally and stably.

【0009】[0009]

【課題を解決するための手段】本発明は上面に金属層を
有する絶縁基体と、下面及び側面全周に金属層を有する
蓋体とから成り、絶縁基体の上面と蓋体の下面の各金属
層を封止材を介し接合させることによって内部に半導体
素子を気密に封止する半導体素子収納用パッケージにお
いて、前記蓋体の各側面角部に0.5mm以上の平坦面
を形成するとともに、該平坦面と側面とのなす両端の角
度が各々120°以上であることを特徴とするものであ
る。
SUMMARY OF THE INVENTION The present invention comprises an insulating substrate having a metal layer on the upper surface and a lid having a metal layer on the entire lower surface and side surfaces. In a semiconductor element housing package in which a semiconductor element is hermetically sealed by joining layers via a sealing material, a flat surface of 0.5 mm or more is formed on each side corner of the lid, and The angle between both ends formed by the flat surface and the side surface is 120 ° or more.

【0010】[0010]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。
BRIEF DESCRIPTION OF THE DRAWINGS FIG.

【0011】図1及び図2は本発明の半導体素子収納用
パッケージをプラグイン型の半導体素子収納用パッケー
ジを例に採って示す図であり、1は絶縁基体、2は蓋体
である。この絶縁基体1と蓋体2とで半導体素子3を収
容するための容器4が構成される。
FIGS. 1 and 2 show a semiconductor device housing package of the present invention, taking a plug-in type semiconductor device housing package as an example. Reference numeral 1 denotes an insulating base, and 2 denotes a lid. The insulating base 1 and the lid 2 constitute a container 4 for housing the semiconductor element 3.

【0012】前記絶縁基体1はアルミナセラミックス等
の電気絶縁材料から成り、その上面略中央部に半導体素
子3を収容するための空所を形成する凹部1aが設けて
あり、該凹部1a底面には半導体素子3がエポキシ樹脂
等の接着剤を介し取着される。
The insulating substrate 1 is made of an electrically insulating material such as alumina ceramics, and has a recess 1a for forming a space for accommodating the semiconductor element 3 at a substantially central portion of the upper surface thereof, and a bottom surface of the recess 1a. The semiconductor element 3 is attached via an adhesive such as an epoxy resin.

【0013】前記絶縁基体1はアルミナセラミックスか
ら成る場合、例えば、アルミナ(Al2 3 )、シリカ
(SiO2 )、カルシア(CaO)、マグネシア(Mg
O)等の原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカレンダーロール法等を採用することによって
セラミックグリーンシート(セラミック生シート)を形
成し、しかる後、前記セラミックグリーンシートに適当
な打ち抜き加工を施すとともに複数枚積層し、高温(約
1600℃)で焼成することによって製作される。
When the insulating base 1 is made of alumina ceramics, for example, alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (Mg
O) or the like, an appropriate organic solvent and a solvent are added and mixed to form a slurry, and a ceramic green sheet (green ceramic sheet) is formed by employing a conventionally known doctor blade method or calender roll method. After the formation, the ceramic green sheet is manufactured by subjecting the ceramic green sheet to appropriate punching, laminating a plurality of sheets, and firing at a high temperature (about 1600 ° C.).

【0014】また前記絶縁基体1には凹部1a周辺から
下面にかけて導出する複数のメタライズ配線層5が形成
されており、該メタライズ配線層5の凹部1a周辺部に
は半導体素子3の各電極がボンディングワイヤ6を介し
て電気的に接続され、また下面に導出された部位には外
部電気回路と接続される外部リード端子7が銀ロウ等の
ロウ材を介し取着される。
A plurality of metallized wiring layers 5 extending from the periphery of the concave portion 1a to the lower surface are formed on the insulating base 1, and each electrode of the semiconductor element 3 is bonded around the concave portion 1a of the metallized wiring layer 5. External lead terminals 7 electrically connected via wires 6 and connected to an external electric circuit are attached to portions led out to the lower surface via a brazing material such as silver brazing.

【0015】前記メタライズ配線層5はタングステン、
モリブデン、マンガン等の高融点金属粉末から成り、該
高融点金属粉末に適当な有機溶剤、溶媒を添加混合して
得た金属ペーストを絶縁基体1となるセラミックグリー
ンシートに予め従来周知のスクリーン印刷法等により印
刷塗布しておくことによって絶縁基体1の凹部1a周辺
から下面にかけて被着形成される。
The metallized wiring layer 5 is made of tungsten,
A metal paste made of a high melting point metal powder such as molybdenum, manganese or the like, obtained by adding and mixing an appropriate organic solvent and a solvent to the high melting point metal powder is applied to a ceramic green sheet serving as the insulating substrate 1 in advance by a screen printing method known in the art. By printing and applying in such a manner as described above, the insulating substrate 1 is formed so as to adhere from the periphery to the lower surface of the concave portion 1a.

【0016】尚、前記メタライズ配線層5はその露出す
る表面にニッケル、金等の良導電性で、且つ耐蝕性に優
れた金属をメッキ法により0. 1乃至20. 0μmの厚
みに層着させておくとメタライズ配線層5の酸化腐食を
有効に防止することができるとともにメタライズ配線層
5とボンディングワイヤ6との接続及びメタライズ配線
層5と外部リード端子7とのロウ付けを極めて強固なも
のとなすことができる。従って、前記メタライズ配線層
5の酸化腐食を防止し、メタライズ配線層5とボンディ
ングワイヤ6との接続及びメタライズ配線層5と外部リ
ード端子7とのロウ付けを強固とするにはメタライズ配
線層5の露出する表面にニッケル、金等を1. 0乃至2
0. 0μmの厚みに層着させておくことが好ましい。
The metallized wiring layer 5 is formed by depositing a metal having good conductivity and excellent corrosion resistance, such as nickel or gold, to a thickness of 0.1 to 20.0 μm on the exposed surface by plating. By doing so, oxidation corrosion of the metallized wiring layer 5 can be effectively prevented, and the connection between the metallized wiring layer 5 and the bonding wire 6 and the brazing between the metallized wiring layer 5 and the external lead terminals 7 are extremely strong. I can do it. Therefore, in order to prevent the metallized wiring layer 5 from being oxidized and corroded, and to firmly connect the metallized wiring layer 5 to the bonding wires 6 and braze the metallized wiring layer 5 to the external lead terminals 7, Nickel, gold, etc. on exposed surface 1.0 to 2
It is preferable that the layer is deposited to a thickness of 0.0 μm.

【0017】また前記メタライズ配線層5にロウ付けさ
れる外部リード端子7は内部に収容する半導体素子3を
外部電気回路に接続する作用を為し、外部リード端子7
を外部電気回路に接続することによって内部に収容され
る半導体素子3はメタライズ配線層5及び外部リード端
子7を介し外部電気回路と電気的に接続されることとな
る。
The external lead terminals 7 brazed to the metallized wiring layer 5 serve to connect the semiconductor element 3 housed therein to an external electric circuit.
Is connected to an external electric circuit, whereby the semiconductor element 3 housed inside is electrically connected to the external electric circuit via the metallized wiring layer 5 and the external lead terminals 7.

【0018】前記外部リード端子7はコバール金属(F
e−Ni−Co合金)や42アロイ(Fe−Ni合金)
等の金属材料から成り、コバール金属等のインゴット
(塊)を圧延加工法や打ち抜き加工法等、従来周知の金
属加工法を採用することによって所定の板状に形成され
る。
The external lead terminal 7 is made of Kovar metal (F
e-Ni-Co alloy) and 42 alloy (Fe-Ni alloy)
The ingot (lumps) of Kovar metal or the like is formed into a predetermined plate shape by employing a conventionally known metal working method such as a rolling method or a punching method.

【0019】前記絶縁基体1はまたその上面に金属層8
が被着形成されており、該金属層8には蓋体2が半田か
ら成る封止材9を介して接合され、これによって絶縁基
体1と蓋体2とから成る容器4の内部に半導体素子3が
気密に封止される。
The insulating substrate 1 also has a metal layer 8 on its upper surface.
The lid 2 is joined to the metal layer 8 via a sealing material 9 made of solder, whereby the semiconductor element is placed inside the container 4 composed of the insulating base 1 and the lid 2. 3 is hermetically sealed.

【0020】前記絶縁基体1の上面に被着形成した金属
層8は例えば、タングステン、モリブデン、マンガン等
の高融点金属粉末から成り、該高融点金属粉末に適当な
有機溶剤、溶媒を添加混合して得た金属ペーストを絶縁
基体1となるセラミックグリーンシートに従来周知のス
クリーン印刷法を採用することによって印刷塗布してお
き、セラミックグリーンシートを高温で焼成し絶縁基体
1となす際に同時に絶縁基体1の上面に形成される。
The metal layer 8 formed on the upper surface of the insulating base 1 is made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like, and an appropriate organic solvent or solvent is added to the high melting point metal powder and mixed. The metal paste thus obtained is applied to a ceramic green sheet serving as the insulating substrate 1 by printing by employing a conventionally known screen printing method, and the ceramic green sheet is fired at a high temperature to form the insulating substrate 1 at the same time as the insulating substrate 1. 1 is formed on the upper surface.

【0021】尚、前記金属層8の表面には封止材9との
濡れ性(反応性)を改善するためにニッケルから成る層
と金から成る層を順次層着させておくことが好ましい。
It is preferable that a layer made of nickel and a layer made of gold are sequentially formed on the surface of the metal layer 8 in order to improve the wettability (reactivity) with the sealing material 9.

【0022】また前記絶縁基体1の上面に接合される蓋
体2はアルミナセラミックス等の電気絶縁材料から成
り、その下面外周から側面全周にかけて予め金属層10
が被着形成されており、該金属層10を半田から成る封
止材9を介し絶縁基体1上面の金属層8に接合させるこ
とによって蓋体2は絶縁基体1に接合されることとな
る。
The lid 2 joined to the upper surface of the insulating base 1 is made of an electrically insulating material such as alumina ceramics.
The lid 2 is joined to the insulating base 1 by joining the metal layer 10 to the metal layer 8 on the upper surface of the insulating base 1 via a sealing material 9 made of solder.

【0023】前記絶縁基体1上面に接合される蓋体2は
例えばアルミナ(Al2 3 )、シリカ(SiO2 )、
カルシア(CaO)、マグネシア(MgO)等に適当な
有機溶剤、溶媒を添加混合して得た原料粉末を所定形状
のプレス金型内に充填するとともに一定圧力で押圧して
形成し、しかる後、前記成形品を約1500℃の温度で
焼成することによって製作される。
The lid 2 bonded to the upper surface of the insulating base 1 is made of, for example, alumina (Al 2 O 3 ), silica (SiO 2 ),
A raw material powder obtained by adding and mixing an appropriate organic solvent and a solvent to calcia (CaO), magnesia (MgO), etc. is filled in a press mold of a predetermined shape and formed by pressing at a constant pressure. It is manufactured by firing the molded article at a temperature of about 1500 ° C.

【0024】また前記蓋体2の下面外周及び側面全周に
被着形成されている金属層10は銀や銀 パラジウム等
の金属材料から成り、銀粉末、パラジウム粉末等に適当
なバインダー及び有機溶媒を添加混合して得た金属ペー
ストを蓋体2の下面及び側面に従来周知のスクリーン印
刷法により10乃至30μmの厚みに印刷塗布するとと
もにこれを約900℃の温度で焼き付けることによって
蓋体2の下面外周及び側面全周に被着形成される。
The metal layer 10 formed on the outer periphery of the lower surface and the entire periphery of the side surface of the lid 2 is made of a metal material such as silver or silver / palladium. The metal paste obtained by adding and mixing is coated on the lower surface and side surfaces of the lid 2 by a conventionally known screen printing method to a thickness of 10 to 30 μm and baked at a temperature of about 900 ° C. It is formed on the outer periphery of the lower surface and the entire periphery of the side surface.

【0025】前記蓋体2はその側面各角部に幅が0.5
mm以上の平坦面2aを有する切り欠きAが形成されて
おり、該切り欠きAによって蓋体2に外力が印加され、
該外力が蓋体2の側面各角部に集中して蓋体2の側面各
角部に欠けや割れ等が発生するのを有効に防止してい
る。
The lid 2 has a width of 0.5 at each corner of its side surface.
A notch A having a flat surface 2a of not less than 2 mm is formed, and an external force is applied to the lid 2 by the notch A,
The external force is effectively concentrated on each corner of the side surface of the lid 2 to effectively prevent chipping, cracking, and the like from occurring at each corner of the side surface of the lid 2.

【0026】また、前記切り欠きAの平坦面2aと蓋体
2の各側面との間に位置する角部の角度α、βはそのい
ずれもが120°以上の鈍角となっており、蓋体2に外
力が印加されても該外力が蓋体2の各側面と平坦面2a
との間の角部に集中することはなく蓋体2に欠けや割れ
等が発生することはない。
The angles α and β of the corners located between the flat surface 2a of the notch A and the side surfaces of the lid 2 are both obtuse angles of 120 ° or more. 2 is applied to each side surface of the lid 2 and the flat surface 2a.
Are not concentrated on the corners between them, and there is no occurrence of chipping or cracking in the lid 2.

【0027】更に前記蓋体2の側面各角部に形成した切
り欠きAは幅を0.5mm以上とした平坦面2aを有し
ていることから蓋体2の側面にスクリーン印刷法を採用
することによって金属層10を被着させる際、蓋体2の
側面全周がスクリーンマスクに密着して蓋体2の側面全
周に金属層10を確実に被着させることができる。その
ため、絶縁基体1上面の金属層8と蓋体2の下面及び側
面の金属層10とを封止材9である半田を介して接合さ
せ、絶縁基体1と蓋体2とから成る容器4内部に半導体
素子3を気密に封止した場合、蓋体2の側面全周に半田
溜まりが確実に形成され、封止材9(半田)に半導体素
子3の作動時に発する熱が繰り返し印加され、半田の伸
縮による応力が発生したとしても、該応力は封止材9の
全体に分散されて小さくなり、封止材9にクラックが発
生して容器4の気密封止が破れることは皆無となる。
Further, since the notch A formed at each corner of the side surface of the lid 2 has a flat surface 2a having a width of 0.5 mm or more, a screen printing method is adopted on the side surface of the lid 2. Thus, when the metal layer 10 is applied, the entire periphery of the side surface of the lid 2 is in close contact with the screen mask, so that the metal layer 10 can be reliably applied to the entire periphery of the side surface of the lid 2. Therefore, the metal layer 8 on the upper surface of the insulating substrate 1 and the metal layer 10 on the lower surface and the side surface of the lid 2 are joined via solder as the sealing material 9, and the inside of the container 4 including the insulating substrate 1 and the lid 2 is joined. When the semiconductor element 3 is hermetically sealed, a solder pool is reliably formed on the entire periphery of the side surface of the lid 2, and the heat generated during the operation of the semiconductor element 3 is repeatedly applied to the sealing material 9 (solder). Even if stress due to the expansion and contraction of the sealing material 9 occurs, the stress is dispersed throughout the sealing material 9 and becomes small, and cracks are not generated in the sealing material 9 and the hermetic sealing of the container 4 is never broken.

【0028】尚、前記蓋体2の側面各角部に形成する切
り欠きAはその平坦面2aの幅が0.5mm未満である
と蓋体2に外力が印加された際、蓋体2の側面各角部に
外力が集中して蓋体2に欠けや割れ等を発生させてしま
うとともに平坦面2aにスクリーン印刷法を採用するこ
とによって金属層10を被着させることができなくな
る。従って、前記蓋体2の側面各角部に形成する切り欠
きAはその平坦面2aの幅が0.5mm以上のものに特
定される。
The notch A formed at each corner of the side surface of the lid 2 has a flat surface 2a having a width of less than 0.5 mm. The external force concentrates on each corner of the side surface, causing chipping or cracking of the lid 2, and the metal layer 10 cannot be adhered by employing the screen printing method on the flat surface 2 a. Therefore, the notch A formed at each corner of the side surface of the lid 2 is specified to have a flat surface 2a having a width of 0.5 mm or more.

【0029】また前記切り欠きAの平坦面2aと蓋体2
の各側面との間に位置する角部の角度α、βが120°
未満となると蓋体2に外力が印加された際、該外力が角
部に集中して蓋体2に欠けや割れ等を発生させてしま
う。従って前記切り欠けAの平坦面2aと蓋体2の各側
面との間に位置する角部の角度α、βはそのいずれもが
120°以上に特定される。
The flat surface 2a of the notch A and the lid 2
Angles α and β of the corners located between the respective side surfaces are 120 °
If it is less than this, when an external force is applied to the lid 2, the external force concentrates on the corners, causing the lid 2 to chip or crack. Therefore, the angles α and β of the corners located between the flat surface 2 a of the notch A and the respective side surfaces of the lid 2 are both specified to be 120 ° or more.

【0030】かくして上述の半導体素子収納用パッケー
ジによれば、絶縁基体1の凹部1a底面に半導体素子3
を接着剤を介して取着するとともに半導体素子3の各電
極をメタライズ配線層5にボンディングワイヤ6を介し
て電気的に接続し、しかる後、絶縁基体1の上面に被着
させた金属層8と蓋体2の下面及び側面に被着させた金
属層10とを半田から成る封止材9を介して接合させ、
絶縁基体1と蓋体2とから成る容器4の内部に半導体素
子3を気密に封止することによって製品としての半導体
装置となる。
Thus, according to the package for housing a semiconductor element described above, the semiconductor element 3
Are attached via an adhesive and the respective electrodes of the semiconductor element 3 are electrically connected to the metallized wiring layer 5 via bonding wires 6. Thereafter, the metal layer 8 attached to the upper surface of the insulating substrate 1 is formed. And a metal layer 10 attached to the lower surface and side surfaces of the lid 2 via a sealing material 9 made of solder,
A semiconductor device as a product is obtained by hermetically sealing the semiconductor element 3 inside a container 4 including the insulating base 1 and the lid 2.

【0031】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば、上述の実施例では蓋体
2の下面外周及び側面全周に銀 パラジウムから成る金
属層10を形成していたが、これを絶縁基体1の上面に
形成した金属層8と同じ材質、即ち、タングステン、モ
リブデン等で形成してもよい。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. Although the metal layer 10 made of silver / palladium is formed on the outer periphery of the lower surface and the entire periphery of the side surface, it may be formed of the same material as the metal layer 8 formed on the upper surface of the insulating base 1, that is, tungsten, molybdenum, or the like. .

【0032】また上述の実施例ではプラグイン型の半導
体素子収納用パッケージを例に採って説明したがデュア
ルインライン型等の他の半導体素子収納用パッケージに
も適用可能である。
In the above-described embodiment, a plug-in type semiconductor element storage package is described as an example. However, the present invention can be applied to other semiconductor element storage packages such as a dual in-line type.

【0033】[0033]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、蓋体の側面各角部に0.5mm以上の平坦面を
有し、該平坦面と側面とのなす角度が各々120°以上
の切り欠きを形成したことから蓋体に外力が印加されて
も該外力は蓋体の全体に分散されて集中することはな
く、その結果、蓋体に外力印加に起因する欠けや割れ等
が発生することは皆無で、絶縁基体と蓋体とから成る容
器内部に半導体素子を気密に封止するのを可能として内
部に収容する半導体素子を長期間にわたり、正常、且つ
安定に作動させることができる。
According to the semiconductor device housing package of the present invention, each corner of the side of the lid has a flat surface of 0.5 mm or more, and the angle between the flat surface and the side is 120 ° or more. Even when an external force is applied to the lid, the external force is dispersed throughout the lid and does not concentrate, and as a result, chips or cracks due to the application of the external force are formed on the lid. It does not occur at all, and enables the semiconductor element to be hermetically sealed inside the container consisting of the insulating base and the lid so that the semiconductor element housed therein can be operated normally and stably for a long period of time. it can.

【0034】また同時に蓋体の側面全周に金属層を確実
に被着させて蓋体の側面全周に対し封止材である半田の
溜まりを形成することができ、その結果、封止材である
半田に熱が印加され、半田の伸縮による応力が発生した
としても該応力は封止材全体に均一に分散されて小さく
なり、封止材にクラックが発生するのを皆無として半導
体素子を収容する容器の気密封止を完全となすことがで
きる。
At the same time, a metal layer can be securely applied to the entire periphery of the side surface of the lid, so that a pool of solder, which is a sealing material, can be formed on the entire periphery of the side surface of the lid. Even if heat is applied to the solder, and stress due to expansion and contraction of the solder is generated, the stress is uniformly dispersed throughout the sealing material and becomes small, and cracks are not generated in the sealing material. The container to be housed can be completely hermetically sealed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

【図2】図1に示すパッケージの蓋体の平面図である。FIG. 2 is a plan view of a lid of the package shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・絶縁基体 2・・・蓋体 2a・・平坦面 3・・・半導体素子 4・・・容器 5・・・メタライズ配線層 7・・・外部リード端子 8・・・金属層(絶縁基体側) 9・・・封止材 10・・・金属層(蓋体側) A・・・切り欠き DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Lid 2a ... Flat surface 3 ... Semiconductor element 4 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 8 ... Metal layer (insulation) 9: sealing material 10: metal layer (lid side) A: notch

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】上面に金属層を有する絶縁基体と、下面外
周部及び側面全周に金属層を有する四角形状の蓋体とか
ら成り、絶縁基体と蓋体の各金属層をロウ材から成る
止材を介し接合させることによって内部に半導体素子を
気密に封止する半導体素子収納用パッケージにおいて、
前記蓋体の各側面角部に幅が0.5mm以上の平坦面を
形成するとともに該平坦面と側面とのなす両端の角度を
各々120°以上としたことを特徴とする半導体素子収
納用パッケージ。
1. An insulating base having a metal layer on an upper surface, and a rectangular lid having a metal layer on an outer peripheral portion of a lower surface and an entire peripheral surface of a side surface. Each metal layer of the insulating base and the lid is made of a brazing material. In a semiconductor element housing package that hermetically seals a semiconductor element inside by joining through a sealing material,
A package having a flat surface having a width of 0.5 mm or more at each corner of the side surface of the lid, and an angle between both ends formed by the flat surface and the side surface being 120 ° or more. .
JP4343736A 1992-12-24 1992-12-24 Package for storing semiconductor elements Expired - Fee Related JP2724083B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4343736A JP2724083B2 (en) 1992-12-24 1992-12-24 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4343736A JP2724083B2 (en) 1992-12-24 1992-12-24 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH06196579A JPH06196579A (en) 1994-07-15
JP2724083B2 true JP2724083B2 (en) 1998-03-09

Family

ID=18363855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4343736A Expired - Fee Related JP2724083B2 (en) 1992-12-24 1992-12-24 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2724083B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2833655B2 (en) * 1989-03-30 1998-12-09 富士通株式会社 Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPH06196579A (en) 1994-07-15

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