JPH05160283A - Semiconductor device containing package - Google Patents

Semiconductor device containing package

Info

Publication number
JPH05160283A
JPH05160283A JP3324927A JP32492791A JPH05160283A JP H05160283 A JPH05160283 A JP H05160283A JP 3324927 A JP3324927 A JP 3324927A JP 32492791 A JP32492791 A JP 32492791A JP H05160283 A JPH05160283 A JP H05160283A
Authority
JP
Japan
Prior art keywords
metal
metal frame
frame body
brazed
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3324927A
Other languages
Japanese (ja)
Inventor
Kaichi Agemizuguchi
香一 上水口
Junichi Niitome
順一 新留
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP3324927A priority Critical patent/JPH05160283A/en
Publication of JPH05160283A publication Critical patent/JPH05160283A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To provide a semiconductor device containing package by which a semicopnductor integrated circuit device which is contained inside normally and stably can operate for a long period by firmly attaching a metallic cover body to a metal frame body which is brazed to an insulating substrate and by realizing high reliability of hermetic sealing of a container. CONSTITUTION:In a semiconductor device containing package which consists of an insulating body 1 wherein a metal frame body 9 is brazed to an upper surface thereof and a metallic cover body 2, and a semiconductor device 4 is contained inside by attaching the metallic cover body 2 to the metal frame body 9 of the insulating substrate 1, the metal frame body 9 has a recessed part in both inner and outer sides.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を収容する半
導体素子収納用パッケージの改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a semiconductor element housing package for housing a semiconductor element.

【0002】[0002]

【従来の技術】従来、半導体素子、特にLSI等の半導
体集積回路素子を収容するための半導体素子収納用パッ
ケージは一般にアルミナセラミックス等の電気絶縁材料
から成り、その上面略中央部に半導体集積回路素子を収
容するための凹部及び該凹部周辺より外周端にかけて導
出されたタングステン、モリブデン、マンガン等の高融
点金属粉末から成るメタライズ配線層を有する絶縁基体
と、半導体集積回路素子を外部電気回路に電気的に接続
するために前記メタライズ配線層に銀ロウ等のロウ材を
介しロウ付けされた外部リード端子と、金属製蓋体とか
ら構成されており、絶縁基体の凹部底面に半導体集積回
路素子を接着剤を介し接着固定するとともに該半導体集
積回路素子の各電極をボンディングワイヤを介してメタ
ライズ配線層に接続し、しかる後、絶縁基体上面に金属
製蓋体を溶接し、絶縁基体と金属製蓋体とから成る容器
内部に半導体集積回路素子を気密に封止することによっ
て最終製品としての半導体装置となる。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI, is generally made of an electrically insulating material such as alumina ceramics, and a semiconductor integrated circuit element is provided at a substantially central portion of its upper surface. An insulating substrate having a metallization wiring layer made of a refractory metal powder such as tungsten, molybdenum, and manganese, which is led out from the periphery of the recess to the outer peripheral edge, and the semiconductor integrated circuit element is electrically connected to an external electric circuit. It is composed of an external lead terminal brazed to the metallized wiring layer via a brazing material such as silver brazing for connecting to the The electrodes of the semiconductor integrated circuit element are bonded and fixed to the metallized wiring layer through bonding wires. After that, a metal lid is welded to the upper surface of the insulating base, and the semiconductor integrated circuit element is hermetically sealed inside the container made of the insulating base and the metal lid, thereby forming a semiconductor device as a final product. ..

【0003】尚、前記絶縁基体はその上面にコバール金
属や42アロイ等から成る金属枠体が予めロウ付けされ
ており、該金属枠体に金属製蓋体をシームウエルド法等
により溶接することによって金属製蓋体は絶縁基体の上
面に取着され、容器が気密に封止される。
A metal frame made of Kovar metal or 42 alloy is previously brazed to the upper surface of the insulating base, and a metal lid is welded to the metal frame by a seam weld method or the like. The metal lid is attached to the upper surface of the insulating base to hermetically seal the container.

【0004】また前記金属枠体は絶縁基体の上面にタン
グステン、モリブデン、マンガン等の高融点金属粉末か
ら成るメタライズ金属層を予め被着させておき、該メタ
ライズ金属層上に銀ロウ等から成るプリフォームと金属
枠体とを順次載置させ、しかる後、これを約800 ℃の温
度に加熱し、銀ロウ等から成るプリフォームを加熱溶融
させることによって絶縁基体の上面にロウ付けされる。
The metal frame is formed by depositing a metallized metal layer made of refractory metal powder such as tungsten, molybdenum, manganese, etc. on the upper surface of the insulating substrate in advance, and then forming a metal layer made of silver solder on the metallized metal layer. The reform and the metal frame are placed one after another, and then heated to a temperature of about 800 ° C. to heat and melt the preform made of silver wax or the like to be brazed on the upper surface of the insulating substrate.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、金属枠体
を構成するコバール金属や42アロイ等と銀ロウ等のロウ
材との濡れ性が良いことから絶縁基体の上面に金属枠体
を銀ロウ等のロウ材を介してロウ付けした場合、ロウ材
の一部が金属枠体の側面を伝って上面に這い上がってし
まい、その結果、金属枠体に金属製蓋体を強固に溶接す
ることができず、容器の気密封止の信頼性が低下して内
部に収容する半導体集積回路素子を長期間にわたり正
常、且つ安定に作動させることができないという欠点を
有していた。
However, in this conventional package for accommodating semiconductor elements, insulation is provided because the wettability between the Kovar metal or 42 alloy forming the metal frame and the brazing material such as silver brazing is good. When the metal frame is brazed to the upper surface of the base body via a brazing material such as silver brazing, a part of the brazing material travels along the side surface of the metal frame and crawls to the upper surface, resulting in the metal frame body The metal lid cannot be firmly welded, the reliability of hermetic sealing of the container is deteriorated, and the semiconductor integrated circuit element housed inside cannot be operated normally and stably for a long period of time. Had.

【0006】[0006]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は絶縁基体にロウ付けした金属枠体に金属
製蓋体を強固に取着させ、容器の気密封止の信頼性を高
いものとして内部に収容する半導体集積回路素子を長期
間にわたり正常、且つ安定に作動させることができる半
導体素子収納用パッケージを提供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to firmly attach a metal lid to a metal frame brazed to an insulating base, thereby ensuring reliability of hermetic sealing of a container. It is an object of the present invention to provide a package for accommodating a semiconductor element, which is capable of operating a semiconductor integrated circuit element accommodated therein with high performance normally and stably for a long period of time.

【0007】[0007]

【課題を解決するための手段】本発明は上面に金属枠体
がロウ付けされた絶縁基体と金属製蓋体とから成り、絶
縁基体の金属枠体に金属製蓋体を取着することによって
内部に半導体素子を収容するようになした半導体素子収
納用パッケージにおいて、前記金属枠体は内外側面に切
り込み部もしくは凹部を有していることを特徴とするも
のである。
The present invention comprises an insulating base body having a metal frame body brazed on its upper surface and a metal cover body, and by attaching the metal cover body to the metal frame body of the insulating base body. In a package for accommodating a semiconductor element, which accommodates a semiconductor element inside, the metal frame body has a notch or a recess on the inner and outer surfaces.

【0008】[0008]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1 及び図2 は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1 は絶縁基体、2 は金属製蓋体で
ある。この絶縁基体1 と金属製蓋体2 とで半導体集積回
路素子を収容するための容器3 が構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of a package for housing a semiconductor device of the present invention, in which 1 is an insulating base and 2 is a metallic lid. The insulating base 1 and the metallic lid 2 constitute a container 3 for housing a semiconductor integrated circuit device.

【0009】前記絶縁基体1 はその上面中央部に半導体
集積回路素子4 を収容するための空所を形成する凹部1a
が設けてあり、該凹1a底面には半導体集積回路素子4 が
樹脂、ガラス、ロウ材等の接着剤を介して取着される。
The insulating substrate 1 has a concave portion 1a which forms a space for accommodating the semiconductor integrated circuit element 4 in the central portion of the upper surface thereof.
The semiconductor integrated circuit element 4 is attached to the bottom surface of the recess 1a through an adhesive such as resin, glass, or brazing material.

【0010】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体等の電気絶縁材料から成り、例えば酸化
アルミニウム質焼結体から成る場合はアルミナ(Al 2O
3 ) 、シリカ(SiO2 ) 、カルシア(CaO) 、マグネシア(M
gO) 等の原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカンダーロール法を採用することによってセラ
ミックグリーンシート( セラミック生シート)を得、し
かる後、前記セラミックグリーンシートに適当な打ち抜
き加工を施すとともに複数枚積層し、高温( 約1600℃)
の温度で焼成することよって製作される。
The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. Alumina (Al 2 O
3 ), silica (SiO 2 ), calcia (CaO), magnesia (M
(gO) and other raw material powders are mixed with an appropriate organic solvent and solvent to form a slurry, and a ceramic green sheet (ceramic green sheet) is obtained by applying the well-known doctor blade method and kander roll method. After that, appropriate punching process is applied to the ceramic green sheet and multiple sheets are laminated at high temperature (about 1600 ℃)
It is manufactured by firing at the temperature.

【0011】また前記絶縁基体1 には凹部1a周辺から容
器3の外部にかけて導出するメタライズ配線層5 が被着
形成されており、該メタライズ配線層5 の凹部1a周辺部
には半導体集積回路素子4 の各電極がボンディングワイ
ヤ6 を介して電気的に接続され、また容器3 の外部に導
出された部位には外部電気回路と接続される外部リード
端子7 が銀ロウ等のロウ材を介し取着される。
A metallized wiring layer 5 extending from the periphery of the recess 1a to the outside of the container 3 is adhered to the insulating substrate 1, and the semiconductor integrated circuit element 4 is formed around the recess 1a of the metallized wiring layer 5. Each electrode is electrically connected via a bonding wire 6, and an external lead terminal 7 connected to an external electric circuit is attached to a portion led out of the container 3 through a brazing material such as silver solder. To be done.

【0012】前記メタライズ配線層5 はタングステン
(W) 、モリブデン(Mo)、マンガン(Mn)等の高融点金
属粉末から成り、該タングステン等の高融点金属粉末に
適当な有機溶剤、溶媒を添加混合して得た金属ペースト
を従来周知のスクリーン印刷法等の厚膜手法を採用し、
絶縁基体1 となるセラミックグリーンシートに予め被
着させておくことによって絶縁基体1 の凹部1a周辺から
容器3 の外部にかけて被着形成される。
The metallized wiring layer 5 is made of tungsten.
(W), molybdenum (Mo), manganese (Mn), and other refractory metal powders. A metal paste obtained by adding and mixing a suitable organic solvent and a solvent to the refractory metal powder such as tungsten is well known in the art. Adopting thick film method such as screen printing method,
The ceramic green sheet serving as the insulating base 1 is adhered in advance so that the insulating base 1 is adhered and formed from the periphery of the recess 1a to the outside of the container 3.

【0013】尚、前記メタライズ配線層5 はその露出す
る表面にニッケル(Ni)、金(Au)等の良導電性で、且つ耐
蝕性に優れた金属をメッキ法等により1.0 乃至20.0μm
の厚みに層着させておくとメタライズ配線層5 の酸化腐
食を有効に防止することができるとともにメタライズ配
線層5 とボンディングワイヤ6 との接続及びメタライズ
配線層5 と外部リード端子7 とのロウ付け取着が極めて
強固なものとなる。従って、メタライズ配線層5 の酸化
腐食を防止し、メタライズ配線層5 とボンディングワイ
ヤ6 との接続及びメタライズ配線層5 と外部リード端子
7 とのロウ付けを強固なものとなすにはメタライズ配線
層5 の露出表面にニッケル、金等を1.0乃至20.0μm の
厚みに層着させておくことが好ましい。
The exposed surface of the metallized wiring layer 5 is made of nickel (Ni), gold (Au) or the like having a good conductivity and a corrosion-resistant metal by plating such as 1.0 to 20.0 μm.
The metallized wiring layer 5 can be effectively prevented from being oxidized and corroded by connecting the metallized wiring layer 5 to the bonding wire 6 and the metallized wiring layer 5 and the external lead terminals 7 are brazed to each other. The attachment becomes extremely strong. Therefore, the oxidization corrosion of the metallized wiring layer 5 is prevented, the connection between the metallized wiring layer 5 and the bonding wire 6 and the metallized wiring layer 5 and the external lead terminal are prevented.
In order to make the brazing with 7 strong, it is preferable to deposit nickel, gold or the like on the exposed surface of the metallized wiring layer 5 to a thickness of 1.0 to 20.0 μm.

【0014】また前記メタライズ配線層5 にロウ付け取
着される外部リード端子7 は内部に収容する半導体集積
回路素子4 を外部電気回路に接続する作用を為し、外部
リード端子7 を外部電気回路に接続することによって内
部に収容される半導体集積回路素子4 はメタライズ配線
層5 及び外部リード端子7 を介して外部電気回路に電気
的に接続されることとなる。
The external lead terminals 7 which are brazed and attached to the metallized wiring layer 5 serve to connect the semiconductor integrated circuit element 4 housed therein to an external electric circuit, and the external lead terminals 7 are connected to the external electric circuit. The semiconductor integrated circuit element 4 housed inside is electrically connected to the external electric circuit via the metallized wiring layer 5 and the external lead terminal 7 by connecting to the.

【0015】前記外部リード端子7 はコバール金属(Fe-
Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属材料から
成り、コバール金属等のインゴット( 塊) を圧延加工法
や打ち抜き加工法等、従来周知の金属加工法を採用する
ことによって所定の板状に形成される。
The external lead terminal 7 is made of Kovar metal (Fe-
Ni-Co alloy), 42 alloy (Fe-Ni alloy), and other ingots (lumps) made of Kovar metal, etc., by adopting well-known metal processing methods such as rolling and punching. It is formed in a predetermined plate shape.

【0016】前記絶縁基体1 はまたその上面にメタライ
ズ金属層8が被着形成されており、該メタライズ金属層8
には金属枠体9 が銀ロウ等のロウ材10を介しロウ付け
されている。
The insulating substrate 1 also has a metallized metal layer 8 deposited on the upper surface thereof.
A metal frame body 9 is brazed to this via a brazing material 10 such as silver brazing.

【0017】前記絶縁基体1 上面のメタライズ金属層8
はタングステン、モリブデン、マンガン等の高融点金属
粉末から成り、前述のメタライズ配線層5 と同様の方
法、具体的にはタングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを絶
縁基体1 の上面に従来周知のスクリーン印刷法を採用す
ることによって印刷塗布するとともにこれを高温で焼き
付けることによって絶縁基体1 の上面に被着形成され
る。
A metallized metal layer 8 on the upper surface of the insulating substrate 1
Is made of a refractory metal powder such as tungsten, molybdenum, or manganese, and is obtained by the same method as that for the metallized wiring layer 5 described above, specifically by adding and mixing an appropriate organic solvent or solvent to the refractory metal powder such as tungsten. The above metal paste is applied to the upper surface of the insulating substrate 1 by printing by applying a conventionally known screen printing method, and is baked at a high temperature to be deposited on the upper surface of the insulating substrate 1.

【0018】尚、前記メタライズ金属層8 はその表面に
ニッケル(Ni)、金(Au)等のロウ材10と濡れ性が良く、且
つ耐蝕性に優れた金属をメッキ法等により1.0 乃至20.0
μmの厚みに層着させておくとメタライズ金属層8 の酸
化腐食を有効に防止することができるとともにメタライ
ズ金属層8 と金属枠体9 とのロウ付け取着を極めて強固
なものとなすことができる。従って、メタライズ金属層
8 の表面にはロウ材と濡れ性が良く、且つ耐蝕性に優れ
た金属を1.0 乃至20.0μm の厚みに層着させておくこと
が好ましい。
The metallized metal layer 8 is coated with a metal such as nickel (Ni) or gold (Au), which has good wettability with the brazing material 10 and is excellent in corrosion resistance, in a thickness of 1.0 to 20.0 by a plating method or the like.
When the metallized metal layer 8 is deposited to a thickness of μm, the oxidative corrosion of the metallized metal layer 8 can be effectively prevented, and the brazed attachment of the metallized metal layer 8 and the metal frame 9 can be made extremely strong. it can. Therefore, the metallized metal layer
It is preferable to deposit a metal having good wettability with the brazing material and excellent corrosion resistance on the surface of 8 in a thickness of 1.0 to 20.0 μm.

【0019】また前記メタライズ金属層8 にロウ材10を
介してロウ付けされる金属枠体9 はコバール金属や42ア
ロイ等の金属材料から成る金属製蓋体2 を絶縁基体1 に
取着する際の下地金属部材として作用し、金属枠体9 に
金属製蓋体2 をシームウエルド法等により溶接すること
によって金属製蓋体2 は絶縁基体1 上に取着される。
The metal frame 9 which is brazed to the metallized metal layer 8 via the brazing material 10 is used when the metal lid 2 made of a metal material such as Kovar metal or 42 alloy is attached to the insulating substrate 1. The metal lid 2 is attached to the insulating base 1 by acting as a base metal member of the above and by welding the metal lid 2 to the metal frame 9 by the seam weld method or the like.

【0020】前記金属枠体9 はコバール金属や42アロイ
等の金属材料から成り、図2 に示す如く、内外側面の上
面近傍に凹部A を設けた枠状となっている。
The metal frame body 9 is made of a metal material such as Kovar metal or 42 alloy, and has a frame shape having recesses A near the upper and inner surfaces as shown in FIG.

【0021】前記金属枠体9 の内外側面に設けた凹部A
は金属枠体9 を絶縁基体1 のメタライズ金属層8 にロウ
材10を介してロウ付けする際、ロウ材10の一部が金属枠
体9の側面を伝って上面に這い上がるのを有効に防止す
る作用を為し、前記凹部A によって金属枠体9 の上面に
はロウ材10が被着することは皆無となり、金属枠体9に
金属製蓋体2 を強固に溶接することが可能となる。
A recess A provided on the inner and outer surfaces of the metal frame body 9
When brazing the metal frame body 9 to the metallized metal layer 8 of the insulating substrate 1 via the brazing material 10, it is effective that part of the brazing material 10 travels along the side surface of the metal frame body 9 and climbs to the upper surface. This prevents the brazing material 10 from adhering to the upper surface of the metal frame 9 by the recess A, and the metal lid 2 can be firmly welded to the metal frame 9. Become.

【0022】尚、前記金属枠体9 の内外側面に設ける凹
部A はその深さT が0.2mm 未満となるとロウ材10の這い
上がりを有効に防止するのが困難となって金属枠体9 を
絶縁基体1 のメタライズ金属層8 にロウ材10を介してロ
ウ付けする際、ロウ材10の一部が金属枠体9 の上面に這
い上がってしまう危険性があり、また凹部A の深さTが
1.0mm を越えると金属枠体9 の機械的強度が大きく劣化
し、金属枠体9 に外力が印加されると該外力によって容
易に破損し、容器3 の気密封止の信頼性を低いものとす
る危険性がある。従って、前記金属枠体9 の内外側面に
設ける凹部A はその深さT を0.2 乃至1.0mm の範囲とし
ておくことが好ましい。
When the depth T of the recess A provided on the inner and outer surfaces of the metal frame 9 is less than 0.2 mm, it is difficult to effectively prevent the brazing material 10 from creeping up, and the metal frame 9 is prevented. When brazing to the metallized metal layer 8 of the insulating substrate 1 via the brazing material 10, there is a risk that a part of the brazing material 10 will crawl up to the upper surface of the metal frame body 9 and the depth T of the recess A. But
If it exceeds 1.0 mm, the mechanical strength of the metal frame 9 is significantly deteriorated, and if an external force is applied to the metal frame 9, the metal frame 9 is easily damaged by the external force, and the reliability of hermetic sealing of the container 3 is low. There is a risk of Therefore, it is preferable that the depth A of the concave portion A provided on the inner and outer side surfaces of the metal frame body 9 is in the range of 0.2 to 1.0 mm.

【0023】また前記金属枠体9 の内外側面に設ける凹
部A はその高さH が0.2mm 未満であるとロウ材10の這い
上がりを有効に防止するのが困難となることから凹部A
はその高さH を0.2mm 以上としておくことが好ましい。
If the height H of the recess A provided on the inner and outer surfaces of the metal frame 9 is less than 0.2 mm, it will be difficult to effectively prevent the brazing material 10 from creeping up.
It is preferable that the height H be 0.2 mm or more.

【0024】更に前記金属枠体9 は絶縁基体1 の上面に
被着させたメタライズ金属層8 上に銀ロウ等のロウ材10
を枠状に成形したプリフォームと金属枠体9 とを順次載
置させ、しかる後、これを約900 ℃の温度に加熱し、ロ
ウ材10から成るプリフォームを加熱溶融させることによ
って絶縁基体1 の上面にロウ付けされる。
Further, the metal frame 9 is a brazing material 10 such as silver braze on the metallized metal layer 8 deposited on the upper surface of the insulating substrate 1.
The preform formed into a frame shape and the metal frame body 9 are placed one after another, and then heated to a temperature of about 900 ° C., and the preform made of the brazing material 10 is heated and melted to insulate the insulating substrate 1. Is brazed to the upper surface of.

【0025】かくして本発明の半導体素子収納用パッケ
ージによれば絶縁基体1 の凹部1a底面に半導体集積回路
素子4 を接着剤を介して取着するとともに半導体集積回
路素子4 の各電極をメタライズ配線層5 にボンディング
ワイヤ6 を介して電気的に接続し、しかる後、絶縁基体
1 の上面にロウ付けした金属枠体9 に金属製蓋体2 をシ
ームウエルド法等により溶接し、絶縁基体1 と金属製蓋
体2 とから成る容器3内部に半導体集積回路素子4 を気
密に封止することによって最終製品としての半導体装置
となる。
Thus, according to the package for accommodating semiconductor elements of the present invention, the semiconductor integrated circuit element 4 is attached to the bottom surface of the concave portion 1a of the insulating substrate 1 with an adhesive and each electrode of the semiconductor integrated circuit element 4 is metalized wiring layer. 5 electrically through the bonding wire 6 and then the insulating substrate
The metal lid body 2 is welded to the metal frame body 9 brazed to the upper surface of 1 by the seam weld method or the like, and the semiconductor integrated circuit element 4 is hermetically sealed inside the container 3 composed of the insulating base body 1 and the metal lid body 2. By encapsulating, a semiconductor device as a final product is obtained.

【0026】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば金属枠体9の内外側面に
凹部A を形成するのに変えて図3 に示す如く、深さt が
0.2 乃至1.0mm 、高さhが0.2mm 以上の切り込み部B を
設けておいてもよい。この場合、切り込み部B の角部で
ロウ材10の這い上がりが有効に防止され、金属枠体9 の
上面にロウ材10の一部が被着することはない。
The present invention is not limited to the above-mentioned embodiment, and various modifications can be made without departing from the gist of the present invention. For example, the recess A on the inner and outer surfaces of the metal frame 9 can be formed. Instead of forming the
You may provide the notch B of 0.2 to 1.0 mm and the height h of 0.2 mm or more. In this case, the brazing material 10 is effectively prevented from creeping up at the corners of the notch B, and the brazing material 10 is not partially adhered to the upper surface of the metal frame 9.

【0027】[0027]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば絶縁基体の上面にロウ付けされる金属枠体の内外
側面に凹部もしくは切り込み部を設けたことから金属枠
体を絶縁基体のメタライズ金属層にロウ材を介してロウ
付けする際、ロウ材の一部が金属枠体の側面を伝って上
面に這い上がることはなく、その結果、金属枠体に金属
製蓋体を強固に溶接するのが可能となって容器の気密封
止の信頼性を高いものとなすことができ、内部に収容す
る半導体集積回路素子を長期間にわたり正常、且つ安定
に作動させることができる。
According to the package for accommodating semiconductor elements of the present invention, since the metal frame body to be brazed on the upper surface of the insulating base body is provided with the recessed portions or the cutout portions on the inner and outer side surfaces thereof, the metal frame body is used as the metallized metal of the insulating base body. When brazing to the layer through the brazing material, part of the brazing material does not travel along the side surface of the metal frame and crawls to the upper surface, and as a result, the metal lid is strongly welded to the metal frame. As a result, the reliability of hermetically sealing the container can be enhanced, and the semiconductor integrated circuit element housed inside can be operated normally and stably for a long period of time.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing an example of a semiconductor element housing package of the present invention.

【図2】図1に示すパッケージの要部拡大断面図であ
る。
FIG. 2 is an enlarged cross-sectional view of a main part of the package shown in FIG.

【図3】本発明の他の実施例を示す要部拡大断面図であ
る。
FIG. 3 is an enlarged cross-sectional view of an essential part showing another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・絶縁基体 2・・・・・金属製蓋体 3・・・・・容器 5・・・・・メタライズ配線層 7・・・・・外部リード端子 8・・・・・メタライズ金属層 9・・・・・金属枠体 10・・・・・ロウ材 A・・・・・凹部 B・・・・・切り込み部 1 ... Insulating substrate 2 ... Metal lid 3 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 8 ... Metallized Metal layer 9 ... Metal frame 10 ... Brazing material A ... Recess B ... Notch

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】上面に金属枠体がロウ付けされた絶縁基体
と金属製蓋体とから成り、絶縁基体の金属枠体に金属製
蓋体を取着することによって内部に半導体素子を収容す
るようになした半導体素子収納用パッケージにおいて、
前記金属枠体は内外側面に切り込み部もしくは凹部を有
していることを特徴とする半導体素子収納用パッケー
ジ。
1. An insulating base body having a metal frame body brazed to an upper surface thereof and a metal cover body, and a metal cover body is attached to the metal frame body of the insulating base body to accommodate a semiconductor element therein. In the package for storing the semiconductor element,
A package for accommodating a semiconductor element, wherein the metal frame body has a notch or a recess on the inner and outer surfaces.
JP3324927A 1991-12-10 1991-12-10 Semiconductor device containing package Pending JPH05160283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3324927A JPH05160283A (en) 1991-12-10 1991-12-10 Semiconductor device containing package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3324927A JPH05160283A (en) 1991-12-10 1991-12-10 Semiconductor device containing package

Publications (1)

Publication Number Publication Date
JPH05160283A true JPH05160283A (en) 1993-06-25

Family

ID=18171169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3324927A Pending JPH05160283A (en) 1991-12-10 1991-12-10 Semiconductor device containing package

Country Status (1)

Country Link
JP (1) JPH05160283A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008252065A (en) * 2007-03-02 2008-10-16 Murata Mfg Co Ltd Electronic component and manufacturing method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008252065A (en) * 2007-03-02 2008-10-16 Murata Mfg Co Ltd Electronic component and manufacturing method therefor

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