JP2883235B2 - Package for storing semiconductor elements - Google Patents
Package for storing semiconductor elementsInfo
- Publication number
- JP2883235B2 JP2883235B2 JP32429791A JP32429791A JP2883235B2 JP 2883235 B2 JP2883235 B2 JP 2883235B2 JP 32429791 A JP32429791 A JP 32429791A JP 32429791 A JP32429791 A JP 32429791A JP 2883235 B2 JP2883235 B2 JP 2883235B2
- Authority
- JP
- Japan
- Prior art keywords
- metal
- metallized
- metal layer
- metal frame
- brazing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Ceramic Products (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体素子を収容する半
導体素子収納用パッケージの改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.
【0002】[0002]
【従来の技術】従来、半導体素子、特にLSI等の半導
体集積回路素子を収容するための半導体素子収納用パッ
ケージは一般にアルミナセラミックス等の電気絶縁材料
から成り、その上面略中央部に半導体集積回路素子を収
容するための凹部及び該凹部周辺より外周端にかけて導
出されたタングステン、モリブデン、マンガン等の高融
点金属粉末から成るメタライズ配線層を有する絶縁基体
と、半導体集積回路素子を外部電気回路に電気的に接続
するために前記メタライズ配線層に銀ロウ等のロウ材を
介しロウ付けされた外部リード端子と、金属製蓋体とか
ら構成されており、絶縁基体の凹部底面に半導体集積回
路素子を接着剤を介し接着固定するとともに該半導体集
積回路素子の各電極をボンディングワイヤを介してメタ
ライズ配線層に接続し、しかる後、絶縁基体上面に金属
製蓋体を溶接し、絶縁基体と金属製蓋体とから成る容器
内部に半導体集積回路素子を気密に封止することによっ
て最終製品としての半導体装置となる。2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI, is generally made of an electrically insulating material such as alumina ceramics, and the semiconductor integrated circuit element is provided substantially at the center of the upper surface thereof. An insulating base having a metallized wiring layer made of a refractory metal powder of tungsten, molybdenum, manganese, or the like led out from the periphery of the recess to the outer peripheral end thereof, and a semiconductor integrated circuit element electrically connected to an external electric circuit. An external lead terminal brazed to the metallized wiring layer via a brazing material such as silver brazing to connect to the metallized wiring layer, and a metal lid body. And bonding each electrode of the semiconductor integrated circuit device to the metallized wiring layer via a bonding wire. Thereafter, a metal lid is welded to the upper surface of the insulating base, and the semiconductor integrated circuit element is hermetically sealed in a container formed of the insulating base and the metal lid, thereby obtaining a semiconductor device as a final product. .
【0003】尚、前記従来の半導体素子収納用パッケー
ジは通常、図3 に示す如く、絶縁基体21の上面にコバー
ル金属や42アロイ等の金属材料から成る金属枠体22を予
めロウ付けしておくとともに該金属枠体22に金属製蓋体
23をシームウエルド法等により溶接させることによって
金属製蓋体23は絶縁基体21の上面に取着され、これによ
って絶縁基体21と金属製蓋体23とから成る容器が気密に
封止される。In the conventional package for housing a semiconductor element, a metal frame 22 made of a metal material such as Kovar metal or 42 alloy is usually soldered to the upper surface of an insulating base 21 as shown in FIG. With a metal lid on the metal frame 22
The metal cover 23 is attached to the upper surface of the insulating base 21 by welding the base 23 by a seam welding method or the like, whereby the container including the insulating base 21 and the metal cover 23 is hermetically sealed.
【0004】また前記絶縁基体21への金属枠体23のロウ
付けはまず絶縁基体21の上面に金属枠体22より若干大き
めの面積にタングステン、モリブデン、マンガン等の高
融点金属粉末から成るメタライズ金属層24を従来周知の
スクリーン印刷法等の厚膜手法を採用することによって
形成し、次に前記メタライズ金属層24上に銀ロウ等のロ
ウ材25と金属枠体22とを順次載置させ、最後に前記ロウ
材25に約800 ℃の温度を印加し、ロウ材25を加熱溶融さ
せるとともに該溶融したロウ材を接合面積を広くし接合
強度を上げるためにメタライズ金属層24の全面及び金属
枠体25の側底面に充分広がらせることによって行われ
る。[0004] In addition, the metal frame 23 is brazed to the insulating substrate 21 by first forming a metallized metal made of a refractory metal powder such as tungsten, molybdenum, or manganese on the upper surface of the insulating substrate 21 to have a slightly larger area than the metal frame 22. The layer 24 is formed by adopting a conventionally known thick film method such as a screen printing method, and then a brazing material 25 such as silver brazing and a metal frame 22 are sequentially placed on the metallized metal layer 24, Lastly, a temperature of about 800 ° C. is applied to the brazing material 25 to heat and melt the brazing material 25, and the entire surface of the metallized metal layer 24 and the metal frame in order to increase the bonding area and increase the bonding strength. This is done by spreading it sufficiently on the side bottom surface of the body 25.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、絶縁基体
に金属枠体をロウ付けするロウ材が絶縁基体に形成した
メタライズ金属層の上面全体に60.0μm 以上の厚さに被
着していること、金属枠体を構成するコバール金属や42
アロイの熱膨張係数及びロウ材を構成する銀ロウの熱膨
張係数が絶縁基体を構成するアルミナセラミックスの熱
膨張係数と大きく相違していること等から金属枠体のロ
ウ付け部に金属製蓋体を取着する際、或いは半導体集積
回路素子を作動させた際等において発生する熱が印加さ
れると該熱によって金属枠体と絶縁基体との間に大きな
熱応力が発生し、これがメタライズ金属層の外周端に集
中してメタライズ金属層を絶縁基体より剥離させてしま
うという欠点を有していた。However, in this conventional package for housing a semiconductor element, the brazing material for brazing the metal frame to the insulating substrate has a thickness of 60.0 μm or more over the entire upper surface of the metallized metal layer formed on the insulating substrate. Of Kovar metal and 42 that make up the metal frame
Because the thermal expansion coefficient of the alloy and the thermal expansion coefficient of the silver brazing material constituting the brazing material are significantly different from the thermal expansion coefficient of the alumina ceramic constituting the insulating base, etc., a metal cover is attached to the brazing portion of the metal frame. When heat is applied when mounting the semiconductor integrated circuit element or when operating the semiconductor integrated circuit device, a large thermal stress is generated between the metal frame and the insulating base by the heat, and this is caused by the metallized metal layer. Has a drawback that the metallized metal layer is peeled off from the insulating substrate concentrated on the outer peripheral end.
【0006】そのためこの従来の半導体素子収納用パッ
ケージは容器内部の気密封止の信頼性が低く内部に収容
する半導体集積回路素子を長期間にわたり正常、且つ安
定に作動させることができなかった。For this reason, the conventional package for accommodating a semiconductor device has a low reliability of hermetic sealing inside the container, and cannot normally and stably operate the semiconductor integrated circuit device accommodated therein for a long period of time.
【0007】[0007]
【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は絶縁基体に設けた金属枠体をロウ付けす
るためのメタライズ金属層に剥離が発生するのを皆無と
して、容器の気密封止の信頼性を高いものとなし、内部
に収容する半導体集積回路素子を長期間にわたり正常、
且つ安定に作動させることができる半導体素子収納用パ
ッケージを提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and an object of the present invention is to eliminate the occurrence of peeling in a metallized metal layer for brazing a metal frame provided on an insulating substrate. The reliability of hermetic sealing is high, and the semiconductor integrated circuit
Another object of the present invention is to provide a semiconductor element storage package that can be operated stably.
【0008】[0008]
【課題を解決するための手段】本発明は絶縁基体の表面
に設けたメタライズ金属層に金属枠体をロウ付けすると
ともに該金属枠体に金属製蓋体を取着し、内部に半導体
素子を気密に収容するようになした半導体素子収納用パ
ッケージであって、前記金属枠体をロウ付けするロウ材
のメタライズ金属層に対する被着厚みがメタライズ金属
層の外周端からその内側0.3mm の範囲において30.0μm
以下であることを特徴とするものである。According to the present invention, a metal frame is brazed to a metallized metal layer provided on the surface of an insulating substrate, a metal lid is attached to the metal frame, and a semiconductor element is mounted inside. A semiconductor element housing package adapted to be air-tightly housed, wherein a thickness of a brazing material for brazing the metal frame to the metallized metal layer is within a range of 0.3 mm from the outer peripheral end of the metallized metal layer. 30.0μm
It is characterized by the following.
【0009】[0009]
【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1 及び図2 は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1 は絶縁基体、2 は金属製蓋体で
ある。この絶縁基体1 と金属製蓋体2 とで半導体集積回
路素子を収容するための容器3 が構成される。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and 2 show one embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is an insulating base, and 2 is a metal lid. The insulating base 1 and the metal lid 2 constitute a container 3 for housing the semiconductor integrated circuit device.
【0010】前記絶縁基体1 はその上面中央部に半導体
集積回路素子4 を収容するための空所を形成する凹部1a
が設けてあり、該凹1a底面には半導体集積回路素子4 が
樹脂、ガラス、ロウ材等の接着剤を介して取着される。The insulating substrate 1 has a concave portion 1a for forming a space for accommodating the semiconductor integrated circuit element 4 in the center of the upper surface thereof.
A semiconductor integrated circuit element 4 is attached to the bottom of the recess 1a via an adhesive such as resin, glass, brazing material or the like.
【0011】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体等の電気絶縁材料から成り、例えば酸化
アルミニウム質焼結体から成る場合はアルミナ(Al 2O
3 ) 、シリカ(SiO2 ) 、カルシア(CaO) 、マグネシア(M
gO) 等の原料粉末に適当な有機溶剤、溶媒を添加混合し
て泥漿状となすとともにこれを従来周知のドクターブレ
ード法やカンダーロール法を採用することによってセラ
ミックグリーンシート( セラミック生シート)を得、し
かる後、前記セラミックグリーンシートに適当な打ち抜
き加工を施すとともに複数枚積層し、高温( 約1600℃)
の温度で焼成することよって製作される。The insulating substrate 1 is made of an electrically insulating material such as a sintered body of aluminum oxide, a sintered body of mullite, a sintered body of aluminum nitride, a sintered body of silicon carbide and the like. Alumina (Al 2 O
3 ), silica (SiO 2 ), calcia (CaO), magnesia (M
gO) and the like, and an appropriate organic solvent and a solvent are added and mixed to form a slurry, and a ceramic green sheet (ceramic green sheet) is obtained by employing a conventionally known doctor blade method or a kander roll method. Thereafter, the ceramic green sheet is subjected to an appropriate punching process and a plurality of sheets are laminated, and a high temperature (about 1600 ° C.)
It is manufactured by firing at a temperature of
【0012】また前記絶縁基体1 には凹部1a周辺から容
器3の外部にかけて導出するメタライズ配線層5 が被着
形成されており、該メタライズ配線層5 の凹部1a周辺部
には半導体集積回路素子4 の各電極がボンディングワイ
ヤ6 を介して電気的に接続され、また容器3 の外部に導
出された部位には外部電気回路と接続される外部リード
端子7 が銀ロウ等のロウ材を介し取着される。A metallized wiring layer 5 extending from the periphery of the concave portion 1a to the outside of the container 3 is formed on the insulating substrate 1, and a semiconductor integrated circuit element 4 is formed around the concave portion 1a of the metallized wiring layer 5. Are electrically connected via bonding wires 6, and external lead terminals 7 connected to an external electric circuit are attached to a portion led out of the container 3 via a brazing material such as silver brazing. Is done.
【0013】前記メタライズ配線層5 はタングステン
(W) 、モリブデン(Mo)、マンガン(Mn)等の高融点金属粉
末から成り、該タングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを従
来周知のスクリーン印刷法とう厚膜手法を採用し、絶縁
基体1 となるセラミックグリーンシートに予め被着させ
ておくことによって絶縁基体1 の凹部1a周辺から容器3
の外部にかけて被着形成される。The metallized wiring layer 5 is made of tungsten
(W), molybdenum (Mo), a high melting point metal powder such as manganese (Mn), a suitable organic solvent to the high melting point metal powder such as tungsten, a metal paste obtained by adding a solvent and mixing the conventionally known metal paste. A thick film method such as a screen printing method is used, and is applied to a ceramic green sheet serving as the insulating substrate 1 in advance, so that the container 3 can be formed around the concave portion 1a of the insulating substrate 1.
To the outside of the substrate.
【0014】尚、前記メタライズ配線層5 はその露出す
る表面にニッケル(Ni)、金(Au)等の良導電性で、且つ耐
蝕性に優れた金属をメッキ法等により1.0 乃至20.0μm
の厚みに層着させておくとメタライズ配線層5 の酸化腐
食を有効に防止することができるとともにメタライズ配
線層5 とボンディングワイヤ6 との接続及びメタライズ
配線層5 と外部リード端子7 とのロウ付け取着が極めて
強固なものとなる。従って、メタライズ配線層5 の酸化
腐食を防止し、メタライズ配線層5 とボンディングワイ
ヤ6 との接続及びメタライズ配線層5 と外部リード端子
7 とのロウ付けを強固なものとなすにはメタライズ配線
層5 の露出表面にニッケル、金等を1.0乃至20.0
μm の厚みに層着させておくことが好ましい。The metallized wiring layer 5 is coated with a metal having good conductivity and excellent corrosion resistance, such as nickel (Ni) or gold (Au), on the exposed surface by plating or the like to a thickness of 1.0 to 20.0 μm.
The metallized wiring layer 5 can be effectively prevented from being oxidized and corroded, and the connection between the metallized wiring layer 5 and the bonding wires 6 and the brazing between the metallized wiring layer 5 and the external lead terminals 7 can be effectively prevented. Attachment becomes extremely strong. Therefore, oxidation corrosion of the metallized wiring layer 5 is prevented, and the connection between the metallized wiring layer 5 and the bonding wires 6 and the metallized wiring layer 5 and the external lead terminals are prevented.
In order to make the brazing with the metal 7 firm, the exposed surface of the metallized wiring layer 5 is coated with nickel, gold or the like in an amount of 1.0 to 20.0.
It is preferable to coat the layer to a thickness of μm.
【0015】また前記メタライズ配線層5 にロウ付け取
着される外部リード端子7 は内部に収容する半導体集積
回路素子4 を外部電気回路に接続する作用を為し、外部
リード端子7 を外部電気回路に接続することによって内
部に収容される半導体集積回路素子4 はメタライズ配線
層5 及び外部リード端子7 を介して外部電気回路に電気
的に接続されることとなる。The external lead terminals 7 brazed and attached to the metallized wiring layer 5 serve to connect the semiconductor integrated circuit element 4 housed therein to an external electric circuit, and connect the external lead terminals 7 to the external electric circuit. As a result, the semiconductor integrated circuit element 4 accommodated therein is electrically connected to an external electric circuit via the metallized wiring layer 5 and the external lead terminals 7.
【0016】前記外部リード端子7 はコバール金属(Fe-
Ni-Co 合金) や42アロイ(Fe-Ni合金) 等の金属材料から
成り、コバール金属等のインゴット( 塊) を圧延加工法
や打ち抜き加工法等、従来周知の金属加工法を採用する
ことによって所定の板状に形成される。The external lead terminal 7 is made of Kovar metal (Fe-
Ni-Co alloys) and 42 alloys (Fe-Ni alloys), and other ingots such as Kovar metal are rolled and stamped using well-known metalworking methods. It is formed in a predetermined plate shape.
【0017】前記絶縁基体1 はまたその上面にメタライ
ズ金属層8が被着形成されており、該メタライズ金属層8
には金属枠体9 が銀ロウ等のロウ材10を介しロウ付け
されている。On the upper surface of the insulating base 1, a metallized metal layer 8 is adhered and formed.
A metal frame 9 is brazed through a brazing material 10 such as silver brazing.
【0018】前記絶縁基体1 上面のメタライズ金属層8
はタングステン、モリブデン、マンガン等の高融点金属
粉末から成り、前述のメタライズ配線層5 と同様の方
法、具体的にはタングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを絶
縁基体1 の上面に従来周知のスクリーン印刷法を採用す
ることによって印刷塗布するとともにこれを高温で焼き
付けることによって絶縁基体1 の上面に被着形成され
る。The metallized metal layer 8 on the upper surface of the insulating substrate 1
Is composed of a high melting point metal powder such as tungsten, molybdenum, manganese, etc., and is obtained by mixing and adding a suitable organic solvent and a solvent to the high melting point metal powder such as tungsten, etc. The metal paste is printed and applied on the upper surface of the insulating substrate 1 by employing a conventionally known screen printing method, and is baked at a high temperature to be formed on the upper surface of the insulating substrate 1.
【0019】尚、前記メタライズ金属層8 はその表面に
ニッケル(Ni)、金(Au)等のロウ材10と濡れ性が良く、且
つ耐蝕性に優れた金属をメッキ法等により1.0 乃至20.0
μmの厚みに層着させておくとメタライズ金属層8 の酸
化腐食を有効に防止することができるとともにメタライ
ズ金属層8 と金属枠体9 とのロウ付け取着を極めて強固
なものとなすことができる。従って、メタライズ金属層
8 の表面にはロウ材と濡れ性が良く、且つ耐蝕性に優れ
た金属を1.0 乃至20.0μm の厚みに層着させておくこと
が好ましい。The metallized metal layer 8 has a surface coated with a metal having good wettability and excellent corrosion resistance with a brazing material 10 such as nickel (Ni) or gold (Au) by a plating method or the like.
When the metallized metal layer 8 is layered to a thickness of μm, oxidation corrosion of the metallized metal layer 8 can be effectively prevented, and the brazing attachment between the metallized metal layer 8 and the metal frame 9 can be made extremely strong. it can. Therefore, the metallized metal layer
It is preferable to coat a metal having good wettability with the brazing material and excellent corrosion resistance to a thickness of 1.0 to 20.0 μm on the surface of No. 8.
【0020】また前記メタライズ金属層8 にロウ材10を
介してロウ付けされる金属枠体9 は金属製蓋体2 を絶縁
基体1 に取着する際の下地金属部材として作用し、金属
枠体9 に金属製蓋体2 をシームウエルド法等により溶接
することによって金属製蓋体2 は絶縁基体1 上に取着さ
れる。前記金属枠体9 はコバール金属や42アロイ等の金
属材料から成り、該コバール金属等のインゴット( 塊)
を圧延加工法、打ち抜き加工法等、従来周知の金属加工
法を採用することによって所定の枠状に形成される。A metal frame 9 brazed to the metallized metal layer 8 via a brazing material 10 acts as a base metal member when the metal cover 2 is attached to the insulating base 1, and the metal frame 9 The metal cover 2 is attached to the insulating base 1 by welding the metal cover 2 to the base 9 by a seam welding method or the like. The metal frame 9 is made of a metal material such as Kovar metal or 42 alloy, and is made of an ingot of the Kovar metal or the like.
Is formed into a predetermined frame shape by employing a conventionally known metal working method such as a rolling method or a punching method.
【0021】また前記金属枠体9 は絶縁基体1 の上面に
被着させたメタライズ金属層8 上に銀ロウ等のロウ材10
を枠状に成形したプリフォームと金属枠体9 とを順次載
置させ、しかる後、前記ロウ材10から成るプリフォーム
を加熱溶融させることによって絶縁基体1 の上面にロウ
付けされる。The metal frame 9 is formed on a metallized metal layer 8 adhered on the upper surface of the insulating base 1 on a brazing material 10 such as silver brazing.
And a metal frame 9 are sequentially placed thereon, and then the preform made of the brazing material 10 is heated and melted to be brazed to the upper surface of the insulating base 1.
【0022】更に前記金属枠体9 は図2 に示す如く、金
属枠体9 をロウ付けするロウ材10のメタライズ金属層8
に対する被着厚みがメタライズ金属層8 の外周端からそ
の内側0.3mm の範囲Tにおいて30.0μm 以下となるよう
にしてメタライズ金属層8 上にロウ付けされており、メ
タライズ金属層8 の外周端におけるロウ材10の厚みが薄
いことから金属枠体9 と絶縁基体1 との間に発生する絶
縁基体1 と金属枠体9及びロウ材10との熱膨張係数の相
違に起因した熱応力はメタライズ金属層8 の外周端に集
中することはなくメタライズ金属層8 の表面に逃げ、メ
タライズ金属層8 が絶縁基体1 より剥離しないようにな
っている。Further, as shown in FIG. 2, the metal frame 9 has a metallized metal layer 8 of a brazing material 10 for brazing the metal frame 9.
Is brazed onto the metallized metal layer 8 so that the thickness of the metallized metal layer 8 is 30.0 μm or less in a range T of 0.3 mm from the outer peripheral edge of the metallized metal layer 8. Since the thickness of the material 10 is small, the thermal stress generated between the metal frame 9 and the insulating substrate 1 due to the difference in thermal expansion coefficient between the insulating substrate 1, the metal frame 9 and the brazing material 10 is reduced by the metallized metal layer. The metallized metal layer 8 does not concentrate on the outer peripheral end of the metallized metal layer 8 but escapes to the surface of the metallized metal layer 8 so that the metallized metal layer 8 does not peel off from the insulating substrate 1.
【0023】前記金属枠体9 をロウ付けするロウ材10の
厚みをメタライズ金属層8 の外周端部で薄くする方法は
メタライズ金属層8 の面積を広くしておくとともにロウ
材10の加熱溶融温度を低くし、溶融ロウ材がメタライズ
金属層8 上に大きく広がらないようにすることによって
達成される。The method of reducing the thickness of the brazing material 10 to which the metal frame 9 is brazed at the outer peripheral end of the metallized metal layer 8 is to increase the area of the metallized metal layer 8 and to reduce the heat melting temperature of the brazing material 10. And the molten brazing material is prevented from spreading significantly on the metallized metal layer 8.
【0024】尚、前記金属枠体9 をロウ付けするロウ材
10のメタライズ金属層8 に対する被着厚みがメタライズ
金属層8 の外周端からその内側0.3mm の範囲Tにおいて
30.0μm を越えた場合、絶縁基体1 と金属枠体9 及びロ
ウ材10との熱膨張係数の相違に起因して発生する熱応力
がメタライズ金属層8 の外周端に集中し、メタライズ金
属層8 を絶縁基体1 より剥離させてしまう。従って、メ
タライズ金属層8 の外周端からその内側0.3mm の範囲T
においてはロウ材10の被着厚みを30.0μm 以下にする必
要がある。The brazing material for brazing the metal frame 9
In the range T where the thickness of the metallized metal layer 8 is 0.3 mm from the outer peripheral edge of the metallized metal layer 8 to the metallized metal layer 8.
If it exceeds 30.0 μm, the thermal stress generated due to the difference in the thermal expansion coefficient between the insulating base 1 and the metal frame 9 and the brazing material 10 concentrates on the outer peripheral edge of the metallized metal layer 8 and Is separated from the insulating base 1. Accordingly, a range T of 0.3 mm from the outer peripheral edge of the metallized metal
In this case, the thickness of the brazing material 10 to be applied must be 30.0 μm or less.
【0025】かくして本発明の半導体素子収納用パッケ
ージによれば絶縁基体1 の凹部1a底面に半導体集積回路
素子4 を接着剤を介して取着するとともに半導体集積回
路素子4 の各電極をメタライズ配線層5にボンディング
ワイヤ6 を介して電気的に接続し、しかる後、絶縁基体
1 の上面にロウ付けした金属枠体9 に金属製蓋体2 をシ
ームウエルド法等により溶接し、絶縁基体1 と金属製蓋
体2 とから成る容器3内部に半導体集積回路素子4 を気
密に封止することによって最終製品としての半導体装置
となる。Thus, according to the package for accommodating a semiconductor device of the present invention, the semiconductor integrated circuit device 4 is attached to the bottom surface of the concave portion 1a of the insulating base 1 via an adhesive, and each electrode of the semiconductor integrated circuit device 4 is metallized wiring layer. 5 through a bonding wire 6 and then electrically insulated.
A metal lid 9 is welded to a metal frame 9 brazed to the upper surface of the substrate 1 by a seam welding method or the like, and the semiconductor integrated circuit element 4 is hermetically sealed inside a container 3 comprising an insulating base 1 and a metal lid 2. By sealing, a semiconductor device as a final product is obtained.
【0026】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。It should be noted that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention.
【0027】[0027]
【発明の効果】本発明によれば絶縁基体の表面に設けた
メタライズ金属層に金属枠体をロウ付けするとともに該
金属枠体をロウ付けするロウ材のメタライズ金属層に対
する被着厚みをメタライズ金属層の外周端からその内側
0.3mmの範囲において30.0μm以下の薄いものとしたこと
から金属枠体と絶縁基体との間に発生する絶縁基体と金
属枠体及びロウ材との熱膨張係数の相違に起因した熱応
力はメタライズ金属層の外周端に集中することはなくメ
タライズ金属層の表面に逃げ、その結果、メタライズ金
属層の絶縁基体からの剥離を皆無として絶縁基体に極め
て強固に被着させておくことが可能となる。According to the present invention, a metal frame is brazed to a metallized metal layer provided on the surface of an insulating base, and the thickness of the brazing material for brazing the metal frame to the metallized metal layer is reduced. Inside the outer edge of the layer
Since the thickness is less than 30.0μm in the range of 0.3mm, the thermal stress generated between the metal frame and the insulating substrate due to the difference in the thermal expansion coefficient between the insulating frame, the metal frame and the brazing material is metallized. The metallized metal layer escapes to the surface of the metallized metal layer without concentrating on the outer peripheral edge, and as a result, the metallized metal layer can be extremely firmly adhered to the insulating substrate without any peeling off from the insulating substrate. .
【0028】従って、本発明の半導体素子収納用パッケ
ージは絶縁基体と金属製蓋体とから成る容器の気密封止
の信頼性が高く、内部に収容する半導体集積回路素子を
長期間にわたり正常、且つ安定に作動させることができ
る。Therefore, the semiconductor element housing package of the present invention has high reliability of hermetic sealing of a container formed of an insulating base and a metal lid, and allows the semiconductor integrated circuit element housed therein to be normally and for a long period of time. It can be operated stably.
【図面の簡単な説明】[Brief description of the drawings]
【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.
【図2】図1に示すパッケージの要部拡大断面図であ
る。FIG. 2 is an enlarged sectional view of a main part of the package shown in FIG.
【図3】従来の半導体素子収納用パッケージの要部拡大
断面図である。FIG. 3 is an enlarged sectional view of a main part of a conventional package for housing a semiconductor element.
1・・・・・絶縁基体 2・・・・・金属製蓋体 3・・・・・容器 5・・・・・メタライズ配線層 7・・・・・外部リード端子 8・・・・・メタライズ金属層 9・・・・・金属枠体 10・・・・・ロウ材 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Metal lid 3 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 8 ... Metallized Metal layer 9 Metal frame 10 Brazing material
Claims (1)
に金属枠体をロウ付けするとともに該金属枠体に金属製
蓋体を取着し、内部に半導体素子を気密に収容するよう
になした半導体素子収納用パッケージであって、前記金
属枠体をロウ付けするロウ材のメタライズ金属層に対す
る被着厚みがメタライズ金属層の外周端からその内側0.
3mm の範囲において30.0μm 以下であることを特徴とす
る半導体素子収納用パッケージ。1. A metal frame is brazed to a metallized metal layer provided on the surface of an insulating substrate, and a metal lid is attached to the metal frame so as to hermetically accommodate a semiconductor element therein. A package for semiconductor element storage according to claim 1, wherein the thickness of the brazing material for brazing the metal frame to the metallized metal layer is 0.
A package for housing a semiconductor device, wherein the thickness is 30.0 μm or less in a range of 3 mm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32429791A JP2883235B2 (en) | 1991-12-09 | 1991-12-09 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32429791A JP2883235B2 (en) | 1991-12-09 | 1991-12-09 | Package for storing semiconductor elements |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05160284A JPH05160284A (en) | 1993-06-25 |
JP2883235B2 true JP2883235B2 (en) | 1999-04-19 |
Family
ID=18164233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP32429791A Expired - Fee Related JP2883235B2 (en) | 1991-12-09 | 1991-12-09 | Package for storing semiconductor elements |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2883235B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11260949A (en) * | 1998-03-12 | 1999-09-24 | Sumitomo Metal Electronics Devices Inc | Ceramic package and manufacture thereof |
JP4614594B2 (en) * | 2001-08-28 | 2011-01-19 | 京セラ株式会社 | Electronic component storage package |
WO2010095367A1 (en) * | 2009-02-19 | 2010-08-26 | 日本電気株式会社 | Vacuum sealed package, printed circuit board having vacuum sealed package, electronic device, and method for manufacturing vacuum sealed package |
JP5632563B2 (en) * | 2012-11-12 | 2014-11-26 | 株式会社Neomaxマテリアル | Airtight sealing lid and electronic component storage package |
-
1991
- 1991-12-09 JP JP32429791A patent/JP2883235B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH05160284A (en) | 1993-06-25 |
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