JP2784094B2 - Package for storing semiconductor elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI, is generally made of an electrically insulating material such as alumina ceramics, and has a semiconductor integrated circuit located substantially at the center of its upper surface. An insulative base having a metallized wiring layer made of a high melting point metal powder such as tungsten (W) or molybdenum (Mo) led out from the periphery of the recess to the outer peripheral edge to accommodate the element; An external lead terminal is attached to the metallized wiring layer via a brazing material such as silver brazing to electrically connect to an electric circuit, and a metal lid is provided. A circuit element is mounted and accommodated, and each electrode of the semiconductor integrated circuit element is connected to a metallized wiring layer via a bonding wire. A semiconductor device as a final product by sealing a semiconductor integrated circuit device hermetically container interior made of a metallic lid were attached insulating substrate and metallic lid to the surface.

The insulating base has a metal frame made of Kovar metal, 42Alloy or the like previously brazed on the upper surface thereof, and a metal lid is welded to the metal frame by a seam weld or the like. The lid is attached to the insulating base, and the container is hermetically sealed.

However, in recent years, the size of semiconductor integrated circuit devices and the speed of signal propagation have rapidly increased, and the semiconductor integrated circuit devices are housed in the above-mentioned conventional semiconductor device housing package. It has disadvantages.

That is, (1) The coefficient of thermal expansion of silicon constituting a semiconductor integrated circuit element and the coefficient of thermal expansion of alumina ceramic constituting an insulating base of a package are 3.0 to 3.5 × 10 ^-6 /
℃, 6.0 to 7.5 × 10 ^-6 / ℃, greatly different from the heat generated when operating the semiconductor integrated circuit element and the like is applied to both, a large thermal stress occurs between the two,
The thermal stress damages the semiconductor integrated circuit element or peels off from the insulating base to cause the semiconductor device to lose its function as a semiconductor device.

(2) Since the dielectric constant of the alumina ceramic constituting the insulating base of the package is as high as 9 to 10 (room temperature 1 MHz), the propagation speed of the signal transmitted through the metallized wiring layer provided on the insulating base is low. However, semiconductor integrated circuit elements that require high-speed propagation have had drawbacks such as the inability to mount and accommodate them.

Therefore, in order to solve the above-mentioned drawbacks, the thermal expansion coefficient (3.0 to 3.5 × 10 ⁻⁶ / ° C.) of silicon constituting a semiconductor integrated circuit element is obtained by replacing the insulating base of the semiconductor element housing package with alumina ceramics. Thermal expansion coefficient 4.
Use of a mullite sintered body having a temperature of 0 to 4.5 × 10 ⁻⁶ / ° C. and a low dielectric constant of 6.3 has been studied.

[0008]

However, when this mullite sintered body is used as an insulating substrate of a package, the mullite sintered body has a coefficient of thermal expansion of 4.0 to 4.
5 × 10 ^-6 / ℃, which is different from the coefficient of thermal expansion of the metal frame (Kovar metal or 42 Alloy: 5.2 to 6.0 × 10 ^-6 / ℃) Thermal stress due to the difference in the coefficient of thermal expansion between the two, and as a result, even when a small external force is applied to the metal frame, the external force increases rapidly with the internal stress, and the metal frame is insulated. This caused a drawback of peeling off from the substrate.

The present invention comprises an insulating base having a metal frame brazed on the upper surface thereof, and a metal lid, and a semiconductor integrated circuit element formed therein by attaching the metal lid to the metal frame of the insulating base. Wherein the insulating substrate is formed of a mullite sintered body, and the metal frame is composed of 28.5 to 29.5% by weight of nickel, 15.5 to 16.5% by weight of cobalt, and 54.0 to 56.0% of iron. 10% of the thickness of the plate-shaped body,
It is characterized by being formed of a metal body to which a copper plate having a thickness of about 20% is bonded.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the embodiments shown in the accompanying drawings.

FIG. 1 is a sectional view showing one embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is an insulating base and 2 is a metal lid. A container 3 for accommodating the semiconductor integrated circuit device 4 with the insulating base 1 and the metal lid 2.
Is configured.

The insulating substrate 1 is provided with a stepped recess A for forming a space for accommodating the semiconductor integrated circuit element 4 in the center of the upper surface thereof, and the semiconductor integrated circuit element 4 is adhered to the bottom of the recess A. It is attached via materials.

The insulating substrate 1 is made of a mullite sintered body, and the mullite sintered body has a thermal expansion coefficient of 4.0 to 4.5.
× 10 ⁻⁶ / ° C., which is close to the coefficient of thermal expansion (3.0 to 3.5 × 10 ⁻⁶ / ° C.) of the silicon constituting the semiconductor integrated circuit element 4.
Even if heat generated when the semiconductor integrated circuit element 4 is operated is applied to both of them after mounting and housing 4, no large thermal stress is generated between the two. The integrated circuit element 4 is not damaged or peeled from the insulating base 1.

A metallized wiring layer 5 is formed on the insulating base 1 from the periphery of the concave portion A to the outside of the container 3, and each electrode of the semiconductor integrated circuit element 4 is formed around the concave portion A of the metallized wiring layer 5. Are electrically connected via bonding wires 6, and external lead terminals 7 connected to an external electric circuit are attached to a portion led out of the container 3 via a brazing material 8 such as silver brazing. .

[0015] The insulating substrate 1 made of the mullite sintered body, for example, mullite _{(3 Al 2 O 3 · 2SiO} 2), silica (SiO _2), magnesia (MgO), raw material powders such as calcia (CaO) An appropriate organic solvent and a solvent are added and mixed to form a slurry, and this is formed into a ceramic green sheet (ceramic green sheet) by employing a doctor blade method. Thereafter, the ceramic green sheet is appropriately punched. Applying processing and laminating multiple sheets,
It is manufactured by firing at a high temperature (1400-1800 ° C).

The metallized metal layer 5 is made of a refractory metal powder such as tungsten or molybdenum, and is formed from the periphery of the recess A of the insulating base 1 to the outside of the container 3 by employing a conventionally known thick film method such as screen printing. Is formed.

Since the metallized wiring layer 5 has a low dielectric constant of 6.3 of the mullite sintered body constituting the insulating base 1, the propagation speed of the electric signal transmitted through the metallized sintered body can be made extremely high. It is also possible to accommodate therein a semiconductor integrated circuit element 4 that performs high-speed driving with a high signal propagation speed.

An external lead terminal 7 brazed to the metallized wiring layer 5 serves to connect the semiconductor integrated circuit element 4 housed therein to an external electric circuit, and connects the external lead terminal 7 to the external electric circuit. As a result, the semiconductor integrated circuit element 4 accommodated inside is
In addition, it is electrically connected to an external electric circuit via the external lead terminal 7.

The external lead terminal 7 is made of Kovar metal or 42
Ingots made of metals such as Alloy and Kovar metals
(Lump) is formed into a predetermined plate shape by employing a conventionally known rolling method.

A metallized metal layer 9 is formed on the upper surface of the insulating substrate 1, and a metal frame 10 is brazed on the metallized metal layer 9 via a brazing material such as silver brazing. I have.

The metallized metal layer 9 on the upper surface of the insulating substrate 1
Is made of a high melting point metal powder such as tungsten or molybdenum, and a metal paste obtained by adding and mixing an appropriate organic solvent and a solvent to the tungsten powder or the like is printed and applied on the upper surface of the insulating substrate 1 by a conventionally known screen printing method. At the same time, by baking this at a high temperature, it is formed on the upper surface of the insulating substrate 1.

The metal frame 10 brazed to the metallized metal layer 9 acts as a base metal member when attaching the metal lid 2 to the insulating base 1, and the metal frame 10 is 2 is welded by a seam welding method or the like, so that the metal lid 2 is attached onto the insulating base 1.

The metal frame 10 is provided on the upper and lower surfaces of a plate made of an alloy of 28.5 to 29.5% by weight of nickel, 15.5 to 16.5% by weight of cobalt and 54.0 to 56.0% by weight of iron, with respect to the thickness of the plate. It has a thermal expansion coefficient of 4.7 to 4.9 × 10 ^-6 / ° C.

The metal frame 10 has a coefficient of thermal expansion of 4.7 to 4.7.
4.9 × 10 ⁻⁶ / ° C., which is close to the coefficient of thermal expansion of the mullite sintered body that constitutes the insulating substrate 1.
When the metal frame 10 is brazed to the metallized metal layer 9 adhered to 1, a large thermal stress is generated between the insulating base 1 and the metal frame 10 due to the difference in the coefficient of thermal expansion between the two. No large stress is inherent in the brazed portions of the two. Therefore, even if an external force is applied to the metal frame 2 after brazing, the external force increases rapidly with the stress existing in the brazed portion, and the metal frame 2 does not peel off from the insulating base 1. .

The metal frame 10 is made of, for example, nickel 2
8.5 to 29.5% by weight, cobalt 15.5 to 16.5% by weight, iron 5
4.0 to 56.0% by weight is heated and melted and alloyed to produce an ingot of nickel-cobalt-iron alloy, and then a copper plate is pressed against the upper and lower surfaces of the ingot.
This is manufactured by rolling this with a rolling roller.

When the metal frame 10 is out of the above-mentioned range, the thermal expansion of the metal frame 10 is caused when the amount of nickel, cobalt and iron and the ratio of the thickness of the plate made of nickel-cobalt-iron alloy to the thickness of the copper plate are out of the above ranges. The coefficient is too large for the mullite sintered body constituting the insulating base 1, and as a result, the metal frame 10 cannot be firmly attached to the insulating base 1. Therefore, the metal frame 10 is made of nickel 28.5 to 28.5.
9.5% by weight, cobalt 15.5 to 16.5% by weight, iron 54.0 to 5
It is specified to be formed of a metal body in which a copper plate having a thickness of 10 to 20% with respect to the thickness of the plate is bonded to upper and lower surfaces of a plate made of an alloy of 6.0% by weight.

The metallized metal layer 9 and the metal frame
The metallized metal layer 9 and the metal frame 10 are oxidized and corroded by plating a metal having excellent corrosion resistance such as nickel and gold on the exposed outer surface to a thickness of 2.0 to 20.0 μm by plating. Discoloration can be effectively prevented.
Therefore, it is preferable to coat nickel, gold or the like on the exposed outer surfaces of the metallized metal layer 9 and the metal frame 10 to a thickness of 2.0 to 20.0 μm in order to effectively prevent discoloration due to oxidative corrosion.

Thus, according to the package for accommodating a semiconductor device of the present invention, the semiconductor integrated circuit device 4 is attached to the bottom surface of the concave portion A of the insulating base 1 via an adhesive, and each electrode of the semiconductor integrated circuit device 4 is metallized wiring layer 5. Then, the metal lid 2 is welded to the metal frame 10 brazed to the upper surface of the insulating base 1 by a seam welding method or the like, so that the inside of the container 3 is airtight. By sealing, a semiconductor device as a product is obtained.

It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, the external lead terminals 7 can be replaced with the metal frame 10. On the upper and lower surfaces of a plate made of the same metal body, that is, an alloy of 28.5 to 29.5% by weight of nickel, 15.5 to 16.5% by weight of cobalt, and 54.0 to 56.0% by weight of iron, 10 to 20% of the thickness of the plate If a metal body to which a copper plate having a thickness of 3 mm is bonded is used, the attachment of the external lead terminals 7 to the insulating base 1 becomes extremely strong. Therefore, in order to attach the external lead terminal 7 very firmly to the insulating substrate 1, the external lead terminal 7
Is nickel 28.5 to 29.5% by weight, cobalt 15.5 to 16.5
% Of iron and 54.0 to 56.0% by weight of an alloy having a thickness of 10 to 20% of the thickness of the plate. preferable.

Further, a metal having excellent corrosion resistance and good conductivity, such as nickel or gold, is coated on the exposed outer surface of the external lead terminal 7 to a thickness of 2.0 to 20.0 μm by plating. Can be effectively prevented from being oxidized and corroded and discolored, and the electrical connection between the external lead terminal 7 and the external electric circuit can be made extremely good. Accordingly, in order to effectively prevent discoloration of the external lead terminal 7 due to oxidative corrosion and to improve the electrical connection with an external electric circuit, nickel, gold or the like is coated on the exposed external surface of the external lead terminal 7 with 2.0 to 20.0%. It is preferable to coat the layer to a thickness of μm.

[0031]

According to the semiconductor device housing package of the present invention, since the container for housing the semiconductor integrated circuit device is formed of a mullite sintered body, the coefficient of thermal expansion of the insulating container is determined by the thermal expansion coefficient of the semiconductor integrated circuit device. Can be approximated to the coefficient. As a result, after the semiconductor integrated circuit element is accommodated in the insulating container, heat generated when the semiconductor integrated circuit element is operated is applied to both the insulating base and the semiconductor integrated circuit element. Even if it is performed, no large thermal stress is generated between them, and the thermal stress does not damage the semiconductor integrated circuit element or peel off from the insulating base.

Further, since the insulating base made of a mullite sintered body has a low dielectric constant of 6.3, the propagation speed of an electric signal transmitted through the metallized wiring layer provided on the insulating base can be made extremely high. In addition, a semiconductor integrated circuit element that performs high-speed driving can be accommodated in the insulating container.

Further, a metal frame is placed on the upper and lower surfaces of a plate made of an alloy of 28.5 to 29.5% by weight of nickel, 15.5 to 16.5% by weight of cobalt, and 54.0 to 56.0% by weight of iron, and 10 to 20% of the thickness of the plate. % Of a copper plate joined to a metal body, the coefficient of thermal expansion of which can be approximated to that of the insulating base. As a result, when the metal frame is brazed to the upper surface of the insulating base, Almost no thermal stress occurs due to the difference in the coefficient of thermal expansion between the metal frame and the metal frame, and the metal frame can be extremely firmly brazed to the upper surface of the insulating base to provide a highly reliable semiconductor element. A storage package can also be provided.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Metal lid 3 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 9 ... Metallized metal layer 10 ... Metal frame A ... Recess

Claims (1)

(57) [Claims] 1. A semiconductor integrated circuit device comprising an insulating base having a metal frame brazed on an upper surface thereof and a metal lid, wherein the metal lid is attached to the metal frame of the insulating base. In the semiconductor device housing package adapted to be housed, the insulating base is formed of a mullite sintered body, and the metal frame is made of nickel 28.5 to 29.5% by weight, cobalt 1
The upper and lower surfaces of a plate made of an alloy of 5.5 to 16.5% by weight and iron of 54.0 to 56.0% by weight have a thickness of 10 to 20 with respect to the thickness of the plate.
A package for housing a semiconductor element, wherein the package is formed of a metal body joined to a copper plate having a thickness of 0.1%.