JP2710893B2 - Electronic components with leads - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component having lead terminals, and more particularly to an improvement of a leaded electronic component such as a package for housing a semiconductor element and a wiring board for a hybrid IC.

[0002]

2. Description of the Related Art Conventionally, a package for accommodating an electronic component with leads, for example, a semiconductor element, for accommodating a semiconductor element is usually made of an electrically insulating material such as a sintered body of aluminum oxide sheet, and has a substantially central portion on its upper surface. An insulating base having a recess for accommodating the semiconductor element and a metallized metal layer made of a high melting point metal powder such as tungsten, molybdenum, and manganese which is led out from the periphery of the recess to the periphery; and electrically connecting the semiconductor element to an external electric circuit. A lead terminal made of a metal such as Kovar metal or 42 alloy brazed to the metallized metal layer via a brazing material such as silver brazing to connect to the metallized metal layer, and a concave portion of the insulating base. A semiconductor element is fixed to the bottom surface, and each electrode of the semiconductor element is electrically connected to the metallized metal layer via a bonding wire. Glass lid insulating substrate top surface,
A semiconductor device as a final product is obtained by joining with a sealing material such as a resin and hermetically sealing a semiconductor element inside a container formed of an insulating base and a lid.

However, recently, semiconductor devices have rapidly increased in density, integration, and speed, and when the semiconductor devices are housed in the conventional semiconductor device housing package,
It has the following disadvantages.

[0004] (1) The coefficient of thermal expansion of silicon constituting the semiconductor element and the coefficient of thermal expansion of the aluminum oxide sintered body constituting the insulating base of the package for accommodating the semiconductor element are 3.0 to 3.5 × 10 ^-6 / ° C.
5 × 10 ⁻⁶ / ° C., which is so different that a large thermal stress is generated between the two when heat generated when the semiconductor element is operated or the like is applied to the two. May be damaged, or the semiconductor element may be peeled off from the insulating base to lose the function as a semiconductor device.

(2) The thermal conductivity of the aluminum oxide sintered body constituting the insulating base of the package for accommodating a semiconductor element is about
Since it is as low as 20 W / m · k, the insulating base cannot satisfactorily dissipate the heat generated during the operation of the semiconductor element into the atmosphere. They cause destruction or change the characteristics due to heat, causing malfunctions.

(3) The dielectric constant of the aluminum oxide sintered body constituting the insulating base of the package for housing the semiconductor element is
Since it is as high as 9 to 10 (room temperature 1 MHz), the propagation speed of an electric signal propagating through a metallized metal layer provided on an insulating substrate is slow, and therefore, a semiconductor element requiring high-speed signal propagation cannot be mounted. And the like.

Therefore, in order to solve the above-mentioned drawbacks, a mullite sintered body having a low dielectric constant and a high thermal conductivity, in which the thermal expansion coefficient of the insulating base of the package for housing the semiconductor element is close to that of silicon constituting the semiconductor element. The use of glass-ceramics, aluminum nitride-based sintered bodies, silicon carbide-based sintered bodies, and the like containing a large amount of glass components has been studied.

[0008]

However, a package for housing a semiconductor device using a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a glass-ceramic or the like as an insulating base is a mullite sintered body. Coefficient of thermal expansion of porous sintered body and aluminum nitride based sintered body is 5.0 × 10 ^-6 /
℃ or less, whereas the thermal expansion coefficient of ferrous alloy metals such as Kovar metal and 42 alloy that constitute the lead terminals is 7.0
^{X10 -6} / ° C, which is a large difference, so when soldering lead terminals to the metallized metal layer adhered to the surface of the insulating substrate, the joint between the metallized metal layer on the surface of the insulating substrate and the lead terminal should be And a large thermal stress due to the difference in the thermal expansion coefficient between the lead terminal and the lead terminal. As a result, even when a small external force is applied to the lead terminal, the external force increases rapidly with the internal stress, and the lead terminal is insulated. There is a problem that the function as a package for housing a semiconductor element is lost by being peeled off from the base.

[0009]

SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and has as its object the purpose of firmly brazing lead terminals to a metallized metal layer adhered to the surface of an insulating substrate and mounting the terminal on the surface of the insulating substrate. An object of the present invention is to provide an electronic component with a lead, such as a semiconductor device storage package, capable of reliably electrically connecting each electrode of a semiconductor element or the like to an external electric circuit via a metallized metal layer and a lead terminal.

[0010]

SUMMARY OF THE INVENTION The present invention relates to an electronic component with a lead comprising a metallized metal layer adhered to the surface of an insulating substrate and a lead terminal made of an iron alloy metal brazed to the metallized metal layer. Is composed of at least one of metal oxides, nitrides, and carbides having a coefficient of thermal expansion of 5.0 × 10 ⁻⁶ / ° C. or less, and has a Vickers hardness between the metallized metal layer applied to the insulating substrate surface and the lead terminal. It is characterized in that not more than 100 elastic metal members are interposed.

[0011]

According to the wiring board of the present invention, the thermal stress generated due to the difference in the thermal expansion coefficient between the insulating base and the lead terminal is absorbed by the elastic metal member interposed between the two, thereby covering the insensitive substrate surface. The lead terminals can be firmly brazed to the metallized metal layer that has been attached.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIGS. 1 and 2 show an embodiment in which a semiconductor element housing package for housing a semiconductor element is used as an example of an electronic component with leads according to the present invention. In the drawings, reference numeral 1 denotes an insulating base, and 2 denotes a lid. The insulating base 1 and the lid 2 constitute a container for housing the semiconductor element 3.

The insulating substrate 1 is made of an electrically insulating material such as a mullite sintered body, a glass-ceramic, an aluminum nitride sintered body, a silicon carbide sintered body, and the semiconductor element 3 is accommodated in the center of the upper surface thereof. Recess 1a forming a space for
A semiconductor element 3 made of silicon is attached to the bottom of the recess 1a via an adhesive such as brazing material, glass, resin, or the like.

Metal oxides, nitrides, and carbides such as mullite sintered bodies and aluminum nitride sintered bodies constituting the insulating substrate 1 have a thermal expansion coefficient of 5.0 × 10 ⁻⁶ / ° C. or less, and The coefficient of thermal expansion of silicon constituting element 3 (3.0
(Approximately 3.5 × 10 ⁻⁶ / ° C.), which occurs when the semiconductor element 3 is attached to the bottom surface of the concave portion 1a of the insulating base 1 and between the insulating base 1 and the semiconductor element 3, for example, when the semiconductor element is operated. Even if heat is applied, no large thermal stress is generated between the two, and the thermal stress damages the semiconductor element 3 or peels the semiconductor element 3 from the insulating base 1 to function as a semiconductor device. There is nothing to lose.

If the semiconductor element 3 attached to the bottom surface of the concave portion 1a generates a large amount of heat, the insulating substrate 1 is made of an aluminum nitride sintered body having a thermal conductivity of 80 W / m · k or more. Insulating substrate 1 if it is formed by body or silicon carbide
Can satisfactorily dissipate the heat generated by the semiconductor element 3 into the atmosphere, and operate the semiconductor element 3 normally at a low temperature for a long period of time.

When the insulating substrate 1 is made of, for example, a mullite sintered body, mullite (3Al ₂ O ₃ .2SiO ₂ ),
By adding an appropriate organic solvent and solvent to the raw material powder such as silica (SiO ₂ ), magnesia (MgO), and calcia (CaO) to form a slurry, and using a doctor blade method or calendar roll method A green sheet (raw sheet) is formed. Thereafter, the green sheet is subjected to an appropriate punching process and a plurality of sheets are laminated, and a high temperature (
It is manufactured by firing at about 1400 ° C to 1800 ° C).

A plurality of metallized metal layers 4 are formed on the insulating base 1 from the periphery to the bottom surface of the recess 1a. The electrodes of the semiconductor element 3 are bonded to the metallized metal layer 4 around the recess 1a. A lead terminal 6 is electrically connected via a wire 5 and is soldered to a portion exposed on the bottom surface of the insulating base 1 via a brazing material such as silver brazing.

A metallized metal layer provided on the insulating substrate 1
4 is tungsten (W), molybdenum (Mo), manganese (Mn)
The metallized metal layer 4 functions to electrically connect each electrode of the semiconductor element 3 to a lead terminal connected to an external electric circuit.

The metallized metal layer 4 is formed, for example, by applying a metal paste obtained by adding an organic solvent and a solvent to a metal powder such as tungsten to a green sheet serving as the insulating substrate 1 in a predetermined pattern by a conventionally well-known screen printing method. By printing and applying, it is adhered and formed at a predetermined position on the insulating base 1.

The metallized metal layer 4 is coated on its exposed outer surface with a metal having excellent corrosion resistance such as nickel (Ni) or gold (Au) and a good wettability with a brazing material by plating.
Metallized metal layer 4 when layered to a thickness of 0.0 μm
Metallized wiring layer 4 and bonding wires 5 and lead terminals.
6 can be made firmly.
Accordingly, the surface of the metallized metal layer 4 has nickel (N
It is preferable that a metal having excellent corrosion resistance such as i) or gold (Au) and having good wettability with a brazing material is applied to a thickness of 1.0 to 20.0 μm by plating.

The metallized metal layer 4 provided on the insulating substrate 1 may be formed of a mullite sintered body or a glass-ceramic having a low dielectric constant of about 6.3, and may be transmitted through the metallized metal layer 4. If the signal propagation speed becomes extremely high, and the semiconductor element 3 attached to the bottom of the concave portion 1a of the insulating base 1 is of a high-speed drive type that inputs and outputs electric signals at high speed, the metallized metal layer 4 is deposited. The insulating substrate 1 to be formed is preferably formed of a mullite sintered body or a glass-ceramic having a low dielectric constant.

As shown in FIG. 2, the metallized metal layer 4 formed on the insulating substrate 1 has an elastic metal member 7 having a Vickers hardness (Hv) of 100 or less between lead terminals 6 on the bottom surface of the insulating substrate 1. Is brazed by a brazing material 8 such as a silver brazing.

The lead terminal 6 is made of Kovar metal (Fe-Ni).
It is made of an iron alloy-based metal such as a Co alloy or a 42 alloy (Fe-Ni alloy), and functions to electrically connect each electrode of the semiconductor element 3 to an external electric circuit.

The lead terminals 6 are manufactured by forming an ingot (lumps) of Kovar metal or the like into a predetermined rod shape by using a conventionally known metal working method such as a rolling method or a punching method.

An elastic metal member 7 sandwiched between the lead terminal 6 and the metallized metal layer 4 provided on the insulating base 1
Is the lead terminal on the metallized metal layer 4 provided on the insulating base 1.
6 is soldered through a silver braze, an action is provided between the insulating base 1 and the lead terminal 6 to absorb and alleviate the thermal stress generated due to the difference in the coefficient of thermal expansion between the two. 6 is firmly brazed to the metallized metal layer 4 of the insulating substrate 1 without having a large thermal stress therein, so that the lead terminal 6 does not peel off from the insulating substrate 1 even when an external force is applied.

The elastic metal member 7 has a Vickers hardness (Hv)
Is less than 100, specifically copper (Cu), silver (A
g), gold (Au), platinum (Pt) or the like is used, and copper is preferably used in view of cost.

When the elastic metal member 7 has a Vickers hardness (Hv) of more than 100, the insulating base member 1 is hardened.
When the lead terminals 6 are brazed to the metallized metal layer 4 provided on the substrate through silver brazing, the elastic metal member 7 can sufficiently absorb and mitigate the thermal stress generated between the insulating base 1 and the lead terminals 6. Therefore, the lead terminal 6 cannot be firmly brazed to the metallized metal layer 4 of the insulating base 1.
Therefore, the elastic metal member 7 has a Vickers hardness (Hv) of 10
Specified as a soft metal material of 0 or less.

The elastic metal member 7 has a thickness of 300.
When the lead terminal 6 is brazed to a thickness of less than μm, the elastic metal member 7 tends to be unable to sufficiently absorb and reduce the thermal stress generated between the insulating base 1 and the lead terminal 6 when brazing the lead terminal 6. Therefore, the elastic metal member 7 has a thickness of 300
It is preferable to set the thickness to be at least μm.

Further, if the elastic metal member 7 is previously bonded to the brazing surface side of the lead terminal 6 by rolling, the lead terminal 6 is insulated from the lead terminal 6 only by brazing to the metallized metal layer 4 of the insulating base 1. Metallized metal layer of substrate 1
4, an elastic metal member 7 can be interposed.
Therefore, in consideration of the workability of interposing the elastic metal member 7 between the lead terminal 6 and the metallized metal layer 4 of the insulating base 1, it is preferable that the elastic metal member 7 is previously joined to the lead terminal 6 by rolling. .

Thus, according to the above-mentioned semiconductor device housing package, the semiconductor device 3 is attached to the bottom surface of the concave portion 1a of the insulating base 1 via an adhesive such as brazing material, glass, resin, etc. Is electrically connected to the metallized metal layer 4 via the bonding wire 5 and then
The lid 2 is joined to the upper surface of the insulating base 1 via a sealing material made of glass, resin, or the like, and the semiconductor device 3 is air-tightly housed in a container formed of the insulating base 1 and the lid 2, thereby obtaining a final product. As a semiconductor device.

The present invention is not limited to the above-mentioned semiconductor device housing package, and various modifications can be made without departing from the scope of the present invention. The present invention can be applied to all electronic components with leads to which lead terminals are brazed.

[0032]

According to the leaded electronic component of the present invention,
Metal oxides and nitrides with a coefficient of thermal expansion of 5.0 × 10 ^-6 / ℃ or less
A lead terminal made of an iron alloy metal is brazed to a metallized metal layer of an insulating substrate made of at least one type of carbide with an elastic metal member having a Vickers hardness (Hv) of 100 or less interposed therebetween. The elastic metal member absorbs and relaxes the thermal stress generated between the terminal and the terminal. As a result, the lead terminal can be firmly brazed to the metallized metal layer on the surface of the insulating base.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment in which an electronic component with leads of the present invention is applied to a semiconductor element housing package for housing a semiconductor element.

FIG. 2 is an enlarged sectional view of a main part of the package shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Lid 3 ... Semiconductor element 4 ... Metallized metal layer 6 ... Lead terminal 7 ... ··· Elastic metal member 8 ···· Brazing material

Claims (1)

(57) [Claims] An electronic component with a lead in which a lead terminal made of an iron alloy-based metal is brazed to a metallized metal layer adhered to the surface of an insulating substrate, wherein the insulating substrate has a thermal expansion coefficient of 5.0. Metal oxides and nitrides of × 10 ^-6 / ° C or less,
A thickness of between the metallized metal layer, which is made of at least one of carbides and is deposited on the surface of the insulating substrate, and the lead terminal;
An electronic component with leads, wherein an elastic metal member having a thickness of 300 μm or more and a Vickers hardness of 100 or less is interposed.