JPH03196664A - Package for semiconductor device - Google Patents

Abstract

PURPOSE:To operate a semiconductor element normally and stably for a long time by a method wherein the uppermost-part outer circumference edge of a metallized layer formed at the inner circumference face of a recessed part which is extended from the outer-circumference-part bottom to the intermediate part of a side face of an insulating base body is buried inside the insulating base body and a relationship between the thickness of a buried part and a buried length is specified. CONSTITUTION:An uppermost-part outer circumference edge 13 of a metallized layer 5 formed at the inner circumference face of a recessed part 10 which is extended from the outer-circumference-part bottom face 8 to the intermediate part of a side face 9 of an insulating base body 1 is buried inside the insulating base body 1; the thickness (t) of a buried part 12 and a buried length 1 satisfy tX1>=100, 10<=t<=35 and 50<=1, where (t) and 1 are expressed in terms of mum. Consequently, when a semiconductor element is attached and fixed to a rectangular cavity 4 of the insulating base body 1, a crack and a break are not produced at the insulating base body 1, and the semiconductor element can be sealed airtightly at the inside of a package for semiconductor housing use. Thereby, the semiconductor element can be operated normally and stably for a long time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an improvement in a package for accommodating a semiconductor element used in a ceramic package or the like for accommodating a semiconductor integrated circuit element.

[Prior art 1] Conventionally, a package for accommodating a semiconductor element, such as a ceramic package used for accommodating a semiconductor element, especially a semiconductor integrated circuit element, is a glue-less package such as a chip carrier, as shown in FIG. to alumina (A
lt, 0ff) Made of an electrically insulating material such as ceramics, a metallized layer 25 is provided on the bottom surface approximately in the center of the insulating base 21.
It has a rectangular cavity 24 for accommodating a semiconductor element having been deposited thereon, and has a cavity 24 for connecting the semiconductor element to an external electric circuit on the inner peripheral surface of the recess 30 extending from the bottom surface of the outer peripheral part to the middle of the side surface. Tungsten (W), molybdenum (Mo
It is composed of an insulating base 21 and a lid 22, on which a metallized layer 31 made of metal powder such as 100% metal powder is deposited. At the same time, each electrode of the semiconductor element 23 is electrically connected to the metallized layer 26 via the wire 27, and then the lid 22 is bonded to the upper surface of the insulating base 21 via an adhesive, and the inside is A semiconductor device as a final product is completed by hermetically sealing the semiconductor element.

Note that this conventional package for storing semiconductor elements is designed to attach and fix the semiconductor element 23 to the metallized layer 25 provided on the bottom surface of the rectangular cavity 24 of the insulating base 11, and also to braze the metallized layer 31 to an external electric circuit. When soldering, the outer surfaces of the metallized layers 25, 26 and 31 are coated with a solder material that is bondable to the brazing material in order to increase the strength and improve the electrical connection, and to effectively prevent oxidation corrosion of the metallized layer. Gold (Au) and nickel (
Ni) etc. are layered by plating.

[Problem to be Solved by the Invention 1] However, this conventional package for storing semiconductor elements has been developed because the shape of the insulating substrate has become larger while the highly integrated semiconductor elements have become larger due to the miniaturization of electronic devices in recent years. As the semiconductor element becomes smaller, this phenomenon occurs due to the difference in thermal expansion coefficient between the insulating base and the semiconductor element when the semiconductor element is attached and fixed via a brazing material onto the metallized layer provided on the bottom surface of the rectangular cavity of the insulating base. The thermal stress caused by this causes cracks and cracks that reach the bottom of the rectangular cavity, with the uppermost outer periphery of the recess provided from the bottom of the outer periphery of the insulating base to the middle of the side surfaces as a destruction source. As a result, the hermetic sealing of the semiconductor element housed inside the semiconductor element housing pancase is broken, making it difficult to operate the semiconductor element normally and stably for a long period of time.

[Objective of the Invention J The present invention was developed in view of the above-mentioned drawbacks, and its purpose is to fix a semiconductor element in a rectangular cavity of an insulating substrate without causing cracks or cracks in the insulating substrate. It is an object of the present invention to provide a package for housing a semiconductor element, in which the semiconductor element is hermetically sealed inside the package, and the semiconductor element can be operated normally and stably for a long period of time.

[Means for Solving the Problems] The present invention provides a semiconductor element storage package comprising a lid and an insulating base in which a plurality of ceramic sheets are laminated and a rectangular cavity having a metallized layer approximately in the center is provided. The uppermost outer peripheral edge of the metallized layer provided on the inner peripheral surface of the recess extending from the bottom surface of the outer peripheral part of the insulating base to the middle of the side surface is buried in the insulating base, and the thickness t and the buried length l of the buried part are tXI ≧1000 However, t and I represent μm, and are characterized by satisfying 10≦t≦35 and 50≦l.

[Example] Next, a semiconductor device storage package according to the present invention will be described in detail by taking a chip carrier, which is a leadless semiconductor device storage package, as an example.

FIG. 1 is a perspective view showing an embodiment of a semiconductor element storage package according to the present invention, and FIG. 2 is a perspective view of a main part of FIG. 1 with a part thereof cut away.

In FIGS. 1 and 2, 1 is an insulating base made of an electrically insulating material such as alumina ceramic, and 2 is a lid, and the insulating base 1 and lid 2 constitute a container for accommodating a semiconductor element. do.

The insulating substrate 1 has a stepped portion 14 forming a space for accommodating the semiconductor element 3 and a rectangular cavity 4 approximately at the center of its upper surface, and the bottom surface of the rectangular cavity 4 is metallized. Layer 5 has been deposited. The semiconductor element 3 is attached and fixed on the metallized layer 5 via a brazing material.

Further, a plurality of wiring conductors 6 made of a metallized layer are formed on the upper surface of the stepped portion 14 of the rectangular cavity 4 of the insulating substrate 1, and the electrodes of the semiconductor element 3 are connected to the wires 7 on the wiring conductors 6. electrically connected through the Next, the bottom surface of the base 1 of the metallized layer 11 provided on the inner peripheral surface of the recess 10 extending from the outer periphery bottom surface 8 of the insulating base 1 to the middle of the side surface 9 is connected to a wiring conductor of an external electric circuit using a brazing material such as solder. Be soldered.

The insulating substrate 1, the metallized layer 5.11 and the wiring conductor 6
is formed by laminating a plurality of unfired ceramic sheets with a metal paste printed on their surfaces and firing them at a temperature of about 1100 to 1600° C. in a reducing atmosphere of a mixed gas of hydrogen and nitrogen.

Further, the unfired ceramic sheet is made of alumina (Alz
It is formed by adding and mixing a suitable solvent to a ceramic raw material powder such as Os) or silica (SiO□) to form a slurry, and forming the slurry into a sheet shape using a conventionally well-known doctor blade method. Furthermore, the unfired ceramic sheet is divided into a plurality of sections (a large number of through holes are formed in an array using a conventionally well-known punching process, so that a large area of the unfired ceramic sheet can be used as a package for housing semiconductor devices). The through hole is divided into a plurality of sections each having a shape similar to the above, and the through hole is used as a passage for routing a metallized layer when electrically connecting the bottom surface of the insulating substrate to a wiring conductor of an external electric circuit.

Similarly, a rectangular cavity for accommodating a semiconductor element is also formed by a conventionally well-known punching process.

In addition, the metal paste is prepared by adding and mixing a high melting point metal powder such as tungsten (W) or molybdenum (MO) with an appropriate solvent, and is made from the surface of the unfired ceramic sheet and the inner peripheral surface of the through hole. The lower surface is printed and coated using a conventional thick film method such as screen printing.

Finally, the insulating substrate is produced by cutting and separating the fired ceramic body along the sections defined by the array of through holes to produce individual packages for housing semiconductor elements.

The semiconductor element housing package is manufactured by printing and coating a metal paste on an unfired ceramic green sheet, embedding the uppermost outer periphery 13 of the metallized layer 11 in the insulating base 1, and firing it. Stress is generated between molybdenum, tungsten, etc. of the metallized layer 11 due to the difference in coefficient of thermal expansion between them, and this stress is inherent in the metallized layer 11 embedded in the insulating base 1 as compressive stress. As a result, the compressive stress acts to strengthen the vicinity of the uppermost outer periphery 13 of the recess 10 provided on the outer periphery of the insulating base, and the semiconductor element 3 is provided on the bottom surface of the rectangular cavity 4 of the insulating base 1. This cancels out the thermal stress that occurs when fixing on the metallized layer 5 via the brazing material.

It should be noted that if the thickness t of the buried portion 12 of the metallized layer II buried in the insulating base 1 is less than IOu, the reinforcement of the insulating base will be insufficient, and the uppermost outer peripheral edge 13 of the recess 10 will be
If the thickness t of the buried portion 12 exceeds 35 μm, a lamination failure will occur between the top outer periphery 13 of the metallized layer 11 and the ceramic, and the insulating substrate Since it causes poor airtightness in l,
The thickness t of the buried portion 12 of the metallization 1i11 to be buried is 1
It is specified in the range of 0 to 35 μm.

Furthermore, if the buried length l of the metallized layer 11 is less than 50 μm, the reinforcement of the insulating base will be insufficient, and cranks and cracks will occur as described above. However, the buried length I is at least 110 a.
If they are not separated by at least m, there is a risk of a short circuit.

A lid 2 is bonded to the upper surface of the insulating substrate 1 housing the semiconductor element 3 with adhesive, glass, brazing material, etc., and the semiconductor element 3 is hermetically sealed inside.

FIG. 3 shows another embodiment of the package for storing semiconductor elements according to the present invention, in which a green ceramic sheet is laminated directly under the green ceramic sheet on the back side of the green ceramic sheet having no through holes. After forming and laminating a thick circular metallized layer having a predetermined thickness and diameter so as to correspond to the drilled through hole, it is fired to form a metallized layer with a predetermined thickness L and length l in the insulating substrate 1. The layer 11 is buried.

(Experiment example) A rectangular cavity and a large number of through holes are formed by punching into an unfired ceramic sheet made of ceramics mainly composed of alumina (Altos), and a metal paste mainly composed of tungsten (W) powder is formed. is adhered to the inner peripheral surface of the through hole, and various ring-shaped patterns having a predetermined thickness and an embedded length l of a predetermined dimension are formed on the outer periphery of the through hole, and these are laminated. An insulating substrate having a metallized layer as shown in FIGS. 1 and 2 formed thereon by firing at a temperature of about 1500° C. is prepared.

Next, gold-silicon (A
A brazing material made of u-5i) and a silicon semiconductor element are placed on a heater block set at approximately 450°C, the brazing material is heated and melted, and the semiconductor element is brazed onto the metallized layer. .

Incidentally, nickel (Ni) and gold (Au) were deposited on the outer surface of the metallized layer provided on the insulating substrate by plating in order to improve the bonding between the metallized layer and the semiconductor element.

Then, Kovar (Fe-Ni) is applied to the upper surface of the insulating base.
-Co alloy) is adhered via an adhesive to airtightly seal the inside of the package.

Using each lOO of the evaluation samples obtained in this way, the temperature was 0°C.
After applying 200 temperature cycles of ~100°C, the airtightness of the evaluation sample was inspected using a helium leak detector. The results are shown in Table 1. In addition, O in the table
The mark indicates that the airtightness was maintained in all cases, and the X mark indicates that the airtightness was broken even in one case.

As is clear from Table 1, the thickness t of the buried part at the uppermost outer periphery of the metallized layer buried in the insulating substrate is less than 10 μm, or the buried length 1 is less than 50 μm (sample numbers l, 2 .3.13.17.21.25) or those with txt less than 1000 (sample number 2.4.8.1
3.17.21), or the thickness L of the buried part is 35
All of the samples exceeding μm (sample number 29) have poor airtightness, whereas the semiconductor element storage package of the present invention can be effectively hermetically sealed.

[Advantageous Effect 1 of the Invention According to the semiconductor element storage package of the present invention, when a semiconductor element is attached and fixed to a rectangular cavity of an insulating base,
There is no occurrence of cracks or cracks in the insulating substrate, and the semiconductor element can operate normally and stably for a long period of time inside the semiconductor element storage package.

[Brief explanation of drawings]

FIG. 1 is a perspective view showing an embodiment of a semiconductor device storage package according to the present invention, FIG. 2 is a perspective view of a main part with a part of FIG. 1 cut away, and FIG. 3 is a semiconductor device according to the present invention. FIG. 4 is a partially cutaway perspective view of a main part of another embodiment of a storage package, and FIG. 4 is a perspective view showing a conventional semiconductor element storage package. 1 ... Insulating base 2 ... Lid 4 ... Rectangular cavity 5.11 ... Metallized layer 8 ... Bottom surface 9 ... Side surface 10 ... Recessed part 12 ... Buried part 13 ...Top outer periphery t ...Thickness l ...Embedded length

Claims (1)

[Scope of Claims] A package for storing a semiconductor element comprising a lid and an insulating base in which a plurality of ceramic sheets are laminated and a rectangular cavity having a metallized layer is provided approximately in the center, the outer periphery of the insulating base being The uppermost outer peripheral edge of the metallized layer provided on the inner peripheral surface of the recess extending from the bottom surface to the middle of the side surface is buried in the insulating base, and the thickness t and buried length l of the buried portion are t×l≧1000, provided that t , l represents μm and satisfies the following: 10≦t≦35 50≦l.