JP2685488B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device manufacturing technique, and more particularly to a technique effective when applied to a contact hole processing technique for connecting multi-layer wirings.

[Conventional technology]

As the wiring becomes finer with higher integration of semiconductor devices, the aspect ratio of the contact hole for connecting the upper wiring and the lower wiring or the wiring and the semiconductor substrate (contact hole depth / Since the diameter of the contact hole) increases and the step coverage of the conductive film such as Al deposited in the contact hole decreases,
The connection reliability of the wiring is reduced.

Therefore, as a countermeasure, a technique for improving the step coverage of the conductive film by making the cross-sectional shape of the contact hole stepwise or tapered has been put into practical use.

As a technique for forming a stepwise cross-sectional shape of the contact hole, there is, for example, the invention described in JP-A-60-140720, in which a stepwise step portion is formed on the wall surface of the contact hole along the longitudinal direction of the lower layer wiring. This improves the step coverage of the conductive film.

[Problems to be solved by the invention]

However, according to the study by the present inventor, the above-described conventional technique has a drawback that sufficient connection reliability cannot be obtained as the pitch between the contact holes becomes narrower as the semiconductor device becomes highly integrated. There is.

That is, as the pitch between the contact holes becomes narrower, the thickness of the insulating film that separates the contact holes becomes thinner. Particularly, in the case of a contact hole having a stepwise or tapered cross-sectional shape, the thickness of the insulating film at the upper edge of the contact hole is reduced. Since the thickness becomes extremely thin, even if a slight stress is applied, the insulating film may be chipped or deformed.

If such a crack or deformation occurs in a part of the insulating film that separates the contact holes, a short circuit occurs between the contact holes, or a fragment of the crack becomes a foreign substance and mixes into the conductive film to conduct electricity. The connection reliability of the wiring will be significantly reduced, such as causing defects.

The present invention has been made in view of the above problems, and an object thereof is to provide a technique capable of improving the reliability of wirings connected via contact holes.

The above and other objects and novel features of the present invention are:
It will be apparent from the description of this specification and the accompanying drawings.

[Means for solving the problem]

The outline of a representative invention among the inventions disclosed in the present application will be briefly described as follows.

That is, according to the present invention, a plurality of wirings close to each other in a first region on an oxide film provided on a main surface of a semiconductor substrate and other wirings isolated in a second region on the oxide film away from the wirings. And a wiring forming step, subsequent to the wiring forming step, a step of depositing an interlayer insulating film on the first and second regions, and a step of anisotropically etching the interlayer insulating film. Forming a contact hole exposing a part of each of the wirings close to each other and forming a contact hole exposing a part of the other isolated wiring; and anisotropically etching the first region. In the step of reducing the thickness of the interlayer insulating film in which the plurality of contact holes are formed, and forming the contact holes of the interlayer insulating film in the second region in a stepwise shape; The upper wirings are connected to the plurality of wirings through the contact holes in the first region, and the other wirings are connected through the stepped contact holes of the interlayer insulating film in the second region. And a step of connecting another upper layer wiring to the wiring.

[Action]

According to the above-mentioned means, it is possible to prevent chipping or deformation of the insulating film that separates the contact holes having a narrow pitch.

Further, since the aspect ratio of the contact hole is reduced, the step coverage of the conductive film deposited in the contact hole is improved.

〔Example〕

FIG. 1 is a sectional view of an essential part of a semiconductor substrate showing a semiconductor device according to an embodiment of the present invention, and FIGS. 2 (a) to 2 (c) are essential parts of the semiconductor substrate showing a method for manufacturing the semiconductor device. FIG.

The present embodiment is a semiconductor device in which a predetermined integrated circuit element (not shown) is formed on a main surface of a semiconductor substrate (hereinafter referred to as a substrate) 1 made of silicon single crystal, and the integrated circuit elements are electrically connected to each other. First layer Al wirings 2a to 2e to be connected are patterned on the surface of the oxide film 3.

The first layer Al wirings 2a to 2e are covered with the interlayer insulating film 4, and the second layer Al wirings 5a to 5e patterned on the surface of the interlayer insulating film 4 and the first layer Al wirings 2a to 2e are formed. It is connected through the contact holes 6a to 6e.

First layer placed in close proximity to each other
A region above the Al wirings 2a to 2d forms a contact hole dense region C, and the film thickness (t ₁ ) of the interlayer insulating film 4 is processed thinner than the film thickness (t ₂ ) of the interlayer insulating film 4 in other regions. Has been done.

Therefore, the aspect ratio of the contact holes 6a to 6d formed in the contact hole dense region C is smaller than the aspect ratio of the contact holes 6e formed in other regions, and the step coverage of the second layer Al wirings 5a to 5d is small. It will be good.

On the other hand, the isolated contact hole 6e in the other region is formed so that its cross section has a step shape.
The step coverage of the wiring 5e is improved.

Next, an example of a method for manufacturing the above semiconductor device will be described with reference to FIGS.

First, the substrate 1 is heat-treated to form a thin oxide film 3 on the surface thereof, a predetermined integrated circuit device is formed in the active device region according to a conventional method, and then an Al film is deposited on the surface of the substrate 1. Etching is performed to form first layer Al wirings 2a to 2e (second
Figure (a).

Next, on the surface of the substrate 1, phosphosilicate glass (PSG) or Si ₃
After depositing from the inter-layer insulating film 4 made of N ₄ etc., a photoresist 7a is deposited on the surface of the inter-layer insulating film 4, and the inter-layer insulating film 4 is anisotropically etched using the photoresist 7a as a mask. To form contact holes 6a to 6e perpendicular to (FIG. 2 (b)).

Next, after removing the photoresist 7a, a new photoresist 7b is deposited on the surface of the substrate 1 to form a mask in which the contact hole dense region C and the isolated contact hole 6e are opened, and this mask is used. The interlayer insulating film 4 is anisotropically etched by using it to thin the interlayer insulating film 4 in the contact hole dense region C, and the contact hole 6e having a stepwise sectional shape is obtained (FIG. 2 (c)).

Finally, after removing the photoresist 7b, the Al film deposited on the surface of the substrate 1 is etched to form the second layer Al wirings 5a-
5e is formed to obtain the semiconductor device structure shown in FIG.

As described above, according to the present embodiment, the following effects can be obtained.

(1). Since the film thickness of the interlayer insulating film 4 in the contact hole dense region C is made smaller than the film thickness of the interlayer insulating film 4 in other regions, the aspect ratio of the contact holes 6a to 6d formed in the contact hole dense region C is small. Becomes the second layer Al
The step coverage of the wirings 5a to 5d is improved.

(2). By the above (1), the electromigration resistance performance of the second layer Al wirings 5a to 5d is improved.

(3). By the above (1), miniaturization of wiring, and by extension,
Higher density and higher integration of semiconductor devices are promoted.

(4). Since it is possible to prevent the interlayer insulating film 4 separating the contact holes 6a to 6d from being chipped or deformed, the connection reliability between the first layer Al wirings 2a to 2d and the second layer Al wirings 5a to 5d is improved.

(5). Since the film thickness (t ₂ ) of the interlayer insulating film 4 can be increased, the wiring capacitance of the first-layer and second-layer Al wirings is reduced, which reduces the propagation delay of electric signals.

As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say.

〔The invention's effect〕

The effect obtained by the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, by making the film thickness of the interlayer insulating film in the region where the plurality of contact holes are denser smaller than the film thickness of the interlayer insulating film in the other region, the step coverage of the wiring is improved, and the insulating property for separating the contact holes from each other is improved. Since it is possible to prevent the film from being chipped or deformed, it is possible to improve the connection reliability of the wiring.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of an essential part of a semiconductor substrate showing a semiconductor device according to an embodiment of the present invention, and FIGS. It is a figure. 1 ... Semiconductor substrate, 2a to 2e ... First layer Al wiring, 3 ... Oxide film, 4 ... Interlayer insulating film, 5a-5e ... Second layer Al wiring, 6a
~ 6e …… Contact hole, 7a, 7b …… Photoresist,
C: Contact hole dense area.

Claims (1)

(57) [Claims] 1. A plurality of wirings adjacent to each other in a first region on an oxide film provided on a main surface of a semiconductor substrate, and another wiring isolated in a second region on the oxide film away from the wirings. And a wiring forming step, followed by a step of depositing an interlayer insulating film on the first and second regions, and anisotropic etching of the interlayer insulating film.
Forming a contact hole in which a part of each of the plurality of wirings is exposed close to each other, and forming a contact hole in which a part of the other wiring is isolated, and by anisotropic etching, A step of reducing the film thickness of the interlayer insulating film in which a plurality of contact holes in the first region are formed and making the contact holes of the interlayer insulating film in the second region stepwise, and a film of the interlayer insulating film. Upper layer wirings are respectively connected to the plurality of wirings through the plurality of contact holes in the first region which are thinned, and through the stepwise contact holes of the interlayer insulating film in the second region. And a step of connecting another upper wiring to the other wiring.