JP2634812B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2634812B2 JP2634812B2 JP62080113A JP8011387A JP2634812B2 JP 2634812 B2 JP2634812 B2 JP 2634812B2 JP 62080113 A JP62080113 A JP 62080113A JP 8011387 A JP8011387 A JP 8011387A JP 2634812 B2 JP2634812 B2 JP 2634812B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity
- type
- concentration
- band gap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/545—Microcrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
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- Photovoltaic Devices (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ この発明は、半導体装置に関し、特に光電変換の半導
体装置に関する。Description: TECHNICAL FIELD The present invention relates to a semiconductor device, and more particularly to a semiconductor device for photoelectric conversion.
［従来の技術］ 第２図は、受光面側に、ａ−SiC:Hのように、バンド
ギャップの広い半導体層を用いたｐ−ｉ−ｎ型非晶質に
よる多重接合型太陽電池を示していて、ここで図示した
ように、バンドギャップの広いｐ型半導体層（４）とｉ
型半導体層（６）との間に、バンドギャップ及び不純物
濃度がｉ型半導体層（６）に向かって段階的に減少して
いるようないわゆるグレーディングギャップ層（５）を
設けることにより、太陽電池の光電変換効率が向上する
ことは一般によく知られている。[Prior Art] FIG. 2 shows a multijunction solar cell of pin type amorphous using a semiconductor layer having a wide band gap such as a-SiC: H on the light receiving surface side. As shown here, the p-type semiconductor layer (4) having a wide band gap and i
A so-called grading gap layer (5) whose band gap and impurity concentration gradually decrease toward the i-type semiconductor layer (6) between the solar cell It is generally well known that the photoelectric conversion efficiency is improved.
ところで、本発明者は実験により、上記構造の太陽電
池においては、バンドギャップの広いｐ型半導体層
（４）の不純物濃度を通常の1/5ないし1/10程度にまで
減少することにより、蛍光灯下のような低い照度の光源
のもとで光電変換効率を改善できるということを見出だ
した。By the way, the present inventor has shown by experiments that in the solar cell having the above structure, the impurity concentration of the p-type semiconductor layer (4) having a wide band gap is reduced to about 1/5 to 1/10 of the usual value, thereby achieving the fluorescence. It has been found that the photoelectric conversion efficiency can be improved under a low-illuminance light source such as under a lamp.
［発明が解決しようとする問題点］ ところが、太陽光のように高い照度のもとでは、透明
電極（２）と、この不純物層であるｐ型半導体層（４）
との間の接触抵抗が著しく大きくなり、これによる電圧
降下が大きくなるため、光電変換効率は逆に低下し、
又、太陽電池を構成する各ｐ−ｉ−ｎ接合の間に存在す
るｐ−ｎ界面が逆接合となるため、ここでも電圧降下が
起きるという問題があった。[Problems to be Solved by the Invention] However, under high illuminance such as sunlight, the transparent electrode (2) and the p-type semiconductor layer (4) which is an impurity layer thereof are used.
And the contact resistance between them significantly increases, and as a result, the voltage drop increases, so that the photoelectric conversion efficiency decreases,
In addition, since the pn interface existing between the pin junctions constituting the solar cell is a reverse junction, there is also a problem that a voltage drop occurs here.
この発明は、上記問題を解決するためになされたもの
であり、高照度のもとでも光電変換効率の低下すること
のない半導体装置を提供することを目的とする。The present invention has been made to solve the above problem, and has as its object to provide a semiconductor device in which the photoelectric conversion efficiency does not decrease even under high illuminance.
［問題点を解決するための手段］ この発明の半導体装置は、受光面側に、活性層である
真性半導体のｉ層よりもバンドギャップの広いｐ層ある
いはｎ層の不純物層を有するｐ−ｉ−ｎ型あるいはｎ−
ｉ−ｐ型光起電力素子を多重に接合してなり、該広バン
ドギャップ層のｐ−ｉあるいはｎ−ｉ界面に、ｐ層から
ｉ層あるいはｎ層からｉ層に向かって不純物濃度を減少
させてバンドギャップを狭くしたグレーティング層を設
けてなる非単結晶のシリコン系半導体装置であって、少
なくとも一つ以上の広バンドギャップ不純物層の受光面
側に、該不純物層と同じ導電型でかつ不純物濃度の高い
10ないし40Åの厚みを有する高濃度不純物層を設けたこ
とを特徴とする。[Means for Solving the Problems] The semiconductor device of the present invention has a p-i having a p-layer or an n-layer impurity layer having a band gap wider than the i-layer of the intrinsic semiconductor as the active layer on the light-receiving surface side. -N type or n-
An ip photovoltaic element is joined in multiple layers, and the impurity concentration is reduced from the p layer to the i layer or from the n layer to the i layer at the pi or ni interface of the wide band gap layer. A non-single-crystal silicon-based semiconductor device provided with a grating layer having a reduced band gap, wherein at least one or more wide band gap impurity layers have the same conductivity type as the impurity layer on the light receiving surface side. High impurity concentration
A high-concentration impurity layer having a thickness of 10 to 40 mm is provided.
［作用］ 上記高濃度不純物層は、それを間にして広バンドギャ
ップ不純物層と接する受光面側の膜と広バンドギャップ
不純物層とにおけるオーミック性を改善し、広バンドギ
ャップ不純物層と接する受光面側の膜と広バンドギャッ
プ不純物層との間の接触抵抗を低下させる。[Operation] The high-concentration impurity layer has an improved ohmic property between the film on the light receiving surface side in contact with the wide bandgap impurity layer and the wide bandgap impurity layer, and the light receiving surface in contact with the wide bandgap impurity layer. The contact resistance between the side film and the wide bandgap impurity layer.
［実施例］ この発明における非単結晶シリコン系半導体として
は、例えば、シリコン，シリコンカーバイド,SiN,SiGe,
SiSn等の水素化膜，フッ素化膜等、一般に光起電力素子
に使用されるアモルファス系，微結晶を含むアモルファ
ス又は多結晶系の半導体があげられる。[Example] Examples of the non-single-crystal silicon-based semiconductor according to the present invention include silicon, silicon carbide, SiN, SiGe,
Amorphous semiconductors generally used for photovoltaic elements, amorphous or polycrystalline semiconductors including microcrystals, such as hydrogenated films such as SiSn and fluorinated films, can be cited.
非単結晶シリコン系半導体は、窓層材料として広バン
ドギャップ半導体が用いられ、ｐ−ｉ−ｎ型あるいはｎ
−ｉ−ｐ型の光起電力素子とされ、更に一般に２重ない
し４重にされ、多重接合型光起電力素子が形成される。
多重接合型光起電力素子を形成する各非単結晶シリコン
系半導体の厚さは、特に限定されず、通常光起電力素子
に使用される範囲のものであればよい。As the non-single-crystal silicon-based semiconductor, a wide band gap semiconductor is used as a window layer material, and a pin type or n-type semiconductor is used.
-A photovoltaic element of the ip type, more generally double or quadruple, forming a multijunction photovoltaic element.
The thickness of each non-single-crystal silicon-based semiconductor forming the multi-junction type photovoltaic element is not particularly limited, and may be any thickness as long as it is in a range normally used for a photovoltaic element.
この発明においては、多重接合型光起電力素子のｐ−
ｉ又はｎ−ｉ界面にｉ層に向かって不純物濃度を減少さ
せた、いわゆるグレーティング層を設け、更に透明導電
膜及びｐ−ｎ逆接合部におけるオーミック性を改善する
ため、広バンドギャップ層の受光面側に高濃度の不純物
層を設けている。In the present invention, the p-type
A so-called grating layer in which the impurity concentration is reduced toward the i layer at the i or ni interface is provided. Further, in order to improve the ohmic properties of the transparent conductive film and the pn reverse junction, the light receiving of the wide band gap layer is performed. A high concentration impurity layer is provided on the surface side.
ｐ−ｉ又はｎ−ｉ界面部とは、第１図に示すように、
ｐ−ｉ又はｎ−ｉ界面A,B又は、これと接するｐ型半導
体層（４），（14）又はグレーディング層（５），（1
5）であってもよく、又、総てのｐ−ｉ又はｎ−ｉ界面
にグレーディング層を設けなくてもよい。又、受高面の
高濃度広バンドギャップ半導体層である不純物層とは、
（３），（13）であり、それぞれ、ｐ型半導体層
（４），（14）と同じ導電型を示す。ｐ−ｉ又はｎ−ｉ
界面部分がｐ型半導体層又はｎ型半導体層の一部から形
成される場合、その層の厚さは、最大でｐ型半導体層ま
たはｎ型半導体層の厚さまで採用される。通常この層の
厚さは、10ないし700Å程度である。広バンドギャップ
高濃度不純物層としては、不純物層（広バンドギャップ
層）と同じ10ないし300Åであるのが好ましく、ｐ型半
導体の場合はホウ素、ｎ型半導体の場合はリン等のドー
パントを用いるのがよく、この場合の厚さとしては、10
ないし300Åであるのが望ましい。The pi or ni interface portion, as shown in FIG.
The pi or ni interface A, B or the p-type semiconductor layers (4), (14) or grading layers (5), (1)
5) may be used, and it is not necessary to provide a grading layer at all pi or ni interfaces. The impurity layer, which is a high-concentration wide band gap semiconductor layer on the receiving surface,
(3) and (13), which indicate the same conductivity type as the p-type semiconductor layers (4) and (14), respectively. pi or ni
When the interface portion is formed from a part of the p-type semiconductor layer or the n-type semiconductor layer, the thickness of the layer is employed up to the thickness of the p-type semiconductor layer or the n-type semiconductor layer. Usually the thickness of this layer is of the order of 10 to 700 mm. The wide bandgap high-concentration impurity layer is preferably 10 to 300 ° which is the same as that of the impurity layer (wide bandgap layer). For a p-type semiconductor, a dopant such as boron is used, and for an n-type semiconductor, a dopant such as phosphorus is used. In this case, the thickness is 10
Or 300 mm.
又、このときの不純物濃度としては、電極との接触抵
抗が十分に低くなる程度まで必要であるが、不純物の種
類や高濃度不純物層の厚さにより異なる。不純物がホウ
素あるいはリン等のドーパントである場合、高濃度不純
物層の不純物濃度は通常、隣接するｐ型半導体層あるい
はｎ型半導体層の５倍以上の濃度が必要であり、10ない
し50倍にするのが望ましい。以下この発明の半導体装置
の１実施例として第１図に示した太陽電池によりその構
成を説明する。In addition, the impurity concentration at this time is required to the extent that the contact resistance with the electrode is sufficiently low, but differs depending on the type of the impurity and the thickness of the high concentration impurity layer. When the impurity is a dopant such as boron or phosphorus, the impurity concentration of the high-concentration impurity layer usually needs to be 5 times or more that of the adjacent p-type semiconductor layer or n-type semiconductor layer, and is 10 to 50 times. It is desirable. The structure of a semiconductor device according to an embodiment of the present invention will be described below with reference to the solar cell shown in FIG.
平行平板容量結合型グロー放電装置を用い、下記条件
にて半導体各層を次の順序でもって成膜形成して有効面
積1.0cm2の太陽電池を作成した。Using a parallel plate capacitively coupled glow discharge device, each semiconductor layer was formed in the following order under the following conditions to produce a solar cell having an effective area of 1.0 cm 2 .
（作成手順） ガラス基板（１）/SnO2による透明電極（２）／厚さ4
0Åの高濃度ｐ型半導体層（３）／厚さ120Åのｐ型半導
体層（４）／厚さ60Åのグレーディング層（５）／厚さ
700Åのｉ型半導体層（６）／厚さ60Åのｎ型半導体層
（７）／厚さ40Åの高濃度ｐ型半導体層（13）／厚さ12
0Åのｐ型半導体層（14）／厚さ60Åのグレーディング
層（15）／厚さ6000Åのｉ型半導体層（16）／厚さ400
Åの微結晶化のｎ型半導体層（17）／裏面電極（８） （成膜条件） ｐ型半導体層： SiH4/50SCCM,CH4/35SCCM,B2H6（1000ppmにH2で希釈し
たもの）/10OSCCM,H2/500SCCM,50mW/cm2,1.0トル（Tor
r） ｉ型半導体層： SiH4/50SCCM,50mW/cm2,1.0トル（Torr） ｎ型半導体層： SiH4/50SCCM,PH3（1000ppmにH2で希釈したもの）/100
0SCCM,50mW/cm2,1.0トル（Torr） 高濃度ｐ型半導体層： SiH4/10SCCM,B2H6（1000ppmにH2で希釈したもの）/50
0SCCM,50mW/cm2,1.0トル（Torr） 微結晶化ｎ型半導体層： SiH4/10SCCM,PH3（1000ppmにH2で希釈したもの）/200
SCCM,500mW/cm2,1.0トル（Torr） 上記のごとく作成した太陽電池と、比較の為に、高濃
度ｐ型半導体層の形成を行わない従来の太陽電池とをソ
ーラーシュミレータを用い100mW/cm2でもって実測した
出力特性を次表に示す。 実施例 従来例 η（％） 8.47 6.39 Voc 1.64 1.45 Jsc（mA/cm2） 7.61 7.60 FF 67.8 58.0 この表よりわかるように、従来例の太陽電池と実施例
により太陽電池は、高照度で光電変換効率ηが向上し
た。(Preparation procedure) Glass substrate (1) / SnO 2 transparent electrode (2) / Thickness 4
0% high-concentration p-type semiconductor layer (3) / 120-degree-thick p-type semiconductor layer (4) / 60-degree-thick grading layer (5) / thickness
700Å i-type semiconductor layer (6) / 60Å thickness n-type semiconductor layer (7) / 40Å thickness high concentration p-type semiconductor layer (13) / thickness 12
0Å p-type semiconductor layer (14) / 60Å thickness grading layer (15) / 6000Å thickness i-type semiconductor layer (16) / thickness 400
N-type semiconductor layer microcrystalline of Å (17) / back surface electrode (8) (film forming conditions) p-type semiconductor layer: diluted SiH 4 / 50SCCM, CH 4 / 35SCCM, B 2 H 6 (H 2 to 1000ppm and ones) / 10OSCCM, H 2 / 500SCCM , 50mW / cm 2, 1.0 torr (Tor
r) i-type semiconductor layer: SiH 4 / 50SCCM, 50 mW / cm 2 , 1.0 torr (Torr) n-type semiconductor layer: SiH 4 / 50SCCM, PH 3 (1000 ppm diluted with H 2 ) / 100
0SCCM, 50mW / cm 2, 1.0 torr (Torr) high-concentration p-type semiconductor layer: SiH 4 / 10SCCM, B 2 H 6 ( those that have been diluted with H 2 to 1000 ppm) / 50
0SCCM, 50mW / cm 2, 1.0 torr (Torr) microcrystalline n-type semiconductor layer: SiH 4 / 10SCCM, PH 3 ( those that have been diluted with H 2 to 1000 ppm) / 200
SCCM, 500 mW / cm 2 , 1.0 torr (Torr) For comparison, a conventional solar cell without forming a high-concentration p-type semiconductor layer was compared with a conventional solar cell using a solar simulator at 100 mW / cm. The following table shows the output characteristics actually measured with 2 . Example Conventional example η (%) 8.47 6.39 Voc 1.64 1.45 Jsc (mA / cm 2 ) 7.61 7.60 FF 67.8 58.0 As can be seen from this table, the conventional solar cell and the solar cell according to the example can perform photoelectric conversion at high illuminance. The efficiency η improved.
［発明の効果］ 以上説明したように、窓側に広バンドギャップ半導体
不純物層を用いた多重接合型太陽電池のｐ−ｉ界面ある
いはｎ−ｉ界面部分にグレーディング層を備えたもの
に、更に、受光面側に10ないし40Åの厚みを有する高濃
度不純物層を備え、この高濃度不純物層を間にして広バ
ンドギャップ不純物層と接する受光面側の膜と広バンド
ギャップ不純物層とにおけるオーミック性を改善するよ
うにしたので、広バンドギャップ不純物層との間の接触
抵抗が低下し、高照度下での光電変換効率が向上する。[Effects of the Invention] As described above, a multi-junction solar cell using a wide band gap semiconductor impurity layer on the window side and having a grading layer at the pi interface or the ni interface portion further receives light. A high-concentration impurity layer with a thickness of 10 to 40 mm is provided on the surface side, and the ohmic properties of the light-receiving surface-side film and the wide bandgap impurity layer in contact with the wide bandgap impurity layer are improved with the high-concentration impurity layer interposed. Therefore, the contact resistance with the wide bandgap impurity layer is reduced, and the photoelectric conversion efficiency under high illuminance is improved.
第１図はこの発明の半導体装置により作成した太陽電池
の１実施例を示す構成図、 第２図は、従来の太陽電池の構成図である。 １……ガラス基板、２……透明電極、3,13……高濃度ｐ
型半導体層、 4,14……ｐ型半導体層、5,15……グレーディングギャッ
プ層、 6,16……ｉ型半導体層、７……ｎ型半導体層、８……裏
面電極、 17……微結晶化ｎ型半導体層。FIG. 1 is a configuration diagram showing one embodiment of a solar cell made by the semiconductor device of the present invention, and FIG. 2 is a configuration diagram of a conventional solar cell. 1 ... glass substrate, 2 ... transparent electrode, 3,13 ... high concentration p
Semiconductor layer, 4,14 ... p-type semiconductor layer, 5,15 ... grading gap layer, 6,16 ... i-type semiconductor layer, 7 ... n-type semiconductor layer, 8 ... backside electrode, 17 ... Microcrystalline n-type semiconductor layer.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 浅岡 圭三 神戸市垂水区塩屋町６丁目31番17号 (72)発明者 山口 美則 明石市東人丸町５丁目40番 (72)発明者 津下 和永 神戸市垂水区舞子台２丁目９番30号 (72)発明者 太和田 善久 神戸市北区大池見山台14番39号 (56)参考文献 特開 昭56−64476（ＪＰ，Ａ) 特開 昭59−163876（ＪＰ，Ａ) 特開 昭58−171869（ＪＰ，Ａ) 特開 昭56−150876（ＪＰ，Ａ) 特開 昭58−106876（ＪＰ，Ａ) ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Keizo Asaoka 6-31-17 Shioyacho, Tarumizu-ku, Kobe-shi (72) Inventor Minori Yamaguchi 5--40, Tojinmarumachi, Akashi-shi (72) Inventor Kazu Tsushita 2-9-30 Maikodai, Tarumizu-ku, Kobe-shi (72) Inventor Yoshihisa Owada 14-39, Oikemiyamadai, Kita-ku, Kobe (56) References JP-A-56-64476 (JP, A) JP-A-59-163876 (JP, A) JP-A-58-171869 (JP, A) JP-A-56-150876 (JP, A) JP-A-58-106876 (JP, A)
Claims (2)
性半導体のｉ層よりもバンドギャップの広いｐ型あるい
はｎ型の不純物層を有するｐ−ｉ−ｎ型あるいはｎ−ｉ
−ｐ型光起電力素子を多重に接合してなる非単結晶のシ
リコン系半導体装置において、 広バンドギャップ層のｐ−ｉあるいはｎ−ｉ界面に、ｐ
層からｉ層あるいはｎ層からｉ層に向かって不純物濃度
を減少させるとともにバンドギャップを狭くしたグレー
ティング層を設けるとともに、透明電極と透明電極に接
する広バンドギャップの不純物層との間及び相接するｐ
型、ｎ側の不純物層の間に、当該不純物層と同じ導電型
でかつ不純物濃度の高い10ないし40Åの厚みを有する高
濃度不純物層を設けたことを特徴とする非単結晶のシリ
コン系半導体装置。A transparent electrode is provided on a light-receiving surface, and a pin type or ni having a p-type or n-type impurity layer having a wider band gap than an i-layer of an intrinsic semiconductor as an active layer.
-In a non-single-crystal silicon-based semiconductor device in which p-type photovoltaic elements are multiplexed, p-type or ni-interface of the wide band gap layer
A grating layer having a reduced band gap and a narrower band gap is provided from the layer to the i-layer or from the n-layer to the i-layer, and the transparent electrode is in contact with the wide band gap impurity layer in contact with the transparent electrode. p
A non-single-crystal silicon-based semiconductor, wherein a high-concentration impurity layer having the same conductivity type as the impurity layer and a high impurity concentration and having a thickness of 10 to 40 ° is provided between the n-type impurity layer and the n-type impurity layer. apparatus.
不純物ドープ層の不純物濃度の10から50倍である特許請
求の範囲第１項に記載の半導体装置。2. The semiconductor device according to claim 1, wherein the impurity concentration of said high-concentration impurity layer is 10 to 50 times the impurity concentration of said impurity-doped layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62080113A JP2634812B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62080113A JP2634812B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63244889A JPS63244889A (en) | 1988-10-12 |
| JP2634812B2 true JP2634812B2 (en) | 1997-07-30 |
Family
ID=13709131
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62080113A Expired - Lifetime JP2634812B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2634812B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4419273C2 (en) * | 1994-06-01 | 1998-11-26 | Forschungszentrum Juelich Gmbh | Thin film solar cell |
| JP3437386B2 (en) * | 1996-09-05 | 2003-08-18 | キヤノン株式会社 | Photovoltaic element and manufacturing method thereof |
| TWI483406B (en) * | 2010-05-18 | 2015-05-01 | Au Optronics Corp | Photovoltaic cell |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3032158A1 (en) * | 1979-08-30 | 1981-04-02 | Plessey Overseas Ltd., Ilford, Essex | SOLAR CELL |
| JPS56150876A (en) * | 1980-04-24 | 1981-11-21 | Sanyo Electric Co Ltd | Photovoltaic device |
| JPS58106876A (en) * | 1981-12-19 | 1983-06-25 | Tokyo Denki Daigaku | Photoelectric transducer |
| JPS58171869A (en) * | 1982-04-02 | 1983-10-08 | Sanyo Electric Co Ltd | Photovoltaic device |
| JPS59163876A (en) * | 1983-03-08 | 1984-09-14 | Agency Of Ind Science & Technol | Amorphous silicon solar cell |
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1987
- 1987-03-31 JP JP62080113A patent/JP2634812B2/en not_active Expired - Lifetime
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| Publication number | Publication date |
|---|---|
| JPS63244889A (en) | 1988-10-12 |
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