JP2634811B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2634811B2 JP2634811B2 JP62080112A JP8011287A JP2634811B2 JP 2634811 B2 JP2634811 B2 JP 2634811B2 JP 62080112 A JP62080112 A JP 62080112A JP 8011287 A JP8011287 A JP 8011287A JP 2634811 B2 JP2634811 B2 JP 2634811B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity
- impurity layer
- concentration
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/545—Microcrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Description
【発明の詳細な説明】 [産業上の利用分野] この発明は、半導体装置に関し、特に光電変換を行う
半導体装置に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device that performs photoelectric conversion.
[従来の技術] 第3図は、受光面側に、a−SiC:Hのように、バンド
ギャップの広い半導体層を用いたp−i−n型非晶質半
導体太陽電池を示していて、ここで図示したように、バ
ンドギャップの広いp型半導体層(4)とi型半導体層
(6)との間に、バンドギャップ及び不純物濃度がi型
半導体層(6)に向かって段階的に減少しているような
いわゆるグレーティドギャップ層(5)を設けることに
より、太陽電池の光電変換効率が向上することは一般に
よく知られている。[Prior Art] FIG. 3 shows a pin type amorphous semiconductor solar cell using a semiconductor layer having a wide band gap, such as a-SiC: H, on the light receiving surface side. As shown here, between the p-type semiconductor layer (4) having a wide band gap and the i-type semiconductor layer (6), the band gap and the impurity concentration gradually increase toward the i-type semiconductor layer (6). It is generally well-known that the provision of a so-called reduced gap layer (5), which decreases, improves the photoelectric conversion efficiency of a solar cell.
ところで、本発明者は実験により、上記構造の太陽電
池においては、バンドギャップの広いp型半導体層
(4)の不純物濃度を通常の1/5ないし1/10程度にまで
減少することにより、蛍光灯下のような低い照度の光源
のもとで光電変換効率を改善できるということを見い出
した。By the way, the present inventor has shown by experiments that in the solar cell having the above structure, the impurity concentration of the p-type semiconductor layer (4) having a wide band gap is reduced to about 1/5 to 1/10 of the usual value, thereby achieving the fluorescence. It has been found that the photoelectric conversion efficiency can be improved under a light source of low illuminance such as under a lamp.
[発明が解決しようとする問題点] ところが、太陽光のように高い照度のもとでは、透明
電極(2)と、この不純物層であるp型半導体層(4)
との間の接触抵抗が著しく大きくなるため、逆に光電変
換効率は低下してしまうという問題が生じた。[Problems to be Solved by the Invention] However, under high illuminance such as sunlight, the transparent electrode (2) and the p-type semiconductor layer (4) which is an impurity layer thereof are used.
, The contact resistance between them significantly increases, and conversely, the photoelectric conversion efficiency decreases.
この発明は、上記問題を解決するためになされたもの
であり、高照度のもとでも光電変換効率の低下すること
のない半導体装置を提供することを目的とする。The present invention has been made to solve the above problem, and has as its object to provide a semiconductor device in which the photoelectric conversion efficiency does not decrease even under high illuminance.
[問題点を解決するための手段] この発明の半導体装置は、透明導電膜,ギャップの広
い第1不純物層,晶質のi型半導体層,前記第1不純物
層と逆の導電型の第2不純物層及び裏面電極を少なくと
も各1層を有し、上記第1不純物層とi型半導体層との
間に、バンドギャップ及び不純物濃度が該i型半導体層
に向かって減少している層を有する半導体装置におい
て、上記透明導電膜と第1不純物層との間に、該第1不
純物層と同じ導電型であって該第1不純物層に比べ不純
物濃度が10から50倍の高濃度不純物層を備えている。[Means for Solving the Problems] The semiconductor device of the present invention comprises a transparent conductive film, a first impurity layer having a wide gap, a crystalline i-type semiconductor layer, and a second impurity layer having a conductivity type opposite to that of the first impurity layer. An impurity layer and a back electrode each having at least one layer, and a layer having a band gap and an impurity concentration decreasing toward the i-type semiconductor layer between the first impurity layer and the i-type semiconductor layer; In the semiconductor device, a high-concentration impurity layer having the same conductivity type as that of the first impurity layer and having an impurity concentration of 10 to 50 times that of the first impurity layer is provided between the transparent conductive film and the first impurity layer. Have.
[作用] 上記のごとく、透明導電膜と第1不純物層との間に、
該第1不純物層と同じ導電型であって該第1不純物層に
比べ不純物の濃度が大幅に高い高濃度不純物層を設けた
ので、第1不純物層とi型半導体層との間に、バンドギ
ャップ及び不純物濃度が該i型半導体層に向かって減少
するような層を設けても、第1不純物層と透明導電膜と
における接触抵抗が過大にならず、その結果、高照度で
の光電変換効率が向上するようになる。[Operation] As described above, between the transparent conductive film and the first impurity layer,
Since a high-concentration impurity layer having the same conductivity type as that of the first impurity layer and having a significantly higher impurity concentration than the first impurity layer is provided, a band is provided between the first impurity layer and the i-type semiconductor layer. Even if a layer in which the gap and the impurity concentration decrease toward the i-type semiconductor layer is provided, the contact resistance between the first impurity layer and the transparent conductive film does not become excessive, and as a result, photoelectric conversion at high illuminance The efficiency will be improved.
[実施例] この発明の半導体装置においては、第1不純物層と透
明導電膜との間に不純物濃度が第1不純物層の不純物の
濃度よりも大幅に高い層が設けられる。第1不純物層と
しては、a−Si:Hや、より好ましくは、a−SiC:H等に
p型用ドーパントとして周期律表III b族の元素をドー
プしたものであるいはn型用ドーパントとして周期律表
V b族の元素をドープしたもの等から形成され、その厚
さは、80ないし300Åである。そして、高濃度の不純物
層のドーパント濃度は、第1不純物層の不純物濃度の10
倍から50倍で、第1不純物の不純物濃度に比較して大幅
にドーパント濃度が高く、厚さは、10ないし300Å好ま
しくは30ないし150Åであり、更に好ましくは30ないし1
00Åである。Embodiment In the semiconductor device of the present invention, a layer whose impurity concentration is significantly higher than that of the first impurity layer is provided between the first impurity layer and the transparent conductive film. As the first impurity layer, a-Si: H or, more preferably, a-SiC: H or the like obtained by doping a group IIIb element of the periodic table as a p-type dopant or a periodic material as an n-type dopant is used. Law table
It is formed of a material doped with a Vb group element or the like, and has a thickness of 80 to 300 °. The dopant concentration of the high concentration impurity layer is 10% of the impurity concentration of the first impurity layer.
2 times to 50 times, the dopant concentration of the first impurity is significantly higher than that of the first impurity, and the thickness is 10 to 300 °, preferably 30 to 150 °, more preferably 30 to 1 °.
00Å.
又、上記第1不純物層と非晶質のi型半導体層との間
には、該i型半導体層に向かってバンドギャップ及び不
純物濃度が段階的に減少する層が設けられているが、こ
の層の厚さは、30ないし500Åであり、好ましくは500な
いし200Åであり、i型半導体層としては、a−Si:H,a
−Ge:H,a−S:F:H,a−S:N:H,a−S:Sn:Hやそれらにホウ素
やH2を微量ドープしたもの等から形成され、厚さは2500
ないし9000Å程度の層である。Further, between the first impurity layer and the amorphous i-type semiconductor layer, there is provided a layer whose band gap and impurity concentration gradually decrease toward the i-type semiconductor layer. The thickness of the layer is 30 to 500 °, preferably 500 to 200 °, and as the i-type semiconductor layer, a-Si: H, a
-Ge: H, a-S: F: H, a-S: N: H, a-S: Sn: H and them boron or H 2 formed from such those lightly doped, the thickness 2500
Or about 9000Å.
又、第2不純物層としては、例えばa−Si:Hやa−μ
CSi:H等に第1不純物層と逆の導電性を示すように不純
物をドープしており、その厚さは80ないし300Åであ
る。尚、上記の各層の厚さは上記の数値に限定されるも
のではない。As the second impurity layer, for example, a-Si: H or a-μ
CSi: H or the like is doped with an impurity so as to exhibit conductivity opposite to that of the first impurity layer, and its thickness is 80 to 300 °. The thickness of each layer is not limited to the above values.
以下に、この発明の半導体装置の1実施例として第1
図に示した太陽電池によりその構成を説明する。Hereinafter, a first embodiment of the semiconductor device of the present invention will be described.
The configuration will be described with reference to the solar cell shown in the figure.
ガラス基板(1)上に、透明電極(2)としてSnO2を
スパッタ法により5000Åの厚さに蒸着した。次にこの透
明電極(2)上に、高濃度p型半導体層(3)として、
プラズマCVD法により高濃度のp型SiC:H膜を100Åの厚
さに堆積させた。このときの原料ガスとしては、SiH4,C
H4及びB2H6/H2(B2H6濃度は1000ppm)の3種類を用い、
この3つのガスのガス流量をそれぞれ10SCCM,30SCCM,30
0SCCMとした。On a glass substrate (1), SnO 2 was deposited as a transparent electrode (2) to a thickness of 5000 ° by a sputtering method. Next, on this transparent electrode (2), as a high concentration p-type semiconductor layer (3),
A high-concentration p-type SiC: H film was deposited to a thickness of 100 ° by a plasma CVD method. The source gas at this time is SiH 4 , C
H 4 and B 2 H 6 / H 2 ( B 2 H 6 concentration 1000 ppm) using three kinds of,
The gas flow rates of these three gases are 10 SCCM, 30 SCCM, 30
It was set to 0SCCM.
次に、B2H6/H2のガス流量を30SCCMとし、他のガス流
量は変化させずに、第1不純物層として、SiC:H膜を100
Åの厚さに堆積し、p型半導体層(4)を形成した。そ
して、今度はCH4及びB2H6/H2のガス流量を次第に減少さ
せながら100Åの厚さのグレーティドギャップ層(5)
を堆積した。このグレーティドギャップ層(5)の堆積
終了時にはCH4及びB2H6/H2のガス流量は0となるように
した。Next, the gas flow rate of B 2 H 6 / H 2 was set to 30 SCCM, and the other gas flow rates were not changed.
P to form a p-type semiconductor layer (4). Then, while gradually reducing the gas flow rate of CH 4 and B 2 H 6 / H 2 , a graded gap layer having a thickness of 100 mm (5)
Was deposited. At the end of the deposition of the graded gap layer (5), the gas flow rates of CH 4 and B 2 H 6 / H 2 were set to 0.
続いて、i型半導体層(6)として、SiH4をグロー放
電して、a−Si:H層を5000Åの厚さに堆積し、更に、第
2不純物層であるn型半導体層(7)として、SiH4,PH3
/H2(PH3濃度は1000ppm)の混合ガスをグロー放電して
分解し、a−Si:H層を300Åの厚さに堆積させた後、裏
面の電極(8)として、真空蒸着法によりAgを1000Åの
厚さに真空蒸着して面積が1cm2の太陽電池を作成した。Subsequently, as an i-type semiconductor layer (6), SiH 4 is glow-discharged to deposit an a-Si: H layer to a thickness of 5000 °, and further, an n-type semiconductor layer (7) as a second impurity layer. As SiH 4 , PH 3
/ H 2 (PH 3 concentration is 1000ppm) gas mixture is decomposed by glow discharge, and a-Si: H layer is deposited to a thickness of 300mm. Ag was vacuum deposited to a thickness of 1000 mm to produce a solar cell having an area of 1 cm 2 .
尚、比較のために、上記高濃度p型半導体層(3)を
堆積しないで、p型半導体層(4)を200Å,グレーテ
ィドバンドギャップ層を100Åに堆積した従来の太陽電
池を作成した。For comparison, a conventional solar cell was prepared in which the p-type semiconductor layer (4) was deposited at 200 ° and the graded band gap layer was deposited at 100 ° without depositing the high-concentration p-type semiconductor layer (3).
第2図は、ソーラーシュミレーターを用い100mW/cm2
下における上記実施例の太陽電池と比較例の太陽電池と
のV−I特性結果を示している。この図よりわかるよう
に、従来例の太陽電池の曲線要因がおよそ55%であるの
に対し、実施例による太陽電池のそれはおよそ70%あ
り、従来例と比較して実施例による太陽電池は、高照度
で電圧及び電流に高出力が得られた。FIG. 2 shows a 100 mW / cm 2 using a solar simulator.
The VI characteristic results of the solar cell of the above example and the solar cell of the comparative example are shown below. As can be seen from this figure, the curve factor of the conventional solar cell is about 55%, while that of the solar cell according to the example is about 70%. High output was obtained for voltage and current at high illuminance.
[発明の効果] 以上説明したように、この発明は、透明導電膜と第1
不純物層との間に、該第1不純物層と同じ導電型であっ
て該第1不純物層に比べ不純物濃度が大幅に高い層を設
けたので、バンドギャップが狭くなって第1不純物層と
透明導電膜との界面のエネルギ障壁が取り除かれ、第1
不純物層とi型半導体層との間に、バンドギャップ及び
不純物濃度が該i型半導体層に向かって減少するような
層を設けても、第1不純物層と透明導電膜とにおける接
触抵抗を抑えることができ、高照度での光電変換効率が
向上する。[Effects of the Invention] As described above, the present invention provides a transparent conductive film and a first conductive film.
A layer having the same conductivity type as that of the first impurity layer and having a significantly higher impurity concentration than the first impurity layer is provided between the first impurity layer and the impurity layer. The energy barrier at the interface with the conductive film is removed, and the first
Even if a layer whose band gap and impurity concentration decrease toward the i-type semiconductor layer is provided between the impurity layer and the i-type semiconductor layer, the contact resistance between the first impurity layer and the transparent conductive film is suppressed. And the photoelectric conversion efficiency at high illuminance is improved.
【図面の簡単な説明】 第1図はこの発明の半導体装置による作成した太陽電池
の1実施例を示す構成図、 第2図は第1図の太陽電池のV−I出力の実測特性図、 第3図は従来の太陽電池の構成図である。 1……ガラス基板、2……透明電極、3……高濃度p型
半導体層、4……p型半導体層、5……グレーティドギ
ャップ層、6……i型半導体層、7……n型半導体層、
8……裏面電極。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing one embodiment of a solar cell produced by the semiconductor device of the present invention, FIG. 2 is a measured characteristic diagram of VI output of the solar cell of FIG. 1, FIG. 3 is a configuration diagram of a conventional solar cell. DESCRIPTION OF SYMBOLS 1 ... Glass substrate, 2 ... Transparent electrode, 3 ... High-concentration p-type semiconductor layer, 4 ... P-type semiconductor layer, 5 ... Grated gap layer, 6 ... i-type semiconductor layer, 7 ... n Type semiconductor layer,
8 Back electrode.
フロントページの続き (72)発明者 太和田 善久 神戸市北区大池見山台14番39号 (56)参考文献 特開 昭56−64476(JP,A) 特開 昭59−163876(JP,A) 特開 昭56−150876(JP,A) 特開 昭58−106876(JP,A)Continuation of the front page (72) Inventor Yoshihisa Owada 14-39 Oikemiyamadai, Kita-ku, Kobe (56) References JP-A-56-64476 (JP, A) JP-A-59-163876 (JP, A) JP-A-56-150876 (JP, A) JP-A-58-106876 (JP, A)
Claims (3)
層,非晶質のi型半導体層,前記第1不純物層と逆の導
電型の第2不純物層及び裏面電極を少なくとも各1層を
有する半導体装置において、上記第1不純物層とi型半
導体層との間に、第1不純物層からi型半導体層に向か
って不純物濃度を減少させるとともにバンドギャップを
狭くしたグレーティング層を設けるとともに、 上記透明導電膜と第1不純物層との間に、該第1不純物
層と同じ導電型であって該第1不純物層に比べ不純物濃
度が10から50倍の高濃度不純物層を設けたことを特徴と
する半導体装置。At least one of a transparent conductive film, a first impurity layer having a wide gap, an amorphous i-type semiconductor layer, a second impurity layer having a conductivity type opposite to that of the first impurity layer, and a back electrode is provided. A semiconductor device having a grating layer between the first impurity layer and the i-type semiconductor layer, the grating layer having a reduced impurity concentration and a narrower band gap from the first impurity layer toward the i-type semiconductor layer; A high-concentration impurity layer having the same conductivity type as the first impurity layer and having an impurity concentration of 10 to 50 times that of the first impurity layer is provided between the transparent conductive film and the first impurity layer. Semiconductor device.
許請求の範囲第1項に記載の半導体装置。2. The semiconductor device according to claim 1, wherein said first impurity layer is a-SiC: H.
である特許請求の範囲第1項または第2項に記載の半導
体装置。3. The high-concentration impurity layer has a thickness of 10 to 300 mm.
The semiconductor device according to claim 1 or 2, wherein
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62080112A JP2634811B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62080112A JP2634811B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63244888A JPS63244888A (en) | 1988-10-12 |
JP2634811B2 true JP2634811B2 (en) | 1997-07-30 |
Family
ID=13709102
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62080112A Expired - Lifetime JP2634811B2 (en) | 1987-03-31 | 1987-03-31 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2634811B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4419273C2 (en) * | 1994-06-01 | 1998-11-26 | Forschungszentrum Juelich Gmbh | Thin film solar cell |
EP0886325A1 (en) * | 1997-06-18 | 1998-12-23 | Rijksuniversiteit Utrecht | Amorphous silicon photovoltaic devices and method of making thereof |
US20110232753A1 (en) * | 2010-03-23 | 2011-09-29 | Applied Materials, Inc. | Methods of forming a thin-film solar energy device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3032158A1 (en) * | 1979-08-30 | 1981-04-02 | Plessey Overseas Ltd., Ilford, Essex | SOLAR CELL |
JPS56150876A (en) * | 1980-04-24 | 1981-11-21 | Sanyo Electric Co Ltd | Photovoltaic device |
JPS58106876A (en) * | 1981-12-19 | 1983-06-25 | Tokyo Denki Daigaku | Photoelectric transducer |
JPS59163876A (en) * | 1983-03-08 | 1984-09-14 | Agency Of Ind Science & Technol | Amorphous silicon solar cell |
-
1987
- 1987-03-31 JP JP62080112A patent/JP2634811B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS63244888A (en) | 1988-10-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2740284B2 (en) | Photovoltaic element | |
EP0309000B1 (en) | Amorphous semiconductor and amorphous silicon photovoltaic device | |
US5032884A (en) | Semiconductor pin device with interlayer or dopant gradient | |
KR910001742B1 (en) | Photo electromotive force device | |
JP2005101151A (en) | Photovoltaic element and its manufacturing method | |
US4398054A (en) | Compensated amorphous silicon solar cell incorporating an insulating layer | |
JPH065766B2 (en) | Photovoltaic device and manufacturing method thereof | |
JP2001189478A (en) | Semiconductor element and manufacturing method therefor | |
US4396793A (en) | Compensated amorphous silicon solar cell | |
JPH11112011A (en) | Manufacture of photovolatic element | |
JP3702240B2 (en) | Semiconductor device and manufacturing method thereof | |
JP2719036B2 (en) | Amorphous photoelectric conversion device and method of manufacturing the same | |
JP2634811B2 (en) | Semiconductor device | |
JP2735862B2 (en) | Photovoltaic element | |
JP2680579B2 (en) | Photovoltaic device | |
JP4070648B2 (en) | Photovoltaic element | |
JP2634812B2 (en) | Semiconductor device | |
JP2632740B2 (en) | Amorphous semiconductor solar cell | |
JPH0312973A (en) | Amorphous thin film solar cell | |
JP2020505786A (en) | Single-type, tandem-type, and heterojunction-type solar cell devices and methods for forming the same | |
JP4124309B2 (en) | Photovoltaic device manufacturing method | |
JPS6152992B2 (en) | ||
JP2545066B2 (en) | Semiconductor device | |
JP3291435B2 (en) | Photovoltaic element | |
JP3474891B2 (en) | Method for manufacturing photovoltaic device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
EXPY | Cancellation because of completion of term |