JPS58171869A - Photovoltaic device - Google Patents
Photovoltaic deviceInfo
- Publication number
- JPS58171869A JPS58171869A JP57055643A JP5564382A JPS58171869A JP S58171869 A JPS58171869 A JP S58171869A JP 57055643 A JP57055643 A JP 57055643A JP 5564382 A JP5564382 A JP 5564382A JP S58171869 A JPS58171869 A JP S58171869A
- Authority
- JP
- Japan
- Prior art keywords
- power generation
- layer
- light incidence
- optical energy
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010248 power generation Methods 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 17
- 230000003287 optical effect Effects 0.000 claims abstract description 12
- 239000013078 crystal Substances 0.000 claims description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 claims 3
- 229910000681 Silicon-tin Inorganic materials 0.000 claims 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims 1
- LQJIDIOGYJAQMF-UHFFFAOYSA-N lambda2-silanylidenetin Chemical compound [Si].[Sn] LQJIDIOGYJAQMF-UHFFFAOYSA-N 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 239000010409 thin film Substances 0.000 abstract description 9
- 239000000758 substrate Substances 0.000 description 9
- 239000000203 mixture Substances 0.000 description 8
- 239000010408 film Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 239000012495 reaction gas Substances 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 241000272201 Columbiformes Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
- H01L31/076—Multiple junction or tandem solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Landscapes
- Engineering & Computer Science (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は非晶質半導体を用いた光起電力装置に関し、特
にその電力変換効率の向上を図ったものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photovoltaic device using an amorphous semiconductor, and is particularly aimed at improving the power conversion efficiency thereof.
第１図は本発明実施例としての光起電力装置を示し、該
装置は、ガラスなどからなる透明絶縁基板（７）上に膜
状に形成された第１．第２、第３の各発電区域（８）、
（９）、ＩＩを有している。各発電区域は半導体薄膜Ｉ
と該膜を挾んで対向する第１・、第２電極（至）、（至
）から構成されている。FIG. 1 shows a photovoltaic device as an embodiment of the present invention. Second and third power generation areas (8),
(9), has II. Each power generation area is a semiconductor thin film I
and first and second electrodes (to), which face each other with the membrane in between.
第１電極（至）は可視光透過性を有し、酸化錫、酸化イ
ンジウム、酸化インジウム・錫（Ｉｎ２０Ｂ ＋襲ｎ０
２、Ｘ≦ＣＬ１）などで、構成することができ、第２電
極Ｉはアルミニウム、クロムなどで構成される。The first electrode (to) has visible light transparency and is made of tin oxide, indium oxide, indium tin oxide (In20B + n0
2, X≦CL1), and the second electrode I is made of aluminum, chromium, or the like.
第１〜第３発電区域（８）〜罎の夫々の第１電極（２）
及び第２電極（至）は基板（７）上に−Ｊｌいて夫々の
発電区域の外へ延びる延長部α−及び−を有し、第１発
電区Ｒ（８）の第２電極α３の延長部（至）と第２発電
区域（９）の第１電極（至）の延長−〇祷とが、又第２
発電区第（９）の第２電極（至）の延長部（至）と第３
発電区域α・の第１電極（２）の延長部α−とが夫々互
いに重畳して型部的に接続されている。又第１発電区＃
（８）の第１電極（至）の延長部α−には外部リード
線接続のために第２電極Ｉと同材料からなる接続部（至
）が重畳被着されている。The first electrode (2) of each of the first to third power generation areas (8) to
and the second electrode (to) has extensions α- and - on the substrate (7) extending outside the respective power generation areas, and is an extension of the second electrode α3 of the first power generation area R(8). (to) and the extension of the first electrode (to) of the second power generation area (9) are also connected to the second electrode (to).
The extension part (to) of the second electrode (to) of the power generation section (9) and the third
The extension portions α- of the first electrodes (2) of the power generation areas α· are overlapped with each other and connected in a molded manner. Also, the 1st power generation area#
(8) A connecting part (toward) made of the same material as the second electrode I is superimposed on the extension part α- of the first electrode (towards) for connection to an external lead wire.
上記装置の装造に際しては、その第１工程で基板（７）
上に延長部１番を含んだ第１電極＠の各々が選択エツチ
ング手法又は選択スパッタ付着手法により形成され、第
２工程で＄１〜１〜第３区域に連続して半導体薄膜α力
が形成される。このとき、該層は上記延長部α転（１５
に存在してはならないので、基板（７）上全面に半導体
薄膜を形成した後、選択エツチング手法により不要部を
除去するか、あるいは不要部を覆うマスクを用いること
Ｋより所望部のみに半導体薄膜が形成される。続く最終
工程において延長部（至）を含む第２電極（至）及び接
続部（至）が選択蒸着手法などにより形成される。When assembling the above device, the first step is to install the substrate (7).
Each of the first electrodes including the extension part No. 1 thereon is formed by a selective etching method or a selective sputter deposition method, and in a second step, a semiconductor thin film α is continuously formed in the regions $1 to 1 to the third region. be done. At this time, the layer is the extension part α-transformed (15
Therefore, after forming a semiconductor thin film on the entire surface of the substrate (7), remove unnecessary parts by selective etching or use a mask to cover unnecessary parts. is formed. In the subsequent final step, the second electrode (to) including the extension part (to) and the connection part (to) are formed by selective vapor deposition or the like.
上記装置において、基板（７）及び第１電極αりを介し
て光が半導体薄膜（ｌυに入ると、該膜内で自由キャリ
ア（電子及び又は正孔）が生じ、それらが第１、第２電
極ｕり、α３に移動することにより、第１〜第３発電区
域（８）〜０Ｉの夫々において起電力が生じる。各区域
の第１、第２電極α２、（ｌはその延長部において交互
に接続されているので各区域の起電圧は直列的虻相加さ
れ、第１発電区斌ｔ８１に連なる接続部αｅを十極、第
５発電区滅αＧの第２電極０３に連なる延長部（至）を
−極として両極の間に上記の如く相加された電圧が発生
する。In the above device, when light enters the semiconductor thin film (lυ) through the substrate (7) and the first electrode, free carriers (electrons and/or holes) are generated within the film, and these are transferred to the first and second electrodes. Electromotive force is generated in each of the first to third power generation areas (8) to 0I by moving the electrodes α3 and α3.The first and second electrodes α2 and (l of each area are alternately Since the electromotive force in each area is added in series, the connection part αe connected to the first power generation section T81 is connected to the ten poles, and the extension part connected to the second electrode 03 of the fifth power generation section αG ( ) is the negative pole, and an added voltage is generated between the two poles as described above.
本発明の特徴として、上記半導体薄膜αυは光入射方向
に光入射側より順次積層された非晶質半導体からなる第
１及び第２発電層（１１ａ）、（１１ｂ）からなり、各
発電層の光学的禁止帯幅ｍｏｐは光入射側より順次小さ
くなる値を有し、更に上・記各発電層は工型層を含み、
第１及び第２発電鳩の各工型層の厚みは夫々、５００〜
３０００ム、３０００〜１００００λである。As a feature of the present invention, the semiconductor thin film αυ is composed of first and second power generation layers (11a) and (11b) made of amorphous semiconductors which are laminated sequentially from the light incidence side in the light incidence direction, and each power generation layer is The optical forbidden band width mop has a value that becomes smaller sequentially from the light incidence side, and each of the above-mentioned power generation layers includes a mold layer,
The thickness of each mold layer of the first and second power generation pigeons is 500~
3,000 μm and 3,000 to 10,000 λ.
本実施例における第１、第２発電層（１１１Ｌ）、（１
ｌｂ）のより具体的な構成は下表の通りである。The first and second power generation layers (111L), (1
The more specific structure of lb) is shown in the table below.
以斗゛、二゛Ｓ白
即ち、各発電層において主に発電作用の行なわれるのは
夫々の゛Ｉ全型層あるが、上記の如く、光入射側より順
次積層されている＠’ｉＩ型層（工１）及び第２工型層
（工２）の夫々の光学的禁止帯幅ＥＯｐ は１．８５・
ｖ、 １．６５ ｅｖと順に小さくなっているのである
。In other words, in each power generation layer, power generation is mainly performed in the respective I type layers, but as mentioned above, the @'i I type layers are laminated sequentially from the light incident side. The optical forbidden band width EOp of each of the layer (Step 1) and the second die layer (Step 2) is 1.85.
v, 1.65 ev, and so on.
半導体発電現象において、発電に寄与する入射光波長、
即ち吸収波長は発電領域の光学的禁止帯幅に依存する。In the semiconductor power generation phenomenon, the incident light wavelength that contributes to power generation,
That is, the absorption wavelength depends on the optical band gap of the power generation region.
第２図は本実施例における第１、第２発電層（１１ａ゛
）、（１１ｂ）の夫々の相対感度特性（２０ａ）、（２
０ｂ）を示している。FIG. 2 shows the relative sensitivity characteristics (20a) and (2
0b).
発電素子がもし一つの光学的禁止帯幅しか持っておらず
、斯る素子に太陽光などが入射したとすると、その光学
的禁止帯幅に応じた一部の波長の晃しか発電に寄与せず
、それより短い波長の入射光エネルギは素子内で熱とな
って消散し、又長い波長の入射光エネルギは素子内で吸
収されることなく散逸する。If a power generation element has only one optical bandgap and sunlight, etc. is incident on such an element, only the light of a part of the wavelength corresponding to the optical bandgap will contribute to power generation. First, incident light energy with a shorter wavelength becomes heat and dissipates within the element, and incident light energy with a longer wavelength is dissipated within the element without being absorbed.
これに対し、本実施例では第２図から明らかな如く、素
子全体として見れば複数の光学的禁止帯幅が存在し、し
かも光入射側から順次それが小さくなる配置゛であるの
で、入射光エネルギは、その短波長側のものが素子の比
較的浅い領域で有効に発電に寄与すると共に、長波長側
のものが素子の浅い領域で吸収されることなく素子の比
較的深い領域Ｋまで進んでそこで有効に発電に寄与する
結果素子全体として大きな発電効率が得られる。On the other hand, in this embodiment, as is clear from FIG. 2, there are multiple optical forbidden band widths when looking at the element as a whole, and the arrangement is such that the optical band gaps become smaller sequentially from the light incident side. The energy on the short wavelength side effectively contributes to power generation in a relatively shallow region of the element, and the energy on the long wavelength side is not absorbed in the shallow region of the element and travels to a relatively deep region K of the element. As a result, the device effectively contributes to power generation, resulting in a high power generation efficiency for the entire device.
又、各工型層の膜厚を上記の数値範ＨＫ設定しておくこ
とにより、各発電層で有効に電力変換される光エネルギ
の他の発電層での吸収割り合いがより少なくなる。Furthermore, by setting the film thickness of each mold layer within the above numerical range HK, the proportion of light energy that is effectively converted into power in each power generation layer is absorbed by other power generation layers is reduced.
又、上記光起電力装置より効率よぐ電流を取り出すため
には、電流の連続性の鑑点から、各発電層での光入射に
よる自由キャリアの発生量をほり等しくすることが必要
であるが、斯る要求は上記各工型層の膜厚を上記の数値
範囲に設定することによりほり達成される。尚この場合
、第１及び第２工型層（工１）、（工２）の各膜厚Ｔ１
、Ｔ２はＴ、＜Ｔ２となるのが好ましい。In addition, in order to extract efficient current from the photovoltaic device, it is necessary to equalize the amount of free carriers generated by light incidence in each power generation layer from the viewpoint of continuity of current. This requirement can be achieved by setting the film thickness of each mold layer within the numerical range described above. In this case, each film thickness T1 of the first and second mold layers (Step 1) and (Step 2)
, T2 are preferably T<T2.
単結晶材料を用いて、本実施例の如き異なる光学的禁止
帯幅の発電層を複数積層しようとすれば、各発電層間の
結晶格子の不整合問題と、更に、隣接する発電層の間に
１第１図に見られる、第１Ｎ型層（Ｎ１）と第２Ｐ型層
（Ｐ２）の間の如き逆方向の整流接合が発生することか
゛ら、その実現は困鐘である。If a single crystal material is used to laminate multiple power generation layers with different optical band gaps as in this example, there will be problems of crystal lattice mismatch between each power generation layer and problems between adjacent power generation layers. 1. It is difficult to realize this because a rectifying junction in the opposite direction occurs, such as between the first N-type layer (N1) and the second P-type layer (P2) shown in FIG.
しかし乍ら、本実施例の様に非晶質半導体材料を用いる
場合、−ｈ記の如き結晶格子不整合は全く生じず、かつ
、非晶質半導体は極めて薄い膜厚に形成できるので、上
記の如き逆方向整流接合の発生し得る部分の膜厚を実施
例の様に１＃常に薄くしておくことＫより、トンネル電
流が流れてその部分の接合はほとんど実質的な整流接合
とならないのである。However, when an amorphous semiconductor material is used as in this example, the crystal lattice mismatch as described in -h does not occur at all, and the amorphous semiconductor can be formed to an extremely thin film thickness. By always keeping the thickness of the film at the part where a reverse rectifying junction may occur, such as 1#, as in the example, a tunnel current flows and the junction in that part hardly becomes a substantial rectifying junction. be.
上記半導体薄膜αυの製造は、例えば第１電極αのまで
作成済みの基板（７）を反応室に入れ、斯る反応室に適
宜反応ガスを満してグロー放電を生起せしめるととＫよ
り行なわれる。各発電層（１１ａ）、（１１ｂ）の組成
は夫々異なるので、積層順に反応ガスが切替えられるこ
とはもちろんである。下表に、各層に対する反応ガスの
組成を示す。尚基板（７１の温度は、第２工型層（工り
を除（、全ての層形成時、２５０℃に保たれ、第２ｘ型
層（工２） Ｋ対しては３００℃に保たれる。The production of the semiconductor thin film αυ is carried out, for example, by placing the substrate (7), which has already been formed up to the first electrode α, into a reaction chamber, and filling the reaction chamber with an appropriate reaction gas to generate a glow discharge. It will be done. Since the compositions of the power generation layers (11a) and (11b) are different from each other, it goes without saying that the reactive gases can be switched in the order of stacking. The table below shows the composition of the reactive gas for each layer. The temperature of the substrate (71) was kept at 250°C during the formation of all layers except for the second mold layer (processing), and at 300°C for the second x-type layer (process 2). .
以↑゛全白
尚反応ガスにはその他キャリアガスとしてのＨ２ガスが
含まれている。The reaction gas also contains H2 gas as a carrier gas.
他の実施例として、第２ｘ型層（工２）の組成を変えた
場合の各発電層の構成、製造時の反応ガス組成を下表に
示し、このときの第１、第２発電層（１１ａ）、（１１
ｂ）の夫々の相対感度特性（３０ａ）、（３０ｂ階第３
図に示す。As another example, the composition of each power generation layer when the composition of the second 11a), (11
b) Respective relative sensitivity characteristics (30a), (30b floor 3rd
As shown in the figure.
以下余白 尚基板温度は全ての層形成時、２５０℃に保たれる。Margin below Note that the substrate temperature is maintained at 250° C. during the formation of all layers.
更に他の実施例として第２工型層（工２）の組成を更に
変えた場合の各発電層の構成、製造時の反応ガス組成を
下表に示す。尚このときの第１、第２発電層（１１ａ）
、（１１ｂ）の夫々の相対感度特性ははり第′３図のも
のく等しい。As another example, the composition of each power generation layer and the reaction gas composition during manufacture are shown in the table below, in which the composition of the second mold layer (Step 2) is further changed. In addition, the first and second power generation layers (11a) at this time
, (11b) are exactly the same as those shown in Figure '3.
この実施例の場合も基板温度は全て２５０ｔである。In this example as well, the substrate temperature is 250 t in all cases.
向上記各実施例において、工型層形成の際の反応ガス組
成は、次の範囲に設定されてよい。In each of the above embodiments, the reaction gas composition during forming the mold layer may be set within the following range.
第１Ｉｇ層（工１ ） ＮＨｓ／８１Ｈ４＋１ｉＨ５＊
＊＊ １〜１５９６ｊ１２ ｌｆｆ１ｌｌ （工２）
８ｎＣ１４／８１Ｈ４＋８ｎＣ４４・・１〜２ ａｓ
（又ハＧｌ！ＩＨ４／Ｂ１１ｆ４ ＋（）ｅＨ４” １
〜２０％）更に、上記各発電層のＰ型層及びＮ型層の膜
厚は次の範８に設定されてよい。1st Ig layer (technique 1) NHs/81H4+1iH5*
** 1~1596j12 lff1ll (Engineering 2)
8nC14/81H4+8nC44...1~2 as
(MatahaGl!IH4/B11f4 +()eH4" 1
20%) Furthermore, the thicknesses of the P-type layer and N-type layer of each power generation layer may be set within the following range 8.
第１Ｐ型層（Ｐｌ） ・・・３０〜４００ Ｘ第２Ｐ型
層（Ｐ２）、第１Ｍ型層＜ｙｌ＞−ｓｏ 〜ｚｏｏＸ第
２Ｍ型層（Ｎ２）・・・５０〜１０００ム以上の説明よ
り明らかな如く、本発明によれば、非晶質半導体を用い
た光起電力装置において、非晶質半導体に特有な性質を
利用して積層構造となしたことにより高効率の装置を実
現できる。First P-type layer (Pl)...30-400X Second P-type layer (P2), first M-type layer<yl>-so~zooX Second M-type layer (N2)...50-1000μ or more Description As is clearer, according to the present invention, in a photovoltaic device using an amorphous semiconductor, a highly efficient device can be realized by making use of the unique properties of the amorphous semiconductor to form a laminated structure. .
４、図面の簡単な説明 ゛ −第１図は本発明
実施例を示し、第１図ムは平面図、第１図Ｂ及びＣは夫
々第１図ムのＢ−Ｂ及びＣ−、Ｃ断面図、第１図りは要
部拡大断面図、第２図及び第５図は相対感度特性図であ
る。4. Brief description of the drawings ゛ - Figure 1 shows an embodiment of the present invention, Figure 1 is a plan view, and Figures B and C are B-B, C-, and C cross sections of Figure 1, respectively. Figure 1 is an enlarged sectional view of the main part, and Figures 2 and 5 are relative sensitivity characteristic diagrams.
（７）・・・絶縁基板、（１１）・・・半導体薄膜、（
１１ａ）、（１１ｂ）、（１１ｃ）”＠ １ 、第２、
第５発電層。(7)...Insulating substrate, (11)...Semiconductor thin film, (
11a), (11b), (11c)”@1, 2nd,
Fifth power generation layer.
第２図 第８図 −人七光遁員 （Ａ）Figure 2 Figure 8 - Hitoshichikou Member (A)
Claims (2)
半導体からなる第１、第２発電層を少なくとも備え、該
各発電層の光学的禁止帯幅は光入射側より順次小さくな
る値を有し、更に上記各発電層はＩＷ層を含み、上記第
１、第２発電層の各工型層の厚みは夫々、５００〜３０
００λ、３０００〜１ｏｏｏｏＸであることを特徴とす
る光起電力装置。(1) At least first and second power generation layers made of amorphous semiconductor are laminated sequentially from the light incidence side in the light incidence direction, and the optical band gap of each power generation layer becomes smaller sequentially from the light incidence side. Each of the power generation layers includes an IW layer, and each of the first and second power generation layers has a thickness of 500 to 30
00λ, 3000 to 1ooooX.
電層の工型層は非晶質シリコンナイトライドからなり、
上記第２発電層のｘｔ１１層は非晶質シリコン、非晶質
シリコンゲルマニウム又は卑晶質シリコン錫からなるこ
とを特徴とする光起電力装置。(2) In claim 1, the mold layer of the first power generation layer is made of amorphous silicon nitride,
A photovoltaic device characterized in that the xt11 layer of the second power generation layer is made of amorphous silicon, amorphous silicon germanium, or base crystal silicon tin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57055643A JPS58171869A (en) | 1982-04-02 | 1982-04-02 | Photovoltaic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57055643A JPS58171869A (en) | 1982-04-02 | 1982-04-02 | Photovoltaic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58171869A true JPS58171869A (en) | 1983-10-08 |
Family
ID=13004489
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57055643A Pending JPS58171869A (en) | 1982-04-02 | 1982-04-02 | Photovoltaic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58171869A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60210826A (en) * | 1984-04-03 | 1985-10-23 | Mitsubishi Electric Corp | Solar battery |
| JPS60240168A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
| JPS60240169A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
| JPS60240167A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
| JPS616874A (en) * | 1984-06-20 | 1986-01-13 | Sanyo Electric Co Ltd | Photovoltaic element |
| JPS61104678A (en) * | 1984-10-29 | 1986-05-22 | Mitsubishi Electric Corp | Amorphous solar cell |
| JPS61172380A (en) * | 1985-01-28 | 1986-08-04 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JPS63244889A (en) * | 1987-03-31 | 1988-10-12 | Kanegafuchi Chem Ind Co Ltd | Semiconductor device |
| JPH0529163U (en) * | 1992-08-17 | 1993-04-16 | 鐘淵化学工業株式会社 | Solar cell for watch |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55111180A (en) * | 1979-02-19 | 1980-08-27 | Sharp Corp | Thin-film solar battery of high output voltage |
| JPS55125680A (en) * | 1979-03-20 | 1980-09-27 | Yoshihiro Hamakawa | Photovoltaic element |
| JPS5633889A (en) * | 1979-08-28 | 1981-04-04 | Rca Corp | Amorphous silicon solar battery |
| JPS5713185A (en) * | 1980-06-26 | 1982-01-23 | Asahi Chem Ind Co Ltd | Photoelectrolysis device |
| JPS58170075A (en) * | 1982-03-18 | 1983-10-06 | エナ−ジ−・コンバ−ション・デバイセス・インコ−ポレ−テッド | Photovoltaic device with back surface reflector |
-
1982
- 1982-04-02 JP JP57055643A patent/JPS58171869A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55111180A (en) * | 1979-02-19 | 1980-08-27 | Sharp Corp | Thin-film solar battery of high output voltage |
| JPS55125680A (en) * | 1979-03-20 | 1980-09-27 | Yoshihiro Hamakawa | Photovoltaic element |
| JPS5633889A (en) * | 1979-08-28 | 1981-04-04 | Rca Corp | Amorphous silicon solar battery |
| JPS5713185A (en) * | 1980-06-26 | 1982-01-23 | Asahi Chem Ind Co Ltd | Photoelectrolysis device |
| JPS58170075A (en) * | 1982-03-18 | 1983-10-06 | エナ−ジ−・コンバ−ション・デバイセス・インコ−ポレ−テッド | Photovoltaic device with back surface reflector |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60210826A (en) * | 1984-04-03 | 1985-10-23 | Mitsubishi Electric Corp | Solar battery |
| JPS60240168A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
| JPS60240169A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Manufacture of photoelectric converter |
| JPS60240167A (en) * | 1984-05-15 | 1985-11-29 | Semiconductor Energy Lab Co Ltd | Photoelectric converter |
| JPH0525187B2 (en) * | 1984-05-15 | 1993-04-12 | Handotai Energy Kenkyusho | |
| JPH0525186B2 (en) * | 1984-05-15 | 1993-04-12 | Handotai Energy Kenkyusho | |
| JPS616874A (en) * | 1984-06-20 | 1986-01-13 | Sanyo Electric Co Ltd | Photovoltaic element |
| JPS61104678A (en) * | 1984-10-29 | 1986-05-22 | Mitsubishi Electric Corp | Amorphous solar cell |
| JPS61172380A (en) * | 1985-01-28 | 1986-08-04 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JPS63244889A (en) * | 1987-03-31 | 1988-10-12 | Kanegafuchi Chem Ind Co Ltd | Semiconductor device |
| JPH0529163U (en) * | 1992-08-17 | 1993-04-16 | 鐘淵化学工業株式会社 | Solar cell for watch |
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