JP2624371B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP2624371B2 JP2624371B2 JP2306915A JP30691590A JP2624371B2 JP 2624371 B2 JP2624371 B2 JP 2624371B2 JP 2306915 A JP2306915 A JP 2306915A JP 30691590 A JP30691590 A JP 30691590A JP 2624371 B2 JP2624371 B2 JP 2624371B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- mask
- semiconductor device
- ion implantation
- polysilicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特にイオン注
入用マスク材に関する。Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a mask material for ion implantation.
従来、半導体装置の製造工程における不純物のイオン
注入は、マスクとしてフォトレジスト膜あるいはアルミ
ニウム膜が主に用いられていた。Conventionally, a photoresist film or an aluminum film has been mainly used as a mask for ion implantation of impurities in a semiconductor device manufacturing process.
〔発明が解決しようとする課題〕 上述した従来のアルミニウム膜をマスクとした不純物
のイオン注入方法では、形成されるアルミニウムの膜厚
均一性が悪いため、段差のきつい部分ではアルミニウム
膜の段切れあるいは段部でアルミニウム膜がうすくなる
という現象が生じ、本来イオン注入すべきでない箇所に
不純物が注入され拡散層が形成されてしまうという欠点
があった。[Problems to be Solved by the Invention] In the conventional impurity ion implantation method using an aluminum film as a mask as described above, since the film thickness uniformity of the formed aluminum is poor, the aluminum film is disconnected or formed in a portion where the step is tight. The phenomenon that the aluminum film becomes thinner at the step portion occurs, and there is a defect that the impurity is implanted into a portion that should not be ion-implanted and a diffusion layer is formed.
またフォトレジスト膜のマスクでは、イオン注入時の
チャージアップによりフォトレジスト表面に電荷が蓄積
され、それによる電界により下の絶縁膜が破壊されてし
まうという欠点があった。Further, the mask of the photoresist film has a disadvantage that charges are accumulated on the photoresist surface due to charge-up at the time of ion implantation, and the underlying insulating film is destroyed by an electric field due to the charge accumulation.
このため半導体装置の信頼性及び製造歩留りが低下す
るという問題点があった。Therefore, there has been a problem that the reliability and the manufacturing yield of the semiconductor device are reduced.
本発明の半導体装置の製造方法は、イオン注入時のマ
スクに、ポリシリコン膜とフォトレジスト膜との２層膜
を用いている。イオン注入のマスクにフォトレジスト膜
を用いることによって、マスクの一部が薄くなるという
ことは防止できるが、フォトレジスト膜だけでは、イオ
ン注入時のチャージアップによりフォトレジスト膜下の
絶縁膜が蓄積電荷による電界で破壊されてしまう危険が
ある為、フォトレジスト膜の下には薄いポリシリコン膜
を敷いている。また、イオン注入後は、フォトレジスト
膜は除去するが、ポリシリコン膜は残し、酸化すること
によって絶縁膜の１部として利用するという製造方法と
なっている。In the method of manufacturing a semiconductor device according to the present invention, a two-layer film of a polysilicon film and a photoresist film is used as a mask at the time of ion implantation. The use of a photoresist film as a mask for ion implantation can prevent a portion of the mask from becoming thinner.However, with a photoresist film alone, the insulating film below the photoresist film will accumulate charge due to charge-up during ion implantation. Therefore, a thin polysilicon film is laid under the photoresist film because there is a risk of being destroyed by an electric field due to the above. Further, after the ion implantation, the photoresist film is removed, but the polysilicon film is left, and is oxidized to be used as a part of the insulating film.
次に、本発明の実施例について図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｄ）は本発明の一実施例を説明する
ための工程順に示した半導体チップの断面図である。1 (a) to 1 (d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.
まず第１図（ａ）に示すように、シリコン基板10上に
酸化膜３で覆われたポリシリコンからなる配線２を形成
したのち、全面に薄いポリシリコン膜を形成する。この
ポリシリコン膜１のカバレッジはアルミニウム膜より良
く、ほぼ全面に均一に形成される。First, as shown in FIG. 1A, a wiring 2 made of polysilicon covered with an oxide film 3 is formed on a silicon substrate 10, and then a thin polysilicon film is formed on the entire surface. The coverage of the polysilicon film 1 is better than that of the aluminum film, and is uniformly formed over almost the entire surface.
次に第１図（ｂ）に示すように、フォトレジスト膜４
を形成しパターニングしてイオン注入不要部分にのみ残
す。Next, as shown in FIG.
Is formed and patterned to leave only those portions where ion implantation is unnecessary.
次に第１図（ｃ）に示すように、残されたフォトレジ
スト膜４をマスクとしてポリシリコン膜１を除去する。
次で残されたポリシリコン膜１とフォトレジスト膜４と
の２層膜をイオン注入用のマスクとして不純物イオン５
をイオン注入し、シリコン基板10に拡散層９を形成す
る。Next, as shown in FIG. 1 (c), the polysilicon film 1 is removed using the remaining photoresist film 4 as a mask.
Next, impurity ions 5 are formed by using the remaining two-layer film of the polysilicon film 1 and the photoresist film 4 as a mask for ion implantation.
Is implanted to form a diffusion layer 9 on the silicon substrate 10.
次に第１図（ｄ）に示すように、マスクとして用いた
フォトレジスト膜４のみを除去したのち、ポリシリコン
膜１を全て酸化し酸化膜６を形成する。そしてこの酸化
膜６を層間絶縁膜として利用する。Next, as shown in FIG. 1 (d), after removing only the photoresist film 4 used as a mask, the polysilicon film 1 is entirely oxidized to form an oxide film 6. This oxide film 6 is used as an interlayer insulating film.
以上説明したように本発明は、不純物のイオン注入に
使用するマスクとして、ポリシリコン膜とフォトレジス
ト膜との２層膜を用いることにより、イオン注入時のチ
ャージアップによる絶縁膜破壊を防ぎ、かつ良好なマス
ク性による不要部分へのイオン注入を防止することがで
きる。また、マスク材として利用したポリシリコン材を
残して酸化することにより、絶縁膜として利用できる
為、ポリシリコン膜のステップカバレッジの良さによる
絶縁性の向上にも寄与でき、半導体装置の信頼性及び歩
留向上の効果は大きい。As described above, the present invention uses a two-layer film of a polysilicon film and a photoresist film as a mask used for ion implantation of an impurity, thereby preventing breakdown of an insulating film due to charge-up during ion implantation, and It is possible to prevent ions from being implanted into unnecessary portions due to good masking properties. In addition, since the polysilicon material used as a mask material is oxidized while being left, it can be used as an insulating film, so that it can contribute to the improvement of insulating properties due to the good step coverage of the polysilicon film, and the reliability and process of the semiconductor device can be improved. The effect of improving the stay is great.
第１図（ａ）〜（ｄ）は本発明の一実施例を説明するた
めの半導体チップの断面図である。 １……ポリシリコン膜、２……配線、３……酸化膜、４
……フォトレジスト膜、５……不純物イオン、６……酸
化膜、９……拡散層、10……シリコン基板。1A to 1D are cross-sectional views of a semiconductor chip for explaining one embodiment of the present invention. 1 ... polysilicon film, 2 ... wiring, 3 ... oxide film, 4
... a photoresist film, 5 ... impurity ions, 6 ... an oxide film, 9 ... a diffusion layer, 10 ... a silicon substrate.
Claims (1)
る２層膜のマスクを用いて不純物をイオン注入し、次で
マスクとして用いた上層のフォトレジスト膜を除去した
のち下層のポリシリコン膜を全て酸化し層間絶縁膜とす
ることを特徴とする半導体装置の製造方法。An impurity is ion-implanted using a two-layer film mask composed of a polysilicon film and a photoresist film, and then the upper photoresist film used as a mask is removed, and then the entire lower polysilicon film is removed. A method for manufacturing a semiconductor device, comprising oxidizing an interlayer insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2306915A JP2624371B2 (en) | 1990-11-13 | 1990-11-13 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2306915A JP2624371B2 (en) | 1990-11-13 | 1990-11-13 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04177828A JPH04177828A (en) | 1992-06-25 |
| JP2624371B2 true JP2624371B2 (en) | 1997-06-25 |
Family
ID=17962809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2306915A Expired - Fee Related JP2624371B2 (en) | 1990-11-13 | 1990-11-13 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2624371B2 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62166565A (en) * | 1986-01-20 | 1987-07-23 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
| JPH0239439A (en) * | 1988-07-28 | 1990-02-08 | Nec Corp | Manufacture of semiconductor device |
| JPH0281439A (en) * | 1988-09-16 | 1990-03-22 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
| JPH0267735A (en) * | 1988-09-02 | 1990-03-07 | Fujitsu Ltd | Semiconductor device and manufacture thereof |
-
1990
- 1990-11-13 JP JP2306915A patent/JP2624371B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04177828A (en) | 1992-06-25 |
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