JP2619872B2 - ラテラルトランジスタ及びラテラルトランジスタを有する半導体集積回路の製造方法 - Google Patents
ラテラルトランジスタ及びラテラルトランジスタを有する半導体集積回路の製造方法Info
- Publication number
- JP2619872B2 JP2619872B2 JP62131977A JP13197787A JP2619872B2 JP 2619872 B2 JP2619872 B2 JP 2619872B2 JP 62131977 A JP62131977 A JP 62131977A JP 13197787 A JP13197787 A JP 13197787A JP 2619872 B2 JP2619872 B2 JP 2619872B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- semiconductor
- lateral transistor
- emitter
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 8
- 238000002513 implantation Methods 0.000 claims description 7
- 238000005468 ion implantation Methods 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- 239000002800 charge carrier Substances 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 238000002161 passivation Methods 0.000 claims 4
- 230000035515 penetration Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 39
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- -1 phosphorus ions Chemical class 0.000 description 7
- 230000003321 amplification Effects 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 239000007943 implant Substances 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000000873 masking effect Effects 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 108091008695 photoreceptors Proteins 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- RJCRUVXAWQRZKQ-UHFFFAOYSA-N oxosilicon;silicon Chemical compound [Si].[Si]=O RJCRUVXAWQRZKQ-UHFFFAOYSA-N 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000007669 thermal treatment Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/60—Lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
- H10D62/184—Base regions of bipolar transistors, e.g. BJTs or IGBTs of lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
- H10D89/711—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements
- H10D89/713—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/009—Bi-MOS
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/01—Bipolar transistors-ion implantation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3618166.8 | 1986-05-30 | ||
| DE19863618166 DE3618166A1 (de) | 1986-05-30 | 1986-05-30 | Lateraltransistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62291171A JPS62291171A (ja) | 1987-12-17 |
| JP2619872B2 true JP2619872B2 (ja) | 1997-06-11 |
Family
ID=6301915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62131977A Expired - Fee Related JP2619872B2 (ja) | 1986-05-30 | 1987-05-29 | ラテラルトランジスタ及びラテラルトランジスタを有する半導体集積回路の製造方法 |
Country Status (5)
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5156990A (en) * | 1986-07-23 | 1992-10-20 | Texas Instruments Incorporated | Floating-gate memory cell with tailored doping profile |
| US5258644A (en) * | 1988-02-24 | 1993-11-02 | Hitachi, Ltd. | Semiconductor device and method of manufacture thereof |
| EP0396948B1 (en) * | 1989-04-21 | 1997-12-29 | Nec Corporation | Bi-cmos integrated circuit |
| JP2950577B2 (ja) * | 1990-04-27 | 1999-09-20 | 沖電気工業株式会社 | ＢｉＣＭＯＳ半導体集積回路の製造方法 |
| US5281544A (en) * | 1990-07-23 | 1994-01-25 | Seiko Epson Corporation | Method of manufacturing planar type polar transistors and combination bipolar/MIS type transistors |
| JP2842682B2 (ja) * | 1990-11-08 | 1999-01-06 | シャープ株式会社 | 半導体装置の製造方法 |
| US5629547A (en) * | 1991-04-23 | 1997-05-13 | Intel Corporation | BICMOS process for counter doped collector |
| GB2255226B (en) * | 1991-04-23 | 1995-03-01 | Intel Corp | Bicmos process for counter doped collector |
| KR940007466B1 (ko) * | 1991-11-14 | 1994-08-18 | 삼성전자 주식회사 | BiCMOS 소자의 제조방법 |
| US5198376A (en) * | 1992-07-07 | 1993-03-30 | International Business Machines Corporation | Method of forming high performance lateral PNP transistor with buried base contact |
| EP0646967B1 (en) * | 1993-09-27 | 1999-09-08 | STMicroelectronics S.r.l. | Low-noise pnp transistor |
| US5422502A (en) * | 1993-12-09 | 1995-06-06 | Northern Telecom Limited | Lateral bipolar transistor |
| US5360750A (en) * | 1994-01-13 | 1994-11-01 | United Microelectronics Corp. | Method of fabricating lateral bipolar transistors |
| DE9419617U1 (de) * | 1994-12-07 | 1996-04-04 | Ic - Haus Gmbh, 55294 Bodenheim | MOS-Leistungstransistor |
| US5917219A (en) * | 1995-10-09 | 1999-06-29 | Texas Instruments Incorporated | Semiconductor devices with pocket implant and counter doping |
| US5945726A (en) * | 1996-12-16 | 1999-08-31 | Micron Technology, Inc. | Lateral bipolar transistor |
| DE19743265A1 (de) * | 1997-09-30 | 1999-04-08 | Siemens Ag | Halbleiter-Leistungsbauelement mit erhöhter Latch-up-Festigkeit |
| US6140170A (en) * | 1999-08-27 | 2000-10-31 | Lucent Technologies Inc. | Manufacture of complementary MOS and bipolar integrated circuits |
| US6117718A (en) * | 1999-08-31 | 2000-09-12 | United Microelectronics Corp. | Method for forming BJT via formulation of high voltage device in ULSI |
| US6551869B1 (en) * | 2000-06-09 | 2003-04-22 | Motorola, Inc. | Lateral PNP and method of manufacture |
| US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
| US6815816B1 (en) * | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
| US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
| US6979606B2 (en) * | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
| AU2003293540A1 (en) * | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
| US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
| US8168487B2 (en) * | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
| US8035196B2 (en) * | 2008-04-02 | 2011-10-11 | Zarlink Semiconductor (Us) Inc. | Methods of counter-doping collector regions in bipolar transistors |
| EP2718965A4 (en) * | 2011-06-09 | 2014-11-12 | Commissariat L Energie Atomique Et Aux Energies Alternatives | METHOD FOR PRODUCING A FIELD EFFECT TRANSISTOR WITH IMPLANTATION THROUGH THE SPACERS |
| US9502504B2 (en) * | 2013-12-19 | 2016-11-22 | International Business Machines Corporation | SOI lateral bipolar transistors having surrounding extrinsic base portions |
| CN212062440U (zh) * | 2020-06-24 | 2020-12-01 | 广东致能科技有限公司 | 一种常关型器件 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CH441512A (fr) * | 1966-08-02 | 1967-08-15 | Centre Electron Horloger | Transistor latéral et procédé pour sa fabrication |
| US3873989A (en) * | 1973-05-07 | 1975-03-25 | Fairchild Camera Instr Co | Double-diffused, lateral transistor structure |
| US4199775A (en) * | 1974-09-03 | 1980-04-22 | Bell Telephone Laboratories, Incorporated | Integrated circuit and method for fabrication thereof |
| DE2507613C3 (de) * | 1975-02-21 | 1979-07-05 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Herstellung eines invers betriebenen Transistors |
| DE2529951A1 (de) * | 1975-07-04 | 1977-01-27 | Siemens Ag | Lateraler, bipolarer transistor |
| NL176322C (nl) * | 1976-02-24 | 1985-03-18 | Philips Nv | Halfgeleiderinrichting met beveiligingsschakeling. |
| US4115797A (en) * | 1976-10-04 | 1978-09-19 | Fairchild Camera And Instrument Corporation | Integrated injection logic with heavily doped injector base self-aligned with injector emitter and collector |
| DE2835330C3 (de) * | 1978-08-11 | 1982-03-11 | Siemens AG, 1000 Berlin und 8000 München | Integrierter bipolarer Halbleiterschaltkreis sowie Verfahren zu seiner Herstellung |
| JPS55110071A (en) * | 1979-02-16 | 1980-08-25 | Seiko Instr & Electronics Ltd | Semiconductor device |
| JPS55156366A (en) * | 1979-05-24 | 1980-12-05 | Toshiba Corp | Semiconductor device |
| JPS567463A (en) * | 1979-06-29 | 1981-01-26 | Hitachi Ltd | Semiconductor device and its manufacture |
| US4283236A (en) * | 1979-09-19 | 1981-08-11 | Harris Corporation | Method of fabricating lateral PNP transistors utilizing selective diffusion and counter doping |
| JPS56131954A (en) * | 1980-03-19 | 1981-10-15 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device |
| JPS56150848A (en) * | 1980-04-23 | 1981-11-21 | Semiconductor Res Found | Semiconductor integrated circuit and lateral transistor |
| US4346512A (en) * | 1980-05-05 | 1982-08-31 | Raytheon Company | Integrated circuit manufacturing method |
| JPS5925241A (ja) * | 1982-08-02 | 1984-02-09 | Fujitsu Ltd | Ｐｎｐトランジスタ |
| JPS59181060A (ja) * | 1983-03-30 | 1984-10-15 | Fujitsu Ltd | 半導体装置 |
| US4637125A (en) * | 1983-09-22 | 1987-01-20 | Kabushiki Kaisha Toshiba | Method for making a semiconductor integrated device including bipolar transistor and CMOS transistor |
| US4891533A (en) * | 1984-02-17 | 1990-01-02 | Analog Devices, Incorporated | MOS-cascoded bipolar current sources in non-epitaxial structure |
| JPS6174369A (ja) * | 1984-09-20 | 1986-04-16 | Sony Corp | 半導体装置 |
| US4649629A (en) * | 1985-07-29 | 1987-03-17 | Thomson Components - Mostek Corp. | Method of late programming a read only memory |
| US4669177A (en) * | 1985-10-28 | 1987-06-02 | Texas Instruments Incorporated | Process for making a lateral bipolar transistor in a standard CSAG process |
-
1986
- 1986-05-30 DE DE19863618166 patent/DE3618166A1/de active Granted
-
1987
- 1987-05-02 DE DE8787106346T patent/DE3768854D1/de not_active Expired - Lifetime
- 1987-05-02 EP EP87106346A patent/EP0247386B1/de not_active Expired - Lifetime
- 1987-05-06 US US07/046,534 patent/US4829356A/en not_active Expired - Lifetime
- 1987-05-29 JP JP62131977A patent/JP2619872B2/ja not_active Expired - Fee Related
- 1987-05-30 KR KR1019870005539A patent/KR950006479B1/ko not_active Expired - Fee Related
-
1989
- 1989-04-14 US US07/337,945 patent/US4956305A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR870011704A (ko) | 1987-12-26 |
| DE3618166A1 (de) | 1987-12-03 |
| EP0247386B1 (de) | 1991-03-27 |
| US4829356A (en) | 1989-05-09 |
| DE3618166C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1989-10-26 |
| US4956305A (en) | 1990-09-11 |
| DE3768854D1 (de) | 1991-05-02 |
| EP0247386A3 (en) | 1988-03-16 |
| EP0247386A2 (de) | 1987-12-02 |
| JPS62291171A (ja) | 1987-12-17 |
| KR950006479B1 (ko) | 1995-06-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2619872B2 (ja) | ラテラルトランジスタ及びラテラルトランジスタを有する半導体集積回路の製造方法 | |
| US4761384A (en) | Forming retrograde twin wells by outdiffusion of impurity ions in epitaxial layer followed by CMOS device processing | |
| US6445044B2 (en) | Apparatus improving latchup immunity in a dual-polysilicon gate | |
| US3955269A (en) | Fabricating high performance integrated bipolar and complementary field effect transistors | |
| JPH0481337B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| US4663825A (en) | Method of manufacturing semiconductor device | |
| US5082796A (en) | Use of polysilicon layer for local interconnect in a CMOS or BiCMOS technology incorporating sidewall spacers | |
| US20050067631A1 (en) | Low noise vertical variable gate control voltage JFET device in a BiCMOS process and methods to build this device | |
| JPH0348457A (ja) | 半導体装置およびその製造方法 | |
| JPH04226064A (ja) | 半導体装置用の相互接続体及びその製造方法 | |
| US4724221A (en) | High-speed, low-power-dissipation integrated circuits | |
| US5081518A (en) | Use of a polysilicon layer for local interconnect in a CMOS or BICMOS technology incorporating sidewall spacers | |
| US5221635A (en) | Method of making a field-effect transistor | |
| KR920008422B1 (ko) | 반도체 장치 | |
| US5851863A (en) | Semiconductor device | |
| JPH0831542B2 (ja) | ＢｉＣＭＯＳ電界効果トランジスタの製造方法 | |
| JPH02101747A (ja) | 半導体集積回路とその製造方法 | |
| JPH09148617A (ja) | 光半導体装置 | |
| JPH05235346A (ja) | 半導体装置及びその製造方法 | |
| JPS649742B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| KR0136915B1 (ko) | 레치-업 현상을 방지할 수 있는 바이폴라-씨모스의 제조방법 | |
| JP2572658B2 (ja) | インテリジェントパワー半導体装置の製造方法 | |
| JPS6143858B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| US20030027383A1 (en) | Method for manufacturing a bipolar transistor in a CMOS integrated circuit | |
| JP2003519903A (ja) | Ｄｍｏｓトランジスタの極性保護回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |