JP2591422Y2 - Defective device classification and accommodation mechanism of TAB device - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a TAB device classifying / accommodating mechanism for classifying and accommodating a defective device punched by a punch unit, which is judged to be defective by a tester.

[0002]

2. Description of the Related Art Next, the configuration of a conventional TAB device defective device accommodating mechanism will be described with reference to FIG. 2 is a TAB device, 4 is a punch unit, 8 is a tester, 8A is a measuring unit in the tester, and 9 is a box. Also,
1A is an IC chip of a TAB device, 1B is a measuring unit 8A
Is a defective device of the TAB device 1 determined to be defective. The tester 8 outputs a good signal 11 or a bad signal 12 according to the test result. The configuration of the TAB test apparatus is described, for example, in Japanese Utility Model Application No. 4-26012.

The good signal 11 or the bad signal 12 from the tester 8 is sent to the punch unit 4 and is advanced by one pitch by a transport mechanism (not shown). Hereinafter, T is sequentially displayed on the tester 8.
The AB device 1 is transported and measured, and a good signal 11 or a bad signal 12 is sent to the punch unit 4. When the TAB device 1 is transported onto the punch unit 4 and the failure signal 12 is sent, the punch unit 4 punches out the failure device 1B and drops it into the box 9. In FIG. 2, TA
When the B device advances by three pitches from the tester 8, it is sent to the punch unit 4.

[0004]

In order to analyze the failure contents of the defective device 1B in the box 9, the defective device 1B
Since the encapsulating resin of the IC chip 1A is removed one by one and all the components are rechecked, it takes time to analyze the cause of the defect. For example, when analyzing whether the TAB tape pattern is defective or bonding error, all the devices are checked up to the device which is not an open defect.

In this invention, when the IC chip 1A is defective, a tester outputs a defective classification signal of the defective device 1B, an arithmetic circuit outputs a carrier signal from the defective classification signal, and the defective device punched by the punch unit 4. By transporting the box containing 1B by the transport signal and storing the defective device 1B in the storage box classified according to the defect classification signal,
An object of the present invention is to provide a TAB device defective device classification and accommodation mechanism for extracting only a device of a defective item to be analyzed.

[0006]

In order to achieve this object, in the present invention, the IC chip 1A of the TAB device 1 is used.
Tester 2 which outputs a good signal 11 and a defective signal 12 from the test result of the IC chip 1A, and outputs a defect classification signal 13 of the defective device 1B when the IC chip 1A is defective.
And the arithmetic circuit 3 which receives the failure classification signal 13 as input and outputs the carrier signal 14, and is tested by the measuring unit 2A in the tester 2.
The TAB device 1 is advanced by a distance corresponding to the pitch and is conveyed. When a failure signal 12 is sent, a punch unit 4 for punching out the failure device 1B and a punch unit 4 are arranged below the punch unit 4.
A box 5 for receiving the defective device 1B punched by the punch unit 4, a transport mechanism 6 for transporting the box 5 by a transport signal 14, and a defective device 1 transported by the transport mechanism 6
And a storage box 7 for storing B separately for each of the defect classification signals 13.

[0007]

Next, the configuration of the TAB device defect classification apparatus according to the present invention will be described with reference to FIG. 1 in FIG. 1 is a tester,
Reference numeral 3 denotes an arithmetic circuit, reference numeral 6 denotes a transport mechanism, reference numeral 7 denotes a storage box, and the other components are the same as those in FIG. 1 is obtained by replacing the tester 8 of FIG. 2 with the tester 2, replacing the box 9 with the box 5, and adding the arithmetic circuit 3, the transport mechanism 6, and the storage box 7.

The tester 2 tests the IC chip 1A of the TAB device 1, and determines a good signal 1 based on the test result of the IC chip 1A.
1 and a failure signal 12, and outputs a failure classification signal 13 of the failure device 1B when the IC chip 1A is defective. The arithmetic circuit 3 receives the failure classification signal 13 as an input,
Is output.

The punch unit 4 is the same as that shown in FIG. 2, and the transport mechanism 6 transports the box 5 by a transport signal 14.
FIG. 1 illustrates a transport mechanism 6 including a pulse motor 6A, pulleys 6B and 6C, a belt 6D, and an air cylinder 6E. In the storage box 7, a place to be stored is determined according to the content of the defect, and the defective device 1B transported by the transport mechanism 6 is stored according to the content of the defect.

[0010]

Next, the operation of the transport mechanism 6 will be described with reference to FIG. When the transport signal 14 is sent, the pulse motor 6A
Operates to move the belt 6D wound around the pulleys 6B and 6C. The air cylinder 6E attached to the belt 6D, the box 5 attached to the air cylinder 6E, and the air cylinder 6F move by the distance specified by the arithmetic circuit 3.

When the box 5 containing the defective device 1B stops on the storage box 7 classified according to the defect classification signal 13, a transport signal 14 is sent from the arithmetic circuit 3 to the air cylinder 6F.
The air cylinder 6F operates to remove the bottom plate 5A from under the box 5. When the bottom plate 5A disappears, the defective device 1B in the box 5 falls downward, and the defective device 1B is stored in the designated position of the storage box 7.

Next, the relationship between the box 5 and the storage box 7 will be described with reference to FIG. At the bottom of the box 5, a bottom plate 5A is incorporated.
A is connected to the air cylinder 6F of the transport mechanism 6. FIG.
When the box 5 is transported to the position of the storage box 7 specified by the above, a transport signal 14 is supplied to the air cylinder 6F. The air cylinder 6F moves the bottom plate 5A in the direction of the arrow to drop the defective device 1B into the storage box 7.

[0013]

According to the invention, when an IC chip is defective, a tester outputs a defect classification signal of a defective device, an arithmetic circuit outputs a carrier signal from the defect classification signal, and a defect punched by a punch unit. Since the box containing the devices is transported by the transport signal and the defective devices are stored in the storage boxes classified according to the failure classification signals, only the devices of the defective items to be analyzed can be taken out.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a defective device classification and accommodation mechanism of a TAB device according to the present invention.

FIG. 2 is a configuration diagram of a defective device accommodation mechanism of a TAB device according to the related art.

FIG. 3 is an operation explanatory view of the transport mechanism 6 of FIG. 1;

FIG. 4 is a diagram illustrating the relationship between the box 5 and the storage box 7 in FIG.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 TAB device 1A IC chip 1B defective device 2 tester 2A measuring unit 3 arithmetic circuit 4 punch unit 5 box 6 transport mechanism 7 storage box 11 good signal 12 defective signal 13 defect classification signal 14 transport signal

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-235866 (JP, A) Jikken 51-16299 (JP, Y1) (58) Fields studied (Int. Cl. ⁶ , DB name) G01R 31/18 G01R 31/26

Claims (1)

(57) [Scope of request for utility model registration] An IC chip (1A) of a TAB device (1) is tested, a good signal (11) and a bad signal (12) are output from the test result of the IC chip (1A), and the IC chip (1A) is defective. Tester (2) that outputs the fault classification signal (13) of the faulty device (1B)
And an arithmetic circuit (3) that receives a failure classification signal (13) and outputs a carrier signal (14), and a TAB device tested by the measurement unit (2A) in the tester (2)
Punch unit that punches out defective device (1B) when (1) is advanced by the pitch equivalent and is sent a failure signal (12)
(4) and the punch unit (4).
Box (5) to receive the defective device (1B) punched in (4)
And a transport mechanism (6) for transporting the box (5) by the transport signal (14), and a housing for storing the defective device (1B) transported by the transport mechanism (6) separately according to the defect classification signal (13). A box (7) for storing a defective device classification / accommodation mechanism of a TAB device.