JPH0594780U - TAB device defective device classification / accommodation mechanism - Google Patents

Abstract

(57) [Summary] [Purpose] By storing the defective devices 1B in the storage boxes 7 sorted by the defective classification signals, only the defective devices to be analyzed are taken out. [Structure] The tester 2 outputs a good signal 11 and a defective signal 12 from the test result of the IC chip 1A, and outputs a defective classification signal 13 of the defective device 1B when the IC chip 1A is defective. The arithmetic circuit 3 receives the defect classification signal 13 as an input and outputs the carrier signal 14. The box 5 receives the defective device 1B punched by the punch unit 4, and the carrying mechanism 6 carries the box 5 by the carrying signal 14. The storage box 7 stores the defective device 1B transported by the transport mechanism 6.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 This invention relates to a defective device classification / accommodation mechanism for a TAB device, which classifies and accommodates defective devices that have been determined to be defective by a tester and punched out by a punch unit.

[0002]

[Prior Art]

 Next, the configuration of the defective device accommodating mechanism of the TAB device according to the related art will be described with reference to FIG. In FIG. 2, 1 is a TAB device, 4 is a punch unit, 8 is a tester, 8A is a measuring unit in the tester, and 9 is a box. Further, 1A is an IC chip of the TAB device, and 1B is a defective device of the TAB device 1 determined to be defective by the measuring unit 8A. The tester 8 outputs a good signal 11 or a bad signal 12 depending on the test result. The configuration of the TAB test apparatus is also described, for example, in Japanese Patent Application No. 4-26012.

The good signal 11 or the bad signal 12 from the tester 8 is sent to the punch unit 4, and advances by one pitch by a carrying mechanism (not shown). Thereafter, the TAB device 1 is sequentially carried on the tester 8 and measured, and the good signal 11 or the bad signal 12 is sent to the punch unit 4. When the TAB device 1 is conveyed onto the punch unit 4 and the defective signal 12 is sent, the punch unit 4 punches out the defective device 1B and drops it into the box 9. In FIG. 2, the TAB device is sent onto the punch unit 4 when it advances from the tester 8 by three pitches.

[0004]

[Problems to be solved by the device]

 In order to analyze the defect contents of the defective device 1B in the box 9, the sealing resin of the IC chip 1A of the defective device 1B is removed one by one, and the total number is rechecked. It takes. For example, when analyzing whether the TAB tape pattern is defective or the bonding is defective, all devices including open defects are checked.

According to the present invention, when the IC chip 1A is defective, the tester outputs a defective classification signal of the defective device 1B, an arithmetic circuit outputs a carrier signal from the defective classification signal, and the punch unit 4 punches the defective defect. The box containing the device 1B is conveyed by the conveyance signal, and the defective device 1B is accommodated in the accommodation box sorted by the defect classification signal, so that only the device of the defective item to be analyzed is taken out. For the purpose of provision.

[0006]

[Means for Solving the Problems]

 In order to achieve this object, the present invention tests the IC chip 1A of the TAB device 1 and outputs a good signal 11 and a bad signal 12 from the test result of the IC chip 1A. The tester 2 which outputs the defect classification signal 13 of 1B, the arithmetic circuit 3 which inputs the defect classification signal 13 and outputs the carrier signal 14, and the defective device 1B when the defective device 1B is conveyed and the defective signal 12 is sent. Punch unit 4 for punching out, a box 5 arranged below the punch unit 4 for receiving the defective device 1B punched by the punch unit 4, a transport mechanism 6 for transporting the box 5 by a transport signal 14, and a transport mechanism 6. And a storage box 7 for storing the defective devices 1B conveyed by the above according to the defective classification signals 13.

[0007]

[Action]

 Next, the configuration of the TAB device failure classification device according to the present invention will be described with reference to FIG. In FIG. 1, 2 is a tester, 3 is an arithmetic circuit, 6 is a transport mechanism, 7 is an accommodation box, and the others are the same as in FIG. In FIG. 1, the tester 8 in FIG. 2 is replaced with the tester 2, the box 9 is replaced with the box 5, and the arithmetic circuit 3, the transport mechanism 6, and the storage box 7 are added.

The tester 2 tests the IC chip 1A of the TAB device 1, outputs a good signal 11 and a bad signal 12 from the test result of the IC chip 1A, and if the IC chip 1A is bad, classifies the bad device 1B as defective. The signal 13 is output. The arithmetic circuit 3 inputs the defect classification signal 13 and outputs the carrier signal 14.

The punch unit 4 is the same as that shown in FIG. 2, and the transport mechanism 6 transports the box 5 by a transport signal 14. In FIG. 1, a transport mechanism 6 including a pulse motor 6A, pulleys 6B and 6C, a belt 6D, and an air cylinder 6E is illustrated. In the storage box 7, the location of storage is determined according to the content of the defect, and the defective device 1B transported by the transport mechanism 6 is stored according to the content of the defect.

[0010]

【Example】

 Next, the operation of the transport mechanism 6 will be described with reference to FIG. When the carrier signal 14 is sent, the pulse motor 6A operates to move the belt 6D wound around the pulleys 6B and 6C. The air cylinder 6E attached to the belt 6D, the box 5 attached to the air cylinder 6E, and the air cylinder 6F move by the distance designated by the arithmetic circuit 3.

When the box 5 containing the defective device 1B stops on the storage box 7 classified by the defect classification signal 13, the carrier signal 14 is sent from the arithmetic circuit 3 to the air cylinder 6F, and the air cylinder 6F operates. Then, the bottom plate 5A is removed from the bottom of the box 5. When the bottom plate 5A disappears, the defective device 1B in the box 5 falls down, and the defective device 1B is stored in the designated position of the storage box 7.

Next, the relationship between the box 5 and the storage box 7 will be described with reference to FIG. A bottom plate 5A is incorporated in the bottom of the box 5, and the bottom plate 5A is connected to an air cylinder 6F of the transport mechanism 6. When the box 5 is transported to the position of the storage box 7 designated by FIG. 3, the transport signal 14 is supplied to the air cylinder 6F. The air cylinder 6F moves the bottom plate 5A in the direction of the arrow to drop the defective device 1B into the accommodation box 7.

[0013]

[Effect of the device]

 According to this invention, when the IC chip is defective, the tester outputs a defect classification signal of the defective device, the arithmetic circuit issues a carrier signal from the defect classification signal, and the defective device punched by the punch unit is inserted. The boxes are transported by the transport signal, and the defective devices are stored in the storage boxes sorted by the defect classification signals, so that only the devices of the defective items to be analyzed can be taken out.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a defective device classification accommodating mechanism of a TAB device according to the present invention.

FIG. 2 is a configuration diagram of a defective device accommodating mechanism of a TAB device according to a conventional technique.

FIG. 3 is an explanatory view of the operation of the transport mechanism 6 of FIG.

FIG. 4 is an explanatory view of the relationship between the box 5 and the storage box 7 in FIG.

[Explanation of symbols]

 1 TAB Device 1A IC Chip 1B Defective Device 2 Tester 2A Measuring Section 3 Calculation Circuit 4 Punch Unit 5 Box 6 Transport Mechanism 7 Storage Box 11 Good Signal 12 Fault Signal 13 Fault Classification Signal 14 Transport Signal

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Creator Toshiyuki Tezuka 4-19-7 Kamata, Ota-ku, Tokyo Ando Denki Co., Ltd.

Claims (1)

[Scope of utility model registration request] 1. The IC chip (1A) of the TAB device (1) is tested, a good signal (11) and a bad signal (12) are output from the test result of the IC chip (1A), and the IC chip (1A) is defective. In case of, the tester (2) which outputs the defect classification signal (13) of the defective device (1B)
And the operation circuit (3) that inputs the defect classification signal (13) and outputs the carrier signal (14), and the defective device (1B) is conveyed, and the defective signal (12) is sent, the defective device (1B) Punch unit (4) and the punch unit (4)
Box (5) for receiving the defective device (1B) punched out in (4)
And a transport mechanism (6) that transports the box (5) by the transport signal (14), and a defective device (1B) transported by the transport mechanism (6) that is classified according to the defect classification signal (13). A defective device classification accommodating mechanism for a TAB device, comprising: a box (7).